Rob Clark [Sat, 9 Sep 2017 10:47:40 +0000 (06:47 -0400)]
lib: add some utf16 handling helpers
We'll eventually want these in a few places in efi_loader, and also
vsprintf.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sat, 9 Sep 2017 10:47:39 +0000 (06:47 -0400)]
kbuild: Enable -fshort-wchar
EFI_LOADER really wants UTF-16 strings (ie. %ls and L"string" are 16bit
chars instead of 32bit chars). But rather than enabling -fshort-wchar
conditionally if EFI_LOADER is enabled, it was deemed preferrable to
globally switch.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tom Rini [Tue, 12 Sep 2017 16:02:50 +0000 (12:02 -0400)]
Merge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Tue, 12 Sep 2017 15:00:53 +0000 (11:00 -0400)]
Travis-CI: Update PATH
We now can no longer re-use the provided path and need to give the
full PATH we want used now.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 12 Sep 2017 13:32:51 +0000 (09:32 -0400)]
Merge git://git.denx.de/u-boot-dm
Patrice Chotard [Mon, 4 Sep 2017 12:55:57 +0000 (14:55 +0200)]
dm: test: replace dm_scan_dt() by of dm_extended_scan_fdt() in dm_do_test
This allows to scan the DT including all "clocks" node's sub-nodes
in which fixed-clock are defined.
All fixed-clock should be defined inside a clocks node which collect all
external oscillators. Until now, all clocks sub-nodes can't be binded except
if the "simple-bus" compatible string is added which is a hack.
Update test.dts by moving clk_fixed node inside clocks.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Mon, 4 Sep 2017 12:55:56 +0000 (14:55 +0200)]
dm: core: add clocks node scan
Currently, all fixed-clock declared in "clocks" node in device tree
can be binded by clk_fixed_rate.c driver only if each of them have
the "simple-bus" compatible string.
This constraint has been invoked here [1].
This patch offers a solution to avoid adding "simple-bus" compatible
string to nodes that are not busses.
[1] https://patchwork.ozlabs.org/patch/558837/
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Chris Packham [Fri, 1 Sep 2017 08:57:53 +0000 (20:57 +1200)]
patman: add support for omitting bouncing addresses
Add support for reading a list of bouncing addresses from a in-tree file
(doc/bounces) and from the ~/.patman config file. These addresses are
stripped from the Cc list.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com <mailto:philipp.tomsich@theobroma-systems.com>>
Simon Glass [Sun, 13 Aug 2017 22:02:54 +0000 (16:02 -0600)]
moveconfig: Use fd.write() instead of print >>
Adjust this code so that it can work with Python 2 and 3.
Fixes: d73fcb1 (moveconfig: Support building a simple config database)
Reported-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 5 Aug 2017 21:45:54 +0000 (15:45 -0600)]
dm: core: Add ofnode_for_each_subnode()
Add a convenience macro to iterate over subnodes of a node. Make use of
this where appropriate in the code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 4 Aug 2017 09:30:30 +0000 (03:30 -0600)]
genconfig.py: Print defconfig next to warnings
At present we sometimes see warnings of the form:
/tmp/tmpMA89kB:36: warning: overriding the value of CMD_SPL.
Old value: "y", new value: "y".
This is not very useful as it does not show whch defconfig file it relates
to. Update the tool to show this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 2 Aug 2017 18:12:02 +0000 (12:12 -0600)]
dm: core: Show driver name with 'dm tree'
It is often useful to see which driver was actually selected for each
device. Add a new 'Driver' column to provide this information. Sample
output:
Class Probed Driver Name
----------------------------------------
root [ + ] root_drive root_driver
keyboard [ + ] i8042_kbd |-- keyboard
serial [ + ] ns16550_se |-- serial
rtc [ ] rtc_mc1468 |-- rtc
timer [ + ] tsc_timer |-- tsc-timer
syscon [ + ] ich6_pinct |-- pch_pinctrl
pci [ + ] pci_x86 |-- pci
northbridge [ + ] bd82x6x_no | |-- northbridge@0,0
video [ + ] bd82x6x_vi | |-- gma@2,0
vidconsole0 [ + ] vidconsole | | `-- gma@2,0.vidconsole0
...
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 2 Aug 2017 18:12:01 +0000 (12:12 -0600)]
dm: core: Drop use of strlcpy()
We can use printf() to limit the string width. Adjust the code to do this
instead of using strlcpy() which is a bit clumbsy.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Tue, 1 Aug 2017 23:33:34 +0000 (16:33 -0700)]
sandbox: Convert SANDBOX_BITS_PER_LONG to Kconfig
Convert SANDBOX_BITS_PER_LONG to Kconfig and assign it a correct
number depending on which host we are going to build and run.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Tue, 1 Aug 2017 23:33:33 +0000 (16:33 -0700)]
sandbox: Introduce Kconfig option for 32/64 bit host
It seems most of the time we are building and running sandbox on 64-bit host.
But we do support 32-bit host as well. Introduce Kconfig option for this.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jean-Jacques Hiblot [Fri, 9 Jun 2017 14:45:18 +0000 (16:45 +0200)]
blk: dm: make blk_create_device() take a number of block instead of a size
There is an overflow problem when taking the size instead of the number
of blocks in blk_create_device(). This results in a wrong device size: the
device apparent size is its real size modulo 4GB.
Using the number of blocks instead of the device size fixes the problem and
is more coherent with the internals of the block layer.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Wed, 6 Sep 2017 05:08:14 +0000 (13:08 +0800)]
misc: Kconfig: Add SPL_I2C_EEPROM option
This option is an SPL-variant of the I2C_EEPROM option to enable
the driver for generic I2C-attached EEPROMs for SPL.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Fri, 1 Sep 2017 08:26:18 +0000 (16:26 +0800)]
board: sama5d4_xplained: Set mac address from eeprom
Add the code to set the ethernet mac address from eeprom by using
the common code from the common folder.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Fri, 1 Sep 2017 08:26:17 +0000 (16:26 +0800)]
board: sama5d2_xplained: Replace code to set mac address
Replace the code to set the ethernet mac address with the code from
the common folder.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Fri, 1 Sep 2017 08:26:16 +0000 (16:26 +0800)]
board: atmel: Create board/$(VENDOR)/common folder
Create board/$(VENDOR)/common folder to accommodate the common code
shared by other atmel boards, now put the code to set ethernet mac
address from eeprom, which uses the i2c eeprom driver.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Lokesh Vutla [Wed, 23 Aug 2017 06:09:07 +0000 (11:39 +0530)]
env: ti: boot: Select dtb name for X15 revC
Select dtb name for am57xx BeagleBoard-X15 revC
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Wed, 23 Aug 2017 06:09:06 +0000 (11:39 +0530)]
board: ti: am57xx: Add dt support for BeagleBoard-X15 revC
Add support for selecting proper dtb for
am57xx BeagleBoard X15 revC u-boot from FIT
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Steve Kipisz [Tue, 22 Aug 2017 08:22:58 +0000 (13:52 +0530)]
board: ti: am571x: Add 666MHz support for AM571x IDK
AM571x supports DDR running at 666MHz. Right now it is
clocked at 532MHz which is lower than what is supported.
In order to have maximum performance on AM571-IDK,
switch DDR to 666MHz.
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Mon, 21 Aug 2017 07:21:01 +0000 (12:51 +0530)]
board: ti: dra76: Add dt support
Add support for selecting proper dtb for
dra76x u-boot from FIT.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Mon, 21 Aug 2017 07:21:00 +0000 (12:51 +0530)]
arm: dts: Add u-boot specific compatibles
Separate out u-boot specific compatibles from dts files.
This will help in syncing dts files in future.
Also these will get deleted eventually once respective drivers
are capable of handling Linux dts files.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Mon, 21 Aug 2017 07:20:59 +0000 (12:50 +0530)]
arm: dts: dra7: sync DT with latest Linux
Sync all dra7* specific dts files with the upstream
kernel including changes queued for 4.14
https://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git/log/?h=omap-for-v4.14/dt-v3
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Mon, 21 Aug 2017 07:20:58 +0000 (12:50 +0530)]
env: ti: boot: Select dtb name for dra76
Select dtb name for dra76-evm.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 21 Aug 2017 07:20:57 +0000 (12:50 +0530)]
board: ti: dra76-evm: Add support for powering on mmc ldo
ldo4 is used to poweron mmc on dra76-evm. Enable it.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 21 Aug 2017 07:20:56 +0000 (12:50 +0530)]
board: ti: dra76-evm: Add the pinmux data
Adding pinmux and IODELAY data for dra76-evm.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 21 Aug 2017 07:20:55 +0000 (12:50 +0530)]
board: ti: dra76-evm: Add DDR data
dra76-evm has the ddr parts connectedi running at 666MHz:
EMIF1: MT41K512M16HA-125 AIT:A x 2
EMIF2: MT41K512M8RH-125-AAT:E x 4
Add support for configuring the above DDR parts.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Keerthy [Mon, 21 Aug 2017 07:20:54 +0000 (12:50 +0530)]
board: ti: dra76-evm: Add the pmic data
dra76-evm uses lp8736 and tps65917 pmic for powering on
various peripherals. Add data for these pmics and register
for dra76-evm.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 21 Aug 2017 07:20:53 +0000 (12:50 +0530)]
board: ti: dra76-evm: Add epprom support
The dra76-evm is a board based on TI's DRA76 processor
Add eeprom support
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Praneeth Bajjuri [Mon, 21 Aug 2017 07:20:52 +0000 (12:50 +0530)]
arm: dra76: Add support for ES1.0 detection
dra76 family is a high-performance, infotainment application
device, based on OMAP architecture on a 28-nm technology.
This contains most of the subsystems, peripherals that are
available on dra74, dra72 family. This SoC mainly features
Subsystems:
- 2 x Cortex-A15 with max speed of 1.8GHz
- 2 X DSP
- 2 X Cortex-M4 IPU
- ISS
- CAL
- DSS
- VPE
- VIP
Connectivity peripherals:
- 1 USB3.0 and 3 USB2.0 subsystems
- 1 x SATA
- 2 x PCI Express Gen2
- 3-port Gigabit ethernet switch
- 2 x CAN
- MCAN
Adding CPU detection support for the dra76 ES1.0 soc
and update prcm, control module, dplls data.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 21 Aug 2017 07:20:51 +0000 (12:50 +0530)]
arm: dra7: Kconfig: Select LP87565 related configs
LP87565 is present on dra76-evm. Select it for
TARGET_DRA7XX_EVM.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Mon, 21 Aug 2017 07:20:50 +0000 (12:50 +0530)]
palmas: Add support for powering different ldos
It is not necessary that ldo1 is used to power on mmc.
So, add support for passing ldo registers for powering on mmc.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 21 Aug 2017 07:20:49 +0000 (12:50 +0530)]
arm: omap5+: Add board specific ldo powering
It is not necessary all omap5+ based uses the same PMIC
to poweron mmc. So add support for enabling mmc based on board.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tom Rini [Mon, 11 Sep 2017 19:54:39 +0000 (15:54 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-video
Tom Rini [Mon, 11 Sep 2017 18:10:40 +0000 (14:10 -0400)]
Prepare v2017.09
Signed-off-by: Tom Rini <trini@konsulko.com>
Jorge Ramirez-Ortiz [Mon, 11 Sep 2017 14:07:02 +0000 (16:07 +0200)]
MAINTAINERS: board: qcom: db410c: Maintainer changed
Replacing original author Mateusz Kulikowski
<mateusz.kulikowski@gmail.com> as db410c maintainer
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
York Sun [Fri, 8 Sep 2017 16:33:49 +0000 (09:33 -0700)]
armv8: fsl-layerscape: Add back L3 flushing for all exception levels
CCN-504 HPF registers were believed to be accessible only from EL3.
However, recent tests proved otherwise. Remove checking for exception
level to re-enable L3 cache flushing for all levels.
Signed-off-by: York Sun <york.sun@nxp.com>
Tested-by: Zhao Qiang <qiang.zhao@nxp.com>
Hou Zhiqiang [Mon, 4 Sep 2017 02:47:54 +0000 (10:47 +0800)]
armv8: ls1088a: Enable PCIe in defconfigs
Enabled PCIe support and PCI command feature.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Hou Zhiqiang [Mon, 4 Sep 2017 02:47:53 +0000 (10:47 +0800)]
armv8: ls1088a: add PCIe dts node
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Hou Zhiqiang [Mon, 4 Sep 2017 02:47:52 +0000 (10:47 +0800)]
armv8: ls1088a: fix the MMU table for pcie config space
The pcie config space of ls1088a is different from ls2080a.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
York Sun [Thu, 7 Sep 2017 17:12:32 +0000 (10:12 -0700)]
armv8: fsl-layerscape: Fix MC reserved memory calculation
In case high region memory doesn't have enough space for Management
Complex (MC), the return value should indicate a failure so the
caller can handle it accordingly.
Signed-off-by: York Sun <york.sun@nxp.com>
Reported-by: Ebony Zhu <ebony.zhu@nxp.com>
Ran Wang [Mon, 4 Sep 2017 10:46:55 +0000 (18:46 +0800)]
armv7: Add workaround for USB erratum A-009007
Rx Compliance tests may fail intermittently at high
jitter frequencies using default register values
Program register USB_PHY_RX_OVRD_IN_HI in certain sequence
to make the Rx compliance test pass.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Suresh Gupta <suresh.bhagat@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: Reordered Kconfig options]
Reviewed-by: York Sun <york.sun@nxp.com>
Ran Wang [Mon, 4 Sep 2017 10:46:54 +0000 (18:46 +0800)]
armv7: Add workaround for USB erratum A-008997
Low Frequency Periodic Singaling (LFPS) Peak-to-Peak Differential
Output Voltage Test Compliance fails using default transmitter settings
Change config of transmitter signal swings by setting register
PCSTXSWINGFULL to 0x47 to pass compliance tests.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: Reordered Kconfig options]
Reviewed-by: York Sun <york.sun@nxp.com>
Ran Wang [Mon, 4 Sep 2017 10:46:53 +0000 (18:46 +0800)]
armv7: Add workaround for USB erratum A-009798
The default setting for USB High Speed Squelch Threshold results
in a threshold close to or lower than 100mV. This leads to Receive
Compliance test failure for a 100mV threshold.
Shift the threshold from ~100mV towards ~130mV by setting SQRXTUNE
to 0x0 to pass USB High Speed Receiver Sensitivity Compliance test.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: Reordered Kconfig options]
Reviewed-by: York Sun <york.sun@nxp.com>
Ran Wang [Mon, 4 Sep 2017 10:46:52 +0000 (18:46 +0800)]
armv7: Add workaround for USB erratum A-009008
USB High Speed (HS) EYE Height Adjustment
USB HS speed eye diagram fails with the default value at
many corners, particularly at a high temperature
Optimal eye at TXREFTUNE value to 0x9 is observed, change
set the same value.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: Reordered Kconfig options]
Reviewed-by: York Sun <york.sun@nxp.com>
Ran Wang [Mon, 4 Sep 2017 10:46:51 +0000 (18:46 +0800)]
armv8: Add workaround for USB erratum A-009007
Rx Compliance tests may fail intermittently at high
jitter frequencies using default register values.
Program register USB_PHY_RX_OVRD_IN_HI in certain sequence
to make the Rx compliance test pass.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Suresh Gupta <suresh.bhagat@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: Reordered Kconfig options]
Reviewed-by: York Sun <york.sun@nxp.com>
Ran Wang [Mon, 4 Sep 2017 10:46:50 +0000 (18:46 +0800)]
armv8: Add workaround for USB erratum A-008997
Low Frequency Periodic Signaling(LFPS) Peak-to-Peak Differential
Output Voltage Test Compliance fails using default transmitter
settings
Change config of transmitter signal swings by setting register
PCSTXSWINGFULL to 0x47 to pass compliance tests.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: Reordered Kconfig options]
Reviewed-by: York Sun <york.sun@nxp.com>
Ran Wang [Mon, 4 Sep 2017 10:46:49 +0000 (18:46 +0800)]
armv8: Add workaround for USB erratum A-009798
The default setting for USB High Speed Squelch Threshold results
in a threshold close to or lower than 100mV. This leads to Receiver
Compliance test failure for a 100mV threshold.
Shift the threshold from ~100mV towards ~130mV by setting SQRXTUNE
to 0x0 to pass USB High Speed Receiver Sensitivity Compliance test.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: Reordered Kconfig options]
Reviewed-by: York Sun <york.sun@nxp.com>
Ran Wang [Mon, 4 Sep 2017 10:46:48 +0000 (18:46 +0800)]
armv8: Add workaround for USB erratum A-009008
USB High Speed (HS) EYE Height Adjustment
USB HS speed eye diagram fails with the default value at
many corners, particularly at a high temperature
Optimal eye at TXREFTUNE value to 0x9 is observed, change
set the same value.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: Reordered Kconfig options]
Reviewed-by: York Sun <york.sun@nxp.com>
Ran Wang [Mon, 4 Sep 2017 10:46:47 +0000 (18:46 +0800)]
armv8: Add scfg_clrsetbits_32(), scfg_clrbits_32()
Some erratum patch might need it to program registers.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Prabhakar Kushwaha [Thu, 31 Aug 2017 11:07:32 +0000 (16:37 +0530)]
armv8: ls1088aqds: Add support of EC1 and EC2
EC1 and EC2 are RGMII interface on ls1088aqds platform.
This patch add support of RGMII with PHY and MDIO
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Ashish Kumar [Thu, 31 Aug 2017 11:07:31 +0000 (16:37 +0530)]
armv8: fsl-layerscape: Support to add RGMII for ls1088aqds
This patch adds support for RGMII protocol
NXP's LDPAA2 support RGMII protocol. LS1088A is the
first Soc supporting both RGMII and SGMII.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Ashish Kumar [Thu, 31 Aug 2017 10:42:55 +0000 (16:12 +0530)]
armv8: ls1088aqds: Add support of LS1088AQDS
This patch add support of LS1088AQDS platform.
The LS1088A QorIQTM Development System (QDS) is a high-performance
computing, evaluation, and development platform that supports the
LS1088A QorIQ Architecture processor.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Ashish Kumar [Thu, 31 Aug 2017 10:42:54 +0000 (16:12 +0530)]
armv8: ls1088ardb: Add support for LS1088ARDB platform
LS1088A is an ARMv8 implementation. The LS1088ARDB is an evaluatoin
platform that supports the LS1088A family SoCs. This patch add basic
support of the platform.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
[YS: Disabled NAND in board header file]
Reviewed-by: York Sun <york.sun@nxp.com>
WIP: disable NAND for LS1088ARDB
Ashish Kumar [Thu, 31 Aug 2017 10:42:53 +0000 (16:12 +0530)]
armv8: ls1088a: Add NXP LS1088A SoC support
LS1088A is compliant with the Layerscape Chassis Generation 3 with
eight ARM v8 Cortex-A53 cores in 2 cluster, CCI-400, one 64-bit DDR4
SDRAM memory controller with ECC, Data path acceleration architecture
2.0 (DPAA2), Ethernet interfaces (SGMIIs, RGMIIs, QSGMIIs, XFIs),
QSPI, IFC, PCIe, SATA, USB, SDXC, DUARTs etc.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
[YS: Revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
Suresh Gupta [Tue, 29 Aug 2017 13:42:43 +0000 (19:12 +0530)]
armv8: fsl-layerscape: Fix final MMU table for QSPI and IFC
For QSPI and IFC addresses execution shouldn't be allowed
when u-boot running from DDR. Revise the MMU final table
to enforce execute-never bits.
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Ran Wang [Mon, 28 Aug 2017 02:40:33 +0000 (10:40 +0800)]
armv8: fsl: Use correct conditional compile for ls1012a
According current code base, CONFIG_LS1012A should be
CONFIG_ARCH_LS1012A, or function fsl_fdt_disable(blob) will be
wrongly called to disable all dwc3 USB nodes on LS1012A, which
cause Linux USB function stop working at all.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Priyanka Jain [Thu, 24 Aug 2017 11:12:43 +0000 (16:42 +0530)]
drivers:net:fsl-mc: Update MC address calculation
Update MC address calculation as per MC design requirement of address
as least significant 512MB address of MC private allocated memory,
i.e. address should point to end address masked with 512MB offset in
private DRAM block.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com>
[YS: reformatted commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
Ashish Kumar [Fri, 18 Aug 2017 05:24:36 +0000 (10:54 +0530)]
armv8: fsl-lsch3: Make CCN-504 related code conditional
LS2080 family has CCN-504 cache coherent interconnet. Other SoCs
in LSCH3 family may have differnt interconnect.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
[YS: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
York Sun [Tue, 15 Aug 2017 18:14:45 +0000 (11:14 -0700)]
spl: fit: Add booting OS first
If CONFIG_SPL_OS_BOOT is enabled, boot OS if kernel image is found
in FIT structure.
Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
York Sun [Tue, 15 Aug 2017 18:14:44 +0000 (11:14 -0700)]
spl: fit: Support both external and embedded data
SPL supports U-Boot image in FIT format which has data outside of
FIT structure. This adds support for embedded data for normal FIT
images.
Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
York Sun [Tue, 15 Aug 2017 18:14:43 +0000 (11:14 -0700)]
spl: fit: Eanble GZIP support for image decompression
Add Kconfig option SPL_GZIP and SPL_ZLIB to enable gunzip support for
SPL boot, eg. falcon boot compressed kernel image.
Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
York Sun [Tue, 15 Aug 2017 18:14:42 +0000 (11:14 -0700)]
cmd: spl: Fix compiling warning
Fix warning "cast from pointer to integer of different size".
Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
York Sun [Tue, 15 Aug 2017 18:14:41 +0000 (11:14 -0700)]
tools: pblimage: Fix address calculation
The image size should be added to the initial pbl command, not bit
"ORed".
Signed-off-by: York Sun <york.sun@nxp.com>
Udit Agarwal [Wed, 16 Aug 2017 11:13:30 +0000 (07:13 -0400)]
armv8: LS2080ARDB: Add secure boot defconfig for QSPI boot.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
[YS: dropped redundant commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
Udit Agarwal [Wed, 16 Aug 2017 11:13:29 +0000 (07:13 -0400)]
LS2080ARDB: QSPI boot: Secure Boot image validation
Adds header address for PPA to be validated during ESBC phase for
ARCH_LS2088 and QSPI_BOOT. Moves sec_init prior to ppa_init(). It
must be initialized before the PPA.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
[YS: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
Sumit Garg [Wed, 16 Aug 2017 11:13:28 +0000 (07:13 -0400)]
SECURE_BOOT: Unify memory map for Layerscape based platforms
Unify memory map for Layerscape based platforms. This patch includes
changes in bootscript, bootscript header and PPA header addresses
change as per unified memory map.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Zhao Qiang [Mon, 14 Aug 2017 02:22:43 +0000 (10:22 +0800)]
QE: Set QE_IRAM_READY after uploading firmware
QE_IRAM_READY should be set only after successfully uploading the
firmware.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Ashish Kumar [Fri, 11 Aug 2017 05:39:14 +0000 (11:09 +0530)]
fsl-layerscape: Consolidate registers space defination for CCI-400 bus
CoreLink Cache Coherent Interconnect (CCI) provides full cache
coherency between two clusters of multi-core CPUs and I/O coherency
for devices and I/O masters.
This patch add new config option SYS_FSL_HAS_CCI400 and moves
existing register space definaton of CCI-400 bus to fsl_immap to be
shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET
in Kconfig.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
[YS: revised commit message, squashed patches for armv8 and armv7]
Reviewed-by: York Sun <york.sun@nxp.com>
Fabio Estevam [Wed, 6 Sep 2017 16:49:31 +0000 (13:49 -0300)]
ipu_common: Let the MX6 IPU clock be calculated in run-time
MX6Q/QP IPU operates at 264MHz and MX6DL IPU at 198MHz.
When running a SPL target, which supports multiple MX6 variants we cannot
properly setup the IPU clock frequency via CONFIG_IPUV3_CLK option as
such decision is done in build-time currently.
Remove the CONFIG_IPUV3_CLK option and let the IPU clock frequency be
configured in run-time on mx6.
Reported-by: Eric Nelson <eric@nelint.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
[agust: fixed #endif in cgtqmx6eval.h]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Bin Meng [Sun, 10 Sep 2017 12:12:53 +0000 (05:12 -0700)]
cmd: ide: Make the first device the default one
At present the IDE device number is initialized to -1, which means
we cannot type "ide read" command before setting the device number
via "ide device #".
For convenience, let's set the first device as the default one.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sun, 10 Sep 2017 12:12:52 +0000 (05:12 -0700)]
block: ide: Don't bother to create BLK device if no CDROM inserted
When there is no CDROM inserted, the block size is zero hence there
is no need to create a BLK device for it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sun, 10 Sep 2017 12:12:51 +0000 (05:12 -0700)]
block: ide: Fix block read/write with driver model
This converts the IDE driver to driver model so that block read and
write are fully functional.
Fixes: b7c6baef ("x86: Convert MMC to driver model")
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Bin Meng [Sun, 10 Sep 2017 12:12:50 +0000 (05:12 -0700)]
blk: Use macros for block device vendor/product/rev string size
So far these are using magic numbers. Replace them with macros.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 8 Sep 2017 20:43:24 +0000 (16:43 -0400)]
edison: Disable CONFIG_USB_HOST_ETHER
This board does dwc3 gadget, not host, so we cannot have host support or
we will fail to link.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 8 Sep 2017 17:12:16 +0000 (13:12 -0400)]
env: Migrate CONFIG_ENV_AES to Kconfig and deprecate
The underlying implementation for ENV_AES has security complications and
is not recommended for use. Please see CVE-2017-3225 and CVE-2017-3226
for more details. Mark this as deprecated now and delete this in the
medium term if no one comes forward to re-work the support.
Signed-off-by: Tom Rini <trini@konsulko.com>
Chris Packham [Mon, 28 Aug 2017 08:50:47 +0000 (20:50 +1200)]
usb: doc: update README.usb for new config options
A number of the config options for USB networking have been migrated to
Kconfig. Update README.usb to reflect this.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Chris Packham [Mon, 28 Aug 2017 08:50:46 +0000 (20:50 +1200)]
usb: net: migrate USB Ethernet adapters to Kconfig
This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Chris Packham [Mon, 28 Aug 2017 08:50:45 +0000 (20:50 +1200)]
usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig
CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Chris Packham [Mon, 28 Aug 2017 08:50:44 +0000 (20:50 +1200)]
Kconfig: drop CONFIG_USB_ETHER_RNDIS
This is not a valid option. Drop it.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Chris Packham [Mon, 28 Aug 2017 08:50:43 +0000 (20:50 +1200)]
Kconfig: drop CONFIG_USB_ETHER_DM9601
This is not a valid option. Drop it.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Nobuhiro Iwamatsu [Fri, 25 Aug 2017 22:34:14 +0000 (07:34 +0900)]
README: Fix typo in description of CONFIG_OF_EMBED
The correct name is 'gd->fdt_blob', not 'gd->blob'.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 8 Sep 2017 14:14:49 +0000 (10:14 -0400)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Kever Yang [Fri, 8 Sep 2017 03:00:54 +0000 (11:00 +0800)]
rockchip: enable SPL_SYSRESET config for all Rockchip SoCs
With Makefiles testing for $(SPL_TPL_)SYSRESET, we need SPL_SYSRESET
for do_reset() in SPL for Rockchip SoCs.
References:
87c16d4 "drivers: spl: consistently use the $(SPL_TPL_) macro"
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Wed, 6 Sep 2017 07:58:25 +0000 (15:58 +0800)]
rockchip: rk3328: fix syscon id table
syscon id table need a dummy member as NULL ending, or else system
will panic while try to match a compatible in this table as a list.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Marek Vasut [Thu, 7 Sep 2017 07:48:24 +0000 (09:48 +0200)]
ARM: rmobile: Disable CONFIG_ARCH_FIXUP_FDT_MEMORY
Disable CONFIG_ARCH_FIXUP_FDT_MEMORY to prevent U-Boot from modifying
the memory {} nodes in the DT passed to the Linux kernel. The R8A779x
DT contains multiple memory {} nodes, while U-Boot only modifies the
first one and stuffs all the memory entries into it, which is wrong.
Disabling CONFIG_ARCH_FIXUP_FDT_MEMORY is the least intrusive way to
fix the issue this close to the release, while the real fix is to
extend the fdt_fixup_memory_banks() to handle multiple memory nodes
in DT.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Tue, 5 Sep 2017 13:11:14 +0000 (15:11 +0200)]
ARM: rmobile: Fix SD divider settings on Gen3
On RCar M3 and on RCar H3 newer than and not including ES1.0, the SD clock
must be divided by 4 rather than 2 because a hardware workaround present
only in the H3 ES1.0 has been removed from these chips. U-Boot currently
only supports M3 and H3 ES 2.0 and newer, so configure the SD pre-divider
to 4 to prevent SD instability.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tom Rini [Thu, 7 Sep 2017 18:48:23 +0000 (14:48 -0400)]
Merge git://git.denx.de/u-boot-net
Heinrich Schuchardt [Tue, 29 Aug 2017 16:44:37 +0000 (18:44 +0200)]
net: fix typos
%s/Desriptor/Descriptor/g
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Madalin Bucur [Fri, 18 Aug 2017 08:37:20 +0000 (11:37 +0300)]
armv8: ls1043/ls1046aqds: add support for RGMII_TXID
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: York Sun <york.sun@nxp.com>
Tom Rini [Mon, 21 Aug 2017 02:40:01 +0000 (22:40 -0400)]
net: nfs: Drop CONFIG_NFS_READ_SIZE
In the general case, CONFIG_NFS_READ_SIZE is unchanged from the default
of 1024. There are in fact no in-tree users that increase this size.
Adjust the comment to reflect what could be done in the future in
conjunction with CONFIG_IP_DEFRAG.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Madalin Bucur [Fri, 18 Aug 2017 08:35:24 +0000 (11:35 +0300)]
net: phy: realtek: fix enabling of the TX-delay for RTL8211F
The old logic always enabled the TX-delay when the phy-mode was set to
PHY_INTERFACE_MODE_RGMII. With this patch we enable the TX delay for
PHY_INTERFACE_MODE_RGMII_ID and PHY_INTERFACE_MODE_RGMII_TXID and
disable it for PHY_INTERFACE_MODE_RGMII.
Based on a similar change made in the Linux Realtek PHY driver
by Martin Blumenstingl <martin.blumenstingl@googlemail.com>.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: York Sun <york.sun@nxp.com>
Kever Yang [Thu, 7 Sep 2017 07:50:18 +0000 (15:50 +0800)]
spl: typo fix for SPL_ATF_SUPPORT description
Delete one redundant 'which' for SPL_ATF_SUPPORT description.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Heinrich Schuchardt [Thu, 7 Sep 2017 01:55:11 +0000 (03:55 +0200)]
linker_lists: remove incorrect comment
Remove a comment line refering to a non-existent file.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Wed, 6 Sep 2017 15:55:13 +0000 (17:55 +0200)]
vsprintf: vsprintf does not have parameter size
The inline documentation of vsprintf mentions a parameter size
which does not exist in the function declaration.
int vsprintf(char *buf, const char *fmt, va_list args);
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Paul Barker [Wed, 6 Sep 2017 07:35:19 +0000 (08:35 +0100)]
Revert "dm: arm: rpi: Drop CONFIG_OF_EMBED"
This reverts commit
25877d4e4c45451c5398aec3de50e0d5befe0e9f.
This is a workaround for Raspberry Pi boot failures seen when passing on
the device tree provided by the Raspberry Pi firmware at boot. Without
CONFIG_OF_EMBED, we just get stuck at "Starting kernel ..." when we try
to boot Linux with this device tree.
Signed-off-by: Paul Barker <pbarker@toganlabs.com>
Cc: Simon Glass <sjg@chromium.org>
Tested-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 6 Sep 2017 05:37:45 +0000 (22:37 -0700)]
tools: .gitignore: Add libfdt related files
Some files are generated during libfdt build. Ignore them.
This was wrongly put in the .gitignore in the root directory before.
Now let's remove entries there and put them in the right place.
Fixes: 34e2c285 ("gitignore: add intermediates from libfdt build")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
projects / platform / kernel / u-boot.git / log