Alistair Francis [Tue, 8 Sep 2015 16:38:45 +0000 (17:38 +0100)]
cadence_gem: Correct Marvell PHY SPCFC reset value
Bit 15 of the PHY Specific Status Register is reserved and
should remain 0. Fix the reset value to ensure that the 15th
bit is not set.
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
c795069e49040ff770fe2ece19dfe1791b729e22.
1441316450.git.alistair.francis@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Edgar E. Iglesias [Tue, 8 Sep 2015 16:38:44 +0000 (17:38 +0100)]
target-arm: Add AArch64 access to PAR_EL1
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Message-id:
1441311266-8644-4-git-send-email-edgar.iglesias@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Edgar E. Iglesias [Tue, 8 Sep 2015 16:38:44 +0000 (17:38 +0100)]
target-arm: Correct opc1 for AT_S12Exx
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Message-id:
1441311266-8644-3-git-send-email-edgar.iglesias@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Edgar E. Iglesias [Tue, 8 Sep 2015 16:38:44 +0000 (17:38 +0100)]
target-arm: Log the target EL when taking exceptions
Log the target EL when taking exceptions. This is useful when
debugging guest SW or QEMU itself while transitioning through
the various ELs.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Message-id:
1441311266-8644-2-git-send-email-edgar.iglesias@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Sergey Sorokin [Tue, 8 Sep 2015 16:38:44 +0000 (17:38 +0100)]
target-arm: Fix default_exception_el() function for the case when EL3 is not supported
If EL3 is not supported in current configuration,
we should not try to get EL3 bitness.
Signed-off-by: Sergey Sorokin <afarallax@yandex.ru>
Message-id:
1441208342-10601-2-git-send-email-afarallax@yandex.ru
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 8 Sep 2015 16:38:44 +0000 (17:38 +0100)]
hw/arm/virt: Enable TZ extensions on the GIC if we are using them
If we're creating a board with support for TrustZone, then enable
it on the GIC model as well as on the CPUs.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1441383782-24378-7-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 8 Sep 2015 16:38:44 +0000 (17:38 +0100)]
hw/arm/virt: Default to not providing TrustZone support
Switch the default for the 'virt' board to not providing TrustZone
support in either the CPU or the GIC. This is primarily for the
benefit of UEFI, which currently assumes there is no TrustZone
support, and does not set the GIC up correctly if it is TZ-aware.
It also means the board is consistent about its behaviour whether
we're using KVM or TCG (KVM never has TrustZone support).
If TrustZone support is required (for instance for running test
suites or TZ-aware firmware) it can be enabled with the
"-machine secure=on" command line option.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1441383782-24378-6-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 8 Sep 2015 16:38:43 +0000 (17:38 +0100)]
hw/cpu/{a15mpcore, a9mpcore}: enable TrustZone in GIC if it is enabled in CPUs
If the A9 and A15 CPUs which we're creating the peripherals for have
TrustZone (EL3) enabled, then also enable it in the GIC we create.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1441383782-24378-5-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 8 Sep 2015 16:38:43 +0000 (17:38 +0100)]
hw/intc/arm_gic_common: Configure IRQs as NS if doing direct NS kernel boot
If we directly boot a kernel in NonSecure on a system where the GIC
supports the security extensions then we must cause the GIC to
configure its interrupts into group 1 (NonSecure) rather than the
usual group 0, and with their initial priority set to the highest
NonSecure priority rather than the usual highest Secure priority.
Otherwise the guest kernel will be unable to use any interrupts.
Implement this behaviour, controlled by a flag which we set if
appropriate when the ARM bootloader code calls our ARMLinuxBootIf
interface callback.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1441383782-24378-4-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 8 Sep 2015 16:38:43 +0000 (17:38 +0100)]
hw/arm: new interface for devices which need to behave differently for kernel boot
For ARM we have a little minimalist bootloader in hw/arm/boot.c which
takes the place of firmware if we're directly booting a Linux kernel.
Unfortunately a few devices need special case handling in this situation
to do the initialization which on real hardware would be done by
firmware. (In particular if we're booting a kernel in NonSecure state
then we need to make a TZ-aware GIC put all its interrupts into Group 1,
or the guest will be unable to use them.)
Create a new QOM interface which can be implemented by devices which
need to do something different from their default reset behaviour.
The callback will be called after machine initialization and before
first reset.
Suggested-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1441383782-24378-3-git-send-email-peter.maydell@linaro.org
Peter Crosthwaite [Tue, 8 Sep 2015 16:38:43 +0000 (17:38 +0100)]
qom: Add recursive version of object_child_for_each
Useful for iterating through an entire QOM subtree.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1441383782-24378-2-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 8 Sep 2015 16:38:43 +0000 (17:38 +0100)]
hw/intc/arm_gic: Actually set the active bits for active interrupts
Although we were correctly handling interrupts becoming active
and then inactive, we weren't actually exposing this to the guest
by setting the 'active' flag for the interrupt, so reads
of GICD_ICACTIVERn and GICD_ISACTIVERn would generally incorrectly
return zeroes. Correct this oversight.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id:
1438089748-5528-6-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 8 Sep 2015 16:38:42 +0000 (17:38 +0100)]
hw/intc/arm_gic: Drop running_irq and last_active arrays
The running_irq and last_active arrays represent state which
doesn't exist in a real hardware GIC. The only thing we use
them for is updating the running priority when an interrupt
is completed, but in fact we can use the active-priority
registers to do this. The running priority is always the
priority corresponding to the lowest set bit in the active
priority registers, because only one interrupt at any
particular priority can be active at once.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id:
1438089748-5528-5-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 8 Sep 2015 16:38:42 +0000 (17:38 +0100)]
hw/intc/arm_gic: Fix handling of GICC_APR<n>, GICC_NSAPR<n> registers
A GICv2 has both GICC_APR<n> and GICC_NSAPR<n> registers, with
the latter holding the active priority bits for Group 1 interrupts
(usually Nonsecure interrupts), and the Nonsecure view of the
GICC_APR<n> is the second half of the GICC_NSAPR<n> registers.
Turn our half-hearted implementation of APR<n> into a proper
implementation of both APR<n> and NSAPR<n>:
* Add the underlying state for NSAPR<n>
* Make sure APR<n> aren't visible for pre-GICv2
* Implement reading of NSAPR<n>
* Make non-secure reads of APR<n> behave correctly
* Implement writing to APR<n> and NSAPR<n>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id:
1438089748-5528-4-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 8 Sep 2015 16:38:42 +0000 (17:38 +0100)]
hw/intc/arm_gic: Running priority is group priority, not full priority
Priority values for the GIC are divided into a "group priority"
and a "subpriority" (with the division being determined by the
binary point register). The running priority is only determined
by the group priority of the active interrupts, not the
subpriority. In particular, this means that there can't be more
than one active interrupt at any particular group priority.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id:
1438089748-5528-3-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 8 Sep 2015 16:38:42 +0000 (17:38 +0100)]
armv7m_nvic: Implement ICSR without using internal GIC state
Change the implementation of the Interrupt Control and State Register
in the v7M NVIC to not use the running_irq and last_active internal
state fields in the GIC. These fields don't correspond to state in
a real GIC and will be removed soon.
The changes to the ICSR are:
* the VECTACTIVE field is documented as identical to the IPSR[8:0]
field, so implement it that way
* implement RETTOBASE via looking at the active state bits
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id:
1438089748-5528-2-git-send-email-peter.maydell@linaro.org
Richard Henderson [Wed, 2 Sep 2015 21:46:01 +0000 (14:46 -0700)]
target-microblaze: Use setcond for pcmp*
Signed-off-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Richard Henderson [Wed, 2 Sep 2015 18:38:10 +0000 (11:38 -0700)]
target-cris: Use movcond and setcond
Signed-off-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Peter Maydell [Mon, 7 Sep 2015 15:07:47 +0000 (16:07 +0100)]
Merge remote-tracking branch 'remotes/cohuck/tags/s390x-
20150907' into staging
s390x fixes and improvements:
- various bugfixes (css/event-facility)
- more efficient adapter interrupt routes setup
- gdb enhancement
- sclp got treated with a lot of remodelling/cleanup
# gpg: Signature made Mon 07 Sep 2015 15:42:43 BST using RSA key ID
C6F02FAF
# gpg: Good signature from "Cornelia Huck <huckc@linux.vnet.ibm.com>"
# gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>"
* remotes/cohuck/tags/s390x-
20150907: (23 commits)
s390/sclp: simplify calculation of rnmax
s390/sclp: store the increment_size in the sclp device
s390: unify allocation of initial memory
s390: move memory calculation into the sclp device
s390/sclp: ignore memory hotplug operations if it is disabled
s390: disallow memory hotplug for the s390-virtio machine
s390: no need to manually parse for slots and maxmem
s390/sclp: move sclp_service_interrupt into the sclp device
s390/sclp: move sclp_execute related functions into the SCLP class
s390/sclp: introduce a root sclp device
s390/sclp: temporarily fix unassignment/reassignment of memory subregions
s390/sclp: replace sclp event types with proper defines
s390/sclp: rework sclp event facility initialization + device realization
sclp/s390: rework sclp cpu hotplug device notification
s390x/gdb: support reading/writing of control registers
s390x/kvm: make setting of in-kernel irq routes more efficient
pc-bios/s390-ccw: rebuild image
pc-bios/s390-ccw: Device detection in higher subchannel sets
s390x/event-facility: fix location of receive mask
s390x/css: start with cleared cstat/dstat
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
David Hildenbrand [Mon, 1 Jun 2015 11:04:03 +0000 (13:04 +0200)]
s390/sclp: simplify calculation of rnmax
rnmax can be directly calculated using machine->maxram_size.
Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
David Hildenbrand [Mon, 1 Jun 2015 11:03:23 +0000 (13:03 +0200)]
s390/sclp: store the increment_size in the sclp device
Let's calculate it once and reuse it.
Suggested-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
David Hildenbrand [Fri, 29 May 2015 13:01:55 +0000 (15:01 +0200)]
s390: unify allocation of initial memory
Now that the calculation of the initial memory is hidden in the sclp
device, we can unify the allocation of the initial memory.
The remaining ugly part is the reserved memory for the virtio queues,
but that can be cleaned up later.
Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
David Hildenbrand [Fri, 29 May 2015 11:53:08 +0000 (13:53 +0200)]
s390: move memory calculation into the sclp device
The restrictions for memory calculation belong to the sclp device.
Let's move the calculation to that point, so we are able to unify it for
both s390 machines. The sclp device is the first device to be initialized.
It performs the calculation and safely stores it in the machine, where
other parts of the system can access an reuse it.
The memory hotplug device is now only created when it is really needed.
Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
David Hildenbrand [Fri, 29 May 2015 12:06:39 +0000 (14:06 +0200)]
s390/sclp: ignore memory hotplug operations if it is disabled
If no memory hotplug device was created, the sclp command facility is
not exposed (SCLP_FC_ASSIGN_ATTACH_READ_STOR). We therefore have no
memory hotplug and should correctly report SCLP_RC_INVALID_SCLP_COMMAND
if any such command is executed.
This gets rid of these ugly asserts that could have been triggered
for the s390-virtio machine.
Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
David Hildenbrand [Fri, 29 May 2015 11:22:12 +0000 (13:22 +0200)]
s390: disallow memory hotplug for the s390-virtio machine
That machine type doesn't currently support memory hotplug, so let's abort
if it is requested. Reason is, that the virtio queues are allocated for now
at the end of the initial ram - extending the ram is therefore not possible.
Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
David Hildenbrand [Fri, 29 May 2015 11:14:50 +0000 (13:14 +0200)]
s390: no need to manually parse for slots and maxmem
ram_slots and maxram_size has already been parsed and verified by
common code for us.
Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
David Hildenbrand [Wed, 13 May 2015 13:06:44 +0000 (15:06 +0200)]
s390/sclp: move sclp_service_interrupt into the sclp device
Let's make that function a method of the new sclp device, keeping
the wrapper for existing users.
We can now let go of get_event_facility().
Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
David Hildenbrand [Wed, 27 May 2015 08:04:56 +0000 (10:04 +0200)]
s390/sclp: move sclp_execute related functions into the SCLP class
Let's move the sclp_execute related functions into the SCLP class
and pass the device state as parameter, so we have easy access to
the SCLPDevice later on.
Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
David Hildenbrand [Wed, 27 May 2015 07:49:43 +0000 (09:49 +0200)]
s390/sclp: introduce a root sclp device
Let's create a root sclp device, which has other sclp devices as
children (e.g. the event facility for now) and can later be used
for migration of sclp specific attributes and setup of memory.
Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
David Hildenbrand [Sat, 13 Jun 2015 06:46:54 +0000 (08:46 +0200)]
s390/sclp: temporarily fix unassignment/reassignment of memory subregions
Commit
374f2981d1f1 ("memory: protect current_map by RCU") broke
unassignment of standby memory on s390x. Looks like that the new
parallelism allows races with our (semi broken) memory hotplug code. The
flatview_unref() can now be executed after our unparenting. Therefore
memory_region_unref() tries to unreference the MemoryRegion itself instead
of the parent.
In theory, MemoryRegions are now bound to separate devices that control
their lifetime. We don't have this yet, so we really want to control their
lifetime manually.
This patch fixes it temporarily, until we have a proper rework. The only
drawback is that they won't pop up in "info qom-tree", but that's better
than qemu crashes.
We have to release the reference to a memory region after a
memory_region_find, as it automatically takes a reference. As we're now
able to reassign memory, the MemoryRegion is in fact deleted (otherwise
vmstate_register_ram() would complain).
Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
David Hildenbrand [Mon, 11 May 2015 13:31:47 +0000 (15:31 +0200)]
s390/sclp: replace sclp event types with proper defines
Introduce TYPE_SCLP_QUIESCE and make use of it. Also use
TYPE_SCLP_CPU_HOTPLUG where applicable.
Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
David Hildenbrand [Thu, 21 May 2015 10:43:31 +0000 (12:43 +0200)]
s390/sclp: rework sclp event facility initialization + device realization
The current code only works by chance. The event facility is a sysbus
device, but specifies in its class structure as parent the DeviceClass
(instead of a device class).
The init function in return lies therefore at the same position as
the init function of SysBusDeviceClass and gets triggered instead -
a very bad idea of doing that (e.g. the parameter types don't match).
Let's bring the initialization code up to date, initializing the event
facility + child events in .instance_init and moving the realization of
the child events out of the init call, into the realization step.
Device realization is now automatically performed when the event facility
itself is realized. That realization implicitly triggers realization of
the child bus, which in turn initializes the events.
Please note that we have to manually propagate the realization of the bus
children, common code still has a TODO set for that task.
Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
David Hildenbrand [Mon, 11 May 2015 13:30:43 +0000 (15:30 +0200)]
sclp/s390: rework sclp cpu hotplug device notification
Let's get rid of this strange local variable + irq logic and
work directly on the QOM. (hint: what happens if two such devices
are created?)
We could introduce proper QOM class + state for the cpu hotplug device,
however that would result in too much overhead for a simple
"trigger_signal" function.
Also remove one unnecessary class function initialization.
Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
David Hildenbrand [Tue, 23 Jun 2015 09:00:09 +0000 (11:00 +0200)]
s390x/gdb: support reading/writing of control registers
Let's support reading and writing of control registers for kvm and tcg.
We have to take care of flushing the tlb (tcg) and pushing the changed
registers into kvm.
Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Jens Freimann [Mon, 27 Jul 2015 14:53:27 +0000 (16:53 +0200)]
s390x/kvm: make setting of in-kernel irq routes more efficient
When we add new adapter routes we call kvm_irqchip_add_route() for every
virtqueue and in the same step also do the KVM_SET_GSI_ROUTING ioctl.
This is unnecessary costly as the interface allows us to set multiple
routes in one go. Let's first add all routes to the table stored in the
global kvm_state and then do the ioctl to commit the routes to the
in-kernel irqchip.
This saves us several ioctls to the kernel where for each call a list
is reallocated and populated.
Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com>
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Cornelia Huck [Tue, 11 Aug 2015 08:53:41 +0000 (10:53 +0200)]
pc-bios/s390-ccw: rebuild image
Contains:
- Device detection in higher subchannel sets
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Alexander Yarygin [Thu, 25 Jun 2015 15:35:58 +0000 (18:35 +0300)]
pc-bios/s390-ccw: Device detection in higher subchannel sets
If no bootdevice was specified, we try to autodetect a suitable IPL
device. Current code only searched in subchannel set 0; extend this
search to higher subchannel sets as well.
Signed-off-by: Alexander Yarygin <yarygin@linux.vnet.ibm.com>
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Cornelia Huck [Mon, 27 Jul 2015 14:55:23 +0000 (16:55 +0200)]
s390x/event-facility: fix location of receive mask
For read event mask, we assumed that the layout of the sccb was
|sccb header|event buffer header|receive mask|...|
The correct layout, however, is
|sccb header|receive mask|...|
as in-buffer and
|sccb header|event buffer header|...|
as out-buffer.
Fix this: This makes selective read work.
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Cornelia Huck [Fri, 24 Jul 2015 10:08:37 +0000 (12:08 +0200)]
s390x/css: start with cleared cstat/dstat
When executing the start function, we should start with a clear state
regarding subchannel and device status; it is easy to forget updating one
of them after the ccw has been processed.
Note that we don't need to care about resetting the various control
fields: They are cleared by tsch(), and if they were still pending,
we wouldn't be able to execute the start function in the first
place.
Also note that we don't want to clear cstat/dstat if a suspended
subchannel is resumed.
This fixes a bug where we would continue to present channel-program
check in cstat even though later ccw requests for the subchannel
finished without error (i.e. cstat should be 0).
Cc: qemu-stable@nongnu.org
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Cornelia Huck [Wed, 1 Jul 2015 13:28:06 +0000 (15:28 +0200)]
s390x/event-facility: fix receive mask check
For selective read event, we need to check if any event is requested
that is not active instead of whether none of the requested events is
active.
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Reviewed-by: Eric Farman <farman@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Cornelia Huck [Thu, 16 Jul 2015 08:42:18 +0000 (10:42 +0200)]
s390x/css: ccw-0 enforces count > 0
Type-0 ccws need to have a count > 0 for any command other than TIC.
Generate a channel-program check if this is not the case.
Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Pierre Morel [Wed, 15 Jul 2015 14:16:20 +0000 (16:16 +0200)]
s390x/css: handle ccw-0 TIC correctly
In CCW-0 format TIC command 4 highest bits are ignored in the subchannel.
In CCW-1 format the TIC command 4 highest bits must be 0.
To convert TIC from CCW-0 to CCW-1 we clear the 4 highest bits
to guarantee compatibility.
Signed-off-by: Pierre Morel <pmorel@linux.vnet.ibm.com>
Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Peter Maydell [Fri, 24 Jul 2015 12:33:12 +0000 (13:33 +0100)]
Make pow2ceil() and pow2floor() inline
Since the pow2floor() function is now used in a hot code path,
make it inline; for consistency, provide pow2ceil() as an inline
function too.
Because these functions use ctz64() we have to put the inline
versions into host-utils.h, so they have access to ctz64(),
and move the inline is_power_of_2() along with them.
We then need to include host-utils.h from qemu-common.h so that
the files which use these functions via qemu-common.h still have
access to them.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id:
1437741192-20955-7-git-send-email-peter.maydell@linaro.org
Peter Maydell [Fri, 24 Jul 2015 12:33:11 +0000 (13:33 +0100)]
Remove unused qemu_fls function
Nothing uses qemu_fls() any more, so delete it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id:
1437741192-20955-6-git-send-email-peter.maydell@linaro.org
Peter Maydell [Fri, 24 Jul 2015 12:33:10 +0000 (13:33 +0100)]
exec.c: Use pow2floor() rather than hand-calculation
Use pow2floor() to round down to the nearest power of 2,
rather than an inline calculation.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id:
1437741192-20955-5-git-send-email-peter.maydell@linaro.org
Peter Maydell [Fri, 24 Jul 2015 12:33:09 +0000 (13:33 +0100)]
hw/block/nvme.c: Use pow2ceil() rather than hand-calculation
Use pow2ceil() to round up to the next power of 2, rather
than an inline calculation.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id:
1437741192-20955-4-git-send-email-peter.maydell@linaro.org
Peter Maydell [Fri, 24 Jul 2015 12:33:08 +0000 (13:33 +0100)]
hw/virtio/virtio-pci: Use pow2ceil() rather than hand-calculation
Use the utility function pow2ceil() for rounding up to the next
largest power of 2, rather than inline calculation.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-id:
1437741192-20955-3-git-send-email-peter.maydell@linaro.org
Peter Maydell [Fri, 24 Jul 2015 12:33:07 +0000 (13:33 +0100)]
hw/pci: Use pow2ceil() rather than hand-calculation
A couple of places in hw/pci use an inline calculation to round a
size up to the next largest power of 2. We have a utility routine
for this, so use it.
(The behaviour of the old code is different if the size value
is 0 -- it would leave it as 0 rather than rounding up to 1,
but in both cases we know the size can't be 0.
In the case where the size value had bit 31 set, the old code
would invoke undefined behaviour; the new code will give a
result of 0. Presumably that could never happen either.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-id:
1437741192-20955-2-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 7 Sep 2015 10:23:08 +0000 (11:23 +0100)]
Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
Block layer patches
# gpg: Signature made Fri 04 Sep 2015 20:45:33 BST using RSA key ID
C88F2FD6
# gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>"
* remotes/kevin/tags/for-upstream:
quorum: validate vote threshold against num_children even if read-pattern is fifo
qcow2: reorder fields in Qcow2CachedTable to reduce padding
docs: document how to configure the qcow2 L2/refcount caches
qcow2: add option to clean unused cache entries after some time
qcow2: mark the memory as no longer needed after qcow2_cache_empty()
iotests: Warn if python subprocess is killed
iotests: Do not suppress segfaults in bash tests
iotests: Respect -nodefaults in tests 41 and 55
iotests: More options for VM.add_drive()
qemu-img: Fix crash in amend invocation
block/raw-posix: Use raw_normalize_devicepath()
qemu-iotests: s390x: fix test 130
qemu-iotests: s390x: fix test 049, reject negative sizes in QemuOpts
qemu-iotests: s390x: fix test 041 and 055
qemu-iotests: disable default qemu devices for cross-platform compatibility
qemu-iotests: qemu machine type support
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Mon, 7 Sep 2015 09:43:18 +0000 (10:43 +0100)]
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-
20150907' into staging
target-arm queue:
* cleanup to use g_new() and friends
* support semihosting in A64
* add SMBIOS support to mach-virt
* remove hw_error() usages
* fix bug in the AArch32:AArch64 register mapping
* add a second PCI memory window in highmem on virt board
* fix bug in arm_excp_unmasked()
* add i.MX31 SoC
* remove restriction on handling affinity values in virt board
# gpg: Signature made Mon 07 Sep 2015 10:40:48 BST using RSA key ID
14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg: aka "Peter Maydell <pmaydell@gmail.com>"
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
* remotes/pmaydell/tags/pull-target-arm-
20150907: (27 commits)
arm/virt: Add full-sized CPU affinity handling
target-arm: Refactor CPU affinity handling
i.MX: Add i2C devices to i.MX31 SOC
i.MX: Add qtest support for I2C device emulator.
i.MX: Add the i.MX25 PDK platform
i.MX: Add SOC support for i.MX25
i.MX: Add FEC Ethernet Emulator
i.MX: Add I2C controller emulator
i.MX: KZM: use standalone i.MX31 SOC support
i.MX: Add SOC support for i.MX31
target-arm: Fix arm_excp_unmasked() function
hw/arm/virt: Add high MMIO PCI region, 512G in size
target-arm: Fix AArch32:AArch64 general-purpose register mapping
arm: Remove hw_error() usages.
arm: cpu: assert() on no-EL2 virt IRQ error condition.
smbios: implement smbios support for mach-virt
smbios: add smbios 3.0 support
target-arm: Wire up HLT 0xf000 as the A64 semihosting instruction
target-arm/arm-semi.c: SYS_EXIT on A64 takes a parameter block
target-arm/arm-semi.c: Implement A64 specific SyncCacheRange call
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Pavel Fedin [Mon, 7 Sep 2015 09:39:31 +0000 (10:39 +0100)]
arm/virt: Add full-sized CPU affinity handling
At least with KVM, currently there's no reason why QEMU would not be
capable of handling Aff3 != 0. This commit fixes up FDT creation in such
a case.
Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
Message-id:
eef5a86e6d9a313780dbc23b35fcb65df42a3e9e.
1441366248.git.p.fedin@samsung.com
[PMM: folded two overlong lines]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Pavel Fedin [Mon, 7 Sep 2015 09:39:31 +0000 (10:39 +0100)]
target-arm: Refactor CPU affinity handling
Introduces reusable definitions for CPU affinity masks/shifts and gets rid
of hardcoded magic numbers.
Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
Message-id:
7e6def4d0d91ae64615cdd2035b94d408d0a23c6.
1441366248.git.p.fedin@samsung.com
[PMM: folded overlong line]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Jean-Christophe Dubois [Mon, 7 Sep 2015 09:39:31 +0000 (10:39 +0100)]
i.MX: Add i2C devices to i.MX31 SOC
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id:
fb20e6bf5cf946c4530b2cfb55c7e37f5a0fc051.
1441057361.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Jean-Christophe Dubois [Mon, 7 Sep 2015 09:39:31 +0000 (10:39 +0100)]
i.MX: Add qtest support for I2C device emulator.
This is using a ds1338 RTC chip on the I2C bus. This RTC chip is
not present on the real 3DS PDK board.
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Acked-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id:
05601683a2a95c881cbc9f22651a044d969bd0ae.
1441057361.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Jean-Christophe Dubois [Mon, 7 Sep 2015 09:39:31 +0000 (10:39 +0100)]
i.MX: Add the i.MX25 PDK platform
Tested by booting a minimal Linux system on the emulated platform
Tested by booting the Xvisor hypervisor on the emulated platform
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id:
d27347300d253509d921bc27a6d0a14db877478b.
1441057361.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Jean-Christophe Dubois [Mon, 7 Sep 2015 09:39:30 +0000 (10:39 +0100)]
i.MX: Add SOC support for i.MX25
For now we support the following devices:
* CPU: ARM926
* Interrupt Controller: AVIC
* CCM
* UART x 5
* EPIT x 2
* GPT x 4
* FEC
* I2C x 3
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id:
62218bfa90f9101f79098e768c3d58bd92dcb7f3.
1441057361.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Jean-Christophe Dubois [Mon, 7 Sep 2015 09:39:30 +0000 (10:39 +0100)]
i.MX: Add FEC Ethernet Emulator
This is based on mcf_fec.c FEC implementation for Coldfire
* A generic PHY was added (borrowwed from LAN9118)
* The buffer management is also modified as buffers are
slightly different between Coldfire and i.MX
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id:
fb314f8a120aa49f8f6ad886f312c649b484fb5a.
1441057361.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Jean-Christophe Dubois [Mon, 7 Sep 2015 09:39:30 +0000 (10:39 +0100)]
i.MX: Add I2C controller emulator
The slave mode is not implemented.
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id:
508dbf2ebe26ec383d3a12a1db5a7890ac8acf20.
1441057361.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Jean-Christophe Dubois [Mon, 7 Sep 2015 09:39:30 +0000 (10:39 +0100)]
i.MX: KZM: use standalone i.MX31 SOC support
Convert the KZM board to use the i.MX31 SoC defintition instead of
redefining the entire SoC on the machine level. Major rewrite of the
machine init code.
While touching the memory map comment de-indent to the correct level
of indentation.
This obsoletes the legacy i.MX device device creation helpers which are removed.
Tested by booting a minimal Linux system on the emulated platform
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id:
5e783561f092e1c939562fdff001f1ab1194b07f.
1441057361.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Jean-Christophe Dubois [Mon, 7 Sep 2015 09:39:30 +0000 (10:39 +0100)]
i.MX: Add SOC support for i.MX31
For now we support the following devices:
* CPU: ARM1136
* Interrupt Controller: AVIC
* CCM
* UART x 2
* EPIT x 2
* GPT
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id:
f146d819594e41568daec42a1d0f440cdfe3df76.
1441057361.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Sergey Sorokin [Mon, 7 Sep 2015 09:39:30 +0000 (10:39 +0100)]
target-arm: Fix arm_excp_unmasked() function
There is an error in arm_excp_unmasked() function:
bitwise operator & is used with integer and bool operands
causing an incorrect zeroed result.
The patch fixes it.
Signed-off-by: Sergey Sorokin <afarallax@yandex.ru>
Message-id:
1441209238-16881-1-git-send-email-afarallax@yandex.ru
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Pavel Fedin [Mon, 7 Sep 2015 09:39:29 +0000 (10:39 +0100)]
hw/arm/virt: Add high MMIO PCI region, 512G in size
This large region is necessary for some devices like ivshmem and video cards
32-bit kernels can be built without LPAE support. In this case such a kernel
will not be able to use PCI controller which has windows in high addresses.
In order to work around the problem, "highmem" option is introduced. It
defaults to on on, but can be manually set to off in order to be able to run
those old 32-bit guests.
Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org>
[PMM: Added missing ULL suffixes and a comment to the a15memmap[] entry]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Sergey Sorokin [Mon, 7 Sep 2015 09:39:29 +0000 (10:39 +0100)]
target-arm: Fix AArch32:AArch64 general-purpose register mapping
There is an error in functions aarch64_sync_32_to_64() and
aarch64_sync_64_to_32() with mapping of registers between AArch32 and
AArch64. This commit fixes the mapping to match the v8 ARM ARM
section D1.20.1 (table D1-77).
Signed-off-by: Sergey Sorokin <afarallax@yandex.ru>
Message-id:
1440796451-15276-1-git-send-email-afarallax@yandex.ru
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: tidied commit message a bit]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Crosthwaite [Mon, 7 Sep 2015 09:39:29 +0000 (10:39 +0100)]
arm: Remove hw_error() usages.
All of these hw_errors are fatal and indicate something wrong with
QEMU implementation.
Convert to g_assert_not_reached.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id:
169194d09017e5725535d31a1507d454c0043706.
1440842587.git.crosthwaite.peter@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Crosthwaite [Mon, 7 Sep 2015 09:39:29 +0000 (10:39 +0100)]
arm: cpu: assert() on no-EL2 virt IRQ error condition.
Replace the hw_error() for no-EL2 VIRQ with an assert.
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id:
93b6acdee6cafe8ff0422a294a5640c3d35f0e17.
1440842587.git.crosthwaite.peter@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Wei Huang [Mon, 7 Sep 2015 09:39:29 +0000 (10:39 +0100)]
smbios: implement smbios support for mach-virt
This patch generates smbios tables for ARM mach-virt. Also add
CONFIG_SMBIOS=y for ARM default config.
Acked-by: Gabriel Somlo <somlo@cmu.edu>
Tested-by: Gabriel Somlo <somlo@cmu.edu>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Wei Huang <wei@redhat.com>
Message-id:
1440615870-9518-3-git-send-email-wei@redhat.com
[PMM: Added missing braces around an if().]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Wei Huang [Mon, 7 Sep 2015 09:39:28 +0000 (10:39 +0100)]
smbios: add smbios 3.0 support
This patch adds support for SMBIOS 3.0 entry point. When caller invokes
smbios_set_defaults(), it can specify entry point as 2.1 or 3.0. Then
smbios_get_tables() will return the entry point table in right format.
Acked-by: Gabriel Somlo <somlo@cmu.edu>
Tested-by: Gabriel Somlo <somlo@cmu.edu>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Wei Huang <wei@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-id:
1440615870-9518-2-git-send-email-wei@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Mon, 7 Sep 2015 09:39:28 +0000 (10:39 +0100)]
target-arm: Wire up HLT 0xf000 as the A64 semihosting instruction
For the A64 instruction set, the semihosting call instruction
is 'HLT 0xf000'. Wire this up to call do_arm_semihosting()
if semihosting is enabled.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Christopher Covington <christopher.covington@linaro.org>
Tested-by: Christopher Covington <cov@codeaurora.org>
Message-id:
1439483745-28752-10-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 7 Sep 2015 09:39:28 +0000 (10:39 +0100)]
target-arm/arm-semi.c: SYS_EXIT on A64 takes a parameter block
The A64 semihosting API changes the interface for SYS_EXIT so
that instead of taking a single exception type in a register,
it takes a parameter block containing the exception type and
a sub-code. Implement this.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Christopher Covington <cov@codeaurora.org>
Message-id:
1439483745-28752-9-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 7 Sep 2015 09:39:28 +0000 (10:39 +0100)]
target-arm/arm-semi.c: Implement A64 specific SyncCacheRange call
The A64 semihosting ABI defines a new call SyncCacheRange
for doing a 'clean D-cache and invalidate I-cache' sequence.
Since QEMU doesn't implement caches, we can implement this as a nop.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Christopher Covington <christopher.covington@linaro.org>
Tested-by: Christopher Covington <cov@codeaurora.org>
Message-id:
1439483745-28752-8-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 7 Sep 2015 09:39:28 +0000 (10:39 +0100)]
target-arm/arm-semi.c: Support widening APIs to 64 bits
The 64-bit A64 semihosting API has some pervasive changes from
the 32-bit version:
* all parameter blocks are arrays of 64-bit values, not 32-bit
* the semihosting call number is passed in W0
* the return value is a 64-bit value in X0
Implement the necessary handling for this widening.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Christopher Covington <christopher.covington@linaro.org>
Tested-by: Christopher Covington <cov@codeaurora.org>
Message-id:
1439483745-28752-7-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 7 Sep 2015 09:39:27 +0000 (10:39 +0100)]
include/exec/softmmu-semi.h: Add support for 64-bit values
Add support for getting and setting 64-bit values in the
softmmu semihosting support functions. This will be needed
for 64-bit ARM semihosting.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Christopher Covington <cov@codeaurora.org>
Message-id:
1439483745-28752-6-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 7 Sep 2015 09:39:27 +0000 (10:39 +0100)]
target-arm/arm-semi.c: Factor out repeated 'return env->regs[0]'
Factor out a repeated pattern in the semihosting code:
gdb_do_syscall(arm_semi_cb, "system,%s", arg0, (int)arg1+1);
/* arm_semi_cb sets env->regs[0] to the syscall return value */
return env->regs[0];
For A64 the return value will go in a different register; pull
the sequence out into its own function that passes the return
value in a static variable rather than overloading regs[0]
for the purpose, so the code will work on both A32/T32 and A64.
Note that the lack-of-synchronization bug noted in the FIXME
comment is not introduced by this commit, but was already present.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Christopher Covington <christopher.covington@linaro.org>
Tested-by: Christopher Covington <cov@codeaurora.org>
Message-id:
1439483745-28752-5-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 7 Sep 2015 09:39:27 +0000 (10:39 +0100)]
gdbstub: Implement gdb_do_syscallv()
Implement a variant of the existing gdb_do_syscall() which
takes a va_list.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Christopher Covington <cov@codeaurora.org>
Message-id:
1439483745-28752-4-git-send-email-peter.maydell@linaro.org
Christopher Covington [Mon, 7 Sep 2015 09:39:27 +0000 (10:39 +0100)]
target-arm: Improve semihosting debug prints
Print semihosting debugging information before the
do_arm_semihosting() call so that angel_SWIreason_ReportException,
which causes the function to not return, gets the same debug prints as
other semihosting calls. Also print out the semihosting call number.
Signed-off-by: Christopher Covington <christopher.covington@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Christopher Covington <cov@codeaurora.org>
Message-id:
1439483745-28752-3-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 7 Sep 2015 09:39:27 +0000 (10:39 +0100)]
target-arm/arm-semi.c: Fix broken SYS_WRITE0 via gdb
A spurious trailing "\n" in the gdb syscall format string used
for SYS_WRITE0 meant that gdb would reject the remote syscall,
with the effect that the output from the guest was silently dropped.
Remove the newline so that gdb accepts the packet.
Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Markus Armbruster [Mon, 7 Sep 2015 09:39:27 +0000 (10:39 +0100)]
arm: Use g_new() & friends where that makes obvious sense
g_new(T, n) is neater than g_malloc(sizeof(T) * n). It's also safer,
for two reasons. One, it catches multiplication overflowing size_t.
Two, it returns T * rather than void *, which lets the compiler catch
more type errors.
This commit only touches allocations with size arguments of the form
sizeof(T).
Coccinelle semantic patch:
@@
type T;
@@
-g_malloc(sizeof(T))
+g_new(T, 1)
@@
type T;
@@
-g_try_malloc(sizeof(T))
+g_try_new(T, 1)
@@
type T;
@@
-g_malloc0(sizeof(T))
+g_new0(T, 1)
@@
type T;
@@
-g_try_malloc0(sizeof(T))
+g_try_new0(T, 1)
@@
type T;
expression n;
@@
-g_malloc(sizeof(T) * (n))
+g_new(T, n)
@@
type T;
expression n;
@@
-g_try_malloc(sizeof(T) * (n))
+g_try_new(T, n)
@@
type T;
expression n;
@@
-g_malloc0(sizeof(T) * (n))
+g_new0(T, n)
@@
type T;
expression n;
@@
-g_try_malloc0(sizeof(T) * (n))
+g_try_new0(T, n)
@@
type T;
expression p, n;
@@
-g_realloc(p, sizeof(T) * (n))
+g_renew(T, p, n)
@@
type T;
expression p, n;
@@
-g_try_realloc(p, sizeof(T) * (n))
+g_try_renew(T, p, n)
@@
type T;
expression n;
@@
-(T *)g_new(T, n)
+g_new(T, n)
@@
type T;
expression n;
@@
-(T *)g_new0(T, n)
+g_new0(T, n)
@@
type T;
expression p, n;
@@
-(T *)g_renew(T, p, n)
+g_renew(T, p, n)
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-id:
1440524394-15640-1-git-send-email-armbru@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Kevin Wolf [Fri, 4 Sep 2015 19:43:40 +0000 (21:43 +0200)]
Merge remote-tracking branch 'mreitz/tags/pull-block-for-kevin-2015-09-04' into queue-block
Block patches from 2015-08-24 until 2015-09-04.
# gpg: Signature made Fri Sep 4 21:02:10 2015 CEST using RSA key ID
E838ACAD
# gpg: Good signature from "Max Reitz <mreitz@redhat.com>"
* mreitz/tags/pull-block-for-kevin-2015-09-04:
quorum: validate vote threshold against num_children even if read-pattern is fifo
qcow2: reorder fields in Qcow2CachedTable to reduce padding
docs: document how to configure the qcow2 L2/refcount caches
qcow2: add option to clean unused cache entries after some time
qcow2: mark the memory as no longer needed after qcow2_cache_empty()
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Wen Congyang [Fri, 3 Jul 2015 06:45:06 +0000 (14:45 +0800)]
quorum: validate vote threshold against num_children even if read-pattern is fifo
We need to use threshold to check if too many write operation fails.
If threshold is larger than num children, we always get write error
event even if all write operations success.
Signed-off-by: Wen Congyang <wency@cn.fujitsu.com>
Message-id:
55962F72.3060003@cn.fujitsu.com
Reviewed-by: Alberto Garcia <berto@igalia.com>
Reviewed-by: Max Reitz <mreitz@redhat.com>
Signed-off-by: Max Reitz <mreitz@redhat.com>
Alberto Garcia [Tue, 4 Aug 2015 12:14:42 +0000 (15:14 +0300)]
qcow2: reorder fields in Qcow2CachedTable to reduce padding
Changing the current ordering saves 8 bytes per cache entry in x86_64.
Signed-off-by: Alberto Garcia <berto@igalia.com>
Reviewed-by: Max Reitz <mreitz@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Message-id:
0bd55291211df3dfb514d0e7d2031dd5c4f9f807.
1438690126.git.berto@igalia.com
Signed-off-by: Max Reitz <mreitz@redhat.com>
Alberto Garcia [Tue, 4 Aug 2015 12:14:41 +0000 (15:14 +0300)]
docs: document how to configure the qcow2 L2/refcount caches
QEMU has options to configure the size of the L2 and refcount
caches for the qcow2 format. However, choosing the right sizes for
a particular disk image is not a straightforward operation since
the ratio between the cache size and the allocated disk space is
not obvious and depends on the size of the cluster and the refcount
entries.
This document attempts to give an overview of both caches and how to
configure their sizes.
Signed-off-by: Alberto Garcia <berto@igalia.com>
Reviewed-by: Max Reitz <mreitz@redhat.com>
Message-id:
55de928e139b1ba3f3d40fe9c6c88f30b1f36410.
1438690126.git.berto@igalia.com
Signed-off-by: Max Reitz <mreitz@redhat.com>
Alberto Garcia [Tue, 4 Aug 2015 12:14:40 +0000 (15:14 +0300)]
qcow2: add option to clean unused cache entries after some time
This adds a new 'cache-clean-interval' option that cleans all qcow2
cache entries that haven't been used in a certain interval, given in
seconds.
This allows setting a large L2 cache size so it can handle scenarios
with lots of I/O and at the same time use little memory during periods
of inactivity.
This feature currently relies on MADV_DONTNEED to free that memory, so
it is not useful in systems that don't follow that behavior.
Signed-off-by: Alberto Garcia <berto@igalia.com>
Reviewed-by: Max Reitz <mreitz@redhat.com>
Message-id:
a70d12da60433df9360ada648b3f34b8f6f354ce.
1438690126.git.berto@igalia.com
Signed-off-by: Max Reitz <mreitz@redhat.com>
Alberto Garcia [Tue, 4 Aug 2015 12:14:39 +0000 (15:14 +0300)]
qcow2: mark the memory as no longer needed after qcow2_cache_empty()
After having emptied the cache, the data in the cache tables is no
longer useful, so we can tell the kernel that we are done with it. In
Linux this frees the resources associated with it.
The effect of this can be seen in the HMP commit operation: it moves
data from the top to the base image (and fills both caches), then it
empties the top image. At this point the data in that cache is no
longer needed so it's just wasting memory.
Signed-off-by: Alberto Garcia <berto@igalia.com>
Reviewed-by: Max Reitz <mreitz@redhat.com>
Message-id:
08538b098e1faf6c92496477cf9b47a20e5aacea.
1438690126.git.berto@igalia.com
Signed-off-by: Max Reitz <mreitz@redhat.com>
Max Reitz [Wed, 2 Sep 2015 18:52:28 +0000 (20:52 +0200)]
iotests: Warn if python subprocess is killed
Currently, if a subprocess of a python test (i.e. qemu-io, qemu-img, or
qemu) receives a signal and is subsequently aborted, this is not logged.
This patch makes python tests always check the exit code of these
subprocesses, and emit a message if they have been killed.
Signed-off-by: Max Reitz <mreitz@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Max Reitz [Wed, 2 Sep 2015 18:52:27 +0000 (20:52 +0200)]
iotests: Do not suppress segfaults in bash tests
Currently, if a qemu/qemu-io/qemu-img/qemu-nbd invocation receives a
segmentation fault, that message is invisible in most cases since the
output is generally filtered and bash suppresses the segmentation fault
notice for any but the last element of a pipe.
Most of the time, the test will then fail anyway because of missing
output, but not necessarily (as happened with test 82 recently).
Fix this by making the corresponding environment variables point to
wrapper functions which execute the respective command in a subshell.
Giving options to qemu/qemu-io/qemu-img and path names with spaces were
broken for the Python tests; this patch "accidentally" fixes that.
Signed-off-by: Max Reitz <mreitz@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Max Reitz [Wed, 2 Sep 2015 18:52:26 +0000 (20:52 +0200)]
iotests: Respect -nodefaults in tests 41 and 55
While -nodefaults is set in $QEMU_OPTIONS, this is currently (wrongly)
ignored for Python iotests. In order to be prepared for when this is
fixed, we should explicitly add an IDE CD-ROM drive instead of relying
on it being created automatically.
Signed-off-by: Max Reitz <mreitz@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Max Reitz [Wed, 2 Sep 2015 18:52:25 +0000 (20:52 +0200)]
iotests: More options for VM.add_drive()
This patch allows specifying the interface to be used for the drive, and
makes specifying a path optional (if the path is None, the "file" option
will be omitted, thus creating an empty drive).
Signed-off-by: Max Reitz <mreitz@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Max Reitz [Thu, 20 Aug 2015 23:00:38 +0000 (16:00 -0700)]
qemu-img: Fix crash in amend invocation
Example:
$ ./qemu-img create -f qcow2 /tmp/t.qcow2 64M
$ ./qemu-img amend -f qcow2 -o backing_file=/tmp/t.qcow2, -o help \
/tmp/t.qcow2
This should not crash. This actually is tested by iotest 082, but not
caught due to the segmentation fault being silent (which is something
that needs to be fixed, too).
Reported-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Cc: qemu-stable <qemu-stable@nongnu.org>
Signed-off-by: Max Reitz <mreitz@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Max Reitz [Wed, 12 Aug 2015 15:33:31 +0000 (17:33 +0200)]
block/raw-posix: Use raw_normalize_devicepath()
The filename given to qemu_open() in block/raw-posix.c should generally
have been processed by raw_normalize_devicepath(); unless we are only
probing (in which case the caller often checks whether the file is a
block device or not, and this property will be changed by
raw_normalize_devicepath() on NetBSD) or it is about a deprecated device
(i.e. floppy).
Signed-off-by: Max Reitz <mreitz@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Bo Tu [Fri, 3 Jul 2015 07:28:50 +0000 (15:28 +0800)]
qemu-iotests: s390x: fix test 130
The default device id of hard disk on the s390 platform is "virtio0"
which differs to the "ide0-hd0" for the x86 platform. Setting id in
the drive definition, ie:"qemu -drive id=testdisk", will be the same
on all platforms.
Reviewed-by: Max Reitz <mreitz@redhat.com>
Signed-off-by: Bo Tu <tubo@linux.vnet.ibm.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Bo Tu [Fri, 3 Jul 2015 07:28:49 +0000 (15:28 +0800)]
qemu-iotests: s390x: fix test 049, reject negative sizes in QemuOpts
when creating an image qemu-img enable us specifying the size of the
image using -o size=xx options. But when we specify an invalid size
such as a negtive size then different platform gives different result.
parse_option_size() function in util/qemu-option.c will be called to
parse the size, a cast was called in the function to cast the input
(saved as a double in the function) size to an unsigned int64 value,
when the input is a negtive value or exceeds the maximum of uint64, then
the result is undefined.
According to C99 6.3.1.4, the result of converting a floating point
number to an integer that cannot represent the (integer part of) number
is undefined. And sure enough the results are different on x86 and
s390.
C99 Language spec 6.3.1.4 Real floating and integers:
the result of this assignment/cast is undefined if the float is not
in the open interval (-1, U<type>_MAX+1).
Reviewed-by: Max Reitz <mreitz@redhat.com>
Reviewed-by: Sascha Silbe <silbe@linux.vnet.ibm.com>
Signed-off-by: Bo Tu <tubo@linux.vnet.ibm.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Bo Tu [Fri, 3 Jul 2015 07:28:48 +0000 (15:28 +0800)]
qemu-iotests: s390x: fix test 041 and 055
There is no 'ide-cd' device defined on non-pc platform, so
test_medium_not_found() test should be skipped.
Reviewed-by: Max Reitz <mreitz@redhat.com>
Reviewed-by: Michael Mueller <mimu@linux.vnet.ibm.com>
Reviewed-by: Sascha Silbe <silbe@linux.vnet.ibm.com>
Signed-off-by: Xiao Guang Chen <chenxg@linux.vnet.ibm.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Bo Tu [Fri, 3 Jul 2015 07:28:47 +0000 (15:28 +0800)]
qemu-iotests: disable default qemu devices for cross-platform compatibility
This patch fixes an io test suite issue that was introduced with the
commit
c88930a6866e74953e931ae749781e98e486e5c8 'qemu-char: Permit only
a single "stdio" character device'. The option supresses the creation of
default devices such as the floopy and cdrom. Output files for test case
067, 071, 081 and 087 need to be updated to accommodate this change.
Use virtio-blk instead of virtio-blk-pci as the device driver for test
case 067. For virtio-blk-pci is the same with virtio-blk as device
driver but other platform such as s390 may not recognize the virtio-blk-pci.
The default devices differ across machines. As the qemu output often
contains these devices (or events for them, like opening a CD tray on
reset), the reference output currently is rather machine-specific.
All existing qemu tests explicitly configure the devices they're working
with, so just pass -nodefaults to qemu by default to disable the default
devices. Update the reference outputs accordingly.
Reviewed-by: Max Reitz <mreitz@redhat.com>
Reviewed-by: Michael Mueller <mimu@linux.vnet.ibm.com>
Reviewed-by: Sascha Silbe <silbe@linux.vnet.ibm.com>
Signed-off-by: Xiao Guang Chen <chenxg@linux.vnet.ibm.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Bo Tu [Fri, 3 Jul 2015 07:28:46 +0000 (15:28 +0800)]
qemu-iotests: qemu machine type support
This patch adds qemu machine type support to the io test suite.
Based on the qemu default machine type and alias of the default machine
type the reference output file can now vary from the default to a
machine specific output file if necessary. When using a machine specific
reference file if the default machine has an alias then use the alias as the output
file name otherwise use the default machine name as the output file name.
Reviewed-by: Max Reitz <mreitz@redhat.com>
Reviewed-by: Michael Mueller <mimu@linux.vnet.ibm.com>
Reviewed-by: Sascha Silbe <silbe@linux.vnet.ibm.com>
Signed-off-by: Xiao Guang Chen <chenxg@linux.vnet.ibm.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Peter Maydell [Fri, 4 Sep 2015 16:37:50 +0000 (17:37 +0100)]
Merge remote-tracking branch 'remotes/armbru/tags/pull-monitor-2015-09-04' into staging
Monitor patches
# gpg: Signature made Fri 04 Sep 2015 12:40:11 BST using RSA key ID
EB918653
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>"
# gpg: aka "Markus Armbruster <armbru@pond.sub.org>"
* remotes/armbru/tags/pull-monitor-2015-09-04:
hmp: add info iothreads command
qmp-shell: add documentation
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Fri, 4 Sep 2015 14:53:48 +0000 (15:53 +0100)]
Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2015-09-04' into staging
qapi: Another round of fixes and cleanups
# gpg: Signature made Fri 04 Sep 2015 14:48:54 BST using RSA key ID
EB918653
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>"
# gpg: aka "Markus Armbruster <armbru@pond.sub.org>"
* remotes/armbru/tags/pull-qapi-2015-09-04: (33 commits)
qapi: Generators crash when --output-dir isn't given, fix
docs/qapi-code-gen.txt: Fix QAPI schema examples
qapi: Simplify error reporting for array types
qapi: Fix errors for non-string, non-dictionary members
tests/qapi-schema: Cover non-string, non-dictionary members
tests/qapi-schema: Cover two more syntax errors
qapi: Drop one of two "simple union must not have base" checks
qapi: Generated code cleanup
qapi-commands: Drop useless initialization
qapi-commands: Don't feed output of mcgen() to mcgen() again
qapi-commands: Inline gen_marshal_output_call()
qapi-commands: Fix gen_err_check(e) for e and e != 'local_err'
qapi: Command returning anonymous type doesn't work, outlaw
qapi: Fix to reject union command and event arguments
qapi-tests: New tests for union, alternate command arguments
tests/qapi-schema: Rename tests from data- to args-
tests/qapi-schema: Restore test case for flat union base bug
qapi: Document flaws in checking of names
qapi: Document shortcoming with union 'data' branch
qapi: Document that input visitor semantics are prone to leaks
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Markus Armbruster [Thu, 3 Sep 2015 08:24:25 +0000 (10:24 +0200)]
qapi: Generators crash when --output-dir isn't given, fix
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Markus Armbruster [Thu, 3 Sep 2015 08:18:06 +0000 (10:18 +0200)]
docs/qapi-code-gen.txt: Fix QAPI schema examples
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Markus Armbruster [Mon, 31 Aug 2015 11:54:39 +0000 (13:54 +0200)]
qapi: Simplify error reporting for array types
check_type() first checks and peels off the array type, then checks
the element type. For two out of four error messages, it takes pains
to report errors for "array of T" instead of just T. Odd. Let's
examine the errors.
* Unknown element type, e.g.
tests/qapi-schema/args-array-unknown.json:
Member 'array' of 'data' for command 'oops' uses unknown type
'array of NoSuchType'
To make sense of this, you need to know that 'array of NoSuchType'
refers to '[NoSuchType]'. Easy enough. However, simply reporting
Member 'array' of 'data' for command 'oops' uses unknown type
'NoSuchType'
is at least as easy to understand.
* Element type's meta-type is inadmissible, e.g.
tests/qapi-schema/returns-whitelist.json:
'returns' for command 'no-way-this-will-get-whitelisted' cannot
use built-in type 'array of int'
'array of int' is technically not a built-in type, but that's
pedantry. However, simply reporting
'returns' for command 'no-way-this-will-get-whitelisted' cannot
use built-in type 'int'
avoids the issue, and is at least as easy to understand.
* The remaining two errors are unreachable, because the array checking
ensures that value is a string.
Thus, reporting some errors for "array of T" instead of just T works,
but doesn't really improve things. Drop it.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Markus Armbruster [Mon, 31 Aug 2015 15:28:52 +0000 (17:28 +0200)]
qapi: Fix errors for non-string, non-dictionary members
Fixes the errors demonstrated by the previous commit.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
projects / sdk / emulator / qemu.git / log