Dave Airlie [Wed, 15 Sep 2021 04:26:36 +0000 (14:26 +1000)]
crocus: Delete the MI_COPY_MEM_MEM resource_copy_region implementation.
(ported from iris - airlied)
The MI_COPY_MEM_MEM version of resource_copy_region has known bugs:
It's failing to set valid_buffer_range correctly
It's missing iris_emit_buffer_barrier_for() for the source/destination, so there may be missing flushes.
There are some bad interactions with the tile cache and VF using L3.
Even with those fixed, if you expand the "no more than 16 bytes" restriction to allow copies up to 1024 bytes, then it starts failing Piglit tests on Icelake.
We could probably fix this. However, I had originally only measured a 0.689096% +/- 0.473968% (n=4) speedup in Shadow of Mordor's OpenGL port, which is already fairly small, especially before adding missing flushes. Further, some of that likely came from not switching between render and compute...which we'll soon be able to avoid thanks to BLOCS.
Folks were also worried that MI_COPY_MEM_MEM can't be pipelined, and that stalling the command streamer may actually slow things down, especially as the GPUs become more powerful. We aren't really sure about this, but it's another concern.
So, let's just get rid of this optimization. It seemed like a good idea at the time, but it's just causing issues for very little gain.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13374>
Maniraj D [Mon, 11 Oct 2021 17:07:02 +0000 (22:37 +0530)]
egl: set TSD as NULL after deinit
When eglReleaseThread() is called from application's
destructor (API with __attribute__((destructor))),
it crashes due to invalid memory access.
In this case, _egl_TLS is freed in the flow of
_eglAtExit() as below but _egl_TLS is not set to NULL.
_eglDestroyThreadInfo
_eglFiniTSD
_eglAtExit
_run_exit_handlers
exit
Later when the eglReleaseThread is called from
application's destructor, it ends-up accessing
the freed _egl_TLS pointer.
eglReleaseThread -> in libEGL_mesa
eglReleaseThread -> in libEGL(glvnd)
destructor() -> App's destructor
To resolve the invalid access, setting the _egl_TLS
pointer as NULL after freeing it.
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5466
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13302>
Ella-0 [Tue, 12 Oct 2021 16:58:33 +0000 (16:58 +0000)]
v3dv: implement VK_EXT_host_query_reset
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13319>
Jason Ekstrand [Wed, 13 Oct 2021 21:31:57 +0000 (16:31 -0500)]
i965: Emit a NULL surface for buffer textures with no buffer
This is a preexisting bug but it was uncovered by
231653ea3506
("intel/isl: Add a max_buffer_size limit to isl_device") which added an
assert(num_elements > 0) for typed buffers.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13351>
Witold Baryluk [Thu, 14 Oct 2021 22:29:47 +0000 (00:29 +0200)]
zink: Do not access just freed zink_batch_state
Cc: mesa-stable
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13370>
Clayton Craft [Wed, 13 Oct 2021 23:06:51 +0000 (16:06 -0700)]
anv: don't advertise vk conformance on GPUs that aren't conformant
This sets the conformance version to 0.0.0.0 for GPUs that have
incomplete support for vulkan, so that it's easier to check if vulkan is
fully supported by a GPU at runtime for applications/libraries.
$ vulkaninfo|grep conf
MESA-INTEL: warning: Ivy Bridge Vulkan support is incomplete
conformanceVersion = 0.0.0.0
Signed-off-by: Clayton Craft <clayton@craftyguy.net>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13275>
Dylan Baker [Thu, 14 Oct 2021 20:23:18 +0000 (13:23 -0700)]
docs: update calendar and link releases notes for 21.2.4
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13369>
Dylan Baker [Thu, 14 Oct 2021 20:17:10 +0000 (13:17 -0700)]
docs: add sha256 sum for 21.2.4 release
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13369>
Dylan Baker [Thu, 14 Oct 2021 19:56:02 +0000 (12:56 -0700)]
docs: add release notes for 21.2.4
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13369>
Eric Engestrom [Thu, 14 Oct 2021 19:51:08 +0000 (20:51 +0100)]
docs: update calendar for 21.3.0-rc1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13368>
Danylo Piliaiev [Wed, 13 Oct 2021 12:54:23 +0000 (15:54 +0300)]
ir3/freedreno: account for component in build_tessfactor_base
The burden was put on the caller, which caused:
- Reading of tess levels back in TCS not accounting for component
- Reading patch outputs in TES account for component twice
Fixes vkd3d tests:
- test_tessellation_read_tesslevel
- test_tessellation_primitive_id
- test_line_tessellation_dxbc
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13338>
Emma Anholt [Tue, 12 Oct 2021 21:31:31 +0000 (14:31 -0700)]
loader: Avoid enumerating drm devices just to get an fd's PCI ID.
Cuts 1/3 of the runtime of the VA-API unit tests (which do a separate
pipe-loader init per test) on radeonsi on my system by not faffing around
in sysfs so much.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13324>
Jason Ekstrand [Wed, 13 Oct 2021 21:58:38 +0000 (16:58 -0500)]
vulkan/wsi/win32: Delete the wrapper entrypoints
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13352>
Mike Blumenkrantz [Tue, 14 Sep 2021 19:28:24 +0000 (15:28 -0400)]
nir/print: print bindless info as applicable
this is useful to know
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13204>
Jason Ekstrand [Wed, 13 Oct 2021 16:07:24 +0000 (11:07 -0500)]
vulkan/log: Don't assert on non-client-visible objects
We already have code to deal with non-client-visible objects but we were
asserting if it didn't fall into one of the clearly mappable error
cases. However, we didn't have a mapping for VK_ERROR_NOT_PERMITTED
which can happen during object creation. Let's just be sloppy and drop
the assert. Worst case, the client gets an error with no object.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13341>
Jason Ekstrand [Wed, 13 Oct 2021 16:05:48 +0000 (11:05 -0500)]
vulkan/log: Tweak our handling of a couple error enums
VK_ERROR_INITIALIZATION_FAILED can happen as part of device creation and
isn't really an instance error in that case.
VK_ERROR_EXTENSION_NOT_PRESENT, on the other hand, is always an instance
thing and we should handle it as such.
Fixes:
0cad3beb2a0d ("vulkan/log: Add common vk_error and vk_errorf helpers")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13341>
Boris Brezillon [Thu, 14 Oct 2021 08:34:37 +0000 (10:34 +0200)]
vulkan: Set unused entrypoints to vk_entrypoint_stub when compiling with MSVC
If we don't do that we hit the assert(entry[i] != NULL) added by commit
6d44b21d4fd ("vulkan: Fix weak symbol emulation when compiling with MSVC").
Fixes:
6d44b21d4fd ("vulkan: Fix weak symbol emulation when compiling with MSVC")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13355>
Bas Nieuwenhuizen [Wed, 13 Oct 2021 20:37:35 +0000 (22:37 +0200)]
radv: Fix modifier property query.
radv_get_modifier_flags read the format properties, doesn't write any. Setting
the central format properties based on the drm format properties doesn't make
any sense.
Fixes:
5dee0d9da96 "radv: switch to VK_FORMAT_FEATURE_2_XXX/VkFormatProperties3KHR"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5498
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13357>
Iago Toral Quiroga [Thu, 14 Oct 2021 08:42:23 +0000 (10:42 +0200)]
v3dv: fix TLB buffer to image copy path for 3D images
Another instance of not taking the Z offset from the right place. We had
not seen this one until now because we typically use the TFU path, where
we also fixed this same issue in commit
df1d08533c4.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13356>
Boris Brezillon [Wed, 13 Oct 2021 19:50:59 +0000 (21:50 +0200)]
vulkan: Fix weak symbol emulation when compiling with MSVC
Mapping unimplemented entrypoints to a global function pointer variable
initialized to NULL is a bit cumbersome, and actually led to a bug
in the vk_xxx_dispatch_table_from_entrypoints() template: the !override
case didn't have the right check on the source table entries. Instead of
fixing that case, let's simplify the logic by creating a stub function
and making the alternatename pragma point to this stub. This way we get
rid of all those uneeded xxx_Null symbols/variables and simplify the
tests in vk_xxxx_dispatch_table_from_entrypoints().
Cc: mesa-stable
Fixes:
98c622a96e28 ("vulkan: Update dispatch table gen for Windows")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13348>
Ian Romanick [Tue, 12 Oct 2021 20:06:04 +0000 (13:06 -0700)]
nir/loop_unroll: Always unroll loops that iterate at most once
Two carchase compute shaders (shader-db) and two Fallout 4 fragment
shaders (fossil-db) were helped. Based on the NIR of the shaders, all
four had structures like
for (i = 0; i < 1; i++) {
...
for (...) {
...
}
}
All HSW+ platforms had similar results. (Ice Lake shown)
total loops in shared programs: 6033 -> 6031 (-0.03%)
loops in affected programs: 4 -> 2 (-50.00%)
helped: 2
HURT: 0
All Intel platforms had similar results. (Ice Lake shown)
Instructions in all programs:
143692018 ->
143692006 (-0.0%)
SENDs in all programs: 6947154 -> 6947154 (+0.0%)
Loops in all programs: 38285 -> 38283 (-0.0%)
Cycles in all programs:
8434822225 ->
8434476815 (-0.0%)
Spills in all programs: 191665 -> 191665 (+0.0%)
Fills in all programs: 298822 -> 298822 (+0.0%)
In the presense of loop unrolling like this, the change in cycles is not
accurate.
v2: Rearrange the logic in the if-condition to read a little better.
Suggested by Tim.
Closes: #5089
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13323>
Dave Airlie [Wed, 13 Oct 2021 05:14:34 +0000 (15:14 +1000)]
brw/nir: remove unused function prototypes.
These got moved into common code a good while ago.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13328>
Anuj Phogat [Fri, 5 Jun 2020 21:40:25 +0000 (14:40 -0700)]
anv: Enable tessellation redistribution
This patch adds Tessellation Distribution on top of Geometry
Distribution. Using recommended values based on performance studies
across a range of workloads.
Rework:
- Add comment for new packet bits (Sagar)
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12091>
Anuj Phogat [Thu, 4 Jun 2020 18:50:35 +0000 (11:50 -0700)]
iris: Enable tessellation redistribution
This patch adds Tessellation Distribution on top of Geometry
Distribution. Using recommended values based on performance studies
across a range of workloads.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12091>
Anuj Phogat [Fri, 5 Jun 2020 21:39:25 +0000 (14:39 -0700)]
anv: Enable geometry distribution
Using recommended values based on performance studies across a range
of workloads.
Rework:
* Always enable geometry distribution
* Set ListCutIndexEnable if primitive restart is enabled
* Set distribution mode based on TEEnable
* Add comment explaining the 3DSTATE_VFG bits (Sagar)
v2:
- Emit 3DSTATE_VFG dynamically based on primitive restart (Ken)
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12091>
Anuj Phogat [Wed, 3 Jun 2020 18:50:38 +0000 (11:50 -0700)]
iris: Enable geometry distribution
Using recommended values based on performance studies across a range
of workloads.
Rework:
* Always enable geometry distribution
* Set ListCutIndexEnable if primitive restart is enabled
* Set distribution mode based on TEEnable
v2:
- Flag missing IRIS_DIRTY_VFG bit (Ken)
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12091>
Anuj Phogat [Thu, 4 Jun 2020 18:49:07 +0000 (11:49 -0700)]
genxml/gen125: Update 3DSTATE_TE fields
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12091>
Jordan Justen [Tue, 20 Jul 2021 05:01:24 +0000 (22:01 -0700)]
intel/genxml: Update genxml to support tessellation/geometry distribution
Rework:
- Fix 3DSTATE_VFG opcode (Lionel)
- Fix distribution mode values (Sagar)
- Update 3DSTATE_VFG fields (Anuj)
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12091>
Emma Anholt [Wed, 13 Oct 2021 19:04:40 +0000 (12:04 -0700)]
ci/lvp: Skip some slow tests under ASan.
depending on the runner's load, we might see timeouts. The
subgroupbroadcast one has hit us a couple times this week.
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13346>
Alejandro Piñeiro [Fri, 8 Oct 2021 12:20:22 +0000 (14:20 +0200)]
v3d/clif: add support for dumping GS shader state
The basic vertex+fragment shader state uses the packet
GL_SHADER_STATE, but when geometry shader are involved, the packet
used is GL_SHADER_STATE_INCLUDING_GS.
Without this commit any program using a geometry shader would dump
their shader state (and their shader state record and attribues) as
binaries.
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13269>
Alejandro Piñeiro [Tue, 12 Oct 2021 21:33:43 +0000 (23:33 +0200)]
v3dv/pipeline: don't clone the nir shader at pipeline_state_create_binning
At that point we didn't call all the v3dv lowerings. So the reference
nir shader used to call the v3d compiler could be different.
Note that at that point the nir shader is only available for internal
shaders (like gs multiview).
This specifically affected multiview tests that wrote gl_PointSize, as
the nir shader for the geometry shader were wrongly exposing
per_vertex_point_size as false, as we were basing our check on the
nir_shader_info, and that was gathered calling nir_shader_gather_info
at pipeline_lower_nir.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13325>
Eric Engestrom [Wed, 13 Oct 2021 19:52:19 +0000 (20:52 +0100)]
VERSION: bump to 22.0
I mistakenly bumped it from 21.3 to 21.4, but there is no 4 (:
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13347>
Eric Engestrom [Wed, 13 Oct 2021 19:29:27 +0000 (20:29 +0100)]
docs: reset new_features.txt
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Eric Engestrom [Wed, 13 Oct 2021 19:28:29 +0000 (20:28 +0100)]
VERSION: bump to 21.4
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Kenneth Graunke [Wed, 13 Oct 2021 01:09:04 +0000 (18:09 -0700)]
iris: Require a 4K alignment for extra clear color BOs.
Apparently, we've been requiring a 4K alignment for internally allocated
clear color addresses to work around some unknown issues. There's a
comment to that effect in iris_resource_create_with_modifiers().
When importing a dmabuf and tacking on an additional clear color BO, we
only required an alignment of 1. This wasn't a problem for a long time
because all BO allocations were naturally aligned to the 4K page size.
However, once we enabled suballocation, we were able to allocate "BOs"
at 256B granularity, making this no longer 4K aligned. Increase the
alignment requirement to 4K to match the behavior of our normal
allocations and also our previous behavior.
Fixes Piglit's ext_image_dma_buf_import-intel-modifiers.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5482
Fixes:
ce2e2296ab6 ("iris: Suballocate BO using the Gallium pb_slab mechanism")
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13326>
Caio Marcelo de Oliveira Filho [Tue, 12 Oct 2021 06:19:59 +0000 (23:19 -0700)]
intel/compiler: Remove unused `ret` declaration
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13340>
Caio Marcelo de Oliveira Filho [Tue, 12 Oct 2021 05:41:00 +0000 (22:41 -0700)]
intel/compiler: Convert test_eu_compact to use gtest
Be consistent with the other test suites in intel/compiler.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13340>
Mike Blumenkrantz [Wed, 8 Sep 2021 19:11:56 +0000 (15:11 -0400)]
radv: move alpha_adjust into conditional during vertex input updating
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13320>
Mike Blumenkrantz [Wed, 8 Sep 2021 19:10:29 +0000 (15:10 -0400)]
radv: add a mask of bound descriptor buffers for dynamic vertex input
unnecessarily dereferencing the vertex buffer info array here causes a
ton of cpu overhead due to bad cache locality, so just use a mask to
avoid loading X more cachelines into memory unnecessarily
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13320>
Mike Blumenkrantz [Thu, 1 Jul 2021 19:20:36 +0000 (15:20 -0400)]
radv: pre-calc "simple" dynamic vertex input values
when the shader pipeline is known to not require any of the more complex
calculations, those calculations can be excluded from the dynamic update
code
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13320>
Mike Blumenkrantz [Thu, 1 Jul 2021 18:42:59 +0000 (14:42 -0400)]
radv: dynamically calculate misaligned_mask for dynamic vertex input
this avoids incurring overhead at draw time, instead shifting it to vertex
binding commands
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13320>
Mike Blumenkrantz [Wed, 13 Oct 2021 14:31:56 +0000 (10:31 -0400)]
radv: don't use invalid stride for triggering vertex state change
NULL here means this was regular CmdBindVertexBuffers, so the stride
cannot be used
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13320>
Adam Jackson [Mon, 4 Oct 2021 20:25:00 +0000 (16:25 -0400)]
egl/dri: Enable FP16 for EGL_EXT_platform_device
Why is this not the same code as EGL_MESA_platform_surfaceless.
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13182>
Adam Jackson [Mon, 4 Oct 2021 20:19:29 +0000 (16:19 -0400)]
dri: Remove the allow_fp16_configs option, always allow them
There's no danger of accidentally using these, the default pixel format
is integer and if you want float you need to have explicitly asked for
it in eglChooseConfig.
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13182>
Adam Jackson [Fri, 1 Oct 2021 21:47:29 +0000 (17:47 -0400)]
wsi/x11: Fetch and discard the SYNC extension info
Since we're not checking for this, xcb has to do it for us the first
time we call xcb_sync_destroy_fence, which puts a blocking round-trip in
the swapchain destroy path for no reason. Check for the extension so we
have the extension's opcode cached when we need it.
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13339>
Lone_Wolf [Tue, 12 Oct 2021 20:32:49 +0000 (22:32 +0200)]
clover: TargetRegistry.h was moved to another folder
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13290>
Emma Anholt [Tue, 12 Oct 2021 17:28:57 +0000 (10:28 -0700)]
Revert "ci: Add osmesa to Windows GitLab CI"
This reverts commit
90faabc0ee5464962a5dca42bd2280edf967a5dc. It has been
flaky and producing timeouts. (See
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/
14634204 for an example)
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13318>
Lionel Landwerlin [Fri, 24 Sep 2021 10:28:05 +0000 (13:28 +0300)]
isl: only bump the min row pitch for display when not specified
If the ISL caller didn't specify a row_pitch_B, let's use the
NVIDIA/AMD requirements. Otherwise keep using the Intel requirement,
as the caller is likely trying to import a buffer and if we can deal
with that row_pitch_B, we should accept it.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
a3a4517f4147a0 ("isl: Work around NVIDIA and AMD display pitch requirements")
Reported-by: Dongwon Kim <dongwon.kim@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13024>
Lionel Landwerlin [Wed, 13 Oct 2021 10:37:30 +0000 (13:37 +0300)]
anv: fill correct surface state for lowered storage image
Small typo/copy-paste.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
c0093c466850d5 ("anv: Flip around the way we reason about storage image lowering")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13332>
Bas Nieuwenhuizen [Tue, 5 Oct 2021 01:10:20 +0000 (03:10 +0200)]
radv: Try to do a better job of dealing with L2 coherent images.
Only try to invalidate L2 if we actually hit one of the incoherent images.
Note we may actually insert some extra flushes at the end of a command
buffer so that we may asume the caches are clean the start of the next
command buffer. However, on average I think that case is uncommon
enough that being able to make assumptions at the start of a cmdbuffer
is beneficial. Especially since MSAA is somewhat rare in more recent
games.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13239>
Bas Nieuwenhuizen [Wed, 13 Oct 2021 00:52:11 +0000 (02:52 +0200)]
radv: Add hooks after in-renderpass meta operations.
So that we can mark the rendertargets dirty.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13239>
Bas Nieuwenhuizen [Tue, 5 Oct 2021 00:25:49 +0000 (02:25 +0200)]
radv: Document cache coherency rules.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13239>
Hyunjun Ko [Thu, 30 Sep 2021 02:55:28 +0000 (02:55 +0000)]
turnip: enable strictLines
Now we can enable strictLines as we set rectangular lines by default.
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6020>
Hyunjun Ko [Mon, 4 Oct 2021 01:24:58 +0000 (01:24 +0000)]
turnip: enable VK_EXT_line_rasterization
By default line mode is VK_LINE_RASTERIZATION_MODE_RECTANGULAR_EXT,
when lineRasterizationMode is VK_LINE_RASTERIZATION_MODE_BRESENHAM_EXT
and primtype is line - we enable bresenham line mode.
We have to disable MSAA when bresenham lines are used, this is
a hardware limitation and spec allows it:
"When Bresenham lines are being rasterized, sample locations may
all be treated as being at the pixel center (this may affect
attribute and depth interpolation)."
This forces us to re-emit msaa state when line mode is changed.
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6020>
Hyunjun Ko [Wed, 15 Sep 2021 06:56:09 +0000 (06:56 +0000)]
freedreno/a5xx,a6xx: rename MSAA_ENABLE to LINE_MODE in GRAS_SU_CNTL
This bit seems like the control for line mode of rastrization.
That can be simply figured out by comparing
dEQP-VK.rasterization.primitives.no_stipple.bresenham_lines,
dEQP-VK.rasterization.primitives.no_stipple.rectangular_lines and
dEQP-VK.rasterization.primitives.no_stipple.lines.
For opengl, the value of bresenham lines mode, which is 0, is set
by default and the value of rectangular mode, which is 0x1, is set
when multi-sampled.
For vulkan, the bresenham lines are enabled when lineRasterizationMode is
VK_LINE_RASTERIZATION_MODE_BRESENHAM_EXT, which sets the bit to 0, while
the value is 1 when it's VK_LINE_RASTERIZATION_MODE_RECTANGULAR_EXT,
that seems to be default.
If both multi-sampled and bresenham-lines are used when primitive type is
line, the bit is to be set as 0 and makes msaa disabled.
Note that this is only tested on a6xx, but I guess it's likely the same
for a5xx.
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6020>
Tapani Pälli [Wed, 13 Oct 2021 07:37:32 +0000 (10:37 +0300)]
anv: use vk_object_zalloc for wsi fences created
Otherwise we hit assert in vk_object_base_assert_valid when attemping to
create handle from anv_fence with unknown base type.
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13330>
Emma Anholt [Tue, 12 Oct 2021 20:40:42 +0000 (13:40 -0700)]
radeonsi: Fix leak of screen->perfcounters.
A refactor dropped one of the frees.
Fixes:
380ac288911d ("ac: import performance counters from RadeonSI")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13322>
Yipeng Chen (Jasber) [Tue, 12 Oct 2021 08:37:24 +0000 (16:37 +0800)]
radeonsi: do not use staging texture for APU
This is to fix serious performance drop of texture_upload/
texture_resue relative items in chromeos glbench test.
Staging texture is not efficient for CPU uploading.
Signed-off-by: Jasber Chen <yipeng.chen@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13306>
Marek Olšák [Tue, 5 Oct 2021 21:16:10 +0000 (17:16 -0400)]
radeonsi: simplify write_psize code in si_get_vs_out_cntl
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12789>
Marek Olšák [Tue, 5 Oct 2021 21:14:06 +0000 (17:14 -0400)]
radeonsi: simplify how VS_OUT_CCDIST is set
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12789>
Arvind Yadav [Thu, 30 Sep 2021 12:04:02 +0000 (17:34 +0530)]
radeonsi: remove the use of PKT3_CONTEXT_REG_RMW
This patch is to to remove PKT3_CONTEXT_REG_RMW from radeonsi.
and avoid multiple command buffer(PM4 packet)creation for R_02881C_PA_CL_VS_OUT_CNTL.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Arvind Yadav <arvind.yadav@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12789>
Timur Kristóf [Tue, 12 Oct 2021 14:36:47 +0000 (16:36 +0200)]
drirc: Apply radv_invariant_geom workaround to World War Z games.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5433
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13312>
Timur Kristóf [Tue, 12 Oct 2021 14:29:01 +0000 (16:29 +0200)]
drirc: Apply radv_invariant_geom workaround to Resident Evil Village.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5071
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13312>
Timur Kristóf [Tue, 12 Oct 2021 14:21:11 +0000 (16:21 +0200)]
drirc: Fix indentation.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13312>
Marek Olšák [Wed, 6 Oct 2021 06:23:43 +0000 (02:23 -0400)]
ac/surface: enable better display DCC for chips newer than Yellow Carp
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13214>
Marek Olšák [Wed, 6 Oct 2021 06:35:08 +0000 (02:35 -0400)]
ac/surface: disallow display DCC for big resolutions
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13214>
Marek Olšák [Wed, 6 Oct 2021 06:26:20 +0000 (02:26 -0400)]
ac/surface: always use suboptimal display DCC with DRM <= 3.43.0
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13214>
Tapani Pälli [Tue, 12 Oct 2021 08:13:49 +0000 (11:13 +0300)]
anv/android: fix parameters given for vk_common_QueueSubmit
Common queue submit expects pWaitDstStageMask to be set per each
semaphore (as per Vulkan spec) and crashes if these are not given
properly.
This fixes crashes seen when running vulkan apps on Android.
v2: change the VkPipelineStageFlags given (Lionel)
Fixes:
b996fa8efaa4 ("anv: implement VK_KHR_synchronization2")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13305>
Kyle Brenneman [Tue, 12 Oct 2021 14:32:52 +0000 (08:32 -0600)]
Remove the shebang from eglFunctionList.py.
eglFunctionList.py isn't executed directly, so it doesn't need a shebang
line.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13130>
Kyle Brenneman [Thu, 30 Sep 2021 19:46:39 +0000 (13:46 -0600)]
Add copyright comments to the GLVND-related files.
A few of the GLVND-related files were missing a copyright comment at the
top. Copy the same MIT license text from gen_egl_dispatch.py et. al.
https://gitlab.freedesktop.org/mesa/mesa/-/issues/5267
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13130>
Rhys Perry [Wed, 30 Jun 2021 16:03:37 +0000 (17:03 +0100)]
radv: enable VK_EXT_vertex_input_dynamic_state
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Tested-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4768
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11717>
Rhys Perry [Wed, 12 May 2021 14:46:53 +0000 (15:46 +0100)]
radv: implement VK_EXT_vertex_input_dynamic_state
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11717>
Rhys Perry [Mon, 17 May 2021 16:56:28 +0000 (17:56 +0100)]
aco: implement VS input loads with prologs
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11717>
Rhys Perry [Mon, 17 May 2021 16:53:30 +0000 (17:53 +0100)]
aco: implement aco_compile_vs_prolog
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11717>
Rhys Perry [Mon, 17 May 2021 18:17:15 +0000 (19:17 +0100)]
radv: add pre-compiled vertex shader prologs for common states
This lets us pre-compile a prolog and avoid a hash table lookup during
command buffer recording, most of the time.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11717>
Rhys Perry [Fri, 16 Apr 2021 10:55:59 +0000 (11:55 +0100)]
radv: implement dynamic vertex input state using vertex shader prologs
This doesn't actually use the functionality or implement prolog
compilation yet.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11717>
Rhys Perry [Fri, 21 May 2021 14:26:38 +0000 (15:26 +0100)]
radv: move VS specific input SGPRs first
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11717>
Rhys Perry [Fri, 14 May 2021 11:44:17 +0000 (12:44 +0100)]
radv: add segregated fit shader memory allocator
Way faster than the previous one, especially with a large number of
shaders.
This doesn't have much of an effect right now, but the previous allocator
was expensive compared to the cost of compiling vertex shader prologs.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11717>
Rhys Perry [Thu, 27 May 2021 16:29:42 +0000 (17:29 +0100)]
radv: add radv_shader_variant_get_va and radv_find_shader_variant helpers
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11717>
Rhys Perry [Fri, 2 Jul 2021 15:02:37 +0000 (16:02 +0100)]
radv: add radv_translate_vertex_format()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11717>
Rhys Perry [Fri, 2 Jul 2021 15:07:51 +0000 (16:07 +0100)]
radv: add and use radv_vs_input_alpha_adjust
Unlike ac_fetch_format, this enum can be packed into two bits.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11717>
Rhys Perry [Wed, 18 Aug 2021 12:29:59 +0000 (13:29 +0100)]
aco: fix vadd32() when b is neither a constant nor temporary
This will be useful for compiling vertex shader prologs, where we
basically use ACO as an assembler.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11717>
Qiang Yu [Wed, 29 Sep 2021 07:22:33 +0000 (15:22 +0800)]
nir/linker: rename replace_constant_input to replace_varying_input_by_constant_load
To align with replace_varying_input_by_uniform_load and better
describe what it does.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12613>
Qiang Yu [Mon, 30 Aug 2021 07:51:50 +0000 (15:51 +0800)]
nir/linker: support uniform when optimizing varying
Varying assigned from uniform won't change after interpolation,
so move uniform load to fragment shader to eliminate the varying.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12613>
Qiang Yu [Wed, 8 Sep 2021 06:44:11 +0000 (14:44 +0800)]
mesa/st: delay nir spirv link
Following commit for st_nir_link_shaders->nir_link_opt_varyings
may copy uniform variable from one shader to another, so delay
the nir_spirv link which contains mesa uniform information
update (gl_nir_link_uniforms) after it and align with glsl link.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12613>
Felix DeGrood [Wed, 25 Aug 2021 21:12:36 +0000 (21:12 +0000)]
anv: dirty only state impacted by blorp_exec
Instead of dirtying all state after blorp operations,
avoid dirtying state that blorp never touches.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5077
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12567>
Filip Gawin [Tue, 12 Oct 2021 11:53:52 +0000 (13:53 +0200)]
r300: fixes for UB caused by left shifts
r300_vs.c:252:37: runtime error: left shift of negative value -1
r300_state.c:1824:66: runtime error: left shift of 63112 by 16 places
cannot be represented in type 'int'
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13308>
Marek Olšák [Tue, 12 Oct 2021 13:36:13 +0000 (09:36 -0400)]
radeonsi: fix an out-of-bounds access in si_create_vertex_state
Fixes:
fb8f532ea1b - radeonsi: implement draw_vertex_state for lower display list overhead
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5484
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13309>
Marek Olšák [Sun, 27 Jun 2021 21:57:56 +0000 (17:57 -0400)]
radeonsi: align pipe_resource & sampler_view allocations to a cache line
It eliminates "False Sharing" for atomic operations. (see wikipedia)
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11618>
Marek Olšák [Sun, 27 Jun 2021 21:55:29 +0000 (17:55 -0400)]
util,gallium: put count in pipe_resource & sampler_view on its own cache line
This adds 60 bytes to both structures. It eliminates "False Sharing"
for atomic operations (see wikipedia).
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11618>
Daniel Schürmann [Mon, 11 Oct 2021 14:14:21 +0000 (16:14 +0200)]
driconf: set vk_x11_strict_image_count for Wolfenstein: Youngblood
Otherwise, the game refuses to start on xwayland.
Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13289>
Filip Gawin [Tue, 12 Oct 2021 17:22:26 +0000 (19:22 +0200)]
nir: avoiding reading unitialized memory when using nir_dest_copy
Deeper in chain of calls, function "src_has_indirect" is used (which
reads "is_ssa" and "reg.indirect").
Fixes:
d1eae6f36be6 ("nir: Properly clean up nir_src/dest indirects")
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13317>
Danylo Piliaiev [Tue, 12 Oct 2021 15:03:37 +0000 (18:03 +0300)]
turnip: fix streamout buffer offset calculations
Fixes vkd3d test "test_vbv_stride_edge_cases"
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13315>
Emma Anholt [Thu, 7 Oct 2021 19:07:31 +0000 (12:07 -0700)]
ci: Update piglit to
7d7dd2688c214e1b3c00f37226500cbec4a58efb.
This brings in a bunch of i915g spurious fail fixes, fixes for !12613, and
new tests.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13253>
Emma Anholt [Fri, 17 Sep 2021 18:52:38 +0000 (11:52 -0700)]
ci: Update deqp to vulkan-cts-1.2.7.1.
Brings in some VK fixes for tilers.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13253>
Jason Ekstrand [Wed, 6 Oct 2021 18:11:30 +0000 (13:11 -0500)]
vulkan/wsi/display: Delete the wrapper entrypoints
Acked-by: Chia-I Wu <olvaffe@gmail.com>
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13234>
Jason Ekstrand [Wed, 6 Oct 2021 17:32:20 +0000 (12:32 -0500)]
vulkan/wsi/wayland: Delete the wrapper entrypoints
Acked-by: Chia-I Wu <olvaffe@gmail.com>
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13234>
Jason Ekstrand [Wed, 6 Oct 2021 17:29:10 +0000 (12:29 -0500)]
vulkan/wsi/x11: Delete the wrapper entrypoints
Acked-by: Chia-I Wu <olvaffe@gmail.com>
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13234>
Jason Ekstrand [Wed, 6 Oct 2021 17:42:18 +0000 (12:42 -0500)]
vulkan/wsi/common: Delete the wrapper entrypoints
Acked-by: Chia-I Wu <olvaffe@gmail.com>
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13234>
Jason Ekstrand [Wed, 6 Oct 2021 17:20:56 +0000 (12:20 -0500)]
venus: Use the common WSI wrappers
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13234>