Alex Porosanu [Fri, 29 Apr 2016 12:18:00 +0000 (15:18 +0300)]
crypto/fsl: add support for multiple SEC engines initialization
For SoCs that contain multiple SEC engines, each of them needs
to be initialized (by means of initializing among others the
random number generator).
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Alex Porosanu [Fri, 29 Apr 2016 12:17:59 +0000 (15:17 +0300)]
arch/arm, arch/powerpc: add # of SEC engines on the SOC
Some SOCs, specifically the ones in the C29x familiy can have
multiple security engines. This patch adds a system configuration
define which indicates the maximum number of SEC engines that
can be found on a SoC.
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Alex Porosanu [Fri, 29 Apr 2016 12:17:58 +0000 (15:17 +0300)]
arch/arm: add SEC JR0 offset
Freescale PPC SoCs do not hard-code security engine's Job Ring 0
address, rather a define is used. This patch adds the same
functionality to the ARM based SoCs (i.e. LS1/LS2 and i.MX parts)
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Qianyu Gong [Wed, 27 Apr 2016 01:44:51 +0000 (09:44 +0800)]
armv7: ls102xa: spl: fix the macro name of MMC mode
MMCSD_MODE_FAT has been renamed to MMCSD_MODE_FS by commit
205b4f33.
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Qianyu Gong [Wed, 27 Apr 2016 01:45:23 +0000 (09:45 +0800)]
armv8: fsl-layerscape: spl: fix the macro name of MMC mode
MMCSD_MODE_FAT has be renmaed to MMCSD_MODE_FS by commit
205b4f33.
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Qianyu Gong [Wed, 27 Apr 2016 01:43:11 +0000 (09:43 +0800)]
armv8: fsl-layerscape: spl: remove duplicate init_early_memctl_regs()
init_early_memctl_regs() is also be called in board_early_init_f().
So remove the duplicated call in spl code.
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Qianyu Gong [Tue, 26 Apr 2016 04:51:43 +0000 (12:51 +0800)]
armv8: ls1043ardb: fix types of variables
Using u16 for cfg_rcw_src and u8 for sd1refclk_sel is enough.
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Qianyu Gong [Tue, 26 Apr 2016 04:51:42 +0000 (12:51 +0800)]
armv8: ls1043a: remove redundant code in board files
gd->env_addr will be initialized in env_init() in
common/env_nowhere.c if CONFIG_ENV_IS_NOWHERE is defined.
So no need to do it again.
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Qianyu Gong [Mon, 25 Apr 2016 08:53:53 +0000 (16:53 +0800)]
armv8: ls1043a: copy kernel from QSPI when booting with QSPI enabled
IFC won't be initialized in U-Boot if QSPI is enabled on LS1043AQDS.
So this patch could fix 'sync abort' caused by autoboot that tries to
access IFC address.
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Qianyu Gong [Mon, 25 Apr 2016 08:38:35 +0000 (16:38 +0800)]
armv8/ls1043ardb: fix the limitation of using 'cpld reset'
The current 'cpld reset' will just write global_rst register
but couldn't switch to NOR boot if the board's switches are
for NAND/SD boot. So need to write rcw source registers for
NOR boot as well.
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Vincent Siles [Fri, 22 Apr 2016 07:52:07 +0000 (09:52 +0200)]
arm: uniform usage of u32 in ls102x caam config
Mix usage of uint32_t and u32 fixed in favor of u32.
Signed-off-by: Vincent Siles <vincent.siles@provenrun.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Vincent Siles [Fri, 22 Apr 2016 07:52:06 +0000 (09:52 +0200)]
arm: Fix SCFG ICID reg addresses
On the LS102x boards, in order to initialize the ICID values of
masters, the dev_stream_id array holds absolute offsets from the
base of SCFG.
In ls102xa_config_ssmu_stream_id, the base pointer is cast to
uint32_t * before adding the offset, leading to an invalid address.
Casting it to void * solves the issue.
Signed-off-by: Vincent Siles <vincent.siles@provenrun.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Alison Wang [Fri, 22 Apr 2016 02:37:25 +0000 (10:37 +0800)]
armv8: fsl-layerscape: Remove unnecessary flushing dcache
As the issue about the stack will get corrupted when switching between
the early and final mmu tables is fixed by commit
70e21b064, the
workaround to flush dcache is unnecessary and should be removed.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Prabhakar Kushwaha [Tue, 19 Apr 2016 03:23:42 +0000 (08:53 +0530)]
armv8: ls2080a: update eth prime
As per new PHY framework, DPNI naming convetion is no more used.
Use new naming convention.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Aneesh Bansal [Wed, 6 Apr 2016 16:55:51 +0000 (22:25 +0530)]
armv8: ls2080: enable sec_init in U-Boot
Define CONFIG_FSL_CAAM for LS2080 which would enable
call to sec_init() during U-Boot.
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Yuan Yao [Tue, 15 Mar 2016 06:36:44 +0000 (14:36 +0800)]
armv8/ls1043a: update the node for QSPI support
The address value and size value set for QSPI dts node "reg"
property have type of u64 on arm64.
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Yuan Yao [Tue, 15 Mar 2016 06:36:43 +0000 (14:36 +0800)]
sf: Disable 4-KB erase command for SPANSION S25FS-S family
The S25FS-S family physical sectors may be configured as a hybrid
combination of eight 4-kB parameter sectors at the top or bottom
of the address space with all but one of the remaining sectors
being uniform size.
The default status of the flash is in this hybrid architecture.
The parameter sectors and the uniform sectors have different erase
commands.
This patch disable the hybrid sector architecture then the flash will
has uniform sector size and uniform erase command.
This configuration is temporary, the flash will revert to hybrid
architecture after power on reset.
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Yuan Yao [Tue, 15 Mar 2016 06:36:42 +0000 (14:36 +0800)]
spi: fsl_qspi: Enable Spansion S25FS-S family flashes
The flash type of LS2085AQDS QSPI is S25FS256S. It has special write
any device register command and read any device register command.
This patch enable support for those commands.
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Yuan Yao [Tue, 15 Mar 2016 06:36:41 +0000 (14:36 +0800)]
spi: fsl_qspi: Assign AMBA mem according CS num in dts
QSPI controller automatic enable the chipselect signal according the
dest AMBA memory address. Now we distribute the AMBA memory zone
averagely to every chipselect slave device according chipselect
numbers got from dts node.
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Yuan Yao [Tue, 15 Mar 2016 06:36:40 +0000 (14:36 +0800)]
spi: fsl_qspi: Fix issues on arm64
The address value and size value get from dts "reg" property have
type of u64 on arm64. If we assign those values to "u32" variables,
driver can't work correctly. Converting the type of those variables
to fdt_xxx_t.
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Alex Porosanu [Mon, 11 Apr 2016 07:42:50 +0000 (10:42 +0300)]
armv8/fdt: add fixup_crypto_node
For Qoriq PPC&ARM v7 platforms, the crypto node is being fixup'ed in
order to update the SEC internal version (aka SEC ERA). This patch
adds the same functionality to the ARMv8 SoCs.
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Prabhakar Kushwaha [Sun, 10 Apr 2016 14:56:22 +0000 (20:26 +0530)]
armv8: ls2080a: Update MAINTAINERS file
Update MAINTAINERS file for ls2080aqds and ls2080ardb platforms.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Shengzhou Liu [Thu, 7 Apr 2016 06:41:30 +0000 (14:41 +0800)]
armv8/ls2080ardb: Update DDR timing to support more UDIMMs
Optimize DDR timing for good margins to support new Transcend
and Apacer DDR4 UDIMM besides current Micron UDIMM.
Verified 1333MT/s, 1600MT/s, 1866MT/s, 2133MT/s rate with
following UDIMM on LS2080ARDB.
- Micron UDIMM: MTA18ASF1G72AZ-2G1A1Z
- Apacer UDIMM: 78.C1GM4.AF10B
- Transcend UDIMM: TS1GLH72V1H
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Shengzhou Liu [Wed, 16 Mar 2016 05:50:23 +0000 (13:50 +0800)]
driver/ddr/fsl: Add workaround for erratum A-009801
The initial training for the DDRC may provide results that are not
optimized. The workaround provides better read timing margins.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Shengzhou Liu [Wed, 16 Mar 2016 05:50:22 +0000 (13:50 +0800)]
drivers/ddr/fsl: update workaround for erratum A-008511
Per the latest erratum document, update step 4 and step 8, only
DEBUG_29[21] is changed, all other bits should not be changed.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Shengzhou Liu [Thu, 7 Apr 2016 08:22:21 +0000 (16:22 +0800)]
armv8/ls1043: Add workaround for DDR erratum A-008850
Barrier transactions from CCI400 need to be disabled till
the DDR is configured, otherwise it may lead to system hang.
The patch adds workaround to fix the erratum.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Tom Rini [Mon, 16 May 2016 14:40:32 +0000 (10:40 -0400)]
Prepare v2016.05
Signed-off-by: Tom Rini <trini@konsulko.com>
Hans de Goede [Thu, 12 May 2016 17:23:47 +0000 (19:23 +0200)]
sunxi: Enable USB host in CHIP defconfig
Reported-and-tested-by: Dennis Gilmore <dennis@ausil.us>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Heiko Schocher [Thu, 28 Apr 2016 06:17:28 +0000 (08:17 +0200)]
test, tools: update tbot documentation
update tbot documentation in U-Boot, as I just
merged the event system into tbots master
branch.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Mon, 9 May 2016 08:08:24 +0000 (10:08 +0200)]
tests: py: fix NameError exception if bdi cmd is not supported
test/py raises an error, if a board has not enabled bdi command
> pytest.skip('bdinfo command not supported')
E NameError: global name 'pytest' is not defined
import pytest in test/py/u_boot_utils.py fixes this.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Andre Przywara [Thu, 12 May 2016 11:14:41 +0000 (12:14 +0100)]
arm/arm64: Move barrier instructions into separate header
Commit
bfb33f0bc45b ("sunxi: mctl_mem_matches: Add missing memory
barrier") broke compilation for the Pine64, as dram_helper.c now
includes <asm/armv7.h>, which does not compile on arm64.
Fix this by moving all barrier instructions into a separate header
file, which can easily be shared between arm and arm64.
Also extend the inline assembly to take the "sy" argument, which is
optional for ARMv7, but mandatory for v8.
This fixes compilation for 64-bit sunxi boards (Pine64).
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Dinh Nguyen [Tue, 10 May 2016 20:13:59 +0000 (15:13 -0500)]
arm: socfpga: Update iomux and pll for c5 socdk RevE
Update the pinmux and pll configuration for the Cyclone5 RevE or later devkit.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Fabio Estevam [Tue, 10 May 2016 16:31:40 +0000 (13:31 -0300)]
warp7: Fix boot by selecting CONFIG_OF_LIBFDT
CONFIG_OF_LIBFDT needs to be selected to avoid the following
boot problem:
reading zImage
6346216 bytes read in 118 ms (51.3 MiB/s)
Booting from mmc ...
reading imx7d-warp.dtb
32593 bytes read in 11 ms (2.8 MiB/s)
Kernel image @ 0x80800000 [ 0x000000 - 0x60d5e8 ]
FDT and ATAGS support not compiled in - hanging
### ERROR ### Please RESET the board ###
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tom Rini [Sat, 7 May 2016 02:12:29 +0000 (22:12 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Sat, 7 May 2016 02:12:15 +0000 (22:12 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb
Peng Fan [Tue, 3 May 2016 02:25:22 +0000 (10:25 +0800)]
usb: gadget: dfu: discard dead code
Reported by Coverity:
Logically dead code (DEADCODE)
dead_error_line: Execution cannot reach this statement:
(f_dfu->strings + --i).s = ....
If calloc failed, i is still 0 and no need to call free,
so discard the dead code.
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: "Łukasz Majewski" <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Peng Fan [Tue, 3 May 2016 02:24:52 +0000 (10:24 +0800)]
dfu: avoid memory leak
When dfu_fill_entity fail, need to free dfu to avoid memory leak.
Reported by Coverity:
"
Resource leak (RESOURCE_LEAK)
leaked_storage: Variable dfu going out of scope leaks the storage
it points to.
"
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: "Łukasz Majewski" <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Stefan Roese [Fri, 6 May 2016 11:53:37 +0000 (13:53 +0200)]
usb: dwc2: Add delay to fix the USB detection problem on SoCFPGA
With patch
c998da0d (usb: Change power-on / scanning timeout handling),
the USB scanning is started earlier and with a smaller timeout. This
resulted on SoCFPGA (using the DWC2 driver) in some USB sticks not
getting detected any more. This patch now adds a 1 second delay (in
the host mode only) to the DWC2 driver before the scanning is started.
With this delay, now all problematic USB keys are detected successfully
again. And there is no need any more to change the delay / timeout
in the common USB code (usb_hub.c).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Marek Vasut <marex@denx.de>
Marek Vasut [Tue, 3 May 2016 20:22:59 +0000 (22:22 +0200)]
usb: hub: Don't continue on get_port_status failure
The code shouldn't continue probing the port if get_port_status() failed.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Stephen Warren <swarren@nvidia.com>
Marek Vasut [Wed, 27 Apr 2016 01:32:56 +0000 (03:32 +0200)]
usb: Assure Get Descriptor request is in separate microframe
The Kingston DT Ultimate USB 3.0 stick is sensitive to this first
Get Descriptor request and if the request is not in a separate
microframe, the stick refuses to operate. Add slight delay, which
is enough for one microframe to pass on any USB spec revision.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Stephen Warren <swarren@nvidia.com>
Marek Vasut [Wed, 27 Apr 2016 01:08:12 +0000 (03:08 +0200)]
usb: Wait after sending Set Configuration request
Some devices, like the SanDisk Cruzer Pop need some time to process
the Set Configuration request, so wait a little until they are ready.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Stephen Warren <swarren@nvidia.com>
Anatolij Gustschin [Fri, 6 May 2016 15:16:31 +0000 (17:16 +0200)]
socfpga: fix broken build if CONFIG_ETH_DESIGNWARE disabled
Building without ethernet driver doesn't work. Fix it.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Marek Vasut <marex@denx.de>
Marek Vasut [Wed, 27 Apr 2016 21:38:05 +0000 (23:38 +0200)]
mtd: cqspi: Simplify indirect read code
The indirect read code is a pile of nastiness. This patch replaces
the whole unmaintainable indirect read implementation with the one
from upcoming Linux CQSPI driver, which went through multiple rounds
of thorough review and testing. All the patch does is it plucks out
duplicate ad-hoc code distributed across the driver and replaces it
with more compact code doing exactly the same thing. There is no
speed change of the read operation.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Jagan Teki <jteki@openedev.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vignesh R <vigneshr@ti.com>
Marek Vasut [Wed, 27 Apr 2016 21:18:55 +0000 (23:18 +0200)]
mtd: cqspi: Simplify indirect write code
The indirect write code is buggy pile of nastiness which fails horribly
when the system runs fast enough to saturate the controller. The failure
results in some pages (256B) not being written to the flash. This can be
observed on systems which run with Dcache enabled and L2 cache enabled,
like the Altera SoCFPGA.
This patch replaces the whole unmaintainable indirect write implementation
with the one from upcoming Linux CQSPI driver, which went through multiple
rounds of thorough review and testing. While this makes the patch look
terrifying and violates all best-practices of software development, all
the patch does is it plucks out duplicate ad-hoc code distributed across
the driver and replaces it with more compact code doing exactly the same
thing.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Jagan Teki <jteki@openedev.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vignesh R <vigneshr@ti.com>
Stefan Roese [Thu, 28 Apr 2016 05:17:16 +0000 (07:17 +0200)]
arm: socfpga: socrates: Add 'time' command
The time command is very helpful for performance and regressions tests.
So lets enable it on SoCrates.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Marek Vasut [Wed, 27 Apr 2016 13:07:03 +0000 (15:07 +0200)]
ARM: socfpga: Disable USB OC protection on SoCrates
This is mandatory, otherwise the USB does not work.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Marek Vasut [Tue, 26 Apr 2016 23:55:10 +0000 (01:55 +0200)]
usb: Don't init pointer to zero, but NULL
The pointer should always be inited to NULL, not zero (0). These are
two different things and not necessarily equal.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Stephen Warren <swarren@nvidia.com>
Stefan Agner [Thu, 5 May 2016 23:59:12 +0000 (16:59 -0700)]
usb: ehci-mx6: allow board_ehci_hcd_init to fail
There could be runtime determined board specific reason why a EHCI
initialization fails (e.g. ENODEV if a Port is not available). In
this case, properly return the error code.
While at it, that function (board_ehci_hcd_init) has actually two
documentation blocks... Use the correct function name for the
documentation block of board_usb_phy_mode.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Peng Fan [Wed, 4 May 2016 07:27:50 +0000 (15:27 +0800)]
imx6: cache: disable L2 before touching Auxiliary Control Register
According PL310 TRM, Auxiliary Control Register
"
The register must be written to using a secure access, and it can be
read using either a secure or a NS access. If you write to this register
with a NS access, it results in a write response with a DECERR response,
and the register is not updated. Writing to this register with the L2
cache enabled, that is, bit[0] of L2 Control Register set to 1,
results in a SLVERR.
"
So If L2 cache is already enabled by ROM, chaning value of ACR
will cause SLVERR and uboot hang.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Stephen Warren [Thu, 5 May 2016 23:02:06 +0000 (17:02 -0600)]
test/py: dfu: wait for USB device to go away at boot
It can take a while for a host machine to notice that a USB device has
disconnected, and process the change. At the end of the DFU test, we wait
up to 10 seconds for this to happen. This change makes the test wait the
same (up to) 10 seconds at the start of the test for any previously active
USB device-mode session to be cleaned up. Such as session might have been
used to download U-Boot into memory for example; this is certainly true
on my Tegra test systems. This changes should solve the DFU test
intermittency issues I've been seeing on some Tegra devices.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Russ Dill [Thu, 5 May 2016 13:52:10 +0000 (08:52 -0500)]
ARM: am33xx: Fix DDR initialization delays
The current delays in the DDR initialization routines for am33xx
architectures are sometimes not running long enough leading to DDR
init errors. On am437x, this shows up as an L3 NOC error after the
kernel boots. This is due to the timer not being initialized
properly, but instead still containing the timer init values from
the boot ROM which cause timers to expire in 1/4th the time
required.
timer_init is typically not called until board_init_r, however on
am33xx/am43xx udelay is required in sdram_init which is called
from board_init_f, so a call to timer_init is required earlier.
Note that this issue introduced in v2015.01 by:
b352dde "am33xx: Drop timer_init call from s_init".
Although this could instead fixed by reverting said commit, it
would cause timer_init to be called twice in both SPL and non-SPL
cases. This gives a little more fine grained control and also
matches what is being done on omap-command and fsl-layerscape.
Signed-off-by: Russ Dill <russ.dill@ti.com>
Stephen Warren [Thu, 28 Apr 2016 18:45:44 +0000 (12:45 -0600)]
ARM: fix ifdefs in ARMv8 lowlevel_init()
Commit
724219a65f55 "ARM: always perform per-CPU GIC init" removed some
ifdefs to unify the MULTIENTRY-vs-non-MULTIENTRY paths. However, the
wrong endif was removed. This patch adds back that missing endif, and
adds a new ifdef to match the endif the now-correctly-terminated block
used to match against. Use "git show -U25
724219a65f55" to see enough
context to make the original issue clear.
In practical terms, this makes no difference to runtime behaviour. The
code that was incorrectly compiled into the binary when ifndef MULTIENTRY
is a no-op for other cases, since branch_if_master evaluates to a hard-
coded jump. The only issues were:
- A few extra instructions were added to the binary.
- The comment on the endif at the very end of the function, indicating
which ifdef it matched, were wrong.
An alternative might be to simply fix the comment on that trailing ifdef,
but that only addresses the second point above, not the first.
Fixes:
724219a65f55 ("ARM: always perform per-CPU GIC init")
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Robert P. J. Day [Wed, 4 May 2016 08:47:31 +0000 (04:47 -0400)]
Fix various typos, scattered over the code.
Spelling corrections for (among other things):
* environment
* override
* variable
* ftd (should be "fdt", for flattened device tree)
* embedded
* FTDI
* emulation
* controller
Marek Vasut [Wed, 4 May 2016 14:35:25 +0000 (16:35 +0200)]
mmc: Fix error in RPMB code
Since we do not build any board with CONFIG_SUPPORT_EMMC_RPMB , this
piece of code evaded conversion. Fix the following compiler error:
cmd/mmc.c: In function 'do_mmcrpmb':
cmd/mmc.c:316:32: error: 'struct blk_desc' has no member named 'part_num'
original_part = mmc->block_dev.part_num;
^
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Tom Rini <trini@konsulko.com>
Ash Charles [Thu, 5 May 2016 18:58:07 +0000 (11:58 -0700)]
omap4: duovero: Disable EFI booting
The DuoVero board fails to compile with EFI enabled as the generated
binaries are too large. As this platform doesn't currently need EFI,
disable this feature.
Signed-off-by: Ash Charles <ashcharles@gmail.com>
Ash Charles [Thu, 5 May 2016 18:58:06 +0000 (11:58 -0700)]
omap4: load files for legacy boot
Be sure to load the zImage and fdtfile prior to actually booting in
case we are doing a legacy boot.
Signed-off-by: Ash Charles <ashcharles@gmail.com>
Stephen Warren [Thu, 21 Apr 2016 22:03:37 +0000 (16:03 -0600)]
ARM: tegra: import latest Jetson TK1 spreadsheet
This imports v11 of "Jetson TK1 Development Platform Pin Mux" from
https://developer.nvidia.com/embedded/downloads.
The new version defines the mux option for the MIPI pad ctrl selection.
The OWR pin no longer has an entry in the configuration table because
the only mux option it support is OWR, that feature isn't supported, and
hence can't conflict with any other pin. This pin can only usefully be
used as a GPIO.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Wed, 20 Apr 2016 21:46:50 +0000 (15:46 -0600)]
pci: tegra: fix DM conversion issues on Tegra20
Tegra20's PCIe controller has a couple of quirks. There are workarounds in
the driver for these, but they don't work after the DM conversion:
1) The PCI_CLASS value is wrong in HW.
This is worked around in pci_tegra_read_config() by patching up the value
read from that register. Pre-DM, the PCIe core always read this via a
16-bit access to the 16-bit offset 0xa. With DM, 32-bit accesses are used,
so we need to check for offset 0x8 instead. Mask the offset value back to
32-bit alignment to make this work in all cases.
2) Accessing devices other than dev 1 causes a data abort.
Pre-DM, this was worked around in pci_skip_dev(), which the PCIe core code
called during enumeration while iterating over a bus. The DM PCIe core
doesn't use this function. Instead, enhance tegra_pcie_conf_address() to
validate the bdf being accessed, and refuse to access invalid devices.
Since pci_skip_dev() isn't used, delete it.
I've also validated that both these WARs are only needed for Tegra20, by
testing on Tegra30/Cardhu and Tegra124/Jetson TKx. So, compile them in
conditionally.
Fixes:
e81ca88451cf ("dm: tegra: pci: Convert tegra boards to driver model for PCI")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Tue, 12 Apr 2016 17:17:39 +0000 (11:17 -0600)]
ARM: tegra: enable GPU node by compatible value
In current Linux kernel Tegra DT files, 64-bit addresses are represented
in unit addresses as a pair of comma-separated 32-bit values. Apparently
this is no longer the correct representation for simple busses, and the
unit address should be represented as a single 64-bit value. If this is
changed in the DTs, arm/arm/mach-tegra/board2.c:ft_system_setup() will no
longer be able to find and enable the GPU node, since it looks up the node
by name.
Fix that function to enable nodes based on their compatible value rather
than their node name. This will work no matter what the node name is, i.e
for DTs both before and after any rename operation.
Cc: Thierry Reding <treding@nvidia.com>
Cc: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Robert P. J. Day [Tue, 3 May 2016 23:52:49 +0000 (19:52 -0400)]
include/configs: Numerous typo fixes: "controler" -> "controller".
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Stefan Agner [Wed, 13 Apr 2016 23:38:02 +0000 (16:38 -0700)]
net: increase maximum frame size to accomediate VLAN packets
Ethernet packages with IEEE 802.1Q VLAN support may be up to 1522
bytes long. Increase the default size used to allocate packet
storage by 4 bytes. While at it, let git care about history and
rewrite the comment to represent the situation today only.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Stefan Agner [Wed, 13 Apr 2016 23:38:01 +0000 (16:38 -0700)]
net: fix vlan validation
VLAN identifiers are 12-bit decimal numbers, not IP addresses.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Prabhakar Kushwaha [Mon, 28 Mar 2016 08:41:05 +0000 (14:11 +0530)]
drivers: net: ldpaa: Memset pools_params as "0" before use
Memset pools_params as "0" to avoid garbage value in dpni_set_pools.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reported-by: Jose Rivera <german.rivera@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Lev Iserovich [Thu, 7 Jan 2016 23:04:16 +0000 (18:04 -0500)]
fdt: fix setting MAC addresses for multiple interfaces
For multiple ethernet interfaces the FDT offset of '/aliases' will change as we
are adding MAC addresses to the FDT.
Therefore only the first interface ('ethernet0') will get properly updated in
the FDT, with the rest getting FDT errors when we try to set their MAC address.
Signed-off-by: Lev Iserovich <iserovil@deshawresearch.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Tue, 26 Apr 2016 01:02:35 +0000 (03:02 +0200)]
usb: dwc2: Init desc_before_addr
Initialize desc_before_addr, otherwise the USB core won't send the
first 64B Get Device Descriptor request in common/usb.c function
usb_setup_descriptor() . There are some USB devices which expect
this sequence and otherwise can misbehave.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Tom Rini <trini@konsulko.com>
Marek Vasut [Wed, 27 Apr 2016 12:58:49 +0000 (14:58 +0200)]
usb: dwc2: Make OC protection configurable
Introduce a new flag in the controller private data, which allows selectively
disabling the OC protection. Use the standard 'disable-over-current' OF prop
to set this flag. This OC protection must be disabled on EBV SoCrates rev 1.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Marek Vasut [Wed, 27 Apr 2016 12:55:57 +0000 (14:55 +0200)]
usb: dwc2: Pull Ext VBUS macro from dwc_otg_core_init()
Introduce a boolean flag in the dwc2 controller private data and set
it according to the macro (for now) instead of having this macro
directly in the dwc_otg_core_init(). This will let us configure the
flag from DT or such later on, if needed.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Marek Vasut [Wed, 27 Apr 2016 12:53:33 +0000 (14:53 +0200)]
usb: dwc2: Pass private data into dwc_otg_core_init()
Pass the whole bulk of private data instead of just the regs,
since the private data will soon contain important configuration
flags.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Enric Balletbo i Serra [Tue, 3 May 2016 06:59:24 +0000 (08:59 +0200)]
igep00x0: Use the SRAM available for SPL.
Move CONFIG_SPL_TEXT_BASE down to 0x40200000 and set CONFIG_SPL_MAX_SIZE
to (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE), so that it's clear
what the limit is.
This will also help some compilers to fit all the code into the allocated
space.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Andreas Bießmann [Tue, 3 May 2016 13:17:03 +0000 (15:17 +0200)]
mkimage: fix generation of FIT image
Commit
7a439cadcf3192eb012a2432ca34670b676c74d2 broke generation of SPL
loadable FIT images (CONFIG_SPL_LOAD_FIT).
Fix it by removing the unnecessary storage of expected image type. This was a
left over of the previous implementation. It is not longer necessary since the
mkimage -b switch always has one parameter.
Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
Mario Six [Wed, 20 Apr 2016 08:44:52 +0000 (10:44 +0200)]
i2c/eeprom: Always define I2C_RXTX_LEN
I2C_RXTX_LEN from include/i2c.h is not defined if CONFIG_DM_I2C is
enabled. This leads to a compilation error on boards that enable both
CONFIG_CMD_EEPROM and CONFIG_DM_I2C.
To avoid this, we define I2C_RXTX_LEN in cmd/eeprom.c if it is not
already defined.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Fabio Estevam [Thu, 21 Apr 2016 01:48:13 +0000 (22:48 -0300)]
mx6ul_evk: Remove CONFIG_SUPPORT_EMMC_BOOT
mx6ul_evk does not come with a eMMC populated, so we should not
define CONFIG_SUPPORT_EMMC_BOOT as it causes SPL to not be able
to boot some brands of SD cards, such as SanDisk microSD HC - 8GB:
U-Boot SPL 2016.05-rc1-28384-g108f841 (Apr 19 2016 - 11:19:11)
Trying to boot from MMC1
spl: mmc block read error
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
When CONFIG_SUPPORT_EMMC_BOOT is defined spl_boot_mode() returns
MMCSD_MODE_EMMCBOOT, so remove this option to have a reliable boot
via SD card.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Michal Simek [Thu, 28 Apr 2016 07:08:18 +0000 (09:08 +0200)]
kbuild: Do not append dtb for OF_EMBED case
dtb is already included in binary that's why there is no need to replace
u-boot-spl.bin with u-boot-spl-dtb.bin. This is only needed for
OF_SEPARATE is enabled. Only copy -nodtb.bin version which is straight
output from objcopy -O binary.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 1 May 2016 23:12:24 +0000 (17:12 -0600)]
fit_image: Fix a double close() on the error path
There is an extra close() call which is not needed.
Reported-by: Coverity (CID: 143065)
Signed-off-by: Simon Glass <sjg@chromium.org>
Anatolij Gustschin [Fri, 29 Apr 2016 20:00:11 +0000 (22:00 +0200)]
tools: env: fix config file loading in env library
env library is broken as the config file pointer is only initialized
in main(). When running in the env library parse_config() fails:
Cannot parse config file '(null)': Bad address
Ensure that config file pointer is always initialized.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
matwey.kornilov@gmail.com [Sun, 1 May 2016 16:58:31 +0000 (19:58 +0300)]
config: am335x_evm: detect BoneGreen using BBG1
Since
770e68c0a37fded897d4bdda661614fc81cb33d2
BoneGreen is detected in board_late_init as board_name 'BBG1'
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Vagrant Cascadian [Sun, 1 May 2016 02:18:00 +0000 (19:18 -0700)]
Fix spelling of "occurred".
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Andreas Bießmann [Sun, 1 May 2016 01:46:16 +0000 (03:46 +0200)]
Change my mailaddress
I'll switch my mails to my own server, so drop all gmail references.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Andreas Bießmann [Sun, 1 May 2016 01:01:27 +0000 (03:01 +0200)]
mkimage: fix argument parsing on BSD systems
The getopt(3) optstring '-' is a GNU extension which is not available on BSD
systems like OS X.
Remove this dependency by implementing argument parsing in another way. This
will also change the lately introduced '-b' switch behaviour.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Mon, 2 May 2016 22:36:07 +0000 (18:36 -0400)]
arch/arm/imx-common/Makefile: Update u-boot.uim MKIMAGEFLAGS
We need to be passing -T firmware here and aren't.
Signed-off-by: Tom Rini <trini@konsulko.com>
Ronald Zachariah [Thu, 28 Apr 2016 05:08:34 +0000 (07:08 +0200)]
fs: ext4: fix symlink read function
The function ext4fs_read_symlink was unable to handle a symlink
which had target name of exactly 60 characters.
Signed-off-by: Ronald Zachariah <rozachar@cisco.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Cc: Tom Rini <trini@konsulko.com>
Vagrant Cascadian [Fri, 15 Apr 2016 20:43:25 +0000 (13:43 -0700)]
Revert "rockchip: rk3288: correct sdram setting"
This reverts commit
b5788dc0dd9570e98552833767f4373db965985d.
Ram size is incorrectly reported as 512MB on a firefly-rk3288 board
with 2GB of ram. Reverting this patch displays the full amount of ram.
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Acked-by: Simon Glass <sjg@chromium.org>
Tom Rini [Mon, 2 May 2016 16:18:43 +0000 (12:18 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
Tom Rini [Mon, 2 May 2016 14:52:51 +0000 (10:52 -0400)]
Revert "omap3: Use raw SPL by default for mmc1"
Unfortunately with this change we now are unable to do FS mode boots
from MMC1 as with the way the code works today we will always load and
assume that the hard-coded raw location contains U-Boot. Further, we
cannot fix this by just changing other logic to try FS-then-RAW as it
would also make us have to ignore what order the ROM is telling us to
try.
This reverts commit
22d90d560a2b01c47f180e196e6c6485eb8e65db.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 2 May 2016 12:49:53 +0000 (08:49 -0400)]
Revert "ti_armv7_common.h: Fix U-Boot location on eMMC"
We cannot change the long standing hard-coded offset for raw boot mode
for everyone to accommodate how Android expects things to be done here.
This reverts commit
ef5ebe951bec72631cdbc7cef9079e6c684e5d0b.
Signed-off-by: Tom Rini <trini@konsulko.com>
Masahiro Yamada [Thu, 28 Apr 2016 06:37:16 +0000 (15:37 +0900)]
ARM: uniphier: move pin-mux code into pin_init function
The code in uniphier_sld3_sbc_init() is pin-muxing, so it would
be a better fit in uniphier_sld3_early_pin_init().
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 28 Apr 2016 06:37:15 +0000 (15:37 +0900)]
ARM: uniphier: allow to use System Bus for ROM boot mode of PH1-LD20
The System Bus is not available by default on the ROM boot mode of
PH1-LD20. To use devices connected to the System Bus, such as the
Micro Support Card, it is necessary to set up pin-muxing and some
System Bus Controller register.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 28 Apr 2016 06:37:14 +0000 (15:37 +0900)]
ARM: uniphier: enable Peripherl clock to use UART in SPL
This is needed to use UART on SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 28 Apr 2016 06:37:13 +0000 (15:37 +0900)]
ARM: uniphier: fix boot mode table of PH1-LD20
PH1-LD20 does not have the dedicated boot swap select latch.
Instead, it is controlled from the boot mode select.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tom Rini [Thu, 28 Apr 2016 17:15:52 +0000 (13:15 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-video
Tom Rini [Thu, 28 Apr 2016 17:15:41 +0000 (13:15 -0400)]
Merge branch 'master' of git.denx.de/u-boot-sunxi
Martin Pietryka [Wed, 27 Apr 2016 19:39:16 +0000 (21:39 +0200)]
drivers/video/am335x-fb: Properly point framebuffer behind palette
The DMA was outputting the palette on the screen because the base
for the DMA was not after the palette. In addition to that, the ceiling was
also too high, this led that the output on the screen was shifted.
NOTE: According to the TRM, even in 16/24bit mode a palette is required
in the first 32 bytes of the framebuffer.
See also:
https://e2e.ti.com/support/arm/sitara_arm/f/791/p/234967/834483#834483
"In this mode, the LCDC will assume all information is data and thus you
need to ensure that the DMA points to the first pixel of data and not the
first entry in the frame buffer which is the beginning of the 512 byte
palette."
Signed-off-by: Martin Pietryka <martin.pietryka@chello.at>
Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Martin Pietryka [Wed, 27 Apr 2016 19:39:15 +0000 (21:39 +0200)]
drivers/video/am335x-fb: Add support for 16bpp format
To support 16bpp we just need to change the raster_ctrl register
accordingly. Also 32bpp mode should work as well, but was not tested.
According to the TRM the uppermost byte will be ignored when
LCD_TFT_24BPP_UNPACK is set.
The switch logic is based on the Linux kernel tilcdc driver:
drivers/gpu/drm/tilcdc/tilcdc_crtc.c: lines 407 through 419
(kernel was checked out at commit:
bcc981e9ed8)
Signed-off-by: Martin Pietryka <martin.pietryka@chello.at>
Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Tom Rini [Wed, 27 Apr 2016 22:44:32 +0000 (18:44 -0400)]
omap3: Reduce logic/overo SPL max image size
While the OMAP3 has 64KiB of SRAM, per the TRM the download area is only
from 0x40200000 to 0x4020F000 and exceeding that will cause failure to
boot. Further, we need to make sure that we don't run into
SRAM_SCRATCH_SPACE_ADDR as once SPL is running we will write values
there and would corrupt our running image.
Cc: Adam Ford <aford173@gmail.com>
Cc: Steve Sakoman <sakoman@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Hans de Goede [Thu, 14 Apr 2016 14:49:47 +0000 (16:49 +0200)]
sunxi: Enable LDO3 at 3.3V on A13-OLinuXino board
LDO3 is used for the VGA output, this fixes a regression where the VGA
output on these boards would no longer work.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Thu, 14 Apr 2016 16:53:32 +0000 (18:53 +0200)]
sunxi: mctl_mem_matches: Add missing memory barrier
We are running with the caches disabled when mctl_mem_matches gets called,
but the cpu's write buffer is still there and can still get in the way,
add a memory barrier to fix this.
This avoids mctl_mem_matches always returning false in some cases, which
was resulting in:
U-Boot SPL 2015.07 (Apr 14 2016 - 18:47:26)
DRAM: 1024 MiB
U-Boot 2015.07 (Apr 14 2016 - 18:47:26 +0200) Allwinner Technology
CPU: Allwinner A23 (SUN8I)
DRAM: 512 MiB
Where 512 MiB is the right amount, but the DRAM controller would be
initialized for 1024 MiB.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Michal Simek [Tue, 26 Apr 2016 14:12:06 +0000 (16:12 +0200)]
ARM64: zynqmp: Cleanup config file after CMD move
The patch:
"configs: Re-sync almost all of cmd/Kconfig"
(sha1:
78d1e1d0a157c8b48ea19be6170b992745d30f38)
doesn't remove empty if-endif. This patch is fixing it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Masahiro Yamada [Tue, 26 Apr 2016 02:23:39 +0000 (11:23 +0900)]
ARM: uniphier: revive some commands lost by Kconfig re-sync
The recently added uniphier_ld20_defconfig missed the tree-wide
re-sync by commit
89cb2b5f8be4 ("configs: Re-sync with cmd/Kconfig").
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tom Rini [Tue, 26 Apr 2016 11:20:45 +0000 (07:20 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-samsung
Tom Rini [Mon, 25 Apr 2016 23:27:37 +0000 (19:27 -0400)]
Prepare v2016.05-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>