Marek Vasut [Tue, 1 Dec 2020 10:29:18 +0000 (11:29 +0100)]
ARM: dts: stm32: Disable SDMMC1 CKIN feedback clock
The STM32MP1 DHCOM SoM can be built with either bus voltage level shifter
or without one on the SDMMC1 interface. Because the SDMMC1 interface is
limited to 50 MHz and hence SD high-speed anyway, disable the SD feedback
clock to permit operation of the same U-Boot image on both SoM with and
without voltage level shifter.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Marek Vasut [Tue, 1 Dec 2020 10:29:17 +0000 (11:29 +0100)]
ARM: dts: stm32: Enable internal pull-ups for SDMMC1 on DHCOM SoM
The default state of SD bus and clock line is logical HI. SD card IO is
open-drain and pulls the bus lines LO. Always enable the SD bus pull ups
to guarantee this behavior on DHCOM SoM. Note that on SoMs with SD bus
voltage level shifter, the pull ups are built into the level shifter,
however that has no negative impact.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Wed, 2 Dec 2020 17:47:31 +0000 (18:47 +0100)]
.mailmap: map Patrick Delaunay and my email address
Add our new email address dedicated for upstream activities.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrice Chotard [Wed, 2 Dec 2020 17:47:30 +0000 (18:47 +0100)]
treewide: Update email address Patrick Delaunay and Patrice Chotard
Update Patrick and my email address with the one dedicated to
upstream activities.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrice Chotard [Wed, 2 Dec 2020 17:47:29 +0000 (18:47 +0100)]
MAINTAINERS: Update ARM STI and ARM STM STM32MP Arch maintainers emails
Update Patrick and my email address with the one dedicated to
upstream activities.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Manuel Reis [Wed, 25 Nov 2020 10:16:20 +0000 (10:16 +0000)]
add check for ignored CONFIG_ENV_EXT4_DEVICE_AND_PART definition
Check whether user has explicitly defined device and partition where
environment file will be located before using 'auto' i.e. bootable
partition
Voids the need to set such partition as bootable to work with the
'dev:auto' tuple
Signed-off-by: Manuel Reis <mluis.reis@gmail.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Tested-by: Michael Opdenacker <michael.opdenacker@bootlin.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tom Rini [Mon, 7 Dec 2020 16:46:12 +0000 (11:46 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Espressobin: Simplify DT handling of board variants (Pali)
- Add Luka Perkov to maintainers of Puzzle-M801 (Luka)
- Armada 38x: Enable board specific USB2 high-speed impedance
threshold configuration (Joshua)
Pali Rohár [Wed, 25 Nov 2020 18:20:10 +0000 (19:20 +0100)]
arm: mvebu: Espressobin: Detect presence of emmc at runtime
Try to initialize emmc in board_late_init() and if it fails then we know
that emmc device is not connected.
This allows to use in U-Boot just one DTS file for all Espressobin variants
and also to correctly set fdtfile env variable for Linux kernel.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Gérald Kerma <gerald@gk2.net>
Reviewed-by: Andre Heider <a.heider@gmail.com>
Pali Rohár [Wed, 25 Nov 2020 18:20:09 +0000 (19:20 +0100)]
arm: mvebu: Espressobin: Add support for emmc into dts file
To simplify setup, configuration and compilation of u-boot, define emmc
node for all Espressobin boards. Espressobin boards without populated emmc
works correctly, just detection and initialization of emmc obviously fails.
Code for emmc is extracted from commit
f1a43c84a960 ("arm64: dts: a3720:
add support for espressobin with populated emmc").
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Gérald Kerma <gerald@gk2.net>
Pali Rohár [Wed, 25 Nov 2020 18:20:08 +0000 (19:20 +0100)]
Revert "arm64: dts: a3720: add support for espressobin with populated emmc"
This reverts commit
f1a43c84a960265309fa8365759de271a70c5a7e.
Pali Rohár [Wed, 25 Nov 2020 18:20:07 +0000 (19:20 +0100)]
Revert "arm64: dts: armada-3720-espressobin: split common parts to .dtsi"
This reverts commit
03bb6a9b1ed7085794c5f167307273d15c99d3f0.
Joshua Scott [Sun, 8 Nov 2020 21:14:08 +0000 (10:14 +1300)]
arm: mvebu: a38x: Configurable USB2 high-speed impedance threshold
Hardware testing of a board using the Armada 385 has shown that an
impedance threshold setting of 0x7 performs better in an eye-diagram
test than with Marvell's recommended value 0x6.
As other boards may still perform better with Marvell's reccomended value,
a configuration option is added with a default value of 0x6.
Signed-off-by: Joshua Scott <joshua.scott@alliedtelesis.co.nz>
Reviewed-by: Stefan Roese <sr@denx.de>
Luka Kovacic [Thu, 29 Oct 2020 21:30:30 +0000 (22:30 +0100)]
arm: mvebu: puzzle-m801: Add a maintainer
Add Luka Perkov to Puzzle-M801 BOARD MAINTAINERS.
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Tom Rini [Sat, 5 Dec 2020 20:41:18 +0000 (15:41 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-tegra
- Assorted updates
Patrick Delaunay [Thu, 18 Jun 2020 07:41:34 +0000 (09:41 +0200)]
configs: cei-tk1-som: remove CONFIG_ARMV7_PSCI in include file
Activate ARCH_SUPPORT_PSCI as other TEGRA124 target and remove
CONFIG_ARMV7_PSCI and CONFIG_ARMV7_PSCI_NR_CPUS in configs file as they
are migrated in Kconfig.
Select CONFIG_ARMV7_PSCI_0_1 (the first PSCI version),
because CONFIG_ARMV7_PSCI_0_2 and CONFIG_ARMV7_PSCI_1_0
are not activated in this product.
Hi,
This patch depend on the previous serie [1].
I don't test this patch on real hardware but
after this patch the size of the binary don't change.
In .config we have:
CONFIG_ARCH_SUPPORT_PSCI=y
CONFIG_ARMV7_PSCI=y
# CONFIG_ARMV7_PSCI_1_0 is not set
# CONFIG_ARMV7_PSCI_0_2 is not set
CONFIG_ARMV7_PSCI_0_1=y
CONFIG_ARMV7_PSCI_NR_CPUS=4
In u-boot.cfg, this patch only add the 2 lines
#define CONFIG_ARCH_SUPPORT_PSCI 1
#define CONFIG_ARMV7_PSCI_0_1 1
[1] "Convert CONFIG_ARMV7_PSCI_1_0 and CONFIG_ARMV7_PSCI_0_2 to Kconfig"
http://patchwork.ozlabs.org/project/uboot/list/?series=184029
Regards
Patrick
END
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Peter Chubb <peter.chubb@data61.csiro.au>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Peter Robinson [Wed, 1 Apr 2020 23:28:55 +0000 (00:28 +0100)]
arm: tegra: add options for BOOTENV_EFI_SET_FDTFILE_FALLBACK for tegra186
Upstream linux DT naming doesn't align with the U-Boot DT, which may
not always be the case so this allows using BOOTENV_EFI_SET_FDTFILE_FALLBACK
where it might be appropriate for some boards.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Peter Robinson [Wed, 1 Apr 2020 23:28:54 +0000 (00:28 +0100)]
arm: tegra: define fdtfile option for distro boot
For booting via UEFI we need to define the fdtfile option so
bootefi has the option to load a fdtfile from disk. For arm64
the kernel dtb is located in a vendor directory so we define
that as nvidia for that architecture.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Marcel Ziswiler [Thu, 12 Sep 2019 09:12:56 +0000 (11:12 +0200)]
colibri_t30: disable rs232 serial transceiver forceoff pins
Use gpio_early_init_uart() function to disable RS232 serial transceiver
ForceOFF# pins on Iris.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Marcel Ziswiler [Thu, 12 Sep 2019 09:12:55 +0000 (11:12 +0200)]
apalis/colibri_t30: add note about colibri vs. nvidia uart mapping
The following mapping is applicable for Apalis T30:
Apalis UART1: NVIDIA UARTA
Apalis UART2: NVIDIA UARTD
Apalis UART3: NVIDIA UARTB
Apalis UART4: NVIDIA UARTC
The following mapping is applicable for Colibri T30:
Colibri UART-A: NVIDIA UARTA
Colibri UART-B: NVIDIA UARTD
Colibri UART-C: NVIDIA UARTB
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Marcel Ziswiler [Thu, 12 Sep 2019 09:12:54 +0000 (11:12 +0200)]
apalis/colibri_t30: avoid uart input from floating pins
Avoid UART input from floating RX pins on UARTB and UARTC (Colibri T30)
and UARTB, UARTC and UARTD (Apalis T30).
Note: Floating pins may cause spurious break conditions potentially
interrupting U-Boot's autoboot.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Marcel Ziswiler [Thu, 12 Sep 2019 09:12:53 +0000 (11:12 +0200)]
colibri_t30: fix spi1 and uart2/3 resp. uartb/c pinmuxing
Fix SPI1 and UART2/3 resp. UARTB/C pinmuxing.
Note: The former was illegally muxing multiple SoC balls onto the same
internal SoC signal which caused rather strange behaviour regarding
the RS232 serial transceiver ForceOFF# pins as available on Iris.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Marcel Ziswiler [Thu, 12 Sep 2019 09:12:52 +0000 (11:12 +0200)]
apalis/colibri_t30: add comment about tristate and input vs. output pinmuxing
Add pinmuxing comment stating that TRISTATE means the output driver is
tri-stated and INPUT means the input driver is enabled vs. OUTPUT where
it is disabled.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Tom Rini [Thu, 3 Dec 2020 14:43:47 +0000 (09:43 -0500)]
Merge branch '2020-12-02-master-imports'
- Assorted minor fixes
Holger Brunck [Thu, 5 Nov 2020 09:28:51 +0000 (10:28 +0100)]
km/common: remove CONFIG_MTD_CONCAT
This was used for a board which is not supproted anymore and can
therefore be dropped.
CC: Stefan Roese <sr@denx.de>
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Holger Brunck [Thu, 5 Nov 2020 09:15:37 +0000 (10:15 +0100)]
remove obsolete option CONFIG_JFFS2_CMDLINE
This option is obsolete since 2009 and can be removed globally.
CC: Stefan Roese <sr@denx.de>
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Michael Walle [Mon, 30 Nov 2020 23:12:39 +0000 (00:12 +0100)]
mtd: spi-nor-ids: add Winbond W25Q32JW-IM flash
The Kontron SMARC-sAL28 board uses that flash.
This is the same change as in the linux commit
f3418718c0ec ("mtd:
spi-nor: Add support for w25q32jwm").
Signed-off-by: Michael Walle <michael@walle.cc>
Reported-by: Leo Krueger <leo.krueger@zal.aero>
Heinrich Schuchardt [Mon, 30 Nov 2020 08:08:12 +0000 (09:08 +0100)]
MAINTAINERS: assign include/log.h
include/log.h belongs to LOGGING.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Mon, 30 Nov 2020 08:04:48 +0000 (09:04 +0100)]
log: typos in include/log.h
Correct several typos.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
AKASHI Takahiro [Thu, 19 Nov 2020 00:37:19 +0000 (09:37 +0900)]
common: update: fix an "unused" warning against update_flash()
Since update_flash() is used only in update_tftp(), it should be
guarded with appropriate config options.
After the commit
3149e524fc1e, common/update.c will be built under
either CONFIG_UDATE_TFTP, CONFIG_DFU_TFTP or CONFIG_UPDATE_FIT.
Since CONFIG_UPDATE_FIT, hence fit_update(), doesn't rely on
update_flash(), the compiler may cause an "unused" warning if
CONFIG_UPDATE_FIT=y and CONFIG_UPDATE_TFTP=n and CONFIG_DFU_TFTP=n.
This is, for example, the case for sandbox defconfig where
EFI_CAPSULE_FIRMWARE_FIT is enabled for test purpose.
Fixes:
3149e524fc1e ("common: update: add a generic interface for FIT
image")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Simon Glass [Mon, 30 Nov 2020 00:07:05 +0000 (17:07 -0700)]
global_data: Fix comment for dm_driver_rt
This comment is in the wrong format, so reports an error with
'make htmldocs'. Fix it.
Fixes:
a294ead8d25 ("dm: Use an allocated array for run-time device info")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Simon Glass [Mon, 30 Nov 2020 00:07:04 +0000 (17:07 -0700)]
log: Fix comment for LOGC_BOOT
This comment is in the wrong format, so reports an error with
'make htmldocs'. Fix it.
Fixes:
b73d61a5565 ("x86: zimage: Add a little more logging")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Andy Shevchenko [Thu, 19 Nov 2020 19:26:20 +0000 (21:26 +0200)]
linux/compat.h: Remove debug() from spin_lock_irqsave()
It seems nobody tested the debug() option in spin_lock_irqsave().
Currently, when #define DEBUG, it spoils the compiler with
In file included from drivers/usb/dwc3/gadget.c:18:
drivers/usb/dwc3/gadget.c: In function ‘dwc3_gadget_set_selfpowered’:
include/log.h:235:4: warning: ‘flags’ is used uninitialized in this function [-Wuninitialized]
235 | printf(pr_fmt(fmt), ##args); \
| ^~~~~~
drivers/usb/dwc3/gadget.c:1347:17: note: ‘flags’ was declared here
1347 | unsigned long flags;
| ^~~~~
and so on...
Drop useless debug() call to make compiler happy.
Fixes:
0c06db598367 ("lib, linux: move linux specific defines to linux/compat.h")
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Zhao Qiang [Wed, 25 Nov 2020 04:55:47 +0000 (12:55 +0800)]
watchdog: sbsa: timeout should be in "millisecond"
timeout should be in "millisecond" instead of second,
so divided it by 1000 when calculate the load value.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Richard Genoud [Tue, 24 Nov 2020 17:07:52 +0000 (18:07 +0100)]
fs/squashfs: sqfs_close/sqfs_read_sblk: set ctxt.sblk to NULL after free
This will prevent a double free error if sqfs_close() is called twice.
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
Tom Rini [Wed, 2 Dec 2020 16:36:51 +0000 (11:36 -0500)]
Merge tag 'dm-pull-30nov20' of git://git.denx.de/u-boot-dm
Minor bugfixes
Tom Rini [Tue, 1 Dec 2020 02:45:25 +0000 (21:45 -0500)]
Merge tag 'mips-fixes-for-v2021.01' of https://gitlab.denx.de/u-boot/custodians/u-boot-mips
- MIPS: octeon: fix allocation bug in DDR driver
- MIPS: octeon: fix init of gd->ram_size
- MIPS: octeon: add support for Octeon boot header
Michal Simek [Mon, 23 Nov 2020 08:08:19 +0000 (09:08 +0100)]
binman: Remove additional backslash
The origin patch didn't have this change and it was caused by manual
resolution where additional backslash was added.
Fixes:
6723b4c6ca7b ("binman: Call helper function binman_set_rom_offset() to fill offset")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sun, 15 Nov 2020 20:22:53 +0000 (21:22 +0100)]
dm: core: Fix incorrect flag check
The test should be checking whether $flags are non-zero and $drv_flags
contain specific flags, however these two sets of flags are separate,
and the two tests should be logically ANDed, not bitwise ANDed.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Alper Nebi Yasak [Fri, 13 Nov 2020 22:01:42 +0000 (01:01 +0300)]
sandbox: cros_ec: Basic support for EC_CMD_GET_NEXT_EVENT
Since commit
690079767803 ("cros_ec: Support keyboard scanning with
EC_CMD_GET_NEXT_EVENT") the cros-ec-keyb driver has started using this
command, but the sandbox EC emulator does not recognize it and
continuously prints:
** Unknown EC command 0x67
This patch makes the sandbox driver send basic responses to the command,
but the response only supports keyboard scans for now.
The EC side of this command stores and returns events from a queue, and
returns -EC_RES_UNAVAILABLE when there are no new events. This should be
possible to implement by hooking into the SDL event queue (perhaps via
sandbox_sdl_poll_events). Implementing that is a bit harder to do since
the existing sandbox code is discarding pending keyboard events, then
reading the current keyboard state.
Since the EC emulator never explicitly fails to work on this command,
the fallback to the older command will not trigger and will not be
tested anymore.
Fixes:
690079767803 ("cros_ec: Support keyboard scanning with EC_CMD_GET_NEXT_EVENT")
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 9 Nov 2020 14:45:02 +0000 (07:45 -0700)]
binman: Handle tool paths containing '~' correctly
At present if CROSS_COMPILE contains a tilde, such as
~/.buildman-toolchains/gcc-7.3.0-nolibc/i386-linux/bin/i386-linux-gcc
then binman gives a confusing error:
binman: Error 255 running '~/..buildman-toolchains/gcc-7.3.0- ...
Fix this by expanding it out before running the tool.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Mon, 30 Nov 2020 18:09:42 +0000 (13:09 -0500)]
Prepare v2021.01-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 30 Nov 2020 17:50:32 +0000 (12:50 -0500)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Stefan Roese [Mon, 30 Nov 2020 12:14:23 +0000 (13:14 +0100)]
mips: octeon: tools: Add update_octeon_header tool
Add a tool to update or insert an Octeon specific header into the U-Boot
image. This is needed e.g. for booting via SPI NOR, eMMC and NAND.
While working on this, move enum cvmx_board_types_enum and
cvmx_board_type_to_string() to cvmx-bootloader.h and remove the
unreferenced (unsupported) board definition.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Stefan Roese [Wed, 28 Oct 2020 14:10:02 +0000 (15:10 +0100)]
mips: octeon: bootoctlinux: Use gd->ram_size instead of ram_get_info()
Using ram_get_info() is complicated and does not work after relocation.
Now that gd->ram_size holds the full RAM size, let's use it instead and
remove the ram_get_size logic completely.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Stefan Roese [Wed, 28 Oct 2020 14:10:01 +0000 (15:10 +0100)]
mips: octeon: Report full DDR size in dram_init() to gd->ram_size
With this patch, gd->ram_size now holds to full RAM size detected by the
DDR init code. It introduces the get_effective_memsize() function to
report the maximum usable RAM size in U-Boot to the system instead.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Stefan Roese [Wed, 28 Oct 2020 14:10:00 +0000 (15:10 +0100)]
mips: octeon: Fix Octeon DDR driver to use the correct struct
Don't use "platdata_auto_alloc_size" but "priv_auto_alloc_size" instead
to auto allocate the private data struct, which is referenced via
dev_get_priv() in this driver. This fixes an ugly bug detected while
trying to boot via SPI NOR.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Stefan Roese [Wed, 28 Oct 2020 14:09:59 +0000 (15:09 +0100)]
mips: start.S: Add Octeon boot header compatibility
Octeon has a specific boot header, when booted via SPI NOR, NAND or MMC.
Here the only 2 instructions are allowed in the first few bytes of the
image. And these instructions need to be one branch and a nop. This
patch adds the necessary nop after the nop, to that the common MIPS
image is compatible with this Octeon header.
The tool to patch the Octeon boot header into the image will be send in
a follow-up patch.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tom Rini [Sun, 29 Nov 2020 16:12:59 +0000 (11:12 -0500)]
Merge tag 'mmc-2020-11-29' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- mmc minor update for better debug and error check
- fsl_esdhc sysctl set and make sure delay check for HS400
Tom Rini [Sun, 29 Nov 2020 16:12:49 +0000 (11:12 -0500)]
Merge tag 'efi-2021-01-rc3-3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2021-01-rc3 (3)
The following errors are corrected:
* Linux crash when accessing UEFI variables at runtime.
* UEFI variable using standalone MM on 32 bit systems
not working due to missing packing of communication
structure
* NULL dereference when FAT16 root directory is full
* FAT files with a short file name starting with 0xE5 (0x05 in directory
entry) where treated as deleted.
The UEFI SetTime() service is enabled on ARM QEMU.
Ilias Apalodimas [Sun, 22 Nov 2020 13:10:26 +0000 (15:10 +0200)]
charset: make u16_strnlen accessible at runtime
commit
1fabfeef506c ("efi_loader: parameter check in GetNextVariableName()")
introduces a check using u16_strnlen(). This code is used on EFI
runtime variables as well, so unless we mark it as runtime, the kernel
will crash trying to access it.
Fixes:
1fabfeef506c ("efi_loader: parameter check in GetNextVariableName()")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Etienne Carriere [Sat, 21 Nov 2020 10:59:33 +0000 (11:59 +0100)]
lib/efi_loader: fix ABI in efi_mm_communicate_header
Pack struct efi_mm_communicate_header as done in EDK2 as seen in
release 201808 [1]. If not packed sizeof() for the structure adds
4 additional bytes on 32bit targets which breaks the ABI.
Link: [1] https://github.com/tianocore/edk2/blob/edk2-stable201808/MdePkg/Include/Protocol/MmCommunication.h#L21
Fixes:
23a397d2e2fb ("efi_loader: Add headers for EDK2 StandAloneMM communication")
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Heinrich Schuchardt [Sat, 21 Nov 2020 19:52:18 +0000 (20:52 +0100)]
efi_loader: enable EFI_SET_TIME on sandbox and QEMU ARM
Enable EFI_SET_TIME on the sandbox and QEMU ARM to ensure that we compile
and test the relevant code.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 22 Nov 2020 10:13:33 +0000 (11:13 +0100)]
fs: fat: use ATTR_ARCH instead of anonymous 0x20
Using constants instead of anonymous numbers increases code readability.
Fixes:
704df6aa0a28 ("fs: fat: refactor write interface for a file offset")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 21 Nov 2020 11:34:20 +0000 (12:34 +0100)]
fs: fat: directory entries starting with 0x05
0x05 is used as replacement letter for 0xe5 at the first position of short
file names. We must not skip over directory entries starting with 0x05.
Cf. Microsoft FAT Specification, August 30 2005
Fixes:
39606d462c97 ("fs: fat: handle deleted directory entries correctly")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Thu, 19 Nov 2020 11:24:44 +0000 (12:24 +0100)]
fs: fat: avoid NULL dereference when root dir is full
When trying to create a file in the full root directory of a FAT32
filesystem a NULL dereference can be observed.
When the root directory of a FAT16 filesystem is full fill_dir_slot() must
return -1 to signal that a new directory entry could not be allocated.
Fixes:
cd2d727fff7e ("fs: fat: allocate a new cluster for root directory of fat32")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Sat, 28 Nov 2020 15:55:46 +0000 (10:55 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-i2c
Pragnesh Patel [Sat, 14 Nov 2020 09:12:35 +0000 (14:42 +0530)]
riscv: sifive/fu540: kconfig: Enable support for Opencores I2C controller
Enable support for SiFive FU540 Opencores I2C master controller.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Pragnesh Patel [Sat, 14 Nov 2020 09:12:34 +0000 (14:42 +0530)]
i2c: ocores: add i2c driver for OpenCores I2C controller
Add support for the OpenCores I2C controller IP core
(See http://www.opencores.org/projects.cgi/web/i2c/overview).
This driver implementation is inspired from the Linux OpenCores
I2C driver available.
Thanks to Peter Korsgaard <peter@korsgaard.com> for writing Linux
OpenCores I2C driver.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Simon Glass [Mon, 9 Nov 2020 14:12:49 +0000 (07:12 -0700)]
i2c: designware_i2c: Don't warn if no reset controller
At present if CONFIG_RESET is not enabled, this code shows a warning:
designware_i2c_ofdata_to_platdata() i2c_designware_pci i2c2@16,0:
Can't get reset: -524
Avoid this by checking if reset is supported, first.
Fixes:
622597dee4f ("i2c: designware: add reset ctrl to driver")
Signed-off-by: Simon Glass <sjg@chromium.org>
Baruch Siach [Thu, 1 Oct 2020 11:49:02 +0000 (14:49 +0300)]
i2c: mvtwsi: disable i2c slave also on Armada 8k
The hidden I2C slave is also present on the Armada 8k AP806. Testing
shows that this I2C slave causes the same issues as Armada 38x.
Disabling that I2C slave fixes all these issues.
I2C blocks on the Armada 8k CP110 are not affected.
Extend the I2C slave disable to Armada 8k as well.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Jaehoon Chung [Fri, 6 Nov 2020 11:30:41 +0000 (20:30 +0900)]
mmc: check a return value about regulator's always-on
Regulator can be set to "always-on".
It's not error about enable/disable. It needs to check about
its condition.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Jaehoon Chung [Mon, 16 Nov 2020 22:04:59 +0000 (07:04 +0900)]
mmc: display an error number to debug
It's useful to know an error number when it's debugging.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Yangbo Lu [Tue, 20 Oct 2020 03:04:52 +0000 (11:04 +0800)]
mmc: fsl_esdhc: make sure delay chain locked for HS400
For eMMC HS400 mode, the DLL reset is a required step for mmc rescan.
This step has not been documented in reference manual, but the RM will
be fixed sooner or later.
In previous commit to support eMMC HS400,
db8f936 mmc: fsl_esdhc: support eMMC HS400 mode
the steps to configure DLL could be found in commit message,
13. Set DLLCFG0[DLL_ENABLE] and DLLCFG0[DLL_FREQ_SEL].
14. Wait for delay chain to lock.
these would be fixed as,
13. Set DLLCFG0[DLL_ENABLE] and DLLCFG0[DLL_FREQ_SEL].
13.1 Write DLLCFG0[DLL_RESET] to 1 and wait for 1us,
then write DLLCFG0[DLL_RESET]
14. Wait for delay chain to lock.
This patch is to add the step of DLL reset, and make sure delay chain
locked for HS400.
Fixes:
db8f93672b42 ("mmc: fsl_esdhc: support eMMC HS400 mode")
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Yangbo Lu [Tue, 20 Oct 2020 03:04:51 +0000 (11:04 +0800)]
mmc: fsl_esdhc: set sysctl register for clock initialization
The initial clock setting should be through sysctl register only,
while the mmc_set_clock() will call mmc_set_ios() introduce other
configurations like bus width, mode, and so on.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Sean Anderson [Sat, 17 Oct 2020 12:36:27 +0000 (08:36 -0400)]
mmc: Add some helper functions for retrying on error
All of the existing quirks add retries to various calls of mmc_send_cmd.
mmc_send_cmd_quirks is a helper function to do this retrying behavior. It
checks if quirks mode is enabled, and if a specific quirk is activated it
retries on error.
This also adds mmc_send_cmd_retry, which retries on error every time
(instead of if a quirk is activated).
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tom Rini [Wed, 25 Nov 2020 16:00:52 +0000 (11:00 -0500)]
Merge tag 'u-boot-stm32-
20201125' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- STM32 MCU's DT update
- Add DHCOM based STM32MP15x PicoITX board
- Correct ALIGN macro usage for on syram for SPL dcache support
- Fixes on DHCOM: uSD card-detect GPIO and Drop QSPI CS2
- Fix compilation issue for spl_mmc_boot_partition
- Fix MTD partitions for serial boot
- Add support of MCU HOLD BOOT with reset for stm32 remoteproc
(prepare alligneent with kernel DT)
- Correct bias information and support in STM32 soc and STMFX
- Support optional vbus in usbphyc
- Update FIT examples to avoid kernel zImage relocation before decompression
Patrick Delaunay [Wed, 25 Nov 2020 11:28:10 +0000 (12:28 +0100)]
board: st: stm32mp1: update load address for FIT examples
Update kernel load address for FIT examples to avoid relocation:
- Kernel example uses Image.gz with U-Boot gzip decompression
at final kernel location 0x0xC0008000.
- Copro example loads zImage at a correct location (0xC4000000),
to avoid zImage relocation before decompression by kernel code.
An other solution to avoid zImage relocation is to align
the kernel load and entry address with the real location in FIT
(the relocation of zImage is skipped in U-Boot bootm command for
identical address) but it is less flexible because this offset
depends on FIT content:
For example:
## Loading kernel from FIT Image at
c2000000 ...
Using 'ev1' configuration
Trying 'kernel' kernel subimage
Description: Linux kernel
Created: 2020-10-22 9:08:32 UTC
Type: Kernel Image
Compression: uncompressed
Data Start: 0xc20000cc
The kernel offset in FIT is 0xCC in FIT and zImage is decompressed at
0xC0008000 by kernel code:
kernel {
description = "Linux kernel";
data = /incbin/("zImage");
type = "kernel";
arch = "arm";
os = "linux";
compression = "none";
load = <0xC20000cc>;
entry = <0xC20000cc>;
hash-1 {
algo = "sha1";
};
};
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Thu, 15 Oct 2020 12:50:57 +0000 (14:50 +0200)]
phy: stm32: usbphyc: manage optional vbus regulator on phy_power_on/off
This patch adds support for optional vbus regulator.
It is managed on phy_power_on/off calls and may be needed for host mode.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Wed, 28 Oct 2020 09:51:57 +0000 (10:51 +0100)]
pinctrl: stmfx: update pin name
Update pin name to avoid duplicated name with SOC GPIO
gpio0...gpio15 / agpio0....agpio7: add a stmfx prefix.
This pin name can be used in pinmux command.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Wed, 28 Oct 2020 09:51:56 +0000 (10:51 +0100)]
pinctrl: stmfx: update pincontrol and gpio device name
The device name is used in pinmux command and in log trace
so it is better to use the parent parent name ("stmfx@42" for
example) than a generic name ("pinctrl" or "stmfx-gpio")
to identify the device instance.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Wed, 28 Oct 2020 09:49:08 +0000 (10:49 +0100)]
gpio: stm32: correct the bias management
Use the bias configuration for all the GPIO configurations and not
only for input GPIO, as indicated in Reference manual
(Table 81. Port bit configuration table).
Fixes:
43efbb6a3ebf0223f9eab8d45916f602d876319f ("gpio: stm32: add ops get_dir_flags")
Fixes:
f13ff88b61c32ac8f0e9068c41328b265ef619eb ("gpio: stm32: add ops set_dir_flags")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Wed, 28 Oct 2020 09:49:07 +0000 (10:49 +0100)]
pinctrl: stm32: display bias information for all pins
Display the bias information for input gpios or AF configuration,
and not only for output pin, as described in Reference manual
(Table 81. Port bit configuration table).
Fixes:
da7a0bb1f279 ("pinctrl: stm32: add information on pin configuration")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Thu, 15 Oct 2020 13:01:13 +0000 (15:01 +0200)]
remoteproc: stm32: update error management in stm32_copro_start
The coprocessor is running as soon as the hold boot is de-asserted.
So indicate this running state and save the resource table even
if the protective assert, to avoid autonomous reboot, is failed.
This error case should never occurs.
Cc: Fabien DESSENNE <fabien.dessenne@st.com>
Cc: Arnaud POULIQUEN <arnaud.pouliquen@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Thu, 15 Oct 2020 13:01:12 +0000 (15:01 +0200)]
remoteproc: stm32: use reset for hold boot
Use the reset function to handle the hold boot bit in RCC
with device tree handle with MCU_HOLD_BOOT identifier.
This generic reset allows to remove the two specific properties:
- st,syscfg-holdboot
- st,syscfg-tz
This patch prepares alignment with kernel device tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Fabien DESSENNE <fabien.dessenne@st.com>
Cc: Arnaud POULIQUEN <arnaud.pouliquen@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Thu, 15 Oct 2020 13:01:11 +0000 (15:01 +0200)]
reset: stm32: Add support of MCU HOLD BOOT
Handle the register RCC_MP_GCR without SET/CLR registers
but with a direct access to bit BOOT_MCU:
- deassert => set the bit: The MCU will not be in HOLD_BOOT
- assert => clear the bit: The MCU will be set in HOLD_BOOT
With this patch the RCC driver handles the MCU_HOLD_BOOT_R value
added in binding stm32mp1-resets.h
Cc: Fabien DESSENNE <fabien.dessenne@st.com>
Cc: Arnaud POULIQUEN <arnaud.pouliquen@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Thu, 15 Oct 2020 12:52:30 +0000 (14:52 +0200)]
board: stm32mp1: no MTD partitions fixup for serial boot
Remove the update of the MTD partitions in kernel device tree
for serial boot (USB / UART), and the kernel will use the MTD
partitions define in the loaded DTB because U-Boot can't known the
expected flash layout in this case.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Richard Genoud [Mon, 12 Oct 2020 14:11:09 +0000 (16:11 +0200)]
SPL: stm32mp1: fix spl_mmc_boot_partition not defined
spl_mmc_boot_partition is only defined when
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is defined.
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Marek Vasut [Wed, 28 Oct 2020 20:37:59 +0000 (21:37 +0100)]
ARM: dts: stm32: Drop QSPI CS2 on DHCOM
The QSPI CS2 is not used on DHCOM, remove the pinmux and flash@1.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Marek Vasut [Wed, 28 Oct 2020 20:38:21 +0000 (21:38 +0100)]
ARM: dts: stm32: Fix uSD card-detect GPIO on DHCOM
The uSD slot card-detect GPIO is connected to PG1, fix it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Marek Vasut [Tue, 3 Nov 2020 18:14:58 +0000 (19:14 +0100)]
ARM: dts: stm32: Add DHCOM based PicoITX board
Add DT for DH PicoITX unit, which is a bare-bones carrier board for
the DHCOM. The board has ethernet port, USB, CAN, LEDs and a custom
board-to-board expansion connector.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Wed, 4 Nov 2020 08:22:09 +0000 (09:22 +0100)]
arm: stm32mp: correct the ALIGN macro usage
Correct the ALIGN macro usage in mmu_set_region_dcache_behaviour
call: the address must use ALIGN_DOWN and size can use ALIGN macro.
With STM32_SYSRAM_BASE=0x2FFC0000 and MMU_SECTION_SIZE=0x100000 for
STM32MP15x the computed address was
30000000 instead of
2ff00000.
Fixes:
43fe9d2fda24 ("stm32mp1: mmu_set_region_dcache_behaviour")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrice Chotard [Fri, 6 Nov 2020 07:12:00 +0000 (08:12 +0100)]
ARM: dts: stm32: Fix typo in stm32h7-u-boot.dtsi
Fix typo "firsct"
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrice Chotard [Fri, 6 Nov 2020 07:11:59 +0000 (08:11 +0100)]
ARM: dts: stm32: Fix timer initialization for stm32 MCU's board
Commit
4b2be78ab66c ("time: Fix get_ticks being non-monotonic")
puts in evidence that get_ticks is called before timer initialization.
Fix it by initializing timer before relocation.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrice Chotard [Fri, 6 Nov 2020 07:11:58 +0000 (08:11 +0100)]
ARM: dts: stm32: DT sync with kernel v5.10-rc1 for MCU's boards
Device tree alignment with kernel v5.10-rc1.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrice Chotard [Fri, 6 Nov 2020 07:11:57 +0000 (08:11 +0100)]
ARM: dts: sync armv7-m.dtsi with kernel v5.10-rc1
Since kernel v4.8-rc1, commit
05b23ebc2bd9 ("ARM: dts: armv7-m: remove skeleton.dtsi include"),
skeleton.dtsi file is no more included.
This synchronization is needed to avoid to get 2 memory node
in DTB file if, in DTS file, memory node is declared with the correct
syntax as following:
memory@
90000000 {
device_type = "memory";
reg = <0x90000000 0x800000>;
};
Then in DTB, we will have the 2 memory nodes, which is incorrect and
cause misbehavior during DT parsing by U-boot:
memory {
device_type = "memory";
reg = <0x00 0x00>;
};
memory@
90000000 {
device_type = "memory";
reg = <0x90000000 0x800000>;
};
Issue found when synchronizing MCU's STM32 DT from kernel v5.10-rc1.
When using fdtdec_setup_mem_size_base() or fdtdec_setup_memory_banksize()
API, first above memory node is found (with reg = <0x00 0x00>), so
gd->ram_size, gd->ram_base, gd->bd->bi_dram[bank].start and
gd->bd->bi_dram[bank].size are all set to 0 which avoid boards to boot.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tom Rini [Sun, 22 Nov 2020 16:00:11 +0000 (11:00 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usb
- DWC2, DWC3 fixes
Tom Rini [Sun, 22 Nov 2020 15:59:49 +0000 (10:59 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh
- Assorted pinctrl updates
Jaehoon Chung [Wed, 21 Oct 2020 12:28:41 +0000 (21:28 +0900)]
usb: gadget: dwc2_udc_otg: return zero when reset property is not present
If reset DT property is not present, -ENOENT is returned.
But it's not really error.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Siva Durga Prasad Paladugu [Wed, 21 Oct 2020 12:17:31 +0000 (14:17 +0200)]
usb: dwc3: Handle case where setup_phy is not needed
If CONFIG_PHY is not enabled then the dwc3_setup_phy()
returns ENOTSUPP which can be still valid and intentional
so modify error check to handle this -ENOTSUPP.
The same error handling exists in drivers/usb/host/xhci-dwc3.c already
added by commit
d648a50c0a27 ("dwc3: move phy operation to core.c").
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Patrick Delaunay [Thu, 15 Oct 2020 12:49:37 +0000 (14:49 +0200)]
usb: dwc2: add "u-boot,force-vbus-detection" for stm32
On some board, the ID pin is not connected so the B session must be
overridden with "u-boot,force_b_session_valid" but the VBus sensing
must continue to be handle.
To managed it, this patch adds a new DT field
"u-boot,force-vbus-detection" to use with "u-boot,force_b_session_valid"
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Lad Prabhakar [Wed, 4 Nov 2020 17:27:04 +0000 (17:27 +0000)]
pinctrl: renesas: Drop unused members from struct sh_pfc_pinctrl
Drop unused members from struct sh_pfc_pinctrl.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Biju Das [Wed, 28 Oct 2020 10:34:25 +0000 (10:34 +0000)]
pinctrl: renesas: r8a7795: Optimize pinctrl image size for R8A774E1
This driver supports both RZ/G2H and R-Car H3 SoCs.
Optimize pinctrl image size for RZ/G2H, when support for R-Car H3
(R8A7795) is not enabled
Based on the similar patch on Linux.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Biju Das [Wed, 28 Oct 2020 10:34:24 +0000 (10:34 +0000)]
pinctrl: renesas: r8a77965: Optimize pinctrl image size for R8A774B1
This driver supports both RZ/G2N and R-Car M3-N SoCs.
Optimize pinctrl image size for RZ/G2N, when support for R-Car M3-N
(R8A77965) is not enabled.
Based on the simialr patch on Linux.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Biju Das [Wed, 28 Oct 2020 10:34:23 +0000 (10:34 +0000)]
pinctrl: renesas: r8a7796: Optimize pinctrl image size for R8A774A1
This driver supports both RZ/G2M and R-Car M3-W/W+ SoCs.
Optimize pinctrl image size for RZ/G2M, when support for R-Car M3-W/W+
(R8A7796[01]) is not enabled.
Based on the similar patch on Linux.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Biju Das [Wed, 28 Oct 2020 10:34:22 +0000 (10:34 +0000)]
pinctrl: renesas: r8a77951: Add R8A774E1 PFC support
Renesas RZ/G2H (r8a774e1) is pin compatible with R-Car H3 (r8a77951),
however it doesn't have several automotive specific peripherals. Add
a r8a77951 specific pin groups/functions along with common pin
groups/functions for supporting both r8a77951 and r8a774e1 SoC.
PFC changes are synced from mainline linux-5.9 commit
bbf5c979011a ("Linux 5.9").
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Biju Das [Wed, 28 Oct 2020 10:34:21 +0000 (10:34 +0000)]
pinctrl: renesas: r8a77965: Add R8A774B1 PFC support
Renesas RZ/G2N (r8a774b1) is pin compatible with R-Car M3-N (r8a77965),
however it doesn't have several automotive specific peripherals. Add
a r8a77965 specific pin groups/functions along with common pin
groups/functions for supporting both r8a77965 and r8a774b1 SoC.
PFC changes are synced from mainline linux-5.9 commit
bbf5c979011a ("Linux 5.9").
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tom Rini [Sat, 21 Nov 2020 13:04:39 +0000 (08:04 -0500)]
Merge tag 'efi-2021-01-rc3-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2021-01-rc3 (2)
The parameter check for UEFI service GetNextVariableName() is corrected.
The dependencies of CONFIG_DFU_TFTP are simplified.
The set of supported hash algorithms reported by the EFI_TCG2_PROTOCOL is
corrected.
Heinrich Schuchardt [Thu, 19 Nov 2020 18:40:08 +0000 (19:40 +0100)]
efi_loader: parameter check in GetNextVariableName()
If GetNextVariableName() is called with a non-existing combination of
VariableName and VendorGuid, return EFI_INVALID_PARAMETER.
If GetNextVariableName() is called with a string that is not zero
terminated, return EFI_INVALID_PARAMETER.
Reformat a line over 80 characters.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Ilias Apalodimas [Mon, 16 Nov 2020 06:52:41 +0000 (08:52 +0200)]
efi_loader: tcg2 protocol updates
On pull reuqest
https://lists.denx.de/pipermail/u-boot/2020-November/432735.html
V4 of the patchset was sent instead of the v5.
This is the v4->v5 missing diff
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
AKASHI Takahiro [Tue, 17 Nov 2020 00:27:16 +0000 (09:27 +0900)]
dfu: simplify the dependencies of DFU_TFTP
Since CONFIG_UPDATE_COMMON always selects CONFIG_DFU_WRITE_ALT, we can
drop the latter from dependencies of CONFIG_DFU_TFTP.
Fixes:
3149e524fc1e ("common: update: add a generic interface for FIT
image")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>