platform/upstream/llvm.git
6 years ago[llvm-mca][X86] Updated fma3 tests after rL330820
Simon Pilgrim [Wed, 25 Apr 2018 13:19:04 +0000 (13:19 +0000)]
[llvm-mca][X86] Updated fma3 tests after rL330820

llvm-svn: 330822

6 years agoFix failure in lit test kernel-call.cu due to name mangling
Yaxun Liu [Wed, 25 Apr 2018 13:07:58 +0000 (13:07 +0000)]
Fix failure in lit test kernel-call.cu due to name mangling

llvm-svn: 330821

6 years ago[X86] Split WriteFMA into XMM, Scalar and YMM/ZMM scheduler classes
Simon Pilgrim [Wed, 25 Apr 2018 13:07:58 +0000 (13:07 +0000)]
[X86] Split WriteFMA into XMM, Scalar and YMM/ZMM scheduler classes

This removes all the FMA InstRW overrides.

If we ever get PR36924, then we can remove many of these declarations from models.

llvm-svn: 330820

6 years ago[X86][AArch64][NFC] Finish adding 'bad' tests for masked merge unfolding with constants.
Roman Lebedev [Wed, 25 Apr 2018 12:48:23 +0000 (12:48 +0000)]
[X86][AArch64][NFC] Finish adding 'bad' tests for masked merge unfolding with constants.

I have initially committed basic tests in, rL330771,
but then quickly discovered that there are a few more
interesting patterns.

llvm-svn: 330819

6 years ago[AMDGPU] Revert b0efc4fd6 (https://reviews.llvm.org/D40556)
Alexander Timofeev [Wed, 25 Apr 2018 12:32:46 +0000 (12:32 +0000)]
[AMDGPU] Revert b0efc4fd6 (https://reviews.llvm.org/D40556)

llvm-svn: 330818

6 years agoAvoid a warning on pointer casting, NFC
Gabor Buella [Wed, 25 Apr 2018 12:15:34 +0000 (12:15 +0000)]
Avoid a warning on pointer casting, NFC

Reviewers: philip.pfaffe

Reviewed By: philip.pfaffe

Differential Revision: https://reviews.llvm.org/D46012

llvm-svn: 330817

6 years ago[llvm-mca] Add a new option category for views.
Andrea Di Biagio [Wed, 25 Apr 2018 11:33:14 +0000 (11:33 +0000)]
[llvm-mca] Add a new option category for views.

With this patch, options to add/tweak views are all grouped together in the
-help output.

The new "View Options" category looks like this:

```
  View Options:

    -dispatch-stats                 - Print dispatch statistics
    -instruction-info               - Print the instruction info view
    -instruction-tables             - Print instruction tables
    -register-file-stats            - Print register file statistics
    -resource-pressure              - Print the resource pressure view
    -retire-stats                   - Print retire control unit statistics
    -scheduler-stats                - Print scheduler statistics
    -timeline                       - Print the timeline view
    -timeline-max-cycles=<uint>     - Maximum number of cycles in the timeline view. Defaults to 80 cycles
    -timeline-max-iterations=<uint> - Maximum number of iterations to print in timeline view
```

llvm-svn: 330816

6 years ago[UpdateTestChecks] Change update_mca_test_checks.py file mode to match the other...
Greg Bedwell [Wed, 25 Apr 2018 11:20:42 +0000 (11:20 +0000)]
[UpdateTestChecks] Change update_mca_test_checks.py file mode to match the other scripts

llvm-svn: 330815

6 years ago[ELF] - Eliminate the AssertCommand.
George Rimar [Wed, 25 Apr 2018 11:16:31 +0000 (11:16 +0000)]
[ELF] - Eliminate the AssertCommand.

Currently, LLD supports ASSERT as a separate command.

We support two forms now.

Assign expression-form: . = ASSERT(0x100)
(old GNU ld required it and some scripts in the wild are still using
something like . = ASSERT((_end - _text <= (512 * 1024 * 1024)), "kernel image bigger than KERNEL_IMAGE_SIZE");

Nowadays above is not a mandatory form and command-like form is commonly used:
ASSERT(<expr>, "text);

The return value of the ASSERT is Dot. That was implemented in D30171.
It looks like (2) is just a short version of (1) then.

GNU ld does *not* list ASSERT as a SECTIONS command:
https://sourceware.org/binutils/docs/ld/SECTIONS.html#SECTIONS

Given above we probably can change ASSERT to be an assignment to Dot.
That makes the rest of the code much simpler. Patch do that.

Differential revision: https://reviews.llvm.org/D45434

llvm-svn: 330814

6 years ago[X86][SKX] Setup WriteFAdd and remove unnecessary InstRW scheduler overrides.
Simon Pilgrim [Wed, 25 Apr 2018 10:51:19 +0000 (10:51 +0000)]
[X86][SKX] Setup WriteFAdd and remove unnecessary InstRW scheduler overrides.

llvm-svn: 330813

6 years ago[X86][SNB] Remove unnecessary WriteFBlendLd InstRW scheduler overrides.
Simon Pilgrim [Wed, 25 Apr 2018 10:50:39 +0000 (10:50 +0000)]
[X86][SNB] Remove unnecessary WriteFBlendLd InstRW scheduler overrides.

llvm-svn: 330812

6 years ago[llvm-mca] run clang-format on a bunch of files. NFC
Andrea Di Biagio [Wed, 25 Apr 2018 10:27:30 +0000 (10:27 +0000)]
[llvm-mca] run clang-format on a bunch of files. NFC

llvm-svn: 330811

6 years ago[mips] Fix the definition of sync, synci
Simon Dardis [Wed, 25 Apr 2018 10:19:22 +0000 (10:19 +0000)]
[mips] Fix the definition of sync, synci

Also, fix the disassembly of synci for microMIPS.

Reviewers: abeserminji, smaksimovic, atanasyan

Differential Revision: https://reviews.llvm.org/D45870

llvm-svn: 330810

6 years ago[llvm-mca] Default to the native host cpu if flag -mcpu is not specified.
Andrea Di Biagio [Wed, 25 Apr 2018 10:18:25 +0000 (10:18 +0000)]
[llvm-mca] Default to the native host cpu if flag -mcpu is not specified.

llvm-svn: 330809

6 years agoadd check for long double for __builtin_dump_struct
Paul Semel [Wed, 25 Apr 2018 10:09:20 +0000 (10:09 +0000)]
add check for long double for __builtin_dump_struct

llvm-svn: 330808

6 years ago[llvm-mca] Remove method Instruction::isZeroLatency(). NFCI
Andrea Di Biagio [Wed, 25 Apr 2018 09:38:58 +0000 (09:38 +0000)]
[llvm-mca] Remove method Instruction::isZeroLatency(). NFCI

llvm-svn: 330807

6 years ago[LoopInterchange] Use getExitBlock()/getExitingBlock instead of manual impl.
Florian Hahn [Wed, 25 Apr 2018 09:35:54 +0000 (09:35 +0000)]
[LoopInterchange] Use getExitBlock()/getExitingBlock instead of manual impl.

This also means we have to check if the latch is the exiting block now,
as `transform` expects the latches to be the exiting blocks too.

https://bugs.llvm.org/show_bug.cgi?id=36586

Reviewers: efriedma, davide, karthikthecool

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D45279

llvm-svn: 330806

6 years ago[AArch64][SVE] Asm: Add AsmOperand classes for SVE gather/scatter addressing modes.
Sander de Smalen [Wed, 25 Apr 2018 09:26:47 +0000 (09:26 +0000)]
[AArch64][SVE] Asm: Add AsmOperand classes for SVE gather/scatter addressing modes.

This patch adds parsing support for 'vector + shift/extend' and
corresponding asm operand classes, needed for implementing SVE's
gather/scatter addressing modes.

The added combinations of vector (ZPR) and Shift/Extend are:

Unscaled:
  ZPR64ExtLSL8:           signed 64-bit offsets  (z0.d)
  ZPR32ExtUXTW8:        unsigned 32-bit offsets  (z0.s, uxtw)
  ZPR32ExtSXTW8:          signed 32-bit offsets  (z0.s, sxtw)

Unpacked and unscaled:
  ZPR64ExtUXTW8:        unsigned 32-bit offsets  (z0.d, uxtw)
  ZPR64ExtSXTW8:          signed 32-bit offsets  (z0.d, sxtw)

Unpacked and scaled:
  ZPR64ExtUXTW<scale>:  unsigned 32-bit offsets  (z0.d, uxtw #<shift>)
  ZPR64ExtSXTW<scale>:    signed 32-bit offsets  (z0.d, sxtw #<shift>)

Scaled:
  ZPR32ExtUXTW<scale>:  unsigned 32-bit offsets  (z0.s, uxtw #<shift>)
  ZPR32ExtSXTW<scale>:    signed 32-bit offsets  (z0.s, sxtw #<shift>)
  ZPR64ExtLSL<scale>:   unsigned 64-bit offsets  (z0.d,  lsl #<shift>)
  ZPR64ExtLSL<scale>:     signed 64-bit offsets  (z0.d,  lsl #<shift>)

Patch [1/3] in series to add support for SVE's gather load instructions
that use scalar+vector addressing modes:
- Patch [1/3]: https://reviews.llvm.org/D45951
- Patch [2/3]: https://reviews.llvm.org/D46023
- Patch [3/3]: https://reviews.llvm.org/D45958

Reviewers: fhahn, rengolin, samparker, SjoerdMeijer, t.p.northover, echristo, evandro, javed.absar

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D45951

llvm-svn: 330805

6 years ago[DebugInfo] Invalidate debug info in ReassociatePass::RewriteExprTree
Bjorn Pettersson [Wed, 25 Apr 2018 09:23:56 +0000 (09:23 +0000)]
[DebugInfo] Invalidate debug info in ReassociatePass::RewriteExprTree

Summary:
When Reassociate is rewriting an expression tree it may
reuse old binary expression nodes, for new expressions.
Whenever an expression node is reused, but with a non-trivial
change in the result, we need to invalidate any debug info
that is associated with the node.

If for example rewriting
  x = mul a, b
  y = mul c, x
into
  x = mul c, b
  y = mul a, x
we still get the same result for 'y', but 'x' is a new expression.
All debug info referring to 'x' must be invalidated (marked as
optimized out) since we no longer calculate the expected value.

As a side-effect this patch avoid (at least some) problems where
reassociate could end up creating IR with debug-use before def.
Earlier the dbg.value nodes where left untouched in the IR, while
the reused binary nodes where sinked to just before the root node
of the rewritten expression tree. See PR27273 for more info about
such problems.

Reviewers: dblaikie, aprantl, dexonsmith

Reviewed By: aprantl

Subscribers: JDevlieghere, llvm-commits

Tags: #debug-info

Differential Revision: https://reviews.llvm.org/D45975

llvm-svn: 330804

6 years ago[clangd] Minor fixes for C++ standard library header mapping.
Eric Liu [Wed, 25 Apr 2018 09:17:05 +0000 (09:17 +0000)]
[clangd] Minor fixes for C++ standard library header mapping.

llvm-svn: 330803

6 years agoFix buildbot problems after rC330794
Bjorn Pettersson [Wed, 25 Apr 2018 09:04:12 +0000 (09:04 +0000)]
Fix buildbot problems after rC330794

Avoiding
  error: no matching function for call to 'makeArrayRef'
at
  ../tools/clang/lib/Parse/ParseTemplate.cpp:373:17

By using a local C array as input to makeArrayRef.

Not sure if this is the best solution, but it makes the code
compile again.

llvm-svn: 330802

6 years ago[TableGen] Fix bad indentation in tablegen output file.
Craig Topper [Wed, 25 Apr 2018 06:24:51 +0000 (06:24 +0000)]
[TableGen] Fix bad indentation in tablegen output file.

llvm-svn: 330801

6 years agoUpdate isl to isl-0.19-114-g385262af
Tobias Grosser [Wed, 25 Apr 2018 06:10:35 +0000 (06:10 +0000)]
Update isl to isl-0.19-114-g385262af

llvm-svn: 330800

6 years agoMerging r46043:
David Bolvansky [Wed, 25 Apr 2018 04:33:36 +0000 (04:33 +0000)]
Merging r46043:
------------------------------------------------------------------------

llvm-svn: 330799

6 years ago[NFC] Make dependent parameter non-deducible, so that we are forced to use the defaul...
Faisal Vali [Wed, 25 Apr 2018 03:54:20 +0000 (03:54 +0000)]
[NFC] Make dependent parameter non-deducible, so that we are forced to use the default template parameter.

This might provide users with more graceful diagnostics if they should ever try and call this function with non-ConceptDecls.

llvm-svn: 330798

6 years ago[X86] Auto-generate complete checks. NFC
Craig Topper [Wed, 25 Apr 2018 03:40:45 +0000 (03:40 +0000)]
[X86] Auto-generate complete checks. NFC

llvm-svn: 330797

6 years agoFix rC330794 - a parameter that should have been dependent was inadvertently not -
Faisal Vali [Wed, 25 Apr 2018 03:28:23 +0000 (03:28 +0000)]
Fix rC330794 - a parameter that should have been dependent was inadvertently not -
 and compiled in MSVC - but not so for the other bots.

The fix was to make it dependent as intended.

llvm-svn: 330796

6 years agoFix lit test kernel-call.cu failure on ps4 due to dso_local
Yaxun Liu [Wed, 25 Apr 2018 03:16:07 +0000 (03:16 +0000)]
Fix lit test kernel-call.cu failure on ps4 due to dso_local

llvm-svn: 330795

6 years ago[c++2a] [concepts] Add rudimentary parsing support for template concept declarations
Faisal Vali [Wed, 25 Apr 2018 02:42:26 +0000 (02:42 +0000)]
[c++2a] [concepts] Add rudimentary parsing support for template concept declarations

This patch is a tweak of changyu's patch: https://reviews.llvm.org/D40381. It differs in that the recognition of the 'concept' token is moved into the machinery that recognizes declaration-specifiers - this allows us to leverage the attribute handling machinery more seamlessly.

See the test file to get a sense of the basic parsing that this patch supports.

There is much more work to be done before concepts are usable...

Thanks Changyu!

llvm-svn: 330794

6 years agoFix failure in lit test kernel-call.cu
Yaxun Liu [Wed, 25 Apr 2018 02:34:04 +0000 (02:34 +0000)]
Fix failure in lit test kernel-call.cu

There is signext on ppc64. Just remove check for function argument.

llvm-svn: 330793

6 years ago[DivRemPairs] Fix non-determinism in use list order.
Geoff Berry [Wed, 25 Apr 2018 02:17:56 +0000 (02:17 +0000)]
[DivRemPairs] Fix non-determinism in use list order.

Summary:
Use a MapVector instead of a DenseMap for RemMap since it is iteratated
over and the order of iteration can effect the order that new
instructions are created.  This can in turn effect the use list order of
div/rem input values if multiple new instructions are created that share
any input values.

Reviewers: spatel

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D45858

llvm-svn: 330792

6 years ago[libcxx] [test] Remove nonportable that errc::is_a_directory produces "Is a directory...
Billy Robert O'Neal III [Wed, 25 Apr 2018 01:58:55 +0000 (01:58 +0000)]
[libcxx] [test] Remove nonportable that errc::is_a_directory produces "Is a directory" from ios_base::failure tests

These io_error asserts that std::errc::is_a_directory has message "Is a directory". On MSVC++ it reports "is a directory" (with a lowercase I). That doesn't matter for the ios_failure component being tested, so just implement in terms of system_category().message().

Reviewed as https://reviews.llvm.org/D45715

llvm-svn: 330791

6 years ago[HIP] Add hip input kind and codegen for kernel launching
Yaxun Liu [Wed, 25 Apr 2018 01:10:37 +0000 (01:10 +0000)]
[HIP] Add hip input kind and codegen for kernel launching

HIP is a language similar to CUDA (https://github.com/ROCm-Developer-Tools/HIP/blob/master/docs/markdown/hip_kernel_language.md ).
The language syntax is very similar, which allows a hip program to be compiled as a CUDA program by Clang. The main difference
is the host API. HIP has a set of vendor neutral host API which can be implemented on different platforms. Currently there is open source
implementation of HIP runtime on amdgpu target (https://github.com/ROCm-Developer-Tools/HIP).

This patch adds support of input kind and language standard hip.

When hip file is compiled, both LangOpts.CUDA and LangOpts.HIP is turned on. This allows compilation of hip program as CUDA
in most cases and only special handling of hip program is needed LangOpts.HIP is checked.

This patch also adds support of kernel launching of HIP program using HIP host API.

When -x hip is not specified, there is no behaviour change for CUDA.

Patch by Greg Rodgers.
Revised and lit test added by Yaxun Liu.

Differential Revision: https://reviews.llvm.org/D44984

llvm-svn: 330790

6 years ago[ODRHash] Hash template arguments of methods.
Richard Trieu [Wed, 25 Apr 2018 00:31:15 +0000 (00:31 +0000)]
[ODRHash] Hash template arguments of methods.

llvm-svn: 330789

6 years agoBring r329960 back.
Rafael Espindola [Wed, 25 Apr 2018 00:29:13 +0000 (00:29 +0000)]
Bring r329960 back.

The fix is to copy Used when replacing the symbol.

Original message:

Do not keep shared symbols created from garbage-collected eliminated DSOs.

If all references to a DSO happen to be weak, and if the DSO is
specified with --as-needed, the DSO is not added to DT_NEEDED.
If that happens, we also need to eliminate shared symbols created
from the DSO. Otherwise, they become dangling references that point
to non-exsitent DSO.

Fixes https://bugs.llvm.org/show_bug.cgi?id=36991

Differential Revision: https://reviews.llvm.org/D45536

llvm-svn: 330788

6 years ago[PM/LoopUnswitch] Begin teaching SimpleLoopUnswitch to use the new
Chandler Carruth [Wed, 25 Apr 2018 00:18:07 +0000 (00:18 +0000)]
[PM/LoopUnswitch] Begin teaching SimpleLoopUnswitch to use the new
update API for dominators rather than doing manual, hacky updates.

This is just the first step, but in some ways the most important as it
moves the non-trivial unswitching to update the domtree rather than
fully recalculating it each time.

Subsequent patches should remove the custom update logic used by the
trivial unswitch and replace it with uses of the update API.

This also fixes a number of bugs I was seeing when testing non-trivial
unswitch due to it querying the quasi-correct dominator tree. Now the
tree is 100% correct and safe to query. That said, there are still more
bugs I can see with non-trivial unswitch just running over the test
suite, so more bugfix patches are needed as well.

Thanks to both Sanjoy and Fedor for reviews and testing!

Differential Revision: https://reviews.llvm.org/D45943

llvm-svn: 330787

6 years ago[COFF] create MemoryBuffers without requiring NUL terminators
Bob Haarman [Tue, 24 Apr 2018 23:16:39 +0000 (23:16 +0000)]
[COFF] create MemoryBuffers without requiring NUL terminators

Summary:
In a number of places in the COFF linker, we were calling
MemoryBuffer::getFile() with default parameters. This causes LLVM to
NUL-terminate the buffers, which can prevent them from being memory
mapped. Since we operate on binary and do not use NUL as an indicator
of the end of the file content, this change causes us to not require
the NUL terminator anymore.

Reviewers: ruiu, pcc

Reviewed By: ruiu

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45909

llvm-svn: 330786

6 years agoStyle fix.
Rui Ueyama [Tue, 24 Apr 2018 23:09:57 +0000 (23:09 +0000)]
Style fix.

llvm-svn: 330785

6 years agoAdd a test. NFC.
Rafael Espindola [Tue, 24 Apr 2018 23:03:58 +0000 (23:03 +0000)]
Add a test. NFC.

This would have found the issue in r329960.

llvm-svn: 330784

6 years ago[MachineOutliner] Check for explicit uses of LR/W30 in MI operands
Jessica Paquette [Tue, 24 Apr 2018 22:38:15 +0000 (22:38 +0000)]
[MachineOutliner] Check for explicit uses of LR/W30 in MI operands

Before, the outliner would grab ADRPs that used LR/W30. This patch fixes
that by checking for explicit uses of those registers before the special-casing
for ADRPs.

This also adds a test that ensures that those sorts of ADRPs won't be outlined.

llvm-svn: 330783

6 years ago[DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal
Craig Topper [Tue, 24 Apr 2018 22:35:27 +0000 (22:35 +0000)]
[DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal

We were previously prefering ZEXTLOAD over EXTLOAD if it is legal. This triggers during X86's promotion of i16->i32. Not sure about other targets.

Using ZEXTLOAD can prevent folding it to SEXTLOAD later if we were to promote a sign extended operand like we would need for SRA. However, X86 doesn't currently promote i16 SRA. I was looking into doing that which is how I found this issue.

This is also blocking our ability to fold 4 byte aligned EXTLOADs with "loadi32". This is what caused most of the test changes here.

Differential Revision: https://reviews.llvm.org/D45585#inline-402825

llvm-svn: 330781

6 years agoRevert "[Driver] Android triples are not aliases for other triples."
Dan Albert [Tue, 24 Apr 2018 22:06:40 +0000 (22:06 +0000)]
Revert "[Driver] Android triples are not aliases for other triples."

Revering while I diagnose the failures.

This reverts commit 82dc3bf2157da280420f80e654292cb05e0dc5f7.

llvm-svn: 330780

6 years agoFix path separator checks on Windows
Reid Kleckner [Tue, 24 Apr 2018 22:03:07 +0000 (22:03 +0000)]
Fix path separator checks on Windows

llvm-svn: 330779

6 years ago[X86] Account for partial stack slot spills (PR30821)
Warren Ristow [Tue, 24 Apr 2018 22:01:50 +0000 (22:01 +0000)]
[X86] Account for partial stack slot spills (PR30821)

Previously, _any_ store or load instruction was considered to be
operating on a spill if it had a frameindex as an operand, and thus
was fair game for optimisations such as "StackSlotColoring". This
usually works, except on architectures where spills can be partially
restored, for example on X86 where a spilt vector can have a single
component loaded (zeroing the rest of the target register). This can be
mis-interpreted and the zero extension unsoundly eliminated, see
pr30821.

To avoid this, this commit optionally provides the caller to
isLoadFromStackSlot and isStoreToStackSlot with the number of bytes
spilt/loaded by the given instruction. Optimisations can then determine
that a full spill followed by a partial load (or vice versa), for
example, cannot necessarily be commuted.

Patch by Jeremy Morse!

Differential Revision: https://reviews.llvm.org/D44782

llvm-svn: 330778

6 years ago[llvm-objcopy] Adjust the help message
Alexander Shaposhnikov [Tue, 24 Apr 2018 21:44:13 +0000 (21:44 +0000)]
[llvm-objcopy] Adjust the help message

Capitalize the first letter,
make the text a bit more consistent.
NFC.

Differential revision: https://reviews.llvm.org/D46025

llvm-svn: 330777

6 years agoBring back APInt self-move assignment check for MSVC only
Reid Kleckner [Tue, 24 Apr 2018 21:41:50 +0000 (21:41 +0000)]
Bring back APInt self-move assignment check for MSVC only

Summary:
It was removed about a year ago in r300477. Bring it back, along with
its unittest, when the MSVC STL is in use. The MSVC STL performs
self-assignment in std::shuffle. These days, llvm::sort calls
std::shuffle when expensive checks are enabled to help find
non-determinism bugs.

Reviewers: craig.topper, chandlerc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D46028

llvm-svn: 330776

6 years agoAMDGPU: Remove deprecated llvm.AMDGPU.kilp intrinsic
Tom Stellard [Tue, 24 Apr 2018 21:37:57 +0000 (21:37 +0000)]
AMDGPU: Remove deprecated llvm.AMDGPU.kilp intrinsic

Summary: This is no longer used by mesa since its 18.0.0 release.

Reviewers: nhaehnle

Reviewed By: nhaehnle

Subscribers: arsenm, kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D45988

llvm-svn: 330775

6 years agoAMDGPU/GlobalISel: Fall-back to SelectionDAG for non-void functions
Tom Stellard [Tue, 24 Apr 2018 21:29:36 +0000 (21:29 +0000)]
AMDGPU/GlobalISel: Fall-back to SelectionDAG for non-void functions

Reviewers: arsenm, nhaehnle

Reviewed By: nhaehnle

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D45843

llvm-svn: 330774

6 years ago[docs] Add a note on non-deterministic sorting order of equal elements
Mandeep Singh Grang [Tue, 24 Apr 2018 21:25:57 +0000 (21:25 +0000)]
[docs] Add a note on non-deterministic sorting order of equal elements

Reviewers: RKSimon, t.p.northover, dexonsmith

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45831

llvm-svn: 330773

6 years ago[clang-tidy] Improve bugprone-unused-return-value check
Jonathan Coe [Tue, 24 Apr 2018 21:25:16 +0000 (21:25 +0000)]
[clang-tidy] Improve bugprone-unused-return-value check

Summary:
Add support for checking class template member functions.

Also add the following functions to be checked by default:

- std::unique_ptr::release
- std::basic_string::empty
- std::vector::empty

Reviewers: alexfh, hokein, aaron.ballman, ilya-biryukov

Reviewed By: aaron.ballman

Subscribers: jbcoe, xazax.hun, cfe-commits

Tags: #clang-tools-extra

Differential Revision: https://reviews.llvm.org/D45891

Patch by khuttun (Kalle Huttunen)

llvm-svn: 330772

6 years ago[X86][AArch64][NFC] Add tests for masked merge unfolding with %y = const
Roman Lebedev [Tue, 24 Apr 2018 21:23:22 +0000 (21:23 +0000)]
[X86][AArch64][NFC] Add tests for masked merge unfolding with %y = const

The fold was added in D45733.

This appears to be a regression.

llvm-svn: 330771

6 years ago[Driver] Android triples are not aliases for other triples.
Dan Albert [Tue, 24 Apr 2018 21:18:37 +0000 (21:18 +0000)]
[Driver] Android triples are not aliases for other triples.

Summary:
Android targets should never use tools/libraries for non-Android
targets or vice versa.

Reviewers: srhines, george.burgess.iv, eugenis

Reviewed By: eugenis

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D45597

llvm-svn: 330770

6 years ago[CaptureTracking] Fixup const correctness of DomTree arg (NFC)
Daniel Neilson [Tue, 24 Apr 2018 21:12:45 +0000 (21:12 +0000)]
[CaptureTracking] Fixup const correctness of DomTree arg (NFC)

Summary:
The PointerMayBeCapturedBefore function's DomTree arg should be
const instead of non-const. There are no non-const uses of it
in the function.

llvm-svn: 330769

6 years ago[InstCombine] move tests for select with bit-test of condition; NFC
Sanjay Patel [Tue, 24 Apr 2018 21:06:06 +0000 (21:06 +0000)]
[InstCombine] move tests for select with bit-test of condition; NFC

These are all but 1 of the select-of-constant tests that appear
to be transformed within foldSelectICmpAnd() and the block above
it predicated by decomposeBitTestICmp().

As discussed in D45862 (and can be seen in several tests here),
we probably want to stop doing those transforms because they
can increase the instruction count without benefitting other
passes or codegen.

The 1 test not included here is a urem test where the bit hackery
allows us to remove a urem. To preserve killing that urem, we
should do some stronger known-bits analysis or pattern matching of
'urem x, (select-of-pow2-constants)'.

llvm-svn: 330768

6 years agoAMDGPU/GlobalISel: Add support for amdgpu_ps calling convention
Tom Stellard [Tue, 24 Apr 2018 20:51:28 +0000 (20:51 +0000)]
AMDGPU/GlobalISel: Add support for amdgpu_ps calling convention

Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D45837

llvm-svn: 330767

6 years ago[analyzer] Add support for the note diagnostic pieces to plist output format.
Artem Dergachev [Tue, 24 Apr 2018 20:45:48 +0000 (20:45 +0000)]
[analyzer] Add support for the note diagnostic pieces to plist output format.

Note diagnostic pieces are an additional way of highlighting code sections to
the user. They aren't part of the normal path diagnostic sequence. They can
also be attached to path-insensitive reports.

Notes are already supported by the text output and scan-build.

Expanding our machine-readable plist output format to be able to represent notes
opens up the possibility for various analyzer GUIs to pick them up.

Patch by Umann Kristóf!

Differential Revision: https://reviews.llvm.org/D45407

llvm-svn: 330766

6 years agoRemove 'noexcept's that do not match between header and source file.
Richard Smith [Tue, 24 Apr 2018 20:33:37 +0000 (20:33 +0000)]
Remove 'noexcept's that do not match between header and source file.

This code is ill-formed, but under -fno-exceptions compilers generally accept it (at least, prior to C++17). This allows this code to be built by Clang in C++17 mode.

llvm-svn: 330765

6 years ago[wasm] Fix uninitialized memory introduced in r330749.
Chandler Carruth [Tue, 24 Apr 2018 20:30:56 +0000 (20:30 +0000)]
[wasm] Fix uninitialized memory introduced in r330749.

Found with MSan. This was causing all the WASM MC tests to fail about
10% of the time.

llvm-svn: 330764

6 years ago[bugpoint] Fix crash when testing for miscompilation.
Rafael Espindola [Tue, 24 Apr 2018 20:15:27 +0000 (20:15 +0000)]
[bugpoint] Fix crash when testing for miscompilation.

Method BugDriver::performFinalCleanups(...) would delete Module object
it worked on, which was also deleted by its caller
(e.g. TestCodeGenerator(...)). Changed the code to avoid double delete
and make Module ownership slightly clearer.

Patch by Andrzej Janik.

llvm-svn: 330763

6 years ago[Support] fix countLeadingZeros for types shorter than int
Sam McCall [Tue, 24 Apr 2018 20:08:05 +0000 (20:08 +0000)]
[Support] fix countLeadingZeros for types shorter than int

llvm-svn: 330762

6 years ago[cmake] Fix libc++ detection
Shoaib Meenai [Tue, 24 Apr 2018 19:47:39 +0000 (19:47 +0000)]
[cmake] Fix libc++ detection

-stdlib=libc++ is added to both the compilation and the link flags, but
the logic for adding it was only checking if it was supported during
compilation and not linking. This could lead to false positives, for
example when using clang with libstdc++ (where the compiler would
support -stdlib=libc++ but then linking would fail because of libc++
actually being unavailable).

llvm-svn: 330761

6 years ago[X86][SKX] Setup WriteFMul and remove unnecessary InstRW scheduler overrides.
Simon Pilgrim [Tue, 24 Apr 2018 19:22:01 +0000 (19:22 +0000)]
[X86][SKX] Setup WriteFMul and remove unnecessary InstRW scheduler overrides.

llvm-svn: 330760

6 years agoImprove -Warray-bounds to handle multiple array extents rather than only handling...
Aaron Ballman [Tue, 24 Apr 2018 19:21:04 +0000 (19:21 +0000)]
Improve -Warray-bounds to handle multiple array extents rather than only handling the top-most array extent.

Patch by Bevin Hansson.

llvm-svn: 330759

6 years ago[test] Update llc checks for CodeGen/X86/avg.ll
Vedant Kumar [Tue, 24 Apr 2018 19:20:18 +0000 (19:20 +0000)]
[test] Update llc checks for CodeGen/X86/avg.ll

The output of update_llc_test_checks.py on this test file has changed,
so the test file should be updated to minimize source changes in future
patches.

The test updates for this file appear to be limited to relaxations of
the form:

  -; SSE2-NEXT:    movq %rdi, -{{[0-9]+}}(%rsp) # 8-byte Spill
  +; SSE2-NEXT:    movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill

This was suggested in https://reviews.llvm.org/D45995.

llvm-svn: 330758

6 years ago[llvm-mca] Remove unused flag -verbose. NFC
Andrea Di Biagio [Tue, 24 Apr 2018 19:14:56 +0000 (19:14 +0000)]
[llvm-mca] Remove unused flag -verbose. NFC

I forgot to remove it at r329794.

llvm-svn: 330757

6 years ago[X86] Split off PHMINPOSUW to their own schedule class
Simon Pilgrim [Tue, 24 Apr 2018 18:49:25 +0000 (18:49 +0000)]
[X86] Split off PHMINPOSUW to their own schedule class

This also fixes Jaguar's schedule which was treating it as the WriteVecIMul default.

llvm-svn: 330756

6 years ago[lit] Report line number for failed RUN command
Joel E. Denny [Tue, 24 Apr 2018 18:43:25 +0000 (18:43 +0000)]
[lit] Report line number for failed RUN command

When debugging test failures with -vv (or -v in the case of the
internal shell), this makes it easier to locate the RUN line that
failed.  For example, clang's test/Driver/linux-ld.c has 892 total RUN
lines, and clang's test/Driver/arm-cortex-cpus.c has 424 RUN lines
after concatenation for line continuations.

When reading the generated shell script, this also makes it easier to
locate the RUN line that produced each command.

To support reporting RUN line numbers in the case of the internal
shell, this patch extends the internal shell to support the null
command, ":", except pipelines are not supported.

Reviewed By: asmith, delcypher

Differential Revision: https://reviews.llvm.org/D44598

llvm-svn: 330755

6 years ago[clangd] Commit a heinous crime to make test hermetic and not depend on the standard...
Benjamin Kramer [Tue, 24 Apr 2018 18:40:44 +0000 (18:40 +0000)]
[clangd] Commit a heinous crime to make test hermetic and not depend on the standard library being around.

llvm-svn: 330754

6 years ago[CUDA] Enable CUDA compilation with CUDA-9.2
Artem Belevich [Tue, 24 Apr 2018 18:23:19 +0000 (18:23 +0000)]
[CUDA] Enable CUDA compilation with CUDA-9.2

Differential Revision: https://reviews.llvm.org/D45827

llvm-svn: 330753

6 years ago[AMDGPU] Truncate packed inline constant
Stanislav Mekhanoshin [Tue, 24 Apr 2018 18:17:55 +0000 (18:17 +0000)]
[AMDGPU] Truncate packed inline constant

If a packed inline constant is sign extended it must be truncated
after the shift. I.e. a constant (0xH0000, 0xHBC00), will be represented
as 0xFFFFFFFFBC000000 in the IR because the immediate is sign extended
to 64 bit. After the value shifted right by 16 to use it in a low part
with op_sel_hi it becomes 0xFFFFFFFFBC00 and does not qualify as inline
constant any longer.

Fixed the error and added verification code. Without the fix and with
the verification bug is causing pk_max_f16_literal.ll to fail.

Differential Revision: https://reviews.llvm.org/D45987

llvm-svn: 330752

6 years ago[XOP] v4i32 IFMA 'VPMACS' instructions should use the WritePMULLD schedule class
Simon Pilgrim [Tue, 24 Apr 2018 18:13:57 +0000 (18:13 +0000)]
[XOP] v4i32 IFMA 'VPMACS' instructions should use the WritePMULLD schedule class

llvm-svn: 330751

6 years ago[WebAssembly] Match llvm-side change to reloc section header
Sam Clegg [Tue, 24 Apr 2018 18:11:47 +0000 (18:11 +0000)]
[WebAssembly] Match llvm-side change to reloc section header

Differential Revision: https://reviews.llvm.org/D45795

llvm-svn: 330750

6 years ago[WebAssembly] Use section index in relocation section header
Sam Clegg [Tue, 24 Apr 2018 18:11:36 +0000 (18:11 +0000)]
[WebAssembly] Use section index in relocation section header

Rather than referring to sections my their code, use the
absolute index of the target section within the module.

See https://github.com/WebAssembly/tool-conventions/issues/52

Differential Revision: https://reviews.llvm.org/D45980

llvm-svn: 330749

6 years ago[LoopInterchange] Add REQUIRES: asserts to test.
Florian Hahn [Tue, 24 Apr 2018 18:10:52 +0000 (18:10 +0000)]
[LoopInterchange] Add REQUIRES: asserts to test.

llvm-svn: 330748

6 years ago[AVX512] VPERMQ/VPERMPD/VPERMIL single op shuffles are not variable shuffles
Simon Pilgrim [Tue, 24 Apr 2018 17:59:54 +0000 (17:59 +0000)]
[AVX512] VPERMQ/VPERMPD/VPERMIL single op shuffles are not variable shuffles

These variants all take an immediate shuffle mask value and should be scheduled as such.

llvm-svn: 330747

6 years ago[clangd] Initialize candidate count in unit test
Benjamin Kramer [Tue, 24 Apr 2018 17:57:53 +0000 (17:57 +0000)]
[clangd] Initialize candidate count in unit test

Found by msan.

llvm-svn: 330746

6 years ago[HWASan] Update HWASan assembly snippet in the docs
Alex Shlyapnikov [Tue, 24 Apr 2018 17:41:48 +0000 (17:41 +0000)]
[HWASan] Update HWASan assembly snippet in the docs

Summary: To complement https://reviews.llvm.org/D45840

Reviewers: eugenis

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D45996

llvm-svn: 330745

6 years ago[X86] Add recently added intrinsic headers to the module map.
Craig Topper [Tue, 24 Apr 2018 17:40:49 +0000 (17:40 +0000)]
[X86] Add recently added intrinsic headers to the module map.

llvm-svn: 330744

6 years ago[X86] Consistently use double underscore at the beginning of the include guards in...
Craig Topper [Tue, 24 Apr 2018 17:40:47 +0000 (17:40 +0000)]
[X86] Consistently use double underscore at the beginning of the include guards in our intrinsic headers.

Most files used double underscore, but a few used single. This converges them all to double.

llvm-svn: 330743

6 years agoLet TableGen write output only if it changed, instead of doing so in cmake.
Nico Weber [Tue, 24 Apr 2018 17:29:05 +0000 (17:29 +0000)]
Let TableGen write output only if it changed, instead of doing so in cmake.

Removes one subprocess and one temp file from the build for each tablegen
invocation.

No intended behavior change.

https://reviews.llvm.org/D45899

llvm-svn: 330742

6 years agoReland "[mips] Guard traps for microMIPS correctly"
Simon Dardis [Tue, 24 Apr 2018 17:11:37 +0000 (17:11 +0000)]
Reland "[mips] Guard traps for microMIPS correctly"

This is part of fixing the instruction predicates for MIPS.

Reviewers: atanasyan, abeserminji

Differential Revision: https://reviews.llvm.org/D44212

This patch relands r327409, hopefully without the problematic part of the
tests that cause FileCheck to assert on the windows expensive checks bot.

llvm-svn: 330741

6 years ago[lit, lldbsuite] Update the lldbsuite to correctly run tests on windows and windows...
Aaron Smith [Tue, 24 Apr 2018 17:08:05 +0000 (17:08 +0000)]
[lit, lldbsuite] Update the lldbsuite to correctly run tests on windows and windows server

Summary:
The new script to run the lldbtests as part of lit invokes each test by calling dotest.py, however, we cannot rely on the system to always correctly interpret the script as python causing the tests to be unresolved on windows (at least). To fix this, we need to make sure that the first parameter in the command line is the python executable itself.

In Makefile.rules, there are a number of windows specific definitions that rely on the HOST_OS being set as Windows_NT but the logic detecting the OS currently does not detect server versions of windows correctly. This change updates the logic to detect windows server as well.

Reviewers: asmith, labath, JDevlieghere, zturner

Reviewed By: JDevlieghere, zturner

Subscribers: zturner, llvm-commits

Differential Revision: https://reviews.llvm.org/D46020

llvm-svn: 330740

6 years ago[LV][VPlan] Detect outer loops for explicit vectorization.
Diego Caballero [Tue, 24 Apr 2018 17:04:17 +0000 (17:04 +0000)]
[LV][VPlan] Detect outer loops for explicit vectorization.

Patch #2 from VPlan Outer Loop Vectorization Patch Series #1
(RFC: http://lists.llvm.org/pipermail/llvm-dev/2017-December/119523.html).

This patch introduces the basic infrastructure to detect, legality check
and process outer loops annotated with hints for explicit vectorization.
All these changes are protected under the feature flag
-enable-vplan-native-path. This should make this patch NFC for the existing
inner loop vectorizer.

Reviewers: hfinkel, mkuper, rengolin, fhahn, aemerson, mssimpso.

Differential Revision: https://reviews.llvm.org/D42447

llvm-svn: 330739

6 years ago[LoopInterchange] Make isProfitableForVectorization slightly more conservative.
Florian Hahn [Tue, 24 Apr 2018 16:55:32 +0000 (16:55 +0000)]
[LoopInterchange] Make isProfitableForVectorization slightly more conservative.

After D43236, we started interchanging loops with empty dependence
matrices.  In isProfitableForVectorization, we try to determine if
interchanging makes the loop dependences more friendly to the
vectorizer. If there are no dependences, we should not interchange,
based on that heuristic.

Reviewers: efriedma, mcrosier, karthikthecool, blitz.opensource

Reviewed By: mcrosier

Differential Revision: https://reviews.llvm.org/D45208

llvm-svn: 330738

6 years ago[X86][F16C] Add WriteCvtF2FSt scheduling class
Simon Pilgrim [Tue, 24 Apr 2018 16:43:07 +0000 (16:43 +0000)]
[X86][F16C] Add WriteCvtF2FSt scheduling class

Fixes the classification of VCVTPS2PHmr/VCVTPS2PHYmr which were tagged as WriteCvtF2FLd_WriteRMW (PR36887)

llvm-svn: 330737

6 years ago[ADT] Remove ilist_default_traits
Fangrui Song [Tue, 24 Apr 2018 16:32:55 +0000 (16:32 +0000)]
[ADT] Remove ilist_default_traits

llvm-svn: 330736

6 years ago[X86][BtVer2] Fix VCVTPS2PHmr/VCVTPS2PHYmr latencies
Simon Pilgrim [Tue, 24 Apr 2018 16:26:51 +0000 (16:26 +0000)]
[X86][BtVer2] Fix VCVTPS2PHmr/VCVTPS2PHYmr latencies

These are stores, not loads, so don't need to account for load latency.

llvm-svn: 330735

6 years ago[X86][IVB] Add F16C resource tests.
Simon Pilgrim [Tue, 24 Apr 2018 16:22:59 +0000 (16:22 +0000)]
[X86][IVB] Add F16C resource tests.

Note this is IvyBridge (which shares the model) NOT SandyBridge.

llvm-svn: 330734

6 years ago[llvm-mca] Default the output asm dialect used by the instruction printer to the...
Andrea Di Biagio [Tue, 24 Apr 2018 16:19:08 +0000 (16:19 +0000)]
[llvm-mca] Default the output asm dialect used by the instruction printer to the input asm dialect.

The instruction printer used by llvm-mca to generate the performance report now
defaults the output assembly format to the format used for the input assembly
file.

On x86, the asm format can be either AT&T or Intel, depending on the
presence/absence of directive `.intel_syntax`.

Users can still specify a different assembly dialect with the command line flag
-output-asm-variant=<uint>.

llvm-svn: 330733

6 years ago[mips] Show an error if register number is out of range
Simon Atanasyan [Tue, 24 Apr 2018 16:14:00 +0000 (16:14 +0000)]
[mips] Show an error if register number is out of range

Current code does not check that a register number is in the 0-31 range.
Sometimes the parser checks that later for some kinds of instructions,
but that leads to unclear / incorrect error messages like that:

  % cat test.s
  .text
  lb $4, 8($32)

  % llvm-mc test.s -triple=mips64-unknown-linux
  test.s:2:10: error: expected memory with 16-bit signed offset
    lb $4, 8($32)
           ^

Sometimes the parser just crashes:

  % cat test.s
  .text
  lw  $4, 8($32)

  % llvm-mc test.s -triple=mips64-unknown-linux

This patch resolves the problem by checking that register number after
'$' sign is in the 0-31 range. If the number is out of the range the
parser shows the `invalid register number` error, but treats invalid
register number as a normal one to continue parsing and catch other
possible errors.

Differential Revision: https://reviews.llvm.org/D45919

llvm-svn: 330732

6 years ago[InstCombine] regenerate checks; NFC
Sanjay Patel [Tue, 24 Apr 2018 16:08:03 +0000 (16:08 +0000)]
[InstCombine] regenerate checks; NFC

The first step in fixing problems raised in D45862
is to make the problems visible. Now we can more easily
see/update cases where selects have been turned into
multiple instructions with no apparent improvement in
analysis or benefits for other passes (vectorization).

llvm-svn: 330731

6 years ago[AMDGPU][Waitcnt] NFC. Cleanup some code/naming consistency:
Mark Searles [Tue, 24 Apr 2018 15:59:59 +0000 (15:59 +0000)]
[AMDGPU][Waitcnt] NFC. Cleanup some code/naming consistency:
- s/SWaitcnt/Waitcnt s/WaitCnt/Waitcnt

llvm-svn: 330730

6 years ago[InstCombine] regenerate checks; NFC
Sanjay Patel [Tue, 24 Apr 2018 15:42:30 +0000 (15:42 +0000)]
[InstCombine] regenerate checks; NFC

The current version of the script uses regex for params.
This could mask a bug (param values got wrongly swapped),
but it seems unlikely in practice, so let's just update
the whole file to reduce diffs when there is a meaningful
change here.

llvm-svn: 330729

6 years ago[lit] Remove spurious `-` in invocation of lit in
Dan Liew [Tue, 24 Apr 2018 15:42:00 +0000 (15:42 +0000)]
[lit] Remove spurious `-` in invocation of lit in
`shtest-xunit-output.py` test.

Although there is no `-` file Jeremy Morse has reported to me that it
causes problems in their setup because lit tries to find it and ends up
loading an out of tree lit configuration file.

llvm-svn: 330728

6 years agoRemove LLVM_INSTALL_CCTOOLS_SYMLINKS
Nico Weber [Tue, 24 Apr 2018 15:41:02 +0000 (15:41 +0000)]
Remove LLVM_INSTALL_CCTOOLS_SYMLINKS

It used to symlink dsymutil to llvm-dsymutil, but after r327790 llvm's dsymutil
binary is now called dsymutil without prefix.

r327792 then reversed the direction of the symlink if
LLVM_INSTALL_CCTOOLS_SYMLINKS was set, but that looks like a buildfix and not
like something anyone should need.

https://reviews.llvm.org/D45966

llvm-svn: 330727

6 years agoFix some layering in AggressiveInstCombine (avoiding inclusion of Scalar.h)
David Blaikie [Tue, 24 Apr 2018 15:40:07 +0000 (15:40 +0000)]
Fix some layering in AggressiveInstCombine (avoiding inclusion of Scalar.h)

llvm-svn: 330726

6 years ago[LoadStoreVectorize] Ignore interleaved invariant loads.
Benjamin Kramer [Tue, 24 Apr 2018 15:28:47 +0000 (15:28 +0000)]
[LoadStoreVectorize] Ignore interleaved invariant loads.

The memory location an invariant load is using can never be clobbered by
any store, so it's safe to move the load ahead of the store.

Differential Revision: https://reviews.llvm.org/D46011

llvm-svn: 330725

6 years ago[sanitizer] More dead code removal
Kostya Kortchinsky [Tue, 24 Apr 2018 14:58:10 +0000 (14:58 +0000)]
[sanitizer] More dead code removal

Summary:
The following functions are only used in tests: `SetEnv`,
`SanitizerSetThreadName`, `SanitizerGetThreadName`. I don't think they are
going to be used in the future, and I propose to get rid of them, and associated
tests and include.

Reviewers: alekseyshl, eugenis, vitalybuka

Reviewed By: vitalybuka

Subscribers: dvyukov, vitalybuka, kubamracek, delcypher, llvm-commits, #sanitizers

Differential Revision: https://reviews.llvm.org/D45838

llvm-svn: 330724

6 years ago[llvm-mca] Refactor the Scheduler interface in preparation for PR36663.
Andrea Di Biagio [Tue, 24 Apr 2018 14:53:16 +0000 (14:53 +0000)]
[llvm-mca] Refactor the Scheduler interface in preparation for PR36663.

Zero latency instructions are now scheduled the same way as other instructions.
Before this patch, there was a specialzed code path for those instructions.

All scheduler events are now generated from method `scheduleInstruction()` and
from method `cycleEvent()`. This will make easier to implement a "execution
stage", and let that stage publish all the scheduler events.

No functional change intended.

llvm-svn: 330723

6 years ago[Attr] Print enum attributes at correct position
Joel E. Denny [Tue, 24 Apr 2018 14:50:23 +0000 (14:50 +0000)]
[Attr] Print enum attributes at correct position

For example, given:

  void fn() {
    enum __attribute__((deprecated)) T *p;
  }

-ast-print produced:

  void fn() {
    enum T __attribute__((deprecated(""))) *p;
  }

-ast-print on that produced:

  void fn() {
    enum T *p __attribute__((deprecated("")));
  }

The attribute is on enum T in the first case, but it's on p in the
other cases.

Details:

Within enum declarations, enum attributes were always printed after
the tag and any member list.  When no member list was present but the
enum was a type specifier in a variable declaration, the attribute
then applied to the variable not the enum, changing the semantics.

This patch fixes that by always printing attributes between the enum's
keyword and tag, as clang already does for structs, unions, and
classes.

Reviewed By: rsmith

Differential Revision: https://reviews.llvm.org/D45456

llvm-svn: 330722