platform/upstream/llvm.git
21 months ago[Clang] Add missing requires directives for new test
Joseph Huber [Tue, 24 Jan 2023 23:09:18 +0000 (17:09 -0600)]
[Clang] Add missing requires directives for new test

Summary:
Forgot to add this.

21 months ago[OpenMP] Do not link the bitcode OpenMP runtime when targeting AMDGPU.
Joseph Huber [Tue, 24 Jan 2023 17:45:17 +0000 (11:45 -0600)]
[OpenMP] Do not link the bitcode OpenMP runtime when targeting AMDGPU.

The AMDGPU target can only emit LLVM-IR, so we can always rely on LTO to
link the static version of the runtime optimally. Using the static
library only has a few advantages. Namely, it avoids several known bugs
and allows us to optimize out more functions. This is legal since the
changes in D142486 and D142484

Depends on D142486 D142484

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D142491

21 months ago[OpenMP] Unconditionally link the OpenMP device RTL static library
Joseph Huber [Tue, 24 Jan 2023 17:18:22 +0000 (11:18 -0600)]
[OpenMP] Unconditionally link the OpenMP device RTL static library

Currently we have two versions of the static library. One is built as
individual bitcode files and linked via `-mlink-builtin-bitcode`. The
other is built as a single static archive `omptarget.devicertl.a` and is
linked via `-lomptarget.devicertl` and handled by the linker wrapper
during LTO. We use the former in the case that we are not performing
LTO, because linking the library late wouldn't allow us to optimize the
runtime library effectively. The support in D142484 allows us to
unconditionally link this library, so it will only be pulled in if
needed. That is, if we linked already via `-mlink-builtin-bitcode` then
we will not pull in the static library even if it's linked on the
command line.

Depends on D142484

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D142486

21 months ago[LinkerWrapper] Only import static libraries with needed symbols
Joseph Huber [Tue, 24 Jan 2023 17:04:47 +0000 (11:04 -0600)]
[LinkerWrapper] Only import static libraries with needed symbols

Currently, we pull in every single static archive member as long as we
have an offloading architecture that requires it. This goes against the
standard sematnics of static libraries that only pull in symbols that
define currently undefined symbols. In order to support this we roll
some custom symbol resolution logic to check if a static library is
needed. Because of offloading semantics, this requires an extra check
for externally visibile symbols. E.g. if a static member defines a
kernel we should import it.

The main benefit to this is that we can now link against the
`libomptarget.devicertl.a` library unconditionally. This removes the
requirement for users to specify LTO on the link command. This will also
allow us to stop using the `amdgcn` bitcode versions of the libraries.

```
clang foo.c -fopenmp --offload-arch=gfx1030 -foffload-lto -c
clang foo.o -fopenmp --offload-arch=gfx1030 -foffload-lto
```

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D142484

21 months ago[OpenMP][docs] Update for record-and-replay
Giorgis Georgakoudis [Tue, 24 Jan 2023 22:33:44 +0000 (14:33 -0800)]
[OpenMP][docs] Update for record-and-replay

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D142492

21 months ago[BOLT] Use range-based implicit def/use accessors. NFCI
Benjamin Kramer [Tue, 24 Jan 2023 22:11:23 +0000 (23:11 +0100)]
[BOLT] Use range-based implicit def/use accessors. NFCI

21 months ago[X86] Add support for "light" AVX
Ilya Tokar [Thu, 15 Dec 2022 20:00:27 +0000 (15:00 -0500)]
[X86] Add support for "light" AVX

AVX/AVX512 instructions may cause frequency drop on e.g. Skylake.
The magnitude of frequency/performance drop depends on instruction
(multiplication vs load/store) and vector width. Currently users,
that want to avoid this drop can specify -mprefer-vector-width=128.
However this also prevents generations of 256-bit wide instructions,
that have no associated frequency drop (mainly load/stores).

Add a tuning flag that allows generations of 256-bit AVX load/stores,
even when -mprefer-vector-width=128 is set, to speed-up memcpy&co.
Verified that running memcpy loop on all cores has no frequency impact
and zero CORE_POWER:LVL[12]_TURBO_LICENSE perf counters.

Makes coping memory faster e.g.:
BM_memcpy_aligned/256 80.7GB/s ± 3% 96.3GB/s ± 9% +19.33% (p=0.000 n=9+9)

Differential Revision: https://reviews.llvm.org/D134982

21 months ago[OpenMP] Disable tests that are not supported by GCC if it is used for testing
Shilei Tian [Tue, 24 Jan 2023 21:59:52 +0000 (16:59 -0500)]
[OpenMP] Disable tests that are not supported by GCC if it is used for testing

GCC doesn't support `-fopenmp-version`, causing test failure if the compiler used
for testing is GCC.

GCC's OpenMP 5.2 support is very limited yet. Disable those tests requiring 5.2
feature for GCC as well.

We might want to take a look at all `libomp` tests and mark those tests that
don't support GCC yet.

Reviewed By: ABataev

Differential Revision: https://reviews.llvm.org/D142173

21 months ago[llvm][DiagnosticInfo] handle function pointer casts
Nick Desaulniers [Tue, 24 Jan 2023 21:52:24 +0000 (13:52 -0800)]
[llvm][DiagnosticInfo] handle function pointer casts

As pointed out by @arsenm in https://reviews.llvm.org/D141451#4045099,
we don't handle ConstantExpressions for dontcall-{warn|error} IR Fn
Attrs.

Use CallBase::getCalledOperand() and Value::stripPointerCasts() should
the call to CallBase::getCalledFunction return nullptr.

I don't know how to express the IR test case in C, otherwise I'd add a
clang test, too.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D142058

21 months agoIR: Add atomicrmw uinc_wrap and udec_wrap
Matt Arsenault [Thu, 3 Nov 2022 01:50:48 +0000 (18:50 -0700)]
IR: Add atomicrmw uinc_wrap and udec_wrap

These are essentially add/sub 1 with a clamping value.

AMDGPU has instructions for these. CUDA/HIP expose these as
atomicInc/atomicDec. Currently we use target intrinsics for these,
but those do no carry the ordering and syncscope. Add these to
atomicrmw so we can carry these and benefit from the regular
legalization processes.

21 months ago[InstCombine] invert canonicalization of sext (x > -1) --> not (ashr x)
Sanjay Patel [Tue, 24 Jan 2023 21:01:37 +0000 (16:01 -0500)]
[InstCombine] invert canonicalization of sext (x > -1) --> not (ashr x)

https://alive2.llvm.org/ce/z/2iC4oB

This is similar to changes made for zext + lshr:
21d3871b7c90
6c39a3aae1dc

The existing fold did not account for extra uses, so we
see some instruction count reductions in the test diffs.

This is intended to improve analysis (icmp likely has more
transforms than any other opcode), make other transforms
more symmetric with zext/lshr, and it can be inverted
in codegen if profitable.

As with the earlier changes, there is potential to uncover
infinite combine loops, but I have not found any yet.

21 months ago[flang] Fixed missing dependency.
Slava Zakharin [Tue, 24 Jan 2023 21:24:42 +0000 (13:24 -0800)]
[flang] Fixed missing dependency.

It looks like a flaky issue that sometimes breaks the buildbot:
https://lab.llvm.org/buildbot/#/builders/181/builds/13475

Reviewed By: clementval

Differential Revision: https://reviews.llvm.org/D142081

21 months ago[MC] Store target Insts table in reverse order. NFC.
Jay Foad [Wed, 11 Jan 2023 15:18:42 +0000 (15:18 +0000)]
[MC] Store target Insts table in reverse order. NFC.

This will allow an entry in the table to access data that is stored
immediately after the end of the table, by adding its opcode value
to its address.

Differential Revision: https://reviews.llvm.org/D142217

21 months ago[AArch64] Add the Ampere1A core
Philipp Tomsich [Tue, 24 Jan 2023 21:28:22 +0000 (22:28 +0100)]
[AArch64] Add the Ampere1A core

The Ampere1A core improves on the Ampere1 with key differences being:
 * memory tagging is supported
 * SM3/SM4 are supported
 * adds a new fusion pair for (A+B+1 and A-B-1)
   (added in a later commit)

Depends on D142395

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D142396

21 months ago[MC] Store number of implicit operands in MCInstrDesc. NFC.
Jay Foad [Wed, 11 Jan 2023 13:45:46 +0000 (13:45 +0000)]
[MC] Store number of implicit operands in MCInstrDesc. NFC.

Combine the implicit uses and defs lists into a single list of uses
followed by defs. Instead of 0-terminating the list, store the number
of uses and defs. This avoids having to scan the whole list to find the
length and removes one pointer from MCInstrDesc (although it does not
get any smaller due to alignment issues).

Remove the old accessor methods getImplicitUses, getNumImplicitUses,
getImplicitDefs and getNumImplicitDefs as all clients are using the new
implicit_uses and implicit_defs.

Differential Revision: https://reviews.llvm.org/D142216

21 months ago[OpenMP][NFC] Augment release notes
Johannes Doerfert [Tue, 24 Jan 2023 21:22:54 +0000 (13:22 -0800)]
[OpenMP][NFC] Augment release notes

21 months ago[AArch64] Update enabled extensions for Ampere1 core
Philipp Tomsich [Tue, 24 Jan 2023 21:16:20 +0000 (22:16 +0100)]
[AArch64] Update enabled extensions for Ampere1 core

The original enablement for the Ampere1 core inadvertently had omitted
that FEAT_RAND is support and errorously claimed that FEAT_MTE was
available.

Adjust the definition of Ampere1 to match reality.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D142395

21 months ago[OpenMP][Doc] Update release notes with NextGen plugins
Kevin Sala [Tue, 24 Jan 2023 21:02:30 +0000 (22:02 +0100)]
[OpenMP][Doc] Update release notes with NextGen plugins

21 months agoFix C++11 warnings in RangeSetTest.cpp
Philipp Tomsich [Tue, 24 Jan 2023 21:12:46 +0000 (22:12 +0100)]
Fix C++11 warnings in RangeSetTest.cpp

This change fixes the following warnings:
   llvm/clang/unittests/StaticAnalyzer/RangeSetTest.cpp:727:55: warning: ISO C++11 requires at least one argument for the "..." in a variadic macro
     727 | TYPED_TEST_SUITE(RangeSetCastToNoopTest, NoopCastTypes);
 |                                                       ^
   llvm/clang/unittests/StaticAnalyzer/RangeSetTest.cpp:728:65: warning: ISO C++11 requires at least one argument for the "..." in a variadic macro
     728 | TYPED_TEST_SUITE(RangeSetCastToPromotionTest, PromotionCastTypes);
 |                                                                 ^
   llvm/clang/unittests/StaticAnalyzer/RangeSetTest.cpp:729:67: warning: ISO C++11 requires at least one argument for the "..." in a variadic macro
     729 | TYPED_TEST_SUITE(RangeSetCastToTruncationTest, TruncationCastTypes);
 |                                                                   ^
   llvm/clang/unittests/StaticAnalyzer/RangeSetTest.cpp:730:67: warning: ISO C++11 requires at least one argument for the "..." in a variadic macro
     730 | TYPED_TEST_SUITE(RangeSetCastToConversionTest, ConversionCastTypes);
 |                                                                   ^
   llvm/clang/unittests/StaticAnalyzer/RangeSetTest.cpp:732:46: warning: ISO C++11 requires at least one argument for the "..." in a variadic macro
     732 |                  PromotionConversionCastTypes);
 |                                              ^
   llvm/clang/unittests/StaticAnalyzer/RangeSetTest.cpp:734:47: warning: ISO C++11 requires at least one argument for the "..." in a variadic macro
     734 |                  TruncationConversionCastTypes);
 |                                               ^

Reviewed By: steakhal

Differential Revision: https://reviews.llvm.org/D142439

21 months ago[Clang] Only emit textual LLVM-IR in device only mode
Joseph Huber [Fri, 13 Jan 2023 19:31:18 +0000 (13:31 -0600)]
[Clang] Only emit textual LLVM-IR in device only mode

Currently, we embed device code into the host to perform
multi-architecture linking and handling of device code. If the user
specified `-S -emit-llvm` then the embedded output will be textual
LLVM-IR. This is a problem because it can't be used by the LTO backend
and it makes reading the file confusing.

This patch changes the behaviour to only emit textual device IR if we
are in device only mode, that is, if the device code is presented
directly to the user instead of being embedded. Otherwise we should
always embed device bitcode instead.

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D141717

21 months ago[analyzer] Update satest dependencies
Manas [Tue, 24 Jan 2023 21:06:46 +0000 (02:36 +0530)]
[analyzer] Update satest dependencies

A couple of packages were out-dated while building satest docker image.
This patch updates those.

Reviewed By: steakhal

Differential Revision: https://reviews.llvm.org/D142454

21 months ago[analyzer][solver] Improve reasoning for not equal to operator
Manas [Tue, 24 Jan 2023 20:59:05 +0000 (02:29 +0530)]
[analyzer][solver] Improve reasoning for not equal to operator

This patch fixes certain cases where solver was not able to infer
disequality due to overlapping of values in rangeset. This case was
casting from lower signed type to bigger unsigned type.

Reviewed By: steakhal

Differential Revision: https://reviews.llvm.org/D140086

21 months agoRevert "[15/15][Clang][RISCV][NFC] Set data member under Policy as constants"
Douglas Yung [Tue, 24 Jan 2023 20:59:15 +0000 (12:59 -0800)]
Revert "[15/15][Clang][RISCV][NFC] Set data member under Policy as constants"

This reverts commit 2b807336ad385e64a7d182d5fb67bdfe449707a3.

This change is causing Windows builds to hang and out of memory errors with clang-15:
 - https://lab.llvm.org/buildbot/#/builders/17/builds/33129
 - https://lab.llvm.org/buildbot/#/builders/174/builds/17069
 - https://lab.llvm.org/buildbot/#/builders/83/builds/28484
 - https://lab.llvm.org/buildbot/#/builders/172/builds/22803
 - https://lab.llvm.org/buildbot/#/builders/216/builds/16210

21 months ago[SCCP] Use range info to prove AddInst has NUW flag.
Florian Hahn [Tue, 24 Jan 2023 20:53:06 +0000 (20:53 +0000)]
[SCCP] Use range info to prove AddInst has NUW flag.

This patch updates SCCP to use the value ranges of AddInst operands to
try to prove the AddInst does not overflow in the unsigned sense and
adds the NUW flag. The reasoning is done with
makeGuaranteedNoWrapRegion (thanks @nikic for point it out!).

Follow-ups will include adding NSW and extension to more
OverflowingBinaryOperators.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D142387

21 months ago[InstCombine] canonicalize 'not' ahead of bitcast+sext
Sanjay Patel [Tue, 24 Jan 2023 20:30:29 +0000 (15:30 -0500)]
[InstCombine] canonicalize 'not' ahead of bitcast+sext

not (bitcast (sext i1 X)) --> bitcast (sext (not i1 X))

https://alive2.llvm.org/ce/z/-6Ygkd

This shows up as a potential regression if we change
canonicalization of ashr+not to icmp+sext.

21 months ago[InstCombine] add tests for 'not' of cast of cast; NFC
Sanjay Patel [Tue, 24 Jan 2023 19:58:53 +0000 (14:58 -0500)]
[InstCombine] add tests for 'not' of cast of cast; NFC

21 months agoDrop a path component from the sarif diagnostics test; NFC
Aaron Ballman [Tue, 24 Jan 2023 20:35:36 +0000 (15:35 -0500)]
Drop a path component from the sarif diagnostics test; NFC

The test currently expects to be run in a directory named 'clang' but
that's not valid for our release tarballs. We don't actually care what
base directory the test is run from, so this removes the path component
entirely.

21 months ago[asan] fix two memory leaks in integration tests
Aart Bik [Tue, 24 Jan 2023 19:57:16 +0000 (11:57 -0800)]
[asan] fix two memory leaks in integration tests

Note that I did not track why this started failing exactly,
which is why I CC Matthias on this fix. But at least we run
asan clean again for the whole suite after this change.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D142496

21 months ago[TargetParser] Remove an EXPECT that is never executed
Paul Robinson [Tue, 24 Jan 2023 20:26:26 +0000 (12:26 -0800)]
[TargetParser] Remove an EXPECT that is never executed

Found by the Rotten Green Tests project.

21 months ago[RISCV][LSR] Treat number of instructions as dominate factor in LSR cost decisions
Philip Reames [Tue, 24 Jan 2023 19:33:28 +0000 (11:33 -0800)]
[RISCV][LSR] Treat number of instructions as dominate factor in LSR cost decisions

This matches the behavior from a number of other targets, including e.g. X86. This does have the effect of increasing register pressure slightly, but we have a relative abundance of registers in the ISA compared to other targets which use the same heuristic.

The motivation here is that our current cost heuristic treats number of registers as the dominant cost. As a result, an extra use outside of a loop can radically change the LSR result. As an example consider test4 from the recently added test/Transforms/LoopStrengthReduce/RISCV/lsr-cost-compare.ll. Without a use outside the loop (see test3), we convert the IV into a pointer increment. With one, we leave the gep in place.

The pointer increment version both decreases number of instructions in some loops, and creates parallel chains of computation (i.e. decreases critical path depth). Both are generally profitable.

Arguably, we should really be using a more sophisticated model here - such as e.g. using profile information or explicitly modeling parallelism gains. However, as a practical matter starting with the same mild hack that other targets have used seems reasonable.

Differential Revision: https://reviews.llvm.org/D142227

21 months ago[libc][NFC] Replace "inline" keyword with "LIBC_INLINE".
Siva Chandra Reddy [Tue, 24 Jan 2023 07:10:06 +0000 (07:10 +0000)]
[libc][NFC] Replace "inline" keyword with "LIBC_INLINE".

This is the first of patches doing similar cleanup. A section in the
code style doc has been added explaining where and how LIBC_INLINE is to
be used.

Reviewed By: jeffbailey, lntue

Differential Revision: https://reviews.llvm.org/D142434

21 months ago[OpenMP][Docs] Add non-blocking target nowait environment variables
Guilherme Valarini [Tue, 24 Jan 2023 19:30:34 +0000 (16:30 -0300)]
[OpenMP][Docs] Add non-blocking target nowait environment variables

21 months ago[InstCombine] regenerate test checks; NFC
Sanjay Patel [Tue, 24 Jan 2023 16:34:30 +0000 (11:34 -0500)]
[InstCombine] regenerate test checks; NFC

Value name propagation improved.

21 months ago[InstCombine] reduce code duplication; NFC
Sanjay Patel [Tue, 24 Jan 2023 16:21:29 +0000 (11:21 -0500)]
[InstCombine] reduce code duplication; NFC

21 months ago[InstCombine] rename variables for readability; NFC
Sanjay Patel [Tue, 24 Jan 2023 15:46:00 +0000 (10:46 -0500)]
[InstCombine] rename variables for readability; NFC

There's no reason to use "CI" (cast instruction) when
we know that the value is a more specific (exact) type
of instruction (although we might want to common-ize some
of this code to eliminate duplication or logic diffs).

It's also visually difficult to distinguish between "CI",
"ICI", and "IC" acronyms (and those could change meaning
depending on context).

This was partially changed in earlier commits, so this
makes this pair of functions consistent.

21 months ago[AMDGPU] Split dot8 feature
Stanislav Mekhanoshin [Mon, 23 Jan 2023 22:41:05 +0000 (14:41 -0800)]
[AMDGPU] Split dot8 feature

Differential Revision: https://reviews.llvm.org/D142407

21 months ago[OpenMP][Doc] Update release note for 16 release
Shilei Tian [Tue, 24 Jan 2023 19:04:28 +0000 (14:04 -0500)]
[OpenMP][Doc] Update release note for 16 release

21 months ago[AMDGPU] Remove dot1 and dot6 features from clang for gfx11
Stanislav Mekhanoshin [Tue, 24 Jan 2023 18:22:32 +0000 (10:22 -0800)]
[AMDGPU] Remove dot1 and dot6 features from clang for gfx11

These are unsupported.

Differential Revision: https://reviews.llvm.org/D142493

21 months ago[NFC] Update tsan_rtl.h comment after D142039
Han Zhu [Tue, 24 Jan 2023 18:46:31 +0000 (10:46 -0800)]
[NFC] Update tsan_rtl.h comment after D142039

21 months ago[flang] Keep a fir.box type when doing an array of derived type component
Valentin Clement [Tue, 24 Jan 2023 15:37:52 +0000 (16:37 +0100)]
[flang] Keep a fir.box type when doing an array of derived type component

When referencing a single component from a polymorphic array in an expression,
the rebox operation should output a boxed array of that component type and
not a polymorphic boxed array as it was done.

Reviewed By: PeteSteinfeld

Differential Revision: https://reviews.llvm.org/D142462

21 months ago[IPSCCP][FuncSpec] Fix compiler crash 60191.
Alexandros Lamprineas [Mon, 23 Jan 2023 18:08:51 +0000 (18:08 +0000)]
[IPSCCP][FuncSpec] Fix compiler crash 60191.

Found here https://github.com/llvm/llvm-project/issues/60191

The compiler would crash when specializing a function based on a function
pointer whose call sites may expect less parameters than those of the
function we are replacing the pointer with.

Differential Revision: https://reviews.llvm.org/D142444

21 months ago[OpenMP][Docs] Add some release notes for OpenMP
Joseph Huber [Tue, 24 Jan 2023 18:35:45 +0000 (12:35 -0600)]
[OpenMP][Docs] Add some release notes for OpenMP

21 months agoTeach RuntimeDyld about COFF weak references and to consider comdat symbols weak.
Vassil Vassilev [Tue, 24 Jan 2023 18:24:10 +0000 (18:24 +0000)]
Teach RuntimeDyld about COFF weak references and to consider comdat symbols weak.

Patch by Lang Hames and Sunho Kim!

Differential revision: https://reviews.llvm.org/D138264

21 months agoCorrect some dead links in the clang-tidy docs
Pratik Sharma [Tue, 24 Jan 2023 18:22:41 +0000 (13:22 -0500)]
Correct some dead links in the clang-tidy docs

There were some dead links in Suppressing Undesired Diagnostics which I
replaced with the working links.

Fixes #60023

Differential Revision: https://reviews.llvm.org/D142377

21 months agoRevert "[OpenMP][Archer] Use dlsym rather than weak symbols for TSan annotations"
Slava Zakharin [Tue, 24 Jan 2023 18:17:35 +0000 (10:17 -0800)]
Revert "[OpenMP][Archer] Use dlsym rather than weak symbols for TSan annotations"

OpenMP buildbots are failing:
https://lab.llvm.org/buildbot/#/builders/193/builds/25434
https://lab.llvm.org/buildbot/#/builders/193/builds/25420

This reverts commit 7fbf12210007a66f7b62beadc0e5a52561cc0ab3.

21 months ago[AMDGPU] Add missing gfx11 tests in the directive-amdgcn-target.ll. NFC.
Stanislav Mekhanoshin [Tue, 24 Jan 2023 17:50:44 +0000 (09:50 -0800)]
[AMDGPU] Add missing gfx11 tests in the directive-amdgcn-target.ll. NFC.

21 months ago[clang][deps] NFC: Remove dead code
Jan Svoboda [Tue, 24 Jan 2023 00:16:27 +0000 (16:16 -0800)]
[clang][deps] NFC: Remove dead code

This patch removes some dead code in the dependency scanner.

The `ModuleDeps::ImplicitModulePCMPath` member stopped being used in D131934.

The strict context hash was replaced in D129884 by hash of the canonical command line.

Reviewed By: benlangmuir

Differential Revision: https://reviews.llvm.org/D142416

21 months ago[clang][deps] Account for transitive spurious dependencies
Jan Svoboda [Tue, 24 Jan 2023 17:31:04 +0000 (09:31 -0800)]
[clang][deps] Account for transitive spurious dependencies

In D106100, we started guarding against spurious dependencies on modules that ended up being textual includes and thus didn't have any AST file associated. That patch accounted only for direct dependencies. There's a way how to get spurious dependencies for modules that are transitive. This patch guards against that scenario and adds a test case.

(Note that since D142167, we don't allow `@import FW_Private` with `-fmodule-name=FW` anymore. However, that check lives in sema, which the scanner doesn't run. Being defensive in this patch therefore still makes sense.)

rdar://104324602

Reviewed By: benlangmuir

Differential Revision: https://reviews.llvm.org/D142165

21 months ago[AVR] Support most address space casts
Ayke van Laethem [Thu, 19 Jan 2023 13:49:43 +0000 (14:49 +0100)]
[AVR] Support most address space casts

All hardware address spaces on AVR can be freely cast between (they keep
the same bit pattern). They just aren't dereferenceable when they're in
a different address space as they really do point to a separate address
space.

This is supported in avr-gcc: https://godbolt.org/z/9Gfvhnhv9

avr-gcc also supports the `__memx` address space which is 24 bits. We
don't support this address space yet but I've added a safeguard just in
case.

Differential Revison: https://reviews.llvm.org/D142107

21 months ago[VPlan] Fix leak by manually cleaning up allocated Phi in test.
Florian Hahn [Tue, 24 Jan 2023 17:20:16 +0000 (17:20 +0000)]
[VPlan] Fix leak by manually cleaning up allocated Phi in test.

This should fix a LeakSanitizer failure reported here:
https://lab.llvm.org/buildbot/#/builders/5/builds/30952

21 months ago[libc++][format] Fixes usage of contiguous ranges.
Mark de Wever [Sun, 22 Jan 2023 12:31:27 +0000 (13:31 +0100)]
[libc++][format] Fixes usage of contiguous ranges.

The contiguous range made incorrect assumptions for certain input
ranges.

Fixes llvm.org/PR60164

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D142302

21 months ago[clang][deps] Add module files for input dependencies earlier
Ben Langmuir [Thu, 19 Jan 2023 17:31:31 +0000 (09:31 -0800)]
[clang][deps] Add module files for input dependencies earlier

I originally thought we needed to add module file inputs for modular
deps at the same time as outputs because they depend on the
lookupModuleOutput callback, but this is not the case: they only depend
on the callback results for other modules, which have already been
computed by this point. So move them earlier so that they're set in the
CompilerInvocation at the same time as other inputs. This makes the
code easier to understand.

This change is effectively NFC, though it technically changes the module
exact value of the context hash.

Differential Revision: https://reviews.llvm.org/D142392

21 months ago[15/15][Clang][RISCV][NFC] Set data member under Policy as constants
eopXD [Sun, 15 Jan 2023 17:56:23 +0000 (09:56 -0800)]
[15/15][Clang][RISCV][NFC] Set data member under Policy as constants

The object is now correct by construction.

This is the 15th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.

Please refer to the cover letter in the 1st commit (D141573) for an
overview.

Depends on D141793.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D141796

21 months ago[14/15][Clang][RISCV] Change default policy from TAMU to TAMA
eopXD [Sun, 15 Jan 2023 12:27:07 +0000 (04:27 -0800)]
[14/15][Clang][RISCV] Change default policy from TAMU to TAMA

After this commit, the non-policy variants of `vid` and `viota` are no
longer available for an oveloaded version since the default policy is
now TAMA and the masked-off operand is removed.

Be noted that ALL RVV intrinsics now operate under the general
assumption that a policy behavior is "agnostic" unless specified.
Therefore this patch also changes the semantic of policy intrinsics
with the suffix of `_ta` and `tu`. These intrinsics don't have their
mask policy specified and was assumed to be undisturbed. It is now
changed to agnostic.

This is the 14th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.

Please refer to the cover letter in the 1st commit (D141573) for an
overview.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D141793

21 months ago[13/15][Clang][RISCV][NFC] Remove repeating test cases under rvv-intrinsics-autogenerated
eopXD [Sun, 15 Jan 2023 12:48:33 +0000 (04:48 -0800)]
[13/15][Clang][RISCV][NFC] Remove repeating test cases under rvv-intrinsics-autogenerated

These files were oversights in D141198. The test cases are now under its
exact mnemonics. For example, test cases of `vle8`, `vle16`, `vle32`,
and `vle64` were under `vle.c`. Now they are exist under `vle8.c`,
`vle16.c`, `vle32.c`, and `vle64.c`, respectively.

This is the 13th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.

Please refer to the cover letter in the 1st commit (D141573) for an
overview.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D141792

21 months ago[12/15][Clang][RISCV][NFC] Refine the way to check for Policy in riscv_vector_builtin...
eopXD [Sun, 15 Jan 2023 12:13:48 +0000 (04:13 -0800)]
[12/15][Clang][RISCV][NFC] Refine the way to check for Policy in riscv_vector_builtin_cg.inc

The current way creates a fallacy that checking for
`PolicyAttrs == TAIL_AGNOSTIC` is implicitly equivalant to
`TAIL_AGNOSTIC_MASK_UNDISTURBED`. This works under the assumption that
an unmasked intrinsic has a policy of TAMU. The expression here is
mis-leading and will not be correct when the default policy is not
TAMU.

As this patch-set targets to change the default policy from TAMU to
TAMA, this commit is necessary before changing the default.

This is the 12th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.

Please refer to the cover letter in the 1st commit (D141573) for an
overview.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D141789

21 months agoRevert D142108 "[reland][libc][NFC] Detect host CPU features using try_compile instea...
Guillaume Chatelet [Tue, 24 Jan 2023 16:22:26 +0000 (16:22 +0000)]
Revert D142108 "[reland][libc][NFC] Detect host CPU features using try_compile instead of try_run."

The build bots are failing.
This reverts commit c84d74f5bfe810744de1268eb0516a6622e4aa73.

21 months ago[libc++][doc] Updates format status.
Mark de Wever [Thu, 19 Jan 2023 20:17:34 +0000 (21:17 +0100)]
[libc++][doc] Updates format status.

The paper
- P2286R8 Formatting ranges
is fully implemented modulo its feature test macro. This macro has been
revised by
- LWG3750 Too many papers bump __cpp_lib_format
The new macro depends on
- P2585R0 Improving default container formatting
This paper revises parts of P2286R8 and adds new formatter
specializations. The specialization for debug strings has some wording
issues, which is addresses in this paper
- P2733R0 Fix handling of empty specifiers in std::format

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D142153

21 months ago[11/15][Clang][RISCV][NFC] Remove Policy::PolicyType::Omit
eopXD [Sat, 14 Jan 2023 16:06:19 +0000 (08:06 -0800)]
[11/15][Clang][RISCV][NFC] Remove Policy::PolicyType::Omit

The attribute can be removed now as preceding patches have removed its
users.

This is the 11th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.

Please refer to the cover letter in the 1st commit (D141573) for an
overview.

Reviewed By: craig.topper, kito-cheng

Differential Revision: https://reviews.llvm.org/D141768

21 months ago[clang][dataflow] Fix bug in handling of reference-typed fields.
Yitzhak Mandelbaum [Tue, 24 Jan 2023 14:51:32 +0000 (14:51 +0000)]
[clang][dataflow] Fix bug in handling of reference-typed fields.

This patch fixes a subtle bug in how we create lvalues to reference-typed
fields. In the rare case that the field is umodeled because of the depth limit
on field modeling, the lvalue created can be malformed. This patch prevents that
and adds some related assertions to other code dealing with lvalues for
references.

Differential Revision: https://reviews.llvm.org/D142468

21 months ago[reland][libc][NFC] Detect host CPU features using try_compile instead of try_run.
Guillaume Chatelet [Tue, 24 Jan 2023 16:04:10 +0000 (16:04 +0000)]
[reland][libc][NFC] Detect host CPU features using try_compile instead of try_run.

This implements the same behavior as D141997 but makes sure that the same detection mechanism is used between CMake and source code.

Differential Revision: https://reviews.llvm.org/D142108

21 months ago[mlir][Linalg] NFC - Expose packing transpose implementation as a standalone function...
Nicolas Vasilache [Tue, 24 Jan 2023 15:45:53 +0000 (07:45 -0800)]
[mlir][Linalg] NFC - Expose packing transpose implementation as a standalone functional-style API call

21 months ago[gn build] Port dc8e2ea92953
LLVM GN Syncbot [Tue, 24 Jan 2023 15:24:01 +0000 (15:24 +0000)]
[gn build] Port dc8e2ea92953

21 months ago[mlir][sparse][ArmSVE] Enable sparse integration tests for ArmSVE
Javier Setoain [Mon, 12 Dec 2022 18:02:59 +0000 (18:02 +0000)]
[mlir][sparse][ArmSVE] Enable sparse integration tests for ArmSVE

This patch adds the logic necessary to target the sparse-tensor dialect
integration tests for SVE. As the LLVM backend for AArch64 does not
currently support product reductions, the corresponding tests are
disabled for SVE.

Not all tests have been updated yet. The remaining tests will be
refactored in a separate patch shortly.

Differential Revision: https://reviews.llvm.org/D121304

Co-authored-by: Andrzej Warzynski <andrzej.warzynski@arm.com>
21 months ago[10/15][Clang][RISCV][NFC] Don't need to check for `MaskPolicy` in `isTAPolicy` and...
eopXD [Sat, 14 Jan 2023 15:28:06 +0000 (07:28 -0800)]
[10/15][Clang][RISCV][NFC] Don't need to check for `MaskPolicy` in `isTAPolicy` and `isTUPolicy`

Caller of the two utilities is always companied with a predicate to
check for `!IsMask`, so we don't need to check for the mask policy
here.

This also removes dependency to `Policy::PolicyType::Omit`, which will
be removed.

This is the 10th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.

Please refer to the cover letter in the 1st commit (D141573) for an
overview.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D141767

21 months ago[9/15][Clang][RISCV][NFC] Use correct type for `RVVTypeCache::computeTypes` under...
eopXD [Sat, 14 Jan 2023 15:15:47 +0000 (07:15 -0800)]
[9/15][Clang][RISCV][NFC] Use correct type for `RVVTypeCache::computeTypes` under RISCVVEmitter.cpp

`MaskedPrototype` is initialized and used nowhere, this is a bug. The
existing codebase works correctly upon this bug because the default
policy for unmasked intrinsics is set to TAMU.

This is something to be fixed because when the default policy is
changed to TAMA, clang will generate incorrect result.

This is the 9th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.

Please refer to the cover letter in the 1st commit (D141573) for an
overview.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D141764

21 months ago[KnownBits] Add missing const to a couple of methods
Jay Foad [Tue, 24 Jan 2023 15:01:16 +0000 (15:01 +0000)]
[KnownBits] Add missing const to a couple of methods

21 months ago[VPlan] Add tests for VPlanVerifier (NFC).
Florian Hahn [Tue, 24 Jan 2023 14:58:21 +0000 (14:58 +0000)]
[VPlan] Add tests for VPlanVerifier (NFC).

Extra test coverage suggested for D140514.

21 months ago[llvm][docs] Fix indentation of item list. [NFCI]
Francesco Petrogalli [Tue, 24 Jan 2023 13:06:17 +0000 (14:06 +0100)]
[llvm][docs] Fix indentation of item list. [NFCI]

This fixes the rendering of the items at https://llvm.org/docs/GettingStarted.html#stand-alone-builds

Differential Revision: https://reviews.llvm.org/D142457

21 months ago[clang][RISCV] Fix ABI mismatch between GCC and Clang (extension of integers on stack)
Alex Bradbury [Tue, 24 Jan 2023 14:18:09 +0000 (14:18 +0000)]
[clang][RISCV] Fix ABI mismatch between GCC and Clang (extension of integers on stack)

See <https://github.com/llvm/llvm-project/issues/57261> for full
details. Essentially, a previous version of the psABI indicated (by my
reading) that integer scalars passed on the stack were anyext. A [later
commit](https://github.com/riscv-non-isa/riscv-elf-psabi-doc/commit/cec39a064ee0e5b0129973fffab7e3ad1710498f)
changed this to indicate that they are in fact signext/zeroext just as
if they were passed in registers.

This patch adds the change in the release notes but doesn't add a flag
to retain the old behaviour. The hope is that it's sufficiently hard to
trigger an issue due to this that it isn't worthwhile doing so.

Differential Revision: https://reviews.llvm.org/D140401

21 months ago[ObjC][ARC] Share bundle handling code between steps of the ObjCARCOpts pass and...
Stefan Gränitz [Tue, 24 Jan 2023 10:39:25 +0000 (11:39 +0100)]
[ObjC][ARC] Share bundle handling code between steps of the ObjCARCOpts pass and cleanup (NFC)

Generalize and share code for operand bundle handling. Drop the anonymous namespace (all other helper functions are local static). Rename the existing funclet test for cleanup-pads.

Reviewed By: compnerd

Differential Revision: https://reviews.llvm.org/D137945

21 months ago[ObjC][ARC] Teach the OptimizeSequences step of ObjCARCOpts about WinEH funclet tokens
Stefan Gränitz [Tue, 24 Jan 2023 10:37:23 +0000 (11:37 +0100)]
[ObjC][ARC] Teach the OptimizeSequences step of ObjCARCOpts about WinEH funclet tokens

When optimizing retain-release-sequences we insert (and delete) ObjC runtime calls. These calls need a funclet operand bundle that refers to the enclosing funclet pad whenever they are inserted in a WinEH funclet. WinEH funclets can contain multiple basic blocks. In order to find the enclosing funclet pad, we have to calculate the funclet coloring first.

Reviewed By: ahatanak

Differential Revision: https://reviews.llvm.org/D137944

21 months agoRelax requirements for TileOp.
Johannes Reifferscheid [Tue, 24 Jan 2023 13:32:50 +0000 (14:32 +0100)]
Relax requirements for TileOp.

The op doesn't need to be a LinalgOp, implementing TilingInterface and
DestinationStyleOpInterace is sufficient.

Reviewed By: nicolasvasilache, ftynse

Differential Revision: https://reviews.llvm.org/D142460

21 months ago[OpenMP][Archer] Use dlsym rather than weak symbols for TSan annotations
Joachim Protze [Tue, 24 Jan 2023 14:12:06 +0000 (15:12 +0100)]
[OpenMP][Archer] Use dlsym rather than weak symbols for TSan annotations

This patch fix issues reported for Ubuntu and possibly other platforms:
https://github.com/llvm/llvm-project/issues/45290

The latest comment on this issue points out that using dlsym rather than
the weak symbol approach to call TSan annotation functions fixes the issue
for Ubuntu.

Differential Revision: https://reviews.llvm.org/D142378

21 months ago[SCCP] Add vector add tests for nuw/nsw inference.
Florian Hahn [Tue, 24 Jan 2023 14:14:27 +0000 (14:14 +0000)]
[SCCP] Add vector add tests for nuw/nsw inference.

Also removes a dead argument from some tests.

21 months ago[AAch64] Format TargetParserTest ARMCPUTestParams table. NFC
David Green [Tue, 24 Jan 2023 14:04:21 +0000 (14:04 +0000)]
[AAch64] Format TargetParserTest ARMCPUTestParams table. NFC

21 months ago[InstCombine] reduce compare of signbits of 2 values
Sanjay Patel [Tue, 24 Jan 2023 13:11:19 +0000 (08:11 -0500)]
[InstCombine] reduce compare of signbits of 2 values

Test if 2 values have different or same signbits:
(X u>> BitWidth - 1) == zext (Y s> -1) --> (X ^ Y) < 0
(X u>> BitWidth - 1) != zext (Y s> -1) --> (X ^ Y) > -1

https://alive2.llvm.org/ce/z/qMwMhj

As noted in #60242, these patterns regressed between the
14.0 and 15.0 releases - probably due to a change in
canonicalization of related patterns.

The related patterns for testing if 2 values are both
pos/neg appear to be handled already.

21 months ago[InstCombine] adjust/add tests for cmp-of-signbits; NFC
Sanjay Patel [Tue, 24 Jan 2023 12:55:27 +0000 (07:55 -0500)]
[InstCombine] adjust/add tests for cmp-of-signbits; NFC

These were added with e76c95fb40b1081438 with the
right test names, but the predicates weren't updated
to match.

21 months ago[flang] Use input type to recover the type desc when emboxing
Valentin Clement [Tue, 24 Jan 2023 13:46:11 +0000 (14:46 +0100)]
[flang] Use input type to recover the type desc when emboxing

When emboxing to a polymorphic entity without a type source box,
the type desc address must be retrived from the input type and
not from the box type.

Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D142435

21 months ago[flang] Handle passing NULL() to polymorphic pointer argument
Valentin Clement [Tue, 24 Jan 2023 13:45:17 +0000 (14:45 +0100)]
[flang] Handle passing NULL() to polymorphic pointer argument

Only updates the assert to check where the box is a BaseBoxType
instead of a BoxType since ClassType are also valid in that case.

Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D142442

21 months ago[flang][NFC] Fix typo
Valentin Clement [Tue, 24 Jan 2023 13:34:16 +0000 (14:34 +0100)]
[flang][NFC] Fix typo

21 months agoFix the Clang sphinx build
Aaron Ballman [Tue, 24 Jan 2023 13:21:53 +0000 (08:21 -0500)]
Fix the Clang sphinx build

This addresses issues found by:
https://lab.llvm.org/buildbot/#/builders/92/builds/39084

21 months ago[SVE] Fix invalid INSERT_SUBVECTOR creation when lowering fixed length fp-int convers...
Paul Walker [Sat, 21 Jan 2023 13:38:58 +0000 (13:38 +0000)]
[SVE] Fix invalid INSERT_SUBVECTOR creation when lowering fixed length fp-int conversions.

The original logic resulted in inserting an integer vector into
a floating point one and vice versa. Patch also adds the missing
assert that would have caught the issue.

Differential Revision: https://reviews.llvm.org/D142303

21 months ago[clang] Fix linking to LLVMTestingAnnotations in standalone build
Michał Górny [Tue, 24 Jan 2023 11:36:09 +0000 (12:36 +0100)]
[clang] Fix linking to LLVMTestingAnnotations in standalone build

The LLVMTestingAnnotations library that is now used by unittests
is not installed as part of LLVM.  In order to make it possible to build
unittests when performing the standalone build of clang, build
the library from LLVM sources locally.  This mirrors the existing logic
for LLVMTestingSupport.

Differential Revision: https://reviews.llvm.org/D142449

21 months ago[SanitizerBinaryMetadata] Declare callbacks extern weak
Marco Elver [Tue, 24 Jan 2023 10:51:22 +0000 (11:51 +0100)]
[SanitizerBinaryMetadata] Declare callbacks extern weak

Declare callbacks extern weak (if no existing declaration exists), and
only call if the function address is non-null.

This allows to attach semantic metadata to binaries where no user of
that metadata exists, avoiding to have to link empty stub callbacks.

Once the binary is linked (statically or dynamically) against a tool
runtime that implements the callbacks, the respective callbacks will be
called. This vastly simplifies gradual deployment of tools using the
metadata, esp. avoiding having to recompile large codebases with
different compiler flags (which negatively impacts compiler caches).

Reviewed By: dvyukov, vitalybuka

Differential Revision: https://reviews.llvm.org/D142408

21 months ago[docs][NFC] Add document of llvm-opt-report.
Masahiro ARAKAWA [Fri, 14 Oct 2022 05:18:17 +0000 (14:18 +0900)]
[docs][NFC] Add document of llvm-opt-report.

Differential Revision: https://reviews.llvm.org/D136138

21 months ago[NFC] Deprecate DataLayout::getPrefTypeAlignment
Guillaume Chatelet [Tue, 24 Jan 2023 10:58:02 +0000 (10:58 +0000)]
[NFC] Deprecate DataLayout::getPrefTypeAlignment

21 months ago[AArch64][SME2] Add Multi-vector add/sub, storing into ZA intrinsic
Caroline Concatto [Tue, 24 Jan 2023 09:34:25 +0000 (09:34 +0000)]
[AArch64][SME2] Add Multi-vector add/sub, storing into ZA intrinsic

 Add the following intrinsic:
  ADD single & multi
  SUB single & multi
 NOTE: These intrinsics are still in development and are subject to future changes.

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D142114

21 months ago[MC] Temporarily remove the deleted constructors, they break C++20 build
Ilya Biryukov [Tue, 24 Jan 2023 10:36:46 +0000 (11:36 +0100)]
[MC] Temporarily remove the deleted constructors, they break C++20 build

This helps to unblock our internal integrate that now relies on C++20
configuration. I will follow up with a proposal to re-enable the deleted
constructors soon, but it is a bit involved to avoid increasing the
sizes of struct.

21 months ago[NFC] Deprecate SelectionDag functions taking Alignment as unsigned
Guillaume Chatelet [Tue, 24 Jan 2023 10:39:58 +0000 (10:39 +0000)]
[NFC] Deprecate SelectionDag functions taking Alignment as unsigned

21 months ago[mlir][Linalg] NFC - Expose packing implementation as a standalone functional-style...
Nicolas Vasilache [Tue, 24 Jan 2023 10:27:40 +0000 (02:27 -0800)]
[mlir][Linalg] NFC - Expose packing implementation as a standalone functional-style API call

21 months ago[mlir][Linalg] NFC - Add transform pack builder
Nicolas Vasilache [Mon, 23 Jan 2023 15:43:24 +0000 (07:43 -0800)]
[mlir][Linalg] NFC - Add transform pack builder

21 months ago[8/15][Clang][RISCV][NFC] Always emit PolicyAttr in riscv_vector_builtin_cg.inc
eopXD [Sat, 14 Jan 2023 15:06:21 +0000 (07:06 -0800)]
[8/15][Clang][RISCV][NFC] Always emit PolicyAttr in riscv_vector_builtin_cg.inc

The extra logic here is redundant. Also sneaked in an one-liner for
emitting `IsMasked`.

This is the 8th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.

Please refer to the cover letter in the 1st commit (D141573) for an
overview.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D141762

21 months ago[NFC] Remove unused SelectionDag::getExtLoad function
Guillaume Chatelet [Tue, 24 Jan 2023 09:50:16 +0000 (09:50 +0000)]
[NFC] Remove unused SelectionDag::getExtLoad function

21 months ago[RISCV] Combine FP_TO_INT to vfwcvt/fvncvt
Luke Lau [Thu, 19 Jan 2023 11:25:23 +0000 (11:25 +0000)]
[RISCV] Combine FP_TO_INT to vfwcvt/fvncvt

Adds new pseudo instructions to make sure that the fcvt instructions
have all rounding mode (RM) and unsigned (XU) variants across
single-width, widening and narrowing conversions.
And likewise, extends the VL patterns to accompany them. We don't add
new VL nodes for the widening/narrowing conversions though, instead we
just add specific patterns for vfcvts on those wider/narrower types.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D142102

21 months ago[NFC] Deprecate SelectionDag::getLoad that takes alignment as
Guillaume Chatelet [Mon, 23 Jan 2023 10:08:01 +0000 (10:08 +0000)]
[NFC] Deprecate SelectionDag::getLoad that takes alignment as
unsigned

21 months ago[FPEnv] Fix complex operations in strictfp mode
Serge Pavlov [Fri, 13 Jan 2023 15:32:10 +0000 (22:32 +0700)]
[FPEnv] Fix complex operations in strictfp mode

Operations on floating-point complex data had incorrect FP attributes
in strictfp mode, because IRBuilder object was not synchronized with AST
node attributes.

Differential Revision: https://reviews.llvm.org/D141765

21 months ago[7/15][Clang][RISCV][NFC] Correct the default value for Policy to TAMU
eopXD [Sat, 14 Jan 2023 13:19:49 +0000 (05:19 -0800)]
[7/15][Clang][RISCV][NFC] Correct the default value for Policy to TAMU

The default value is set to `Omit`, but in fact the value is then
assigned in `updateNamesAndPolicy`, which is set to TUMU when masked and
TAMU when unmasked. This commit demonstrates so and further remove
another dependency of `Omit`.

This is the 7th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.

Please refer to the cover letter in the 1st commit (D141573) for an
overview.

Reviewed By: craig.topper, kito-cheng

Differential Revision: https://reviews.llvm.org/D141759

21 months ago[flang] Support polymorphic input array for PACK intrinsic
Valentin Clement [Tue, 24 Jan 2023 09:18:55 +0000 (10:18 +0100)]
[flang] Support polymorphic input array for PACK intrinsic

When `ARRAY` is polymorphic, the result needs to carry over
the dynamic type information. This patch updates the lowering
to make the result polymorphic when needed.

Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D142432

21 months ago[AArch64][SME2] Add Multi-vector saturating extract narrow and interleave intrinsics
Caroline Concatto [Mon, 23 Jan 2023 18:01:48 +0000 (18:01 +0000)]
[AArch64][SME2] Add Multi-vector saturating extract narrow and interleave intrinsics

 Add the following intrinsic:
      SQCVTN
      SQCVTUN
      UQCVTN

 NOTE: These intrinsics are still in development and are subject to future changes.

Reviewed By: kmclaughlin

Differential Revision: https://reviews.llvm.org/D142089