platform/upstream/llvm.git
2 years ago[libFuzzer] Use the compiler to link the relocatable object
Petr Hosek [Wed, 15 Jun 2022 06:53:18 +0000 (06:53 +0000)]
[libFuzzer] Use the compiler to link the relocatable object

Rather than invoking the linker directly, let the compiler driver
handle it. This ensures that we use the correct linker in the case
of cross-compiling.

Differential Revision: https://reviews.llvm.org/D127828

2 years ago[mlir][SCF][bufferize] Implement `resolveConflicts` for SCF ops
Matthias Springer [Wed, 15 Jun 2022 07:00:44 +0000 (09:00 +0200)]
[mlir][SCF][bufferize] Implement `resolveConflicts` for SCF ops

scf::ForOp and scf::WhileOp must insert buffer copies not only for out-of-place bufferizations, but also to enforce additional invariants wrt. to buffer aliasing behavior. This is currently happening in the respective `bufferize` methods. With this change, the tensor copy insertion pass will also enforce these invariants by inserting copies. The `bufferize` methods can then be simplified and made independent of the `AnalysisState` data structure in a subsequent change.

Differential Revision: https://reviews.llvm.org/D126822

2 years ago[mlir] Add missing newline at end of .clang-format file
owenca [Wed, 15 Jun 2022 06:57:08 +0000 (23:57 -0700)]
[mlir] Add missing newline at end of .clang-format file

2 years ago[LSR] Add test for LoopStrenghtReduce for Ldp; NFC
chenglin.bi [Wed, 15 Jun 2022 06:51:15 +0000 (14:51 +0800)]
[LSR] Add test for LoopStrenghtReduce for Ldp; NFC
#53877

2 years ago[libc][NFC] Add src.__support.OSUtil targets conditionally.
Siva Chandra Reddy [Wed, 15 Jun 2022 06:32:06 +0000 (06:32 +0000)]
[libc][NFC] Add src.__support.OSUtil targets conditionally.

Before this change, they were unconditionally added, irrespective of the
availability of the architecture specific pieces.

2 years ago[clangd] Wire up compilation for style blocks
Kadir Cetinkaya [Tue, 14 Jun 2022 15:08:37 +0000 (17:08 +0200)]
[clangd] Wire up compilation for style blocks

Differential Revision: https://reviews.llvm.org/D127749

2 years ago[RISCV] Teach vsetvli insertion to not insert redundant vsetvli right after VLEFF...
Yeting Kuo [Sat, 11 Jun 2022 16:46:30 +0000 (00:46 +0800)]
[RISCV] Teach vsetvli insertion to not insert redundant vsetvli right after VLEFF/VLSEGFF.

VSETVLIInfos right after VLEFF/VLSEGFF are currently unknown since they modify
VL. Unknown VSETVLIInfos make next vector operations needed to be inserted
VSET(I)VLI. Actually the next vector operation of VLEFF/VLSEGFF may not need to
be inserted VSET(I)VLI if it uses same VTYPE and the resulted vl of
VLEFF/VLSEGFF.

Take the below C code as an example,

  vint8m4_t vec_src1 = vle8ff_v_i8m4(str1, &new_vl, vl);
  vbool2_t mask1 = vmseq_vx_i8m4_b2(vec_src1, 0, new_vl);
  vsetvli insertion adds a redundant vsetvli for that,

Assembly result:
  vsetvli a2,a2,e8,m4,ta,mu
  vle8ff.v v28,(a0)
  csrr a3,vl ; redundant
  vsetvli zero,a3,e8,m4,ta,mu ; redundant
  vmseq.vi v25,v28,0

After D126794, VLEFF/VLSEGFF has a define having value of VL. The patch consider
there is a ghost vsetvli right after VLEFF/VLSEGFF. The ghost VSET(I)LIs use the
vl output of the VLEFF/VLSEGFF as its AVL and same VTYPE of the VLEFF/VLSEGFF.
The ghost vsetvli must be redundant, and we could use it to get the VSETVLIInfo
right after VLEFF/VLSEGFF.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D127576

2 years ago[SelectionDAG] fold 'Op0 - (X * MulC)' to 'Op0 + (X << log2(-MulC))'
Ping Deng [Wed, 15 Jun 2022 05:43:26 +0000 (05:43 +0000)]
[SelectionDAG] fold 'Op0 - (X * MulC)' to 'Op0 + (X << log2(-MulC))'

Reviewed By: craig.topper, spatel

Differential Revision: https://reviews.llvm.org/D127474

2 years ago[libc][NFC] Use uint32_t to represent futex words.
Siva Chandra Reddy [Wed, 15 Jun 2022 05:38:38 +0000 (05:38 +0000)]
[libc][NFC] Use uint32_t to represent futex words.

Futexes are 32 bits in size on all platforms, including 64-bit systems.

2 years ago[clang-format] Never analyze insert/remove braces in the same pass
owenca [Mon, 13 Jun 2022 19:15:31 +0000 (12:15 -0700)]
[clang-format] Never analyze insert/remove braces in the same pass

Turn off RemoveBracesLLVM while analyzing InsertBraces and vice
versa to avoid potential interference of each other and better the
performance.

Differential Revision: https://reviews.llvm.org/D127685

2 years ago[gn build] Port 48ebc1af2948
LLVM GN Syncbot [Wed, 15 Jun 2022 05:24:12 +0000 (05:24 +0000)]
[gn build] Port 48ebc1af2948

2 years ago[AMDGPU] Add more expressive sched_barrier controls
Austin Kerbow [Fri, 3 Jun 2022 18:35:47 +0000 (11:35 -0700)]
[AMDGPU] Add more expressive sched_barrier controls

The sched_barrier builtin allow the scheduler's behavior to be shaped by users
when very specific codegen is needed in order to create highly optimized code.
This patch adds more granular control over the types of instructions that are
allowed to be reordered with respect to one or multiple sched_barriers. A mask
is used to specify groups of instructions that should be allowed to be scheduled
around a sched_barrier. The details about this mask may be used can be found in
llvm/include/llvm/IR/IntrinsicsAMDGPU.td.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D127123

2 years ago[AMDGPU] Add isMFMA helper function. NFC
Austin Kerbow [Sun, 22 May 2022 21:54:50 +0000 (14:54 -0700)]
[AMDGPU] Add isMFMA helper function. NFC

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D127124

2 years ago[MC] Remove unused MCStreamer::SwitchSection
Fangrui Song [Wed, 15 Jun 2022 04:25:56 +0000 (21:25 -0700)]
[MC] Remove unused MCStreamer::SwitchSection

switchSection should be used instead.

2 years ago[ORC-RT] Add integration tests for AArch64
Peter S. Housel [Tue, 14 Jun 2022 06:36:56 +0000 (23:36 -0700)]
[ORC-RT] Add integration tests for AArch64

This change adds test cases targeting the AArch64 Linux platform to
the ORC runtime integration test suite.

Reviewed By: lhames, sunho

Differential Revision: https://reviews.llvm.org/D127720

2 years ago[RISCV][NFC] Add more tests for instruction selection of 'mul'
Ping Deng [Wed, 15 Jun 2022 03:28:44 +0000 (03:28 +0000)]
[RISCV][NFC] Add more tests for instruction selection of 'mul'

precommit tests for D127474

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D127475

2 years ago[libc++][NFCI] span: replace enable_if with concepts
Joe Loser [Wed, 15 Jun 2022 03:25:50 +0000 (21:25 -0600)]
[libc++][NFCI] span: replace enable_if with concepts

Several span constructors use `enable_if` which is verbose. Replace these with
concepts or requires expressions.

2 years ago[LLDB] CommandObjectThreadUntil::DoExecute() sets the wrong selected thread ID
Venkata Ramanaiah Nalamothu [Wed, 15 Jun 2022 02:34:32 +0000 (08:04 +0530)]
[LLDB] CommandObjectThreadUntil::DoExecute() sets the wrong selected thread ID

For the 'thread until' command, the selected thread ID, to perform the operation on, could be of the current thread or the specified thread.

Reviewed By: jingham

Differential Revision: https://reviews.llvm.org/D48865

2 years ago[mlir][spirv] Handle corner cases for math.powf conversion
Lei Zhang [Wed, 15 Jun 2022 03:00:18 +0000 (23:00 -0400)]
[mlir][spirv] Handle corner cases for math.powf conversion

Per GLSL Pow extended instruction spec: "Result is undefined if
x < 0. Result is undefined if x = 0 and y <= 0." So we need to
handle negative `x` values specifically.

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D127816

2 years ago[RISCV][NFC] Set default value for BaseInstr in RISCVVPseudo
wangpc [Wed, 15 Jun 2022 02:59:00 +0000 (10:59 +0800)]
[RISCV][NFC] Set default value for BaseInstr in RISCVVPseudo

Since almost all pseudos have the same form of BaseInstr, we
can just set it as default value to reduce some lines.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D127632

2 years ago[Driver] Improve linking options for target AVR
Ben Shi [Wed, 15 Jun 2022 01:09:37 +0000 (01:09 +0000)]
[Driver] Improve linking options for target AVR

1. Support user specified linker (-fuse-ld)
2. Support user specified linker script (-T)

Reviewed By: MaskRay, haowei

Differential Revision: https://reviews.llvm.org/D126192

2 years ago[X86][NFC] Use mnemonic tables in validateInstruction 4/4
Amir Ayupov [Wed, 15 Jun 2022 02:53:28 +0000 (19:53 -0700)]
[X86][NFC] Use mnemonic tables in validateInstruction 4/4

Group switch cases by opcode:
- VGATHERDPD
- VGATHERDPS
- VGATHERQPD
- VGATHERQPS
- VPGATHERDD
- VPGATHERDQ
- VPGATHERQD
- VPGATHERQQ

Distinguish masked vs non-masked forms by EVEX encoding.

Reviewed By: skan, craig.topper

Differential Revision: https://reviews.llvm.org/D127719

2 years ago[mlir][Vector] Fold consecutive bitcast.
jacquesguan [Tue, 14 Jun 2022 07:37:47 +0000 (15:37 +0800)]
[mlir][Vector] Fold consecutive bitcast.

This patch supports to fold consecutive bitcast into one bitcast.

Differential Revision: https://reviews.llvm.org/D127723

2 years ago[mlir][affine] Make loop tiling default options explicit
lewuathe [Wed, 15 Jun 2022 02:27:55 +0000 (11:27 +0900)]
[mlir][affine] Make loop tiling default options explicit

Make default loop tiling options explicit from CLI options. We can also set default value for separate option which is declared implicitly.

Reviewed By: ayzhuang

Differential Revision: https://reviews.llvm.org/D127711

2 years ago[RISCV] Replace uses of VLOpFrag in VLMax patterns with srcvalue.
Craig Topper [Wed, 15 Jun 2022 00:57:35 +0000 (17:57 -0700)]
[RISCV] Replace uses of VLOpFrag in VLMax patterns with srcvalue.

These are on inner nodes and we're dropping the captured $vl anyway.

2 years ago[Libomptarget] Use binutils archive executable to address failing tests
Joseph Huber [Wed, 15 Jun 2022 02:12:41 +0000 (22:12 -0400)]
[Libomptarget] Use binutils archive executable to address failing tests

Summary:
The static linking test ensures that we can statically link offloading
programs. To create the test we used `llvm-ar`. However, this may not
exist in the user's environment. This patch changes it to use the
binutils `ar` which should exist on every system running these tests
currently. In the future we should set up the dependencies properly.

2 years ago[HIP] fix long double size
Yaxun (Sam) Liu [Tue, 14 Jun 2022 16:40:37 +0000 (12:40 -0400)]
[HIP] fix long double size

For amdgpu target long double type is the same as double type.
The width and align of long double type was incorrectly
overridden when copying aux target properties, which
caused assertion in codegen when emitting global
variables with long double type.

This patch fix that by saving and restoring width
and align of long double type.

Reviewed by: Artem Belevich

Differential Revision: https://reviews.llvm.org/D127771

Fixes: SWDEV-335515

2 years ago[CSKY] Fix the assert in eliminateFrameIndex when the offset is negative
Zi Xuan Wu (Zeson) [Wed, 15 Jun 2022 01:36:26 +0000 (09:36 +0800)]
[CSKY] Fix the assert in eliminateFrameIndex when the offset is negative

After the frameindex is resolved, the offset can be negative. It would
be materialized as unsigned integer and can still calculated by add instruction.

2 years ago[X86][AMX] Fix klockwork issue.
Luo, Yuanke [Wed, 15 Jun 2022 01:22:20 +0000 (09:22 +0800)]
[X86][AMX] Fix klockwork issue.

2 years agoReland "[X86][RFC] Enable `_Float16` type support on X86 following the psABI"
Phoebe Wang [Wed, 15 Jun 2022 00:26:04 +0000 (08:26 +0800)]
Reland "[X86][RFC] Enable `_Float16` type support on X86 following the psABI"

Disabled 2 mlir tests due to the runtime doesn't support `_Float16`, see
the issue here https://github.com/llvm/llvm-project/issues/55992

2 years agoRevert "[Driver] Improve linking options for target AVR"
Haowei Wu [Wed, 15 Jun 2022 00:53:46 +0000 (17:53 -0700)]
Revert "[Driver] Improve linking options for target AVR"

This reverts commit 3b6e166999bb83197c8b70468c2d371c58cf0c25 which
causes Clang Driver test failures on Fuchsia builders.

2 years ago[gn build] Port 435897b41d60
LLVM GN Syncbot [Wed, 15 Jun 2022 00:32:13 +0000 (00:32 +0000)]
[gn build] Port 435897b41d60

2 years ago[TableGen][DirectX] Add tableGen backend to generate DXIL operation for DirectX backend.
python3kgae [Wed, 11 May 2022 23:56:38 +0000 (16:56 -0700)]
[TableGen][DirectX] Add tableGen backend to generate DXIL operation for DirectX backend.

A new tableGen backend gen-dxil-enum is added to generate enum for DXIL operation and operation class.

A new file "DXILConstants.inc" will be generated when build DirectX target which include the enums.

More tableGen backends will be added to replace manually written table in DirectX backend.
The unused fields in dxil_inst will be used in future PR.

Reviewed By: bogner

Differential Revision: https://reviews.llvm.org/D125435

2 years ago[mlir][spirv] Fix math.ctlz for full zero bit cases
Lei Zhang [Tue, 14 Jun 2022 23:39:20 +0000 (19:39 -0400)]
[mlir][spirv] Fix math.ctlz for full zero bit cases

If the integer has all zero bits, GLSL FindUMsb would return -1.
So theoretically (31 - FindUMsb) should still give use the correct
result.  However, Adreno GPUshave issues with this:
https://buildkite.com/iree/iree-test-android/builds/6482#01815f05-3926-466f-822a-1e20299e5461
This looks like a driver bug. So handle the corner case explicity
to workaround it.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D127747

2 years ago[RISCV] Minor code/comment improvement in prepass of InsertVSETVLI [nfc]
Philip Reames [Tue, 14 Jun 2022 23:15:26 +0000 (16:15 -0700)]
[RISCV] Minor code/comment improvement in prepass of InsertVSETVLI [nfc]

2 years ago[dsymutil] Fix std::unique_ptr to llvm::Expected conversion
Jonas Devlieghere [Tue, 14 Jun 2022 23:09:39 +0000 (16:09 -0700)]
[dsymutil] Fix std::unique_ptr to llvm::Expected conversion

Fixes error: could not convert from
'std::unique_ptr<llvm::dsymutil::Reproducer>' to
'llvm::Expected<std::unique_ptr<llvm::dsymutil::Reproducer>>'

2 years ago[dsymutil] Automatically generate a reproducer when dsymutil crashes
Jonas Devlieghere [Tue, 14 Jun 2022 16:22:46 +0000 (09:22 -0700)]
[dsymutil] Automatically generate a reproducer when dsymutil crashes

Automatically generate a reproducer when dsymutil crashes. We already
support generating reproducers with the --gen-reproducer flag, which
emits a reproducer on exit. This patch adds support for doing the same
on a crash and makes it the default behavior.

rdar://68357665

Differential revision: https://reviews.llvm.org/D127441

2 years ago[clang][dataflow] Rename `getPointeeLoc` to `getReferentLoc` for ReferenceValue.
Wei Yi Tee [Tue, 14 Jun 2022 22:41:49 +0000 (00:41 +0200)]
[clang][dataflow] Rename `getPointeeLoc` to `getReferentLoc` for ReferenceValue.

We distinguish between the referent location for `ReferenceValue` and pointee location for `PointerValue`. The former must be non-empty but the latter may be empty in the case of a `nullptr`

Reviewed By: gribozavr2, sgatev

Differential Revision: https://reviews.llvm.org/D127745

2 years ago[PS5] Default to 'sce' debugger tuning
Paul Robinson [Tue, 14 Jun 2022 22:26:35 +0000 (15:26 -0700)]
[PS5] Default to 'sce' debugger tuning

2 years agoFunctionPropertiesAnalysis: handle callsite BBs that lose edges
Mircea Trofin [Wed, 8 Jun 2022 21:58:21 +0000 (14:58 -0700)]
FunctionPropertiesAnalysis: handle callsite BBs that lose edges

There could be successors that were reached before but now are only
reachable from elsewhere in the CFG.

Suppose the following diamond CFG (lines are arrows pointing down):
    A
  /   \
 B     C
  \   /
    D
There's a call site in C that is inlined. Upon doing that, it turns out
it expands to:
   call void @llvm.trap()
   unreachable
D isn't reachable from C anymore, but we did discount it when we set up
FunctionPropertiesUpdater, so we need to re-include it here.

The patch also updates loop accounting to use LoopInfo rather than
traverse BBs.

Differential Revision: https://reviews.llvm.org/D127353

2 years ago[llvm] Add DW_CC_nocall to function debug metadata when either return values or argum...
Venkata Ramanaiah Nalamothu [Mon, 6 Jun 2022 15:37:09 +0000 (21:07 +0530)]
[llvm] Add DW_CC_nocall to function debug metadata when either return values or arguments are removed

Adding the `DW_CC_nocall` calling convention to the function debug metadata is needed when either the return values or the arguments of a function are removed as this helps in informing debugger that it may not be safe to call this function or try to interpret the return value.
This translates to setting `DW_AT_calling_convention` with `DW_CC_nocall` for appropriate DWARF DIEs.

The DWARF5 spec (section 3.3.1.1 Calling Convention Information) says:

If the `DW_AT_calling_convention` attribute is not present, or its value is the constant `DW_CC_normal`, then the subroutine may be safely called by obeying the `standard` calling conventions of the target architecture. If the value of the calling convention attribute is the constant `DW_CC_nocall`, the subroutine does not obey standard calling conventions, and it may not be safe for the debugger to call this subroutine.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D127134

2 years ago[mlir] Try to work around ambiguity in older clang versions
Benjamin Kramer [Tue, 14 Jun 2022 21:57:57 +0000 (23:57 +0200)]
[mlir] Try to work around ambiguity in older clang versions

mlir/lib/Dialect/Arithmetic/IR/InferIntRangeInterfaceImpls.cpp:366:10: error: chosen constructor is explicit in copy-initialization
  return {leftVal, rightVal};
         ^~~~~~~~~~~~~~~~~~~

2 years ago[bazel] Port b0b00432093b
Benjamin Kramer [Tue, 14 Jun 2022 21:55:50 +0000 (23:55 +0200)]
[bazel] Port b0b00432093b

2 years ago[bazel] Port 75bfc6f29579
Benjamin Kramer [Tue, 14 Jun 2022 21:45:52 +0000 (23:45 +0200)]
[bazel] Port 75bfc6f29579

2 years agoRISCV: handle 64-bit PCREL data relocations
Saleem Abdulrasool [Fri, 10 Jun 2022 22:54:17 +0000 (22:54 +0000)]
RISCV: handle 64-bit PCREL data relocations

We would previously fail to handle 64-bit PC-relative relocations on
RISCV.  This was exposed by trying to build with
`-fprofile-instr-generate`.

The original changes restricted the relocation handling to the text
segment as the paired relocations are undesirable in at least the debug
and .eh_frame sections.  We now make this explicit to handle the general
case for the data relocations as well.

It would be preferable to use `R_RISCV_n_PCREL` when available to avoid
an extra relocation.

Differential Revision: https://reviews.llvm.org/D127549
Reviewed By: luismarques, MaskRay

Fixes: #55971

2 years ago(Reland)[mlir] Add a generic data-flow analysis framework
Mogball [Mon, 13 Jun 2022 21:54:52 +0000 (21:54 +0000)]
(Reland)[mlir] Add a generic data-flow analysis framework

Removes one element of the pointer union to make it work on 32-bit
systems.

This patch introduces a generic data-flow analysis framework to MLIR. The framework implements a fixed-point iteration algorithm and a dependency graph between lattice states and analysis. Lattice states and points are fully extensible to support highly-customizable analyses.

Reviewed By: phisiart, rriddle

Differential Revision: https://reviews.llvm.org/D126751

2 years ago[mlir][Arith] Pass to switch signed ops for equivalent unsigned ones
Krzysztof Drewniak [Thu, 14 Apr 2022 22:51:23 +0000 (22:51 +0000)]
[mlir][Arith] Pass to switch signed ops for equivalent unsigned ones

If all the arguments to and results of an operation are known to be
non-negative when interpreted as signed (which also implies that all
computations producing those values did not experience signed
overflow), we can replace that operation with an equivalent one that
operates on unsigned values.

Such a replacement, when it is possible, can provide useful hints to
backends, such as by allowing LLVM to replace remainder with bitwise
operations in more cases.

Depends on D124022

Depends on D124023

Reviewed By: Mogball

Differential Revision: https://reviews.llvm.org/D124024

2 years ago[clang] Add tests for statement expression in initializers
Anders Waldenborg [Tue, 7 Jun 2022 10:21:42 +0000 (12:21 +0200)]
[clang] Add tests for statement expression in initializers

The commit 683e83c5
  [Clang][C++2b] P2242R3: Non-literal variables [...] in constexpr
fixed a code generation bug when using (C-extension) statement
expressions inside initializer expressions.

Before that commit a nested static initializer inside the statement
expression would not be emitted, causing it to be zero initialized.

It is a bit surprising (at least to me) that a commit implementing a new
C++ feature would fix this code generation bug. Zooming in it is the
change done in ExprConstant.cpp that helps. That changes so that
"ESR_Failed" is returned in more cases, causing the expression to not be
deemed constant. This fixes the code generation as instead the compiler
has to resort to generating a dynamic initializer.

That commit also meant that some statement expressions (in particular
the ones using static variables) that previously were accepted now are
errors due to not being constant (matching GCC behavior).

Given how a seemingly unrelated change caused this behavior to change,
it is probably a good thing to add at least some rudimentary tests for
these kind expressions.

Differential Revision: https://reviews.llvm.org/D127201

2 years agoRevert "[mlir] Add a generic data-flow analysis framework"
Frederik Gossen [Tue, 14 Jun 2022 21:12:52 +0000 (17:12 -0400)]
Revert "[mlir] Add a generic data-flow analysis framework"

This reverts commit 9dea11728340e54e1fde76320b61a559148c8a3e.
The PointerUnion assumes 3 available bits, which is not the case on 32-bit
machines.

2 years ago[flang] Add failed_images to list of intrinsics and add test
Katherine Rasmussen [Sat, 14 May 2022 04:50:36 +0000 (21:50 -0700)]
[flang] Add failed_images to list of intrinsics and add test

Add failed_images to the list of intrinsic functions. Add a
semantics test for failed_images.

Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D126805

2 years agoRevert "[mlir] add an option to print op stats in JSON"
Okwan Kwon [Tue, 14 Jun 2022 21:06:54 +0000 (14:06 -0700)]
Revert "[mlir] add an option to print op stats in JSON"

There is a failure from the python pass manager.

This reverts commit 1a19abf38c3afb66b680cea69c8e61ea152e1514.

2 years ago[RISCV] Split out transfer function explicitly in VSETVLI insertion dataflow [nfc]
Philip Reames [Tue, 14 Jun 2022 21:01:29 +0000 (14:01 -0700)]
[RISCV] Split out transfer function explicitly in VSETVLI insertion dataflow [nfc]

In an effort to make this code easier to read and extend, this splits out helper functions for the transfer function of the data flow. Due to the other results computed during the phases, we can't completely abstract away everything, but we can abstract the actual state transitions.

The motivation here is the following upcoming changes:
* The fault first load patch - already approved, this will be rebased over - adds another case into the transferAfter path.
* An upcoming patch to fold the local prepass back into the main algorithm greatly complicates the transferBefore logic.

Differential Revision: https://reviews.llvm.org/D127761

2 years ago[lld-macho] Group undefined symbol diagnostics by symbol
Daniel Bertalan [Tue, 14 Jun 2022 20:35:09 +0000 (16:35 -0400)]
[lld-macho] Group undefined symbol diagnostics by symbol

ld64.lld used to print the "undefined symbol" line for each reference to
an undefined symbol previously:

  ld64.lld: error: undefined symbol: _foo
  >>> referenced by /path/to/bar.o:(symbol _baz+0x0)

  ld64.lld: error: undefined symbol: _foo
  >>> referenced by /path/to/bar.o:(symbol _quux+0x1)

Now they are deduplicated:

  ld64.lld: error: undefined symbol: _foo
  >>> referenced by /path/to/bar.o:(symbol _baz+0x0)
  >>> referenced by /path/to/bar.o:(symbol _quux+0x1)

As with the other lld ports, only the first 3 references are printed.

Differential Revision: https://reviews.llvm.org/D127753

2 years ago[Matrix] Check if iterator is at beginning of BB in optimizeTranspose.
Florian Hahn [Tue, 14 Jun 2022 20:37:02 +0000 (21:37 +0100)]
[Matrix] Check if iterator is at beginning of BB in optimizeTranspose.

If an instruction at the beginning of a block is erased,  this may
trigger crash due to dereferencing an invalid iterator.

Check if II is at the end before dereferencing it.

Reviewed By: thegameg

Differential Revision: https://reviews.llvm.org/D127736

2 years ago[mlir] add an option to print op stats in JSON
Okwan Kwon [Mon, 13 Jun 2022 20:42:05 +0000 (13:42 -0700)]
[mlir] add an option to print op stats in JSON

Differential Revision: https://reviews.llvm.org/D127691

2 years ago[Clang] Simplify unifying target features
Joseph Huber [Tue, 14 Jun 2022 02:08:52 +0000 (22:08 -0400)]
[Clang] Simplify unifying target features

This patch simplifies how we unify target features. Now we simply
iterate the input in reverse and only insert the feature if it hasn't
been seen yet. The only reason we need to reverse this at the end is to
keep the features in order for the existing tests.

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D127707

2 years ago[PS5] Make library function availability match PS4
Paul Robinson [Tue, 14 Jun 2022 19:46:50 +0000 (12:46 -0700)]
[PS5] Make library function availability match PS4

2 years agoUpdate ASTImportError.h
Shivam [Tue, 14 Jun 2022 19:15:07 +0000 (00:45 +0530)]
Update ASTImportError.h

2 years ago[Clang][AST] Fixed BindingDecl AST-dump for tuple like structures
isuckatcs [Thu, 26 May 2022 16:59:22 +0000 (18:59 +0200)]
[Clang][AST] Fixed BindingDecl AST-dump for tuple like structures

The AST of a BindingDecl in case of tuple like structures wasn't
properly printed. For these bidnings there is information stored
in BindingDecl::getHoldingVar(), and this information was't
printed in the AST-dump.

Differential Revision: https://reviews.llvm.org/D126131

2 years ago[X86][NFC] Use mnemonic tables in validateInstruction 3/4
Amir Ayupov [Tue, 14 Jun 2022 19:10:34 +0000 (12:10 -0700)]
[X86][NFC] Use mnemonic tables in validateInstruction 3/4

Group switch cases by opcode:
- V4FMADDPS
- V4FMADDSS
- V4FNMADDPS
- V4FNMADDSS
- VP4DPWSSDS
- VP4DPWSSD

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D127718

2 years ago[clang][NFC][AST] rename the ImportError to ASTImportError
phyBrackets [Tue, 14 Jun 2022 19:09:24 +0000 (00:39 +0530)]
[clang][NFC][AST] rename the ImportError to ASTImportError

this patch is the continuation of my previous patch regarding the ImportError in ASTImportError.h

Reviewed By: martong

Differential Revision: https://reviews.llvm.org/D125340

2 years ago[X86][NFC] Use mnemonic tables in validateInstruction 2/4
Amir Ayupov [Tue, 14 Jun 2022 19:07:11 +0000 (12:07 -0700)]
[X86][NFC] Use mnemonic tables in validateInstruction 2/4

Group switch cases by opcode:
- VFCMULCPH
- VFCMULCSH
- VFMULCPH
- VFMULCSH

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D127717

2 years ago[X86][NFC] Use mnemonic tables in validateInstruction 1/4
Amir Ayupov [Tue, 14 Jun 2022 18:20:36 +0000 (11:20 -0700)]
[X86][NFC] Use mnemonic tables in validateInstruction 1/4

Group switch cases by opcode:
- VFCMADDCPH
- VFCMADDCSH
- VFMADDCPH
- VFMADDCSH

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D127716

2 years ago[ValueTracking] recognize sub X, (X -nsw Y) as not overflowing
Sanjay Patel [Tue, 14 Jun 2022 18:51:49 +0000 (14:51 -0400)]
[ValueTracking] recognize sub X, (X -nsw Y) as not overflowing

This extends a similar pattern from D125500.
If we know that operand 1 (RHS) of a subtract is itself a
non-overflowing subtract from operand 0 (LHS), then the
final/outer subtract is also non-overflowing:
https://alive2.llvm.org/ce/z/Bqan8v

InstCombine uses this analysis to trigger a narrowing
optimization, so that is what the first changed test shows.

The last test models the motivating case from issue #48013.
In that example, we determine 'nsw' on the first sub from
the srem, then we determine that the 2nd sub can be narrowed,
and that leads to eliminating both subtracts.

This works for unsigned sub too, but I left that out to keep
the patch minimal. If this looks ok, I will follow up with
that change. There are also several missing subtract narrowing
optimizations demonstrated in the tests above the diffs shown
here - those should be handled in InstCombine with another set
of patches.

Differential Revision: https://reviews.llvm.org/D127754

2 years ago[MLIR][Presburger] Fix spellings of attachment
Groverkss [Tue, 14 Jun 2022 18:19:21 +0000 (23:49 +0530)]
[MLIR][Presburger] Fix spellings of attachment

2 years ago[RISCV] Split out subfields in InsertVSETVLI's demanded fields analysis [nfc]
Philip Reames [Tue, 14 Jun 2022 18:31:19 +0000 (11:31 -0700)]
[RISCV] Split out subfields in InsertVSETVLI's demanded fields analysis [nfc]

At the moment, this just gets the infrastructure in place.  Following changes will start using this in non-trivial ways.

2 years ago[mlir][Arith] Implement InferIntRangeInterface for arithmetic ops
Krzysztof Drewniak [Fri, 22 Apr 2022 19:07:59 +0000 (19:07 +0000)]
[mlir][Arith] Implement InferIntRangeInterface for arithmetic ops

Depends on D124023

Reviewed By: Mogball, rriddle

Differential Revision: https://reviews.llvm.org/D124022

2 years ago[flang] Add team_type to num_images intrinsic call
Katherine Rasmussen [Tue, 31 May 2022 20:15:54 +0000 (13:15 -0700)]
[flang] Add team_type to num_images intrinsic call

num_images had previously been added to the list of intrinsics
before the type team_type had been implemented. Now that team_type
is implemented, add the num_images call that has the team argument.
Update the semantics tests for num_images.

Reviewed By: craig.rasmussen

Differential Revision: https://reviews.llvm.org/D126734

2 years ago[libc++] Find a clang-format everybody is happy with
Nikolas Klauser [Tue, 14 Jun 2022 18:09:03 +0000 (20:09 +0200)]
[libc++] Find a clang-format everybody is happy with

We decided that we want to use clang-format for libc++ but we haven't decided yet how the code should be formatted. We should probably discuss things on discord. This PR is mostly to show how the clang-format would look like and to commit to one once we decided on it. I'll remove the `<string>` diff when I commit this PR.

Reviewed By: ldionne

Spies: EricWF, dschuff, krytarowski, fedor.sergeev, aheejin, mstorsjo, phosek, abrachet, libcxx-commits, arichardson

Differential Revision: https://reviews.llvm.org/D124789

2 years ago[libc++] Use explicit module cache path in tests
Alex Brachet [Tue, 14 Jun 2022 18:06:59 +0000 (18:06 +0000)]
[libc++] Use explicit module cache path in tests

For reference, this test creates about 1.5G in the cache
directory. By default this will go to ~/.cache/clang/
which can fill up quick. This changes the test to put the
cache path in lit temp directories. Size considerations
aside it makes sense for tests to be hermetic and not
touch global system state.

Differential revision: https://reviews.llvm.org/D127587

2 years ago[MLIR][Presburger] Add values to PresburgerSpace
Groverkss [Tue, 14 Jun 2022 17:41:30 +0000 (23:11 +0530)]
[MLIR][Presburger] Add values to PresburgerSpace

This patch allows attaching user information, called "values" to each
identifier. The values are used to carry information along with variables and
are also used to determine if two variables are identical.

This patch is part of a series of patches to allow attaching user information
with variables in Presburger library.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D127347

2 years ago[NFC][libcxx] Check def of __LONG_DOUBLE_IEEE128__
David Tenty [Fri, 3 Jun 2022 20:33:53 +0000 (16:33 -0400)]
[NFC][libcxx] Check def of __LONG_DOUBLE_IEEE128__

Follow on to https://reviews.llvm.org/D108352, also check for the
definition of __LONG_DOUBLE_128__ before using it (because AIX doesn't
enable it by default).

Reviewed By: xingxue

Differential Revision: https://reviews.llvm.org/D127002

2 years ago[PS5] Use __gxx_personality_v0 for TSan
Paul Robinson [Tue, 14 Jun 2022 17:22:22 +0000 (10:22 -0700)]
[PS5] Use __gxx_personality_v0 for TSan

2 years ago[analyzer][NFC] Replace getLastArg with hasArg when applicable
Balazs Benics [Tue, 14 Jun 2022 17:28:44 +0000 (19:28 +0200)]
[analyzer][NFC] Replace getLastArg with hasArg when applicable

Depends on D126215.

2 years ago[CMake][compiler-rt] Provide a dedicated option for LLVM unwinder
Petr Hosek [Wed, 27 Apr 2022 06:23:53 +0000 (23:23 -0700)]
[CMake][compiler-rt] Provide a dedicated option for LLVM unwinder

This allows configuring LLVM unwinder separately from the C++ library
matching how we configure it in libcxx.

This also applies changes made to libunwind+libcxxabi+libcxx in D113253
to compiler-rt.

Differential Revision: https://reviews.llvm.org/D115674

2 years ago[libcxx][AIX] Enable ABI list checking for XCOFF
Jake Egan [Tue, 14 Jun 2022 17:15:46 +0000 (13:15 -0400)]
[libcxx][AIX] Enable ABI list checking for XCOFF

The existing nm extractors can't dump the loader symbol table information we need to do the ABI checks for XCOFF, so provide an implementation using the system dump utility. We match the symbol name, whether it's defined, it's import/export status, and its storage mapping class.

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D124165

2 years ago[analyzer][NFC] Remove unused ExprEngine::evalBinOp functions
Balazs Benics [Tue, 14 Jun 2022 17:15:20 +0000 (19:15 +0200)]
[analyzer][NFC] Remove unused ExprEngine::evalBinOp functions

Reviewed By: martong

Differential Revision: https://reviews.llvm.org/D127732

2 years ago[RISCV] Split out getEEWForLoadStore [nfc]
Philip Reames [Tue, 14 Jun 2022 17:07:56 +0000 (10:07 -0700)]
[RISCV] Split out getEEWForLoadStore [nfc]

Mostly about allowing reuse in an upcoming patch, but also makes the code slightly easier to follow.

2 years ago[analyzer][NFC] Substitute the SVal::evalMinus and evalComplement functions
Balazs Benics [Tue, 14 Jun 2022 16:56:43 +0000 (18:56 +0200)]
[analyzer][NFC] Substitute the SVal::evalMinus and evalComplement functions

Depends on D126127

Reviewed By: martong

Differential Revision: https://reviews.llvm.org/D127734

2 years ago[analyzer][NFC] Relocate unary transfer functions
Balazs Benics [Tue, 14 Jun 2022 16:56:43 +0000 (18:56 +0200)]
[analyzer][NFC] Relocate unary transfer functions

This is an initial step of removing the SimpleSValBuilder abstraction. The SValBuilder alone should be enough.

Reviewed By: martong

Differential Revision: https://reviews.llvm.org/D126127

2 years agoremove a duplicated include
Luboš Luňák [Tue, 14 Jun 2022 16:54:52 +0000 (18:54 +0200)]
remove a duplicated include

2 years ago[mlir] Add a generic data-flow analysis framework
Mogball [Mon, 13 Jun 2022 21:54:52 +0000 (21:54 +0000)]
[mlir] Add a generic data-flow analysis framework

This patch introduces a generic data-flow analysis framework to MLIR. The framework implements a fixed-point iteration algorithm and a dependency graph between lattice states and analysis. Lattice states and points are fully extensible to support highly-customizable analyses.

Reviewed By: phisiart, rriddle

Differential Revision: https://reviews.llvm.org/D126751

2 years agofreeze does not change the constant property
Danila Malyutin [Tue, 14 Jun 2022 14:32:15 +0000 (17:32 +0300)]
freeze does not change the constant property

Traverse through freeze when checking if base is constant

Differential Revision: https://reviews.llvm.org/D127744

2 years ago[PowerPC] Fix combine step for shufflevector.
Stefan Pintilie [Tue, 14 Jun 2022 14:27:03 +0000 (09:27 -0500)]
[PowerPC] Fix combine step for shufflevector.

The combine step for shufflevector will sometimes replace undef in the mask
with a defined value. This can cause an infinite loop in some cases as another
combine will then put the undef back in the mask.

This patch fixes the issue so that undefs are not replaced when doing a combine.

Reviewed By: ZarkoCA, amyk, quinnp, saghir

Differential Revision: https://reviews.llvm.org/D127439

2 years ago[mlir][linalg] Add named ops for depthwise 3d convolution
Benjamin Kramer [Mon, 13 Jun 2022 20:03:56 +0000 (22:03 +0200)]
[mlir][linalg] Add named ops for depthwise 3d convolution

Also complete the set by adding a variant of depthwise 1d convolution
with the multiplier != 1.

Differential Revision: https://reviews.llvm.org/D127687

2 years ago[clang] AST/Print: honor AlwaysIncludeTypeForTemplateArgument policy
Matheus Izvekov [Sun, 29 May 2022 23:22:23 +0000 (01:22 +0200)]
[clang] AST/Print: honor AlwaysIncludeTypeForTemplateArgument policy

This redoes D103040 in a way that `AlwaysIncludeTypeForTemplateArgument = false`
policy is honored for printing template specialization types.
This can be seen for example when printing a canonicalized
dependent TemplateSpecializationType which has integral arguments.

Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>
Reviewed By: v.g.vassilev

Differential Revision: https://reviews.llvm.org/D126620

2 years ago[AMDGPU] Regenerate MIR checks for image instructions
Jay Foad [Tue, 14 Jun 2022 16:00:13 +0000 (17:00 +0100)]
[AMDGPU] Regenerate MIR checks for image instructions

2 years ago[mlir] fix compiler error due to commit landing race
Alex Zinenko [Tue, 14 Jun 2022 16:04:00 +0000 (18:04 +0200)]
[mlir] fix compiler error due to commit landing race

2 years ago[mlir] Introduce transform.alternatives op
Alex Zinenko [Tue, 14 Jun 2022 15:49:47 +0000 (17:49 +0200)]
[mlir] Introduce transform.alternatives op

Introduce a transform dialect op that allows one to attempt different
transformation sequences on the same piece of payload IR until one of them
succeeds. This op fundamentally expands the scope of possibilities in the
transform dialect that, until now, could only propagate transformation failure,
at least using in-tree operations. This requires a more detailed specification
of the execution model for the transform dialect that now indicates how failure
is handled and propagated.

Transformations described by transform operations now have tri-state results,
with some errors being fundamentally irrecoverable (e.g., generating malformed
IR) and some others being recoverable by containing ops. Existing transform ops
directly implementing the `apply` interface method are updated to produce this
directly. Transform ops with the `TransformEachTransformOpTrait` are currently
considered to produce only irrecoverable failures and will be updated
separately.

Reviewed By: springerm

Differential Revision: https://reviews.llvm.org/D127724

2 years ago[InstCombine] add tests for sub with extended operands; NFC
Sanjay Patel [Mon, 13 Jun 2022 17:38:46 +0000 (13:38 -0400)]
[InstCombine] add tests for sub with extended operands; NFC

2 years ago[inliner] Add per-SCC-pass InlineAdvisor printing option
Jin Xin Ng [Tue, 14 Jun 2022 14:52:36 +0000 (07:52 -0700)]
[inliner] Add per-SCC-pass InlineAdvisor printing option

Adds option to print the contents of the Inline Advisor after each SCC Inliner pass

Reviewed By: mtrofin

Differential Revision: https://reviews.llvm.org/D127689

2 years ago[libc] Guard common macro names
Alex Brachet [Tue, 14 Jun 2022 15:05:16 +0000 (15:05 +0000)]
[libc] Guard common macro names

Differential revision: https://reviews.llvm.org/D127692

2 years ago[NFC] Remove unused function parameter
Serge Pavlov [Tue, 14 Jun 2022 05:25:35 +0000 (12:25 +0700)]
[NFC] Remove unused function parameter

2 years ago[RISCV] simplify emitVSETVLIs handling of vsetvli xN, phi(), vtype case [NFC]
Philip Reames [Tue, 14 Jun 2022 14:45:40 +0000 (07:45 -0700)]
[RISCV] simplify emitVSETVLIs handling of vsetvli xN, phi(), vtype case [NFC]

This is possibly somewhat subjective, but having an explicitly named flag to track the property required and code structure that more closely matches phase 1/2 of the dataflow seems much easier to read.

Differential Revision: https://reviews.llvm.org/D126893

2 years ago[Diagnostics] Fix inconsistent shift-overflow warnings in C++20
Shivam Gupta [Tue, 14 Jun 2022 12:29:13 +0000 (17:59 +0530)]
[Diagnostics] Fix inconsistent shift-overflow warnings in C++20

This fixes https://github.com/llvm/llvm-project/issues/52873.
Don't warn in C++2A mode (and newer), as signed left shifts
always wrap and never overflow. Ref. -
https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p1236r1.html.

2 years ago[Libomptarget] Add test config for compiling in LTO-mode
Joseph Huber [Fri, 10 Jun 2022 16:30:19 +0000 (12:30 -0400)]
[Libomptarget] Add test config for compiling in LTO-mode

We are planning on making LTO the default compilation mode for
offloading. In order to make sure it works we should run these tests on
the test suite. AMDGPU already uses the LTO compilation path for its
linking, but in LTO mode it also links the static library late.

Performing LTO requires the static library to be built, if we make the
change this will be a hard requirement and the old bitcode library will
go away. This means users will need to use either a two-step build or a
runtimes build for libomptarget.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D127512

2 years ago[flang] Avoid losing type parameter information
Valentin Clement [Tue, 14 Jun 2022 13:57:24 +0000 (15:57 +0200)]
[flang] Avoid losing type parameter information

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D127738

Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
2 years agoAdd __config formatting to .git-blame-ignore-revs
Louis Dionne [Tue, 14 Jun 2022 13:52:49 +0000 (09:52 -0400)]
Add __config formatting to .git-blame-ignore-revs

2 years ago[lld-macho] Print the name of functions containing undefined references
Daniel Bertalan [Tue, 14 Jun 2022 13:41:28 +0000 (09:41 -0400)]
[lld-macho] Print the name of functions containing undefined references

The error used to look like this:

  ld64.lld: error: undefined symbol: _foo
  >>> referenced by /path/to/bar.o

Now it displays the name of the function that contains the undefined
reference as well:

  ld64.lld: error: undefined symbol: _foo
  >>> referenced by /path/to/bar.o:(symbol _baz+0x4)

Differential Revision: https://reviews.llvm.org/D127696

2 years ago[NFC][Thumb] Update frame-chain codegen test to use thumbv6m
Lucas Prates [Tue, 14 Jun 2022 13:16:38 +0000 (14:16 +0100)]
[NFC][Thumb] Update frame-chain codegen test to use thumbv6m

The `llvm/test/CodeGen/Thumb/frame-chain.ll`, recently added by D125094,
currently fails when expensive checks are enabled due to a tMOVr
instruction that is only valid from V6 onwards.

The use of the invalid instruction is unrelated to the contents of the
original patch, and continues to be triggered by this test if its
CodeGen changes are reverted, so this patch updates the test to use V6-M
while the issue is not resolved.