platform/kernel/linux-starfive.git
3 years agodrm/i915/ehl: Remove require_force_probe protection
Tejas Upadhyay [Tue, 29 Jun 2021 10:49:54 +0000 (16:19 +0530)]
drm/i915/ehl: Remove require_force_probe protection

Removing force probe protection from EHL platform. Did
not observe warnings, errors, flickering or any visual
defects while doing ordinary tasks like browsing and
editing documents in a two monitor setup.

For more info drm-tip idle run results :
https://intel-gfx-ci.01.org/tree/drm-tip/drmtip.html?

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210629104954.927151-1-tejaskumarx.surendrakumar.upadhyay@intel.com
3 years agodrm/i915/jsl: Remove require_force_probe protection
Tejas Upadhyay [Tue, 29 Jun 2021 10:53:56 +0000 (16:23 +0530)]
drm/i915/jsl: Remove require_force_probe protection

Removing force probe protection from JSL platform. Did
not observe warnings, errors, flickering or any visual
defects while doing ordinary tasks like browsing and
editing documents in a two monitor setup.

For more info drm-tip idle run results :
https://intel-gfx-ci.01.org/tree/drm-tip/drmtip.html?

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210629105356.927359-1-tejaskumarx.surendrakumar.upadhyay@intel.com
3 years agodrm/i915/display: use max_level to control loop
Lucas De Marchi [Tue, 22 Jun 2021 21:22:10 +0000 (14:22 -0700)]
drm/i915/display: use max_level to control loop

Since we are already loop through the levels to sanitize them, mark what
is the real max_level so it can be used in subsequent loop. This makes
it simpler to later add the adjustment latency to "valid levels". No
change in behavior, just makes the code easier to follow.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210622212210.3746133-2-lucas.demarchi@intel.com
3 years agodrm/i915/display: fix level 0 adjustement on display ver >= 12
Lucas De Marchi [Tue, 22 Jun 2021 21:22:09 +0000 (14:22 -0700)]
drm/i915/display: fix level 0 adjustement on display ver >= 12

We should no longer increment level 0 by 1usec when we have 16Gb DIMMs.
Instead spec says to add 3usec (as opposed to 2) to each valid level
when punit replies 0 to level 0.

So set wm_lv_0_adjust_needed to false for DISPLAY_VER() >= 12 and set
the proper adjustment value when handling WaWmMemoryReadLatency.

Bspec: 49326, 4381
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210622212210.3746133-1-lucas.demarchi@intel.com
3 years agodrm/i915/display/adl_p: Implement Wa_16011303918
José Roberto de Souza [Wed, 16 Jun 2021 20:31:57 +0000 (13:31 -0700)]
drm/i915/display/adl_p: Implement Wa_16011303918

PSR2 is not compatible with DC3CO or VRR in this stepping, so not
enabling PSR2 if VRR will be enabled or not enabling DC3CO if PSR2 is
possible.

BSpec: 54369
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210616203158.118111-5-jose.souza@intel.com
3 years agodrm/i915/xelpd: Handle PSR2 SDP indication in the prior scanline
José Roberto de Souza [Wed, 16 Jun 2021 20:31:56 +0000 (13:31 -0700)]
drm/i915/xelpd: Handle PSR2 SDP indication in the prior scanline

In some modes there is not enough time during hblank to transmit PSR2
SDP plus the pixels CRC SDP, if such case happens PSR2 needs to be
disabled.
But eDP spec 1.4b allows to transmit PSR2 SDP in a prior scanline
alone and than later the CRC SDP, allowing PSR2 to be enabled in
those hblank constrained modes.

BSpec: 49274
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210616203158.118111-4-jose.souza@intel.com
3 years agodrm/i915/display/adl_p: Implement Wa_16011168373
José Roberto de Souza [Wed, 16 Jun 2021 20:31:55 +0000 (13:31 -0700)]
drm/i915/display/adl_p: Implement Wa_16011168373

Another WA that is required for PSR2.

BSpec: 54369
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210616203158.118111-3-jose.souza@intel.com
3 years agodrm/i915/display/adl_p: Implement Wa_22012278275
José Roberto de Souza [Wed, 16 Jun 2021 20:31:54 +0000 (13:31 -0700)]
drm/i915/display/adl_p: Implement Wa_22012278275

The PSR2_CTL io buffer wake and fast wake values do not match
expected in pre production hardware, so here adding a table that
matches with HW to program it with values that HW expect.

Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210616203158.118111-2-jose.souza@intel.com
3 years agodrm/i915/display/psr: Handle SU Y granularity
José Roberto de Souza [Wed, 16 Jun 2021 20:31:53 +0000 (13:31 -0700)]
drm/i915/display/psr: Handle SU Y granularity

We were only handling X and width granularity, what was causing issues
when sink had a granularity different than 4.

While at it, renaming su_x_granularity to su_w_granularity to better
match reality.

Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210616203158.118111-1-jose.souza@intel.com
3 years agodrm/i915: s/intel_crtc/crtc/
Ville Syrjälä [Wed, 9 Jun 2021 08:56:32 +0000 (11:56 +0300)]
drm/i915: s/intel_crtc/crtc/

Clear out the straggler 'intel_crtc' variables.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210609085632.22026-7-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
3 years agodrm/i915: Clean up intel_fbdev_init_bios() a bit
Ville Syrjälä [Wed, 9 Jun 2021 08:56:31 +0000 (11:56 +0300)]
drm/i915: Clean up intel_fbdev_init_bios() a bit

Sort out the mess with the local variables in
intel_fbdev_init_bios(). Get rid of all aliasing pointers,
use standard naming/types, and introduce a few more locals
in the loops to avoid the hard to read long struct walks.

While at we also polish the debugs a bit to use the
canonical [CRTC:%d:%s] style.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210609085632.22026-6-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
3 years agodrm/i915: Clean up pre-skl wm calling convention
Ville Syrjälä [Wed, 9 Jun 2021 08:56:30 +0000 (11:56 +0300)]
drm/i915: Clean up pre-skl wm calling convention

Just pass the full atomic state+crtc to the pre-skl watermark
functions, and clean up the types/variable names around the area.

Note that having both .compute_pipe_wm() and .compute_intermediate_wm()
is entirely redundant now. We could unify them to a single vfunc.
But let's do this one step at a time.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210609085632.22026-5-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
3 years agodrm/i915: Clean up intel_find_initial_plane_obj() a bit
Ville Syrjälä [Wed, 9 Jun 2021 08:56:29 +0000 (11:56 +0300)]
drm/i915: Clean up intel_find_initial_plane_obj() a bit

Sort out the mess with the local variables in
intel_find_initial_plane_obj(). Get rid of all aliasing pointers
and use standard naming/types.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210609085632.22026-4-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
3 years agodrm/i915: Clean up intel_get_load_detect_pipe() a bit
Ville Syrjälä [Wed, 9 Jun 2021 08:56:28 +0000 (11:56 +0300)]
drm/i915: Clean up intel_get_load_detect_pipe() a bit

Sort out the mess with the local variables in
intel_get_load_detect_pipe(). Get rid of all aliasing pointers
and use standard naming/types.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210609085632.22026-3-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
3 years agodrm/i915: Stop hand rolling drm_crtc_mask()
Ville Syrjälä [Wed, 9 Jun 2021 08:56:27 +0000 (11:56 +0300)]
drm/i915: Stop hand rolling drm_crtc_mask()

Use drm_crtc_mask() instead of hand rolling it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210609085632.22026-2-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
3 years agodrm/i915/fbc: Allocate llb before cfb
Ville Syrjälä [Thu, 10 Jun 2021 18:32:37 +0000 (21:32 +0300)]
drm/i915/fbc: Allocate llb before cfb

Since the llb allocation has a fixed size, let's grab it before
the potentially variable sized cfb. That should avoid some allocation
failure cases once we allow different compression ratios for FBC1.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-10-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
3 years agodrm/i915/fbc: Make the cfb allocation loop a bit more legible
Ville Syrjälä [Thu, 10 Jun 2021 18:32:36 +0000 (21:32 +0300)]
drm/i915/fbc: Make the cfb allocation loop a bit more legible

Write the cfb allocation loop as an actual loop instead of some
hard to read goto thing.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-9-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
3 years agodrm/i915/fbc: Extract intel_fbc_stolen_end()
Ville Syrjälä [Thu, 10 Jun 2021 18:32:35 +0000 (21:32 +0300)]
drm/i915/fbc: Extract intel_fbc_stolen_end()

Declutter find_compression_limit() a bit by extracting
intel_fbc_stolen_end().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-8-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
3 years agodrm/i915/fbc: Introduce g4x_dpfc_ctl_limit()
Ville Syrjälä [Thu, 10 Jun 2021 18:32:34 +0000 (21:32 +0300)]
drm/i915/fbc: Introduce g4x_dpfc_ctl_limit()

Exctract the limit->register value conversion into a common
helper.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-7-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
3 years agodrm/i915/fbc: Handle 16bpp compression limit better
Ville Syrjälä [Thu, 10 Jun 2021 18:32:33 +0000 (21:32 +0300)]
drm/i915/fbc: Handle 16bpp compression limit better

The limit++ for the 16bpp case is nonsense since the
compression limit is always supposed to be power of two.
Replace it with <<=1.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-6-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
3 years agodrm/i915/fbc: Don't pass around the mm node
Ville Syrjälä [Thu, 10 Jun 2021 18:32:32 +0000 (21:32 +0300)]
drm/i915/fbc: Don't pass around the mm node

No point in passing the mm node explicitly to find_compression_limit()
since it's always the same node for the cfb.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-5-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
3 years agodrm/i915/fbc: Embed the compressed_llb node
Ville Syrjälä [Thu, 10 Jun 2021 18:32:31 +0000 (21:32 +0300)]
drm/i915/fbc: Embed the compressed_llb node

Not much point in dynamically allocating the line length
buffer mm node that I can see. Just embed it directly like
we do the for the cfb node. One less failure point to worry
about.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-4-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
3 years agodrm/i915/fbc: Extract intel_fbc_program_cfb()
Ville Syrjälä [Thu, 10 Jun 2021 18:32:30 +0000 (21:32 +0300)]
drm/i915/fbc: Extract intel_fbc_program_cfb()

Extract the CFB (+LLB) programming into a separate function.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-3-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
3 years agodrm/i915/fbc: s/threshold/limit/
Ville Syrjälä [Thu, 10 Jun 2021 18:32:29 +0000 (21:32 +0300)]
drm/i915/fbc: s/threshold/limit/

Let's call the compression limit the limit.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-2-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
3 years agodrm/i915: Add the missing adls vswing tables
Ville Syrjälä [Tue, 8 Jun 2021 07:36:03 +0000 (10:36 +0300)]
drm/i915: Add the missing adls vswing tables

adls is supposed to use special buf trans tables. Add what's
missing.

v2: Drop the RBR/HBR table since it's the same as for tgl

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-18-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
3 years agodrm/i915: Nuke buf_trans hdmi functions
Ville Syrjälä [Tue, 8 Jun 2021 07:36:02 +0000 (10:36 +0300)]
drm/i915: Nuke buf_trans hdmi functions

All the foo_get_buf_trans_hdmi() functions just return a single table.
Remove the pointless wrappers.

v2: Handle adl-p

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-17-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
3 years agodrm/i915: Clean up jsl/ehl buf trans functions
Ville Syrjälä [Tue, 8 Jun 2021 07:36:01 +0000 (10:36 +0300)]
drm/i915: Clean up jsl/ehl buf trans functions

The jsl/ehl buf trans functions are needlessly complicated.
Simplify them.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-16-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
3 years agodrm/i915: Fix ehl edp hbr2 vswing table
Ville Syrjälä [Tue, 8 Jun 2021 07:36:00 +0000 (10:36 +0300)]
drm/i915: Fix ehl edp hbr2 vswing table

EHL is supposed to use special buf trans values for eDP HBR2+.
Add such a table.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-15-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
3 years agodrm/i915: keep backlight_enable on until turn eDP display off
Lee Shawn C [Thu, 24 Jun 2021 05:39:32 +0000 (13:39 +0800)]
drm/i915: keep backlight_enable on until turn eDP display off

This workaround is specific for a particular panel on Google
chromebook project. When user space daemon enter idle state.
It request adjust brightness to 0, turn backlight_enable signal
off and keep eDP main link active.

On general LCD, this behavior might not be a problem.
But on this panel, its tcon would expect source to execute
full eDP power off sequence after drop backlight_enable signal.
Without eDP power off sequence. Even source try to turn
backlight_enable signal on and restore proper brightness level.
This panel is not able to light on again.

This WA ignored the request from user space daemon to disable
backlight_enable signal and keep it on always. When user space
request kernel to turn eDP display off, kernel driver still
can control backlight_enable signal properly. It would not
impact standard eDP power off sequence.

v2: 1. modify the quirk name and debug messages.
    2. unregister backlight.power callback for specific device.
v3: 1. modify debug output messages.
    2. use DMI_EXACT_MATCH instead of DMI_MATCH.

Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210624053932.21037-1-shawn.c.lee@intel.com
3 years agodrm/i915: Deduplicate icl DP HBR2 vs. eDP HBR3 table
Ville Syrjälä [Tue, 8 Jun 2021 07:35:59 +0000 (10:35 +0300)]
drm/i915: Deduplicate icl DP HBR2 vs. eDP HBR3 table

The icl combo phy DP HBR2 is identical to the eDP HBR3 table.
Get rid of one redundant copy.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-14-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
3 years agodrm/i915: Fix dg1 buf trans tables
Ville Syrjälä [Tue, 8 Jun 2021 07:35:58 +0000 (10:35 +0300)]
drm/i915: Fix dg1 buf trans tables

For some reason the dg1 buf trans tables have been stuffed into
icl_get_combo_buf_trans_edp() which doesn't even get called
on dg1. Split them out into a proper dg1 specific function,
and also make sure we use the proper buf trans tables for
DP as well as eDP.

v2: Add the hobl stuff

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-13-ville.syrjala@linux.intel.com
3 years agodrm/i915: Introduce rkl_get_combo_buf_trans()
Ville Syrjälä [Tue, 8 Jun 2021 07:35:57 +0000 (10:35 +0300)]
drm/i915: Introduce rkl_get_combo_buf_trans()

Give RKL its own get_buf_trans() func.

v2: Drop the FIXME since the spec was clarified to
    indicate that TGL values are used for the HDMI/eDP cases.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-12-ville.syrjala@linux.intel.com
3 years agodrm/i915: Clean up hsw/bdw/skl/kbl buf trans funcs
Ville Syrjälä [Tue, 8 Jun 2021 07:35:56 +0000 (10:35 +0300)]
drm/i915: Clean up hsw/bdw/skl/kbl buf trans funcs

Split the hsw/bdw/skl/kbl get_buf_trans() functions into
clean platform specific variants.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-11-ville.syrjala@linux.intel.com
3 years agodrm/i915: Introduce encoder->get_buf_trans()
Ville Syrjälä [Tue, 8 Jun 2021 07:35:55 +0000 (10:35 +0300)]
drm/i915: Introduce encoder->get_buf_trans()

Convert the get_buf_trans() functions into an encoder vfunc.
Allows us to get rid of bunch of platform if-ladders.

v2: Handle adl-p

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-10-ville.syrjala@linux.intel.com
3 years agodrm/i915: Store the HDMI default entry in the bug trans struct
Ville Syrjälä [Tue, 8 Jun 2021 07:35:54 +0000 (10:35 +0300)]
drm/i915: Store the HDMI default entry in the bug trans struct

Store the default HDMI buf trans entry in struct intel_ddi_buf_trans
so that it's next to the actual table. This let's us start ridding
ourselves of some platofrm specifics in intel_ddi_hdmi_num_entries().

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-9-ville.syrjala@linux.intel.com
3 years agodrm/i915; Return the whole buf_trans struct from get_buf_trans()
Ville Syrjälä [Tue, 8 Jun 2021 07:35:53 +0000 (10:35 +0300)]
drm/i915; Return the whole buf_trans struct from get_buf_trans()

Raise the abstraction level of the get_buf_trans() functions
a bit more by returning the whole wrapper intel_ddi_buf_trans
struct.

v2: Handle adl-p

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-8-ville.syrjala@linux.intel.com
3 years agodrm/i915: Introduce intel_get_buf_trans()
Ville Syrjälä [Tue, 8 Jun 2021 07:35:52 +0000 (10:35 +0300)]
drm/i915: Introduce intel_get_buf_trans()

Add a small helper to get the buf trans entris+num_entries
from the struct. Should avoid copy-paste errors in the
platform specific get_buf_trans() functions.

@@
identifier T, N;
@@
- *N = T.num_entries;
- return T.entries;
+ return intel_get_buf_trans(&T, N);

@@
@@
is_hobl_buf_trans(...) { ... }
+
+ static const union intel_ddi_buf_trans_entry *
+ intel_get_buf_trans(const struct intel_ddi_buf_trans *ddi_translations, int *num_entries)
+ {
+ *num_entries = ddi_translations->num_entries;
+ return ddi_translations->entries;
+ }

v2: Handle adl-p

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-7-ville.syrjala@linux.intel.com
3 years agodrm/i915: Wrap the buf trans tables into a struct
Ville Syrjälä [Tue, 8 Jun 2021 07:35:51 +0000 (10:35 +0300)]
drm/i915: Wrap the buf trans tables into a struct

Put a wrapper struct around the buf trans tables so that
we can declare the number of entries and default HDMI entry
alongside the table.

@wrap@
identifier old =~ "^.*translations.*";
fresh identifier new = "_" ## old;
type T;
@@
<...
static const T
- old
+ new
[] = {
       ...
};
+
+ static const struct intel_ddi_buf_trans old = {
+  .entries = new,
+  .num_entries = ARRAY_SIZE(new),
+ };
...>

@@
identifier wrap.old;
@@
(
- ARRAY_SIZE(old)
+ old.num_entries
|
- old
+ old.entries
)

@@
@@
union intel_ddi_buf_trans_entry {
...
};
+
+struct intel_ddi_buf_trans {
+       const union intel_ddi_buf_trans_entry *entries;
+       u8 num_entries;
+};

v2: Handle adl-p

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-6-ville.syrjala@linux.intel.com
3 years agodrm/i915: Rename dkl phy buf trans tables
Ville Syrjälä [Tue, 8 Jun 2021 07:35:50 +0000 (10:35 +0300)]
drm/i915: Rename dkl phy buf trans tables

Rename the dkl phy buf trans tables to follow the same
naming pattern used by everyone else.

v2: Handle adl-p

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-5-ville.syrjala@linux.intel.com
3 years agodrm/i915: Wrap the platform specific buf trans structs into a union
Ville Syrjälä [Tue, 8 Jun 2021 07:35:49 +0000 (10:35 +0300)]
drm/i915: Wrap the platform specific buf trans structs into a union

In order to abstact the buf trans stuff let's wrap the platform
specific structs into a union.

v2: Handle adl-p

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-4-ville.syrjala@linux.intel.com
3 years agodrm/i915: Introduce hsw_get_buf_trans()
Ville Syrjälä [Tue, 8 Jun 2021 07:35:48 +0000 (10:35 +0300)]
drm/i915: Introduce hsw_get_buf_trans()

All the other platforms handle the output_type stuff in their
*_get_buf_trans() functions. Do the same for hsw/bdw/skl.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-3-ville.syrjala@linux.intel.com
3 years agodrm/i915: s/intel/hsw/ for hsw/bdw/skl buf trans
Ville Syrjälä [Tue, 8 Jun 2021 07:35:47 +0000 (10:35 +0300)]
drm/i915: s/intel/hsw/ for hsw/bdw/skl buf trans

Give the hsw/bdw/skl buf trans stuff a better namespace.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-2-ville.syrjala@linux.intel.com
3 years agodrm/i915/dsc: abstract helpers to get bigjoiner primary/secondary crtc
Jani Nikula [Thu, 10 Jun 2021 09:05:28 +0000 (12:05 +0300)]
drm/i915/dsc: abstract helpers to get bigjoiner primary/secondary crtc

Add a single point of truth for figuring out the primary/secondary crtc
for bigjoiner instead of duplicating the magic pipe +/- 1 in multiple
places.

Also fix the pipe validity checks to properly take non-contiguous pipes
into account. The current checks may theoretically overflow
i915->pipe_to_crtc_mapping[pipe], albeit with a warning, due to fused
off pipes, as INTEL_NUM_PIPES() returns the actual number of pipes on
the platform, and the check is for INTEL_NUM_PIPES() == pipe + 1.

Prefer primary/secondary terminology going forward.

v2:
- Improved abstractions for pipe validity etc.

Fixes: 8a029c113b17 ("drm/i915/dp: Modify VDSC helpers to configure DSC for Bigjoiner slave")
Fixes: d961eb20adb6 ("drm/i915/bigjoiner: atomic commit changes for uncompressed joiner")
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: Manasi Navare <manasi.dl.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210610090528.20511-1-jani.nikula@intel.com
3 years agodrm/i915/adl_p: Load DMC
Anusha Srivatsa [Mon, 21 Jun 2021 19:14:15 +0000 (12:14 -0700)]
drm/i915/adl_p: Load DMC

Load DMC v2.10 on ADLP. The release notes mention that
this version enables few power savings features.

v2: Add DMC_PATH() for ADLP (Lucas)

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Clint Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210621191415.29823-5-anusha.srivatsa@intel.com
3 years agodrm/i915/adl_p: Pipe B DMC Support
Anusha Srivatsa [Mon, 21 Jun 2021 19:14:14 +0000 (12:14 -0700)]
drm/i915/adl_p: Pipe B DMC Support

ADLP requires us to load both Pipe A and Pipe B.
Plug Pipe B loading support.

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210621191415.29823-4-anusha.srivatsa@intel.com
3 years agodrm/i915/xelpd: Pipe A DMC plugging
Anusha Srivatsa [Mon, 21 Jun 2021 19:14:13 +0000 (12:14 -0700)]
drm/i915/xelpd: Pipe A DMC plugging

This patch adds Pipe A plumbing to the already
existing parsing and loading functions which is
taken care of in the prep patches. Adding MAX_DMC_FW
to keep track for both Main and Pipe A DMC while loading
the respective blobs.

Also adding present field in dmc_info.
s/find_dmc_fw_offset/csr_set_dmc_fw_offset. While at it add
fw_info_matches_stepping() helper. CSR_PROGRAM() should now
take the starting address of the particular blob (Main or Pipe)
and not hardcode it.

v2: Add dmc_offset and start_mmioaddr fields for dmc_info struct.

v3: Add a missing corner cases of stepping-substepping combination in
fw_info_matches_stepping() helper.

v4: Add macro for start_mmioaddr for V1 package. Simplify code
in dmc_set_fw_offset (Lucas)

Cc: Souza, Jose <jose.souza@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210621191415.29823-3-anusha.srivatsa@intel.com
3 years agodrm/i915/dmc: Introduce DMC_FW_MAIN
Anusha Srivatsa [Mon, 21 Jun 2021 19:14:12 +0000 (12:14 -0700)]
drm/i915/dmc: Introduce DMC_FW_MAIN

This is a prep patch for Pipe DMC plugging.

Add dmc_info struct in intel_dmc to have all common fields
shared between all DMC's in the package.
Add DMC_FW_MAIN(dmc_id 0) to refer to the blob.

v2: Remove dmc_offset and start_mmioaddr from dmc_info struct (Jose)

Cc: Souza, Jose <jose.souza@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210621191415.29823-2-anusha.srivatsa@intel.com
3 years agodrm/i915/display: Do not zero past infoframes.vsc
Kees Cook [Thu, 17 Jun 2021 21:33:01 +0000 (14:33 -0700)]
drm/i915/display: Do not zero past infoframes.vsc

intel_dp_vsc_sdp_unpack() was using a memset() size (36, struct dp_sdp)
larger than the destination (24, struct drm_dp_vsc_sdp), clobbering
fields in struct intel_crtc_state after infoframes.vsc. Use the actual
target size for the memset().

Fixes: 1b404b7dbb10 ("drm/i915/dp: Read out DP SDPs")
Cc: stable@vger.kernel.org
Signed-off-by: Kees Cook <keescook@chromium.org>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210617213301.1824728-1-keescook@chromium.org
3 years agodrm/i915: Force a TypeC PHY disconnect during suspend/shutdown
Imre Deak [Thu, 10 Jun 2021 17:42:23 +0000 (20:42 +0300)]
drm/i915: Force a TypeC PHY disconnect during suspend/shutdown

Disconnect TypeC PHYs during system suspend and shutdown, even with the
corresponding TypeC sink still plugged to its connector, since leaving
the PHY connected causes havoc at least during system resume in the
presence of an Nvidia card.

Note that this will only make a difference in the TypeC DP alternate
mode, since in Thunderbolt alternate mode the PHY is never owned by the
display engine and there is no notion of PHY ownership in legacy mode
(the display engine being the only possible owner in that mode and the
TypeC subsystem not having anything to do with the port in that case).

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3500
Reported-and-tested-by: Chris Chiu <chris.chiu@canonical.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210610174223.605904-1-imre.deak@intel.com
3 years agodrm/i915/jsl: Add W/A 1409054076 for JSL
Tejas Upadhyay [Tue, 15 Jun 2021 10:56:13 +0000 (16:26 +0530)]
drm/i915/jsl: Add W/A 1409054076 for JSL

When pipe A is disabled and MIPI DSI is enabled on pipe B,
the AMT KVMR feature will incorrectly see pipe A as enabled.
Set 0x42080 bit 23=1 before enabling DSI on pipe B and leave
it set while DSI is enabled on pipe B. No impact to setting
it all the time.

Changes since V5:
- Added reviewed-by
- Removed redundant braces and debug message format - Imre
Changes since V4:
        - Modified function comment Wa_<number>:icl,jsl,ehl - Lucas
        - Modified debug message in sync state - Imre
Changes since V3:
        - More meaningful name to workaround - Imre
        - Remove boolean check clear flag
        - Add WA_verify hook in dsi sync_state
Changes since V2:
        - Used REG_BIT, ignored pipe A and used sw state check - Jani
        - Made function wrapper - Jani
Changes since V1:
        - ./dim checkpatch errors addressed

Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210615105613.851491-1-tejaskumarx.surendrakumar.upadhyay@intel.com
3 years agodrm/i915/xelpd: break feature inheritance
Lucas De Marchi [Sat, 12 Jun 2021 05:35:31 +0000 (22:35 -0700)]
drm/i915/xelpd: break feature inheritance

It's becoming pretty cumbersome to track the features enabled going back
to GEN7. Gather the XE_LPD display features together in XE_LPD_FEATURES
macro so they are sufficient to describe the display features.

In ADL-P's device_info we set has_psr_hw_tracking to 0 as it would
otherwise be enabled since it is inheriting from GEN12_FEATURES.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210612053531.1870920-1-lucas.demarchi@intel.com
3 years agoRevert "drm/i915/display: Drop FIXME about turn off infoframes"
José Roberto de Souza [Thu, 10 Jun 2021 19:45:27 +0000 (12:45 -0700)]
Revert "drm/i915/display: Drop FIXME about turn off infoframes"

Looks this FIXME is still valid as we need a way to tell LSPCON to
stop sending infoframes, so reverting it.

This reverts commit 3f409e4cd579b287a6c41d017e62c392f7997193.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210610194527.84997-1-jose.souza@intel.com
3 years agodrm/i915: apply WaEnableVGAAccessThroughIOPort as needed
Emil Velikov [Fri, 4 Jun 2021 15:49:05 +0000 (16:49 +0100)]
drm/i915: apply WaEnableVGAAccessThroughIOPort as needed

Currently as the workaround is applied the screen flickers. As a result
we do not achieve seamless boot experience.

Avoiding the issue in the common use-case might be hard, although we can
resolve it for dual GPU setups - when the "other" GPU is primary and/or
outputs are connected to it.

With this I was able to get seamless experience on my Intel/Nvidia box,
running systemd-boot and sddm/Xorg. Note that the i915 driver is within
initrd while the Nvidia one is not.

Without this patch, the splash presented by systemd-boot (UEFI BGRT) is
torn down as the code-path kicks in, leaving the monitor blank until the
login manager starts.

Same issue were reported with plymouth/grub, although personally I
wasn't able to get them to behave on my setup.

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210604154905.660142-1-emil.l.velikov@gmail.com
3 years agodrm/i915/adl_p: Same slices mask is not same Dbuf state
Stanislav Lisovskiy [Thu, 27 May 2021 11:01:06 +0000 (14:01 +0300)]
drm/i915/adl_p: Same slices mask is not same Dbuf state

We currently treat same slice mask as a same DBuf state and skip
updating the Dbuf slices, if we detect that.
This is wrong as if we have a multi to single pipe change or
vice versa, that would be treated as a same Dbuf state and thus
no changes required, so we don't get Mbus updated, causing issues.
Solution: check also mbus_join, in addition to slices mask.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210527110106.21434-1-stanislav.lisovskiy@intel.com
3 years agodrm/i915/adl_p: CDCLK crawl support for ADL
Stanislav Lisovskiy [Thu, 3 Jun 2021 06:50:38 +0000 (09:50 +0300)]
drm/i915/adl_p: CDCLK crawl support for ADL

CDCLK crawl feature allows to change CDCLK frequency
without disabling the actual PLL and doesn't require
a full modeset.

v2: - Added has_cdclk_crawl as a feature flag to
      intel_device_info(Matt Roper)
    - s/gen13_cdclk_pll_crawl/adlp_cdclk_pll_crawl/
      (Matt Roper)

Cc: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210603065038.7298-1-stanislav.lisovskiy@intel.com
3 years agodrm/i915/dsc: Fix bigjoiner check in dsc_disable
Vandita Kulkarni [Wed, 9 Jun 2021 06:59:14 +0000 (12:29 +0530)]
drm/i915/dsc: Fix bigjoiner check in dsc_disable

This change takes care of resetting the dss_ctl registers
in case of dsc_disable, bigjoiner disable and also
uncompressed joiner disable.

v2: Fix formatting
v3: Fix the typo (Mansi)

Suggested-by: Jani Nikula <jani.nikula@intel.com>
Fixes: d961eb20adb6 ("drm/i915/bigjoiner: atomic commit changes for uncompressed joiner")
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3537
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210609065914.4454-1-vandita.kulkarni@intel.com
3 years agodrm/i915: Disable PSR around cdclk changes
Ville Syrjälä [Tue, 8 Jun 2021 08:54:15 +0000 (11:54 +0300)]
drm/i915: Disable PSR around cdclk changes

AUX logic is often clocked from cdclk. Disable PSR to make sure
there are no hw initiated AUX transactions in flight while we
change the cdclk frequency.

Cc: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608085415.515342-2-gwan-gyeong.mun@intel.com
3 years agodrm/i915/display: Introduce new intel_psr_pause/resume function
Gwan-gyeong Mun [Tue, 8 Jun 2021 08:54:14 +0000 (11:54 +0300)]
drm/i915/display: Introduce new intel_psr_pause/resume function

This introduces the following function that can exit and activate a psr
source when intel_psr is already enabled.

- intel_psr_pause(): Pause current PSR. It deactivates current psr state.
- intel_psr_resume(): Resume paused PSR. It activates paused psr state.

v2: Address Jose's review comment.
  - Remove unneeded changes around the intel_psr_enable().
  - Add intel_psr_post_exit() which processes waiting until PSR is idle
    and WA for SelectiveFetch.
v3: Address Jose's review comment.
  - Rename intel_psr_post_exit() to intel_psr_wait_exit_locked().
  - Move WA_1408330847 to intel_psr_disable_locked()
  - If the PSR is paused by an explicit intel_psr_paused() call, make the
    intel_psr_flush() not to activate PSR.
v4: Address Jose's review comment.
  - In order to avoid the scenario of PSR is not active but there is a
    scheduled psr->work, it changes the check routine of intel_psr_pause()
    for PSR's enablement from "psr->active" to "psr->enable".

Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608085415.515342-1-gwan-gyeong.mun@intel.com
3 years agox86/gpu: add JasperLake to gen11 early quirks
Tejas Upadhyay [Tue, 8 Jun 2021 05:34:11 +0000 (11:04 +0530)]
x86/gpu: add JasperLake to gen11 early quirks

Let's reserve JSL stolen memory for graphics.

JasperLake is a gen11 platform which is compatible with
ICL/EHL changes.

This was missed in commit 24ea098b7c0d ("drm/i915/jsl: Split
EHL/JSL platform info and PCI ids")

V2:
    - Added maintainer list in cc
    - Added patch ref in commit message
V1:
    - Added Cc: x86@kernel.org

Fixes: 24ea098b7c0d ("drm/i915/jsl: Split EHL/JSL platform info and PCI ids")
Cc: <stable@vger.kernel.org> # v5.11+
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: x86@kernel.org
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608053411.394166-1-tejaskumarx.surendrakumar.upadhyay@intel.com
3 years agodrm/i915/display: Drop FIXME about turn off infoframes
José Roberto de Souza [Fri, 14 May 2021 23:22:47 +0000 (16:22 -0700)]
drm/i915/display: Drop FIXME about turn off infoframes

intel_dp_set_infoframes() call in intel_ddi_post_disable_dp() will
take care to disable all enabled infoframes.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210514232247.144542-4-jose.souza@intel.com
3 years agodrm/i915/display: Allow fastsets when DP_SDP_VSC infoframe do not match with PSR...
José Roberto de Souza [Fri, 14 May 2021 23:22:45 +0000 (16:22 -0700)]
drm/i915/display: Allow fastsets when DP_SDP_VSC infoframe do not match with PSR enabled

When PSR is enabled it handles DP_SDP_VSC, changing revision and all
the other fields as necessary.
It can also enabled and disable this SDP as needed without a full
modeset.

So here masking DP_SDP_VSC bit when previous and future state PSR
enabled, it will still be checked when comparing the asked state
to what was programmed to hardware.

Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Fixes: 78b772e1a01f ("drm/i915/display: Fill PSR state during hardware configuration read out")
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210514232247.144542-2-jose.souza@intel.com
3 years agodrm/i915/display: Fix fastsets involving PSR
José Roberto de Souza [Fri, 14 May 2021 23:22:44 +0000 (16:22 -0700)]
drm/i915/display: Fix fastsets involving PSR

Commit 78b772e1a01f ("drm/i915/display: Fill PSR state during hardware
configuration read out") is not allowing fastsets to happen when PSR
states changes but PSR is a feature that can be enabled and disabled
during fastsets.

So here moving the PSR pipe conf checks to a block that is only
executed when checking if HW state matches with requested state, not
during the phase where it checks if fastset is possible or not.

There still a state mismatch not allowing fastsets between states
turning off or on PSR because of crtc_state->infoframes.enable
BIT(DP_SDP_VSC) but at least for now it will allow a fastset between
PSR1 <-> PSR2, that is a case heavilly used by CI due to pipe CRC not
work with PSR2, but the remaning issue will be fixed in a future patch.

Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Fixes: 78b772e1a01f ("drm/i915/display: Fill PSR state during hardware configuration read out")
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210514232247.144542-1-jose.souza@intel.com
3 years agodrm/i915/display: remove duplicated argument
Wan Jiabing [Sat, 5 Jun 2021 03:22:07 +0000 (11:22 +0800)]
drm/i915/display: remove duplicated argument

Fix the following coccicheck warning:

./drivers/gpu/drm/i915/display/intel_display_power.c:3081:1-28:
 duplicated argument to & or |

This commit fixes duplicate argument. It might be a typo.
But what I can do is to remove it now.

Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210605032209.16111-1-wanjiabing@vivo.com
3 years agodrm/i915: Add remaining conversions to GRAPHICS_VER
Lucas De Marchi [Sun, 6 Jun 2021 04:50:50 +0000 (21:50 -0700)]
drm/i915: Add remaining conversions to GRAPHICS_VER

For some reason coccinelle misses a few cases in header files with calls to
INTEL_GEN()/IS_GEN(). Do a manual conversion for those.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210605155356.4183026-6-lucas.demarchi@intel.com
Link: https://patchwork.freedesktop.org/patch/msgid/20210606045050.103862-3-lucas.demarchi@intel.com
3 years agodrm/i915: replace IS_GEN and friends with GRAPHICS_VER
Lucas De Marchi [Sun, 6 Jun 2021 04:50:49 +0000 (21:50 -0700)]
drm/i915: replace IS_GEN and friends with GRAPHICS_VER

This was done by the following semantic patch:

@@ expression i915; @@
- INTEL_GEN(i915)
+ GRAPHICS_VER(i915)

@@ expression i915; expression E; @@
- INTEL_GEN(i915) >= E
+ GRAPHICS_VER(i915) >= E

@@ expression dev_priv; expression E; @@
- !IS_GEN(dev_priv, E)
+ GRAPHICS_VER(dev_priv) != E

@@ expression dev_priv; expression E; @@
- IS_GEN(dev_priv, E)
+ GRAPHICS_VER(dev_priv) == E

@@
expression dev_priv;
expression from, until;
@@
- IS_GEN_RANGE(dev_priv, from, until)
+ IS_GRAPHICS_VER(dev_priv, from, until)

@def@
expression E;
identifier id =~ "^gen$";
@@
- id = GRAPHICS_VER(E)
+ ver = GRAPHICS_VER(E)

@@
identifier def.id;
@@
- id
+ ver

It also takes care of renaming the variable we assign to GRAPHICS_VER()
so to use "ver" rather than "gen".

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210606045050.103862-2-lucas.demarchi@intel.com
3 years agodrm/i915/display: replace IS_GEN() in commented code
Lucas De Marchi [Thu, 3 Jun 2021 16:54:28 +0000 (09:54 -0700)]
drm/i915/display: replace IS_GEN() in commented code

Since we are replacing IS_GEN() with GRAPHICS_VER(), make sure we take
care of the comments as well.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210603165428.3625495-8-lucas.demarchi@intel.com
3 years agodrm/i915/gvt: replace IS_GEN and friends with GRAPHICS_VER
Lucas De Marchi [Thu, 3 Jun 2021 16:54:25 +0000 (09:54 -0700)]
drm/i915/gvt: replace IS_GEN and friends with GRAPHICS_VER

This was done by the following semantic patch:

@@ expression i915; @@
- INTEL_GEN(i915)
+ GRAPHICS_VER(i915)

@@ expression i915; expression E; @@
- INTEL_GEN(i915) >= E
+ GRAPHICS_VER(i915) >= E

@@ expression dev_priv; expression E; @@
- !IS_GEN(dev_priv, E)
+ GRAPHICS_VER(dev_priv) != E

@@ expression dev_priv; expression E; @@
- IS_GEN(dev_priv, E)
+ GRAPHICS_VER(dev_priv) == E

@@
expression dev_priv;
expression from, until;
@@
- IS_GEN_RANGE(dev_priv, from, until)
+ IS_GRAPHICS_VER(dev_priv, from, until)

@def@
expression E;
identifier id =~ "^gen$";
@@
- id = GRAPHICS_VER(E)
+ ver = GRAPHICS_VER(E)

@@
identifier def.id;
@@
- id
+ ver

It also takes care of renaming the variable we assign to GRAPHICS_VER()
so to use "ver" rather than "gen".

Cc: intel-gvt-dev@lists.freedesktop.org
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210603165428.3625495-5-lucas.demarchi@intel.com
3 years agodrm/i915: Initialize the mbus_offset to fix Klockwork issue
Manasi Navare [Thu, 3 Jun 2021 21:53:38 +0000 (14:53 -0700)]
drm/i915: Initialize the mbus_offset to fix Klockwork issue

Static analysis identified an issue in skl_crtc_allocate_ddb where
mbus_offset may be used uninitialized.
This patch fixes it.

Fixes: 835c176cb1c4 ("drm/i915: Introduce MBUS relative dbuf offsets")
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210603215338.13804-1-manasi.d.navare@intel.com
3 years agodrm/i915/adlp: Fix AUX power well -> PHY mapping
Imre Deak [Wed, 26 May 2021 14:37:29 +0000 (17:37 +0300)]
drm/i915/adlp: Fix AUX power well -> PHY mapping

On ADL_P the power well->PHY mapping doesn't follow the mapping on previous
platforms, fix this up.

While at it remove the redundant dev_priv param from
icl_tc_phy_aux_ch().

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210526143729.2563672-3-imre.deak@intel.com
3 years agodrm/i915: Fix incorrect assert about pending power domain async-put work
Imre Deak [Wed, 26 May 2021 14:37:28 +0000 (17:37 +0300)]
drm/i915: Fix incorrect assert about pending power domain async-put work

It's possible that an already dequeued put_async_work() will release the
reference (*) that was put asynchronously after the dequeue happened.
This leaves an async-put work pending, without any reference to release.
A subsequent async-put may trigger the

drm_WARN_ON(!queue_delayed_work(&power_domains->async_put_work));

warn due to async_put_work() still pending. To avoid the warn, cancel
the pending async_put_work() when releasing the reference at (*) above.

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3421
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2289
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210526143729.2563672-2-imre.deak@intel.com
3 years agodrm/i915/ddi: Flush encoder power domain ref puts during driver unload
Imre Deak [Wed, 26 May 2021 14:37:27 +0000 (17:37 +0300)]
drm/i915/ddi: Flush encoder power domain ref puts during driver unload

An async-put on an encoder specific power domain (for instance the AUX
PW domain) may be pending when removing the encoder. Make sure any such
async-puts are complete while the corresponding encoder is still in place
since at least AUX power wells require this to do a power well->PHY
lookup.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210526143729.2563672-1-imre.deak@intel.com
3 years agodrm/i915/dmc: Move struct intel_dmc to intel_dmc.h
Anusha Srivatsa [Wed, 26 May 2021 22:02:56 +0000 (15:02 -0700)]
drm/i915/dmc: Move struct intel_dmc to intel_dmc.h

Move struct intel_dmc from i915_drv.h to intel_dmc.h.

v2: Add includes along with moving the struct.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210526220256.4097-4-anusha.srivatsa@intel.com
3 years agodrm/i915/dmc: Add intel_dmc_has_payload() helper
Anusha Srivatsa [Wed, 26 May 2021 22:02:55 +0000 (15:02 -0700)]
drm/i915/dmc: Add intel_dmc_has_payload() helper

We check for dmc_payload being there at various points in the driver.
Replace it with the helper.

v2: rebased.
v3: Move intel_dmc to intel_dmc.h in another patch (Lucas)
v4: Remove headers not needed from intel_dmc.h

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210526220256.4097-3-anusha.srivatsa@intel.com
3 years agodrm/i915/dmc: s/DRM_ERROR/drm_err
Anusha Srivatsa [Wed, 26 May 2021 22:02:54 +0000 (15:02 -0700)]
drm/i915/dmc: s/DRM_ERROR/drm_err

Use new format of debug messages across intel_csr.

While at it, change some function definitions which now
need dev_priv for drm_err and drm_info etc.

v2: use container_of() (Jani)
v3: Indentation fixes. (Jani)

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Suggested-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210526220256.4097-2-anusha.srivatsa@intel.com
3 years agodrm/i915/adl_p: Implement Wa_22012358565
Ville Syrjälä [Wed, 26 May 2021 17:36:00 +0000 (20:36 +0300)]
drm/i915/adl_p: Implement Wa_22012358565

Implement Wa_22012358565 to avoid underrun with 32bpp cursor
in some high bandwidth scenarios. The implementation calls for
overriding the arbitration slots for the planes.

v2: Fix adlp_plane_ctl_arb_slots() return type

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210526173600.27708-2-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
3 years agodrm/i915/adl_p: Disable FIFO underrun recovery
Ville Syrjälä [Wed, 26 May 2021 17:35:59 +0000 (20:35 +0300)]
drm/i915/adl_p: Disable FIFO underrun recovery

The FIFO underrun recovery mechanism has a boatload of cases
where it can't be used. The description is also a bit ambiguous
as it doesn't specify whether plane downscaling needs to be considered
or just pipe downscaling. We may not even have sufficient state
tracking to decide this on demand, so for now just disable the
whole thing.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210526173600.27708-1-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
3 years agodrm/i915/adlp: Add missing TBT AUX -> PW#2 power domain dependencies
Imre Deak [Wed, 26 May 2021 20:34:56 +0000 (23:34 +0300)]
drm/i915/adlp: Add missing TBT AUX -> PW#2 power domain dependencies

On ADL_P the TBT AUX power wells depend on the PW#2 power well, add the
corresponding power domain dependencies.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210526203456.2733040-1-imre.deak@intel.com
3 years agodrm/i915/display: relax 2big checking around initial fb
Chris Wilson [Wed, 26 May 2021 12:49:01 +0000 (13:49 +0100)]
drm/i915/display: relax 2big checking around initial fb

The kernel prefers enabling fbc over the initial fb, since this leads to
actual runtime power savings, so if the initial fb is deemed too big
using some heuristic, then we simply skip allocating stolen for it.
However if the kernel is not configured with fbcon then it should be
possible to relax this, since unlike with fbcon the display server
shouldn't preserve it when later replacing it, and so we should be able
to re-use the stolen memory for fbc and friends. This patch is reported
to fix some flicker seen during boot splash on some devices.

v2: s/FRAMEBUFFER_CONSOLE/CONFIG_FRAMEBUFFER_CONSOLE

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Lee Shawn C <shawn.c.lee@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210526124901.245689-1-matthew.auld@intel.com
3 years agodrm/i915: Drop redundant has_hdmi_sink check
Ville Syrjälä [Tue, 11 May 2021 16:05:32 +0000 (19:05 +0300)]
drm/i915: Drop redundant has_hdmi_sink check

intel_hdmi_bpc_possible() will check has_hdmi_sink for us, so no
need to check it in intel_hdmi_mode_clock_valid() anymore.

Cc: Werner Sembach <wse@tuxedocomputers.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210511160532.21446-7-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
3 years agodrm/i915: Move the TMDS clock division into intel_hdmi_mode_clock_valid()
Ville Syrjälä [Tue, 11 May 2021 16:05:31 +0000 (19:05 +0300)]
drm/i915: Move the TMDS clock division into intel_hdmi_mode_clock_valid()

Now that we have to tell intel_hdmi_mode_clock_valid() whether
we're asking about 4:4:4 or 4:2:0 output it can take care of
the dotclock->TMDS clock conversion.

Cc: Werner Sembach <wse@tuxedocomputers.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210511160532.21446-6-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
3 years agodrm/i915: Check sink deep color capabilitis during HDMI .mode_valid()
Ville Syrjälä [Tue, 11 May 2021 16:05:30 +0000 (19:05 +0300)]
drm/i915: Check sink deep color capabilitis during HDMI .mode_valid()

Currently HDMI .mode_valid() only checks whether the source can do
deep color. Let's check whether the sink can do it as well.

Cc: Werner Sembach <wse@tuxedocomputers.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210511160532.21446-5-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
3 years agodrm/i915: Move platform checks into intel_hdmi_bpc_possible()
Ville Syrjälä [Tue, 11 May 2021 16:05:29 +0000 (19:05 +0300)]
drm/i915: Move platform checks into intel_hdmi_bpc_possible()

Let's put the platform checks into intel_hdmi_bpc_possible() so that
it'll confirm both the source and sink capabilities.

Cc: Werner Sembach <wse@tuxedocomputers.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210511160532.21446-4-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
3 years agodrm/i915: Move has_hdmi_sink check into intel_hdmi_bpc_possible()
Ville Syrjälä [Tue, 11 May 2021 16:05:28 +0000 (19:05 +0300)]
drm/i915: Move has_hdmi_sink check into intel_hdmi_bpc_possible()

We wish intel_hdmi_bpc_possible() to consider whether the sink
supports HDMI or just DVI when checking whether it'll support
HDMI deep color or not. This also takes care of the "force DVI"
property.

Cc: Werner Sembach <wse@tuxedocomputers.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210511160532.21446-3-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
3 years agodrm/i915: Extract intel_hdmi_bpc_possible()
Ville Syrjälä [Tue, 11 May 2021 16:05:27 +0000 (19:05 +0300)]
drm/i915: Extract intel_hdmi_bpc_possible()

Extract intel_hdmi_bpc_possible() from intel_hdmi_deep_color_possible()
so that we can reuse it for mode validation.

Cc: Werner Sembach <wse@tuxedocomputers.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210511160532.21446-2-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
3 years agodrm/i915/display: Remove a redundant function argument from intel_psr_enable_source()
Gwan-gyeong Mun [Wed, 26 May 2021 00:06:56 +0000 (17:06 -0700)]
drm/i915/display: Remove a redundant function argument from intel_psr_enable_source()

It removes intel_crtc_state from function argument of
intel_psr_enable_source() in order to use intel_psr_enable_source()
without intel_crtc_state on other psr internal functions.
And we can get cpu_trancoder from intel_psr, therefore we don't need to
pass intel_crtc_state to this function.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210526000656.3060314-4-matthew.d.roper@intel.com
3 years agodrm/i915/xelpd: Add VRR guardband for VRR CTL
Manasi Navare [Wed, 26 May 2021 00:06:55 +0000 (17:06 -0700)]
drm/i915/xelpd: Add VRR guardband for VRR CTL

On XE_LPD, VRR CTL register adds a new VRR Guardband bitfield
replacing the pipeline full and deprecating the pipeline override
bit.

This patch adds this corresponding bitfield in the register defs,
crtc state vrr structure and populates this in vrr compute
config and vrr enable functions. It also adds the corresponding
HW state readout for this field.

Bspec: 50508
Cc: Aditya Swarup <aditya.swarup@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Aditya Swarup <aditya.swarup@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210526000656.3060314-3-matthew.d.roper@intel.com
3 years agodrm/i915/xelpd: Enhanced pipe underrun reporting
Matt Roper [Wed, 26 May 2021 00:06:54 +0000 (17:06 -0700)]
drm/i915/xelpd: Enhanced pipe underrun reporting

XE_LPD brings enhanced underrun recovery:  the hardware can somewhat
mitigate underruns by using an interpolated replacement pixel (soft
underrun) or the previous pixel (hard underrun).  Furthermore, underruns
can now be caused downstream by the port, even if the pipe itself is
operating properly.  The interrupt register and PIPE_STATUS register
give us extra bits to recognize hard/soft underruns and determine
whether the underrun was caused by the port, so we'll use that
information to print some more descriptive errors when underruns occur.

v2:
 - Keep ICL's PIPE_STATUS defined separately from the old GMCH pipe
   status register.  (Ville)
 - Only read/clear the PIPE_STATUS register on platforms with
   display ver >= 11. (Lucas)
v3:
 - Actually enable+unmask all the new underrun interrupts, clear stale
   bits out from PIPE_STATUS before enabling the interrupts, report all
   FIFO underruns errors at once, rename a bunch of stuff to unconfuse
   vs. PIPESTAT. (Ville)

Bspec: 50335
Bspec: 50366
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210526000656.3060314-2-matthew.d.roper@intel.com
3 years agoMerge drm/drm-next into drm-intel-next
Rodrigo Vivi [Wed, 26 May 2021 13:40:54 +0000 (09:40 -0400)]
Merge drm/drm-next into drm-intel-next

Getting in sync with -rc2

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
3 years agodrm/i915/adl_p: enable MSO on pipe B
Jani Nikula [Wed, 26 May 2021 08:29:03 +0000 (11:29 +0300)]
drm/i915/adl_p: enable MSO on pipe B

On ADL-P, it's possible to enable the stream splitter on pipe B in
addition to pipe A.

Bspec: 50174
Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210526082903.26395-1-jani.nikula@intel.com
3 years agodrm/i915: Remove the repeated declaration
Shaokun Zhang [Tue, 25 May 2021 07:29:53 +0000 (15:29 +0800)]
drm/i915: Remove the repeated declaration

Function 'intel_dbuf_init' is declared twice, remove the
repeated declaration.

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1621927793-44545-1-git-send-email-zhangshaokun@hisilicon.com
3 years agodrm/i915/display/adl_p: Disable PSR2
José Roberto de Souza [Mon, 24 May 2021 21:48:05 +0000 (14:48 -0700)]
drm/i915/display/adl_p: Disable PSR2

We are missing the implementation of some workarounds to enabled PSR2
in Alderlake P, so to avoid any CI report of issues around PSR2
disabling it until all PSR2 workarounds are implemented.

Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210524214805.259692-5-jose.souza@intel.com
3 years agodrm/i915/display/adl_p: Allow DC3CO in pipe and port B
José Roberto de Souza [Mon, 24 May 2021 21:48:04 +0000 (14:48 -0700)]
drm/i915/display/adl_p: Allow DC3CO in pipe and port B

DC3CO is allowed in all the combinations between pipe and port A and B
on alderlake-P.

BSpec: 49196
Cc: Anshuman Gupta <anshuman.gupta@intel.com>
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210524214805.259692-4-jose.souza@intel.com
3 years agodrm/i915: WA for zero memory channel
José Roberto de Souza [Mon, 24 May 2021 21:48:03 +0000 (14:48 -0700)]
drm/i915: WA for zero memory channel

Commit c457d9cf256e ("drm/i915: Make sure we have enough memory
bandwidth on ICL") assumes that we always have a non-zero
dram_info->channels and uses it as a divisor.
We need num memory channels to be at least 1 for sane bw limits
checking, even when PCode returns 0 or there is a error reading it, so
lets force it to 1 in this case.

Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210524214805.259692-3-jose.souza@intel.com
3 years agodrm/i915/adl_p: Handle TC cold
José Roberto de Souza [Mon, 24 May 2021 21:48:02 +0000 (14:48 -0700)]
drm/i915/adl_p: Handle TC cold

On ADL-P TC cold is exited and blocked when legacy aux is powered,
that is exacly the same of what ICL need for static TC ports.

TODO: When a TBT hub or monitor is connected it will cause TBT and
legacy aux to be powered at the same time, hopefully this will not
cause any issues but if it do, some rework will be needed.

v2:
 - skip icl_tc_port_assert_ref_held() warn on, adl-p uses aux to
   block TC cold

v3:
 - Drop icl_tc_port_assert_ref_held() earlier return for adl_p, not
   needed anymore
 - Set timeout_expected when enabling aux power well as port could be
   disconnected when tc_cold_block() is called

BSpec: 55480
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210524214805.259692-2-jose.souza@intel.com
3 years agodrm/i915/display/adl_p: Drop earlier return in tc_has_modular_fia()
José Roberto de Souza [Mon, 24 May 2021 21:48:01 +0000 (14:48 -0700)]
drm/i915/display/adl_p: Drop earlier return in tc_has_modular_fia()

MODULAR_FIA_MASK is set in adl_p so we can drop this ealier return
and read registers.
Also to avoid warnings from icl_tc_port_assert_ref_held() when
calling tc_cold_block() in this functions it is necessary to held the
lock.

Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210524214805.259692-1-jose.souza@intel.com
3 years agodrm/i915/debugfs: Print remap info for DPT VMAs as well
Imre Deak [Mon, 24 May 2021 17:27:03 +0000 (20:27 +0300)]
drm/i915/debugfs: Print remap info for DPT VMAs as well

Similarly to GGTT VMAs, DPT VMAs can be also a remapped or rotated view
of the mapped object, so make sure we debug print the details for these
views as well besides the normal view.

While at it also fix the debug print for the VMA type of DPT VMAs.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210524172703.2113058-3-imre.deak@intel.com
3 years agodrm/i915/adlp: Fix GEM VM asserts for DPT VMs
Imre Deak [Mon, 24 May 2021 17:27:02 +0000 (20:27 +0300)]
drm/i915/adlp: Fix GEM VM asserts for DPT VMs

An object mapped via DPT can have remapped and rotated VMA instances
besides the normal VMA instance, similarly to GGTT VMA instances.
Adjust the corresponding VMA lookup asserts.

While at it also check if a DPT VM is passed incorrectly to
i915_vm_to_ppgtt().

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210524172703.2113058-2-imre.deak@intel.com
3 years agodrm/i915/adlp: Require DPT FB CCS color planes to be 2MB aligned
Imre Deak [Mon, 24 May 2021 17:27:01 +0000 (20:27 +0300)]
drm/i915/adlp: Require DPT FB CCS color planes to be 2MB aligned

All DPT FB color plane surface base addresses must be 2MB aligned. On
ADL_P this means that the offsets in CCS FB object must be also 2MB
aligned. Adjusting unaligned offsets for these FBs during commit time
(compensating with the x/y offsets) doesn't work, since the big
alignment would most probably lead to an x/y offset mismatch error
between the main and CCS planes.

We can overcome this limitation by remapping CCS FBs, so that each color
plane is at an aligned offset, leaving x/y for each plane unadjusted
during commit and so not causing an x/y mismatch error. However
remapping for CCS FBs will be done as a follow-up, so for now require
that user space allocates the FB obj with properly aligned planes.

v2: s/SZ_2M/512*4k/ for clarity. (Ville)

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210524172703.2113058-1-imre.deak@intel.com
3 years agodrm/i915/display: fix typo when returning table
Lucas De Marchi [Fri, 21 May 2021 00:52:09 +0000 (17:52 -0700)]
drm/i915/display: fix typo when returning table

Fix table returned when port_clock > 270000:

drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:752:47: error: variable 'adlp_dkl_phy_dp_ddi_trans_hbr2_hbr3' is not needed and will not be emitted [-Werror,-Wunneeded-internal-declaration]

Initial version of the patch had it in a single table, but on second
version the table got split, but we continued to reference just one of
them.

Fixes: ca962882268a ("drm/i915/adl_p: Define and use ADL-P specific DP translation tables")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210521005209.4058702-1-lucas.demarchi@intel.com
3 years agodrm/i915/gvt: Add missing macro name changes
Anusha Srivatsa [Fri, 21 May 2021 17:40:47 +0000 (10:40 -0700)]
drm/i915/gvt: Add missing macro name changes

Propogate changes to macros name containing CSR_*
to DMC_* from display side.

Fixes: 0633cdcbaa77 ("drm/i915/dmc: Rename macro names containing csr")
Cc: intel-gvt-dev@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210521174047.3861-1-anusha.srivatsa@intel.com