platform/kernel/linux-rpi.git
3 years agoMerge drm/drm-next into drm-misc-next
Maxime Ripard [Mon, 25 Oct 2021 13:27:56 +0000 (15:27 +0200)]
Merge drm/drm-next into drm-misc-next

drm-misc-next hasn't been updated in a while and I need a post -rc2
state to merge some vc4 patches.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
3 years agodrm: use new iterator in drm_gem_plane_helper_prepare_fb v3
Christian König [Mon, 13 Sep 2021 11:47:53 +0000 (13:47 +0200)]
drm: use new iterator in drm_gem_plane_helper_prepare_fb v3

Makes the handling a bit more complex, but avoids the use of
dma_resv_get_excl_unlocked().

v2: improve coding and documentation
v3: adjust the TODO comment as suggested by Daniel

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20211005113742.1101-25-christian.koenig@amd.com
3 years agodrm: Move GEM memory managers into modules
Thomas Zimmermann [Wed, 20 Oct 2021 13:19:41 +0000 (15:19 +0200)]
drm: Move GEM memory managers into modules

DRM core uses the GEM base object to access GEM functionality. It does
not depend on individual implementations. Move the code into modules.

Also move the CMA framebuffer helpers into the CMA's module, as they're
not usable without CMA.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20211020131941.15367-4-tzimmermann@suse.de
3 years agodrm: Link several object files into drm_kms_helper.ko
Thomas Zimmermann [Wed, 20 Oct 2021 13:19:40 +0000 (15:19 +0200)]
drm: Link several object files into drm_kms_helper.ko

Several core DRM functions are not used by the DRM core. Link the
object files into the KMS helper library.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20211020131941.15367-3-tzimmermann@suse.de
3 years agodrm: Build drm_irq.o only if CONFIG_DRM_LEGACY has been set
Thomas Zimmermann [Wed, 20 Oct 2021 13:19:39 +0000 (15:19 +0200)]
drm: Build drm_irq.o only if CONFIG_DRM_LEGACY has been set

All code in drm_irq.o is for legacy UMs drivers. Only build and link
the file if CONFIG_DRM_LEGACY has been enabled.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20211020131941.15367-2-tzimmermann@suse.de
3 years agodrm/amdgpu: use new iterator in amdgpu_ttm_bo_eviction_valuable
Christian König [Tue, 15 Jun 2021 18:30:10 +0000 (20:30 +0200)]
drm/amdgpu: use new iterator in amdgpu_ttm_bo_eviction_valuable

Simplifying the code a bit.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20211005113742.1101-13-christian.koenig@amd.com
3 years agodrm/amdgpu: use the new iterator in amdgpu_sync_resv
Christian König [Tue, 15 Jun 2021 18:26:00 +0000 (20:26 +0200)]
drm/amdgpu: use the new iterator in amdgpu_sync_resv

Simplifying the code a bit.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20211005113742.1101-12-christian.koenig@amd.com
3 years agodma-buf: add dma_resv selftest v4
Christian König [Fri, 24 Sep 2021 15:10:19 +0000 (17:10 +0200)]
dma-buf: add dma_resv selftest v4

Just exercising a very minor subset of the functionality, but already
proven useful.

v2: add missing locking
v3: some more cleanup and consolidation, add unlocked test as well
v4: add a dma_resv_get_fences selftest

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> (v3)
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> (v3)
Link: https://patchwork.freedesktop.org/patch/msgid/20211005113742.1101-4-christian.koenig@amd.com
3 years agodrm/nouveau: use the new iterator in nouveau_fence_sync
Christian König [Wed, 16 Jun 2021 07:20:56 +0000 (09:20 +0200)]
drm/nouveau: use the new iterator in nouveau_fence_sync

Simplifying the code a bit.

The new implementation unifies the handling between drivers and so
results in waiting for all shared fernces in all cases.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20211005113742.1101-26-christian.koenig@amd.com
3 years agodma-buf: fix kerneldoc for renamed members
Christian König [Thu, 21 Oct 2021 06:55:24 +0000 (08:55 +0200)]
dma-buf: fix kerneldoc for renamed members

Those members where renamed, update the kerneldoc as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Sumit Semwal <sumit.semwal@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20211021141945.84023-1-christian.koenig@amd.com
3 years agoMerge tag 'drm-intel-gt-next-2021-10-21' of git://anongit.freedesktop.org/drm/drm...
Dave Airlie [Thu, 21 Oct 2021 20:30:33 +0000 (06:30 +1000)]
Merge tag 'drm-intel-gt-next-2021-10-21' of git://anongit.freedesktop.org/drm/drm-intel into drm-next

UAPI Changes:

- Expose multi-LRC submission interface

  Similar to the bonded submission interface but simplified.
  Comes with GuC only implementation for now. See kerneldoc
  for more details.

  Userspace changes: https://github.com/intel/media-driver/pull/1252

- Expose logical engine instance to user

  Needed by the multi-LRC submission interface for GuC

  Userspace changes: https://github.com/intel/media-driver/pull/1252

Driver Changes:

- Fix blank screen booting crashes when CONFIG_CC_OPTIMIZE_FOR_SIZE=y (Hugh)
- Add support for multi-LRC submission in the GuC backend (Matt B)
- Add extra cache flushing before making pages userspace visible (Matt A, Thomas)
- Mark internal GPU object pages dirty so they will be flushed properly (Matt A)

- Move remaining debugfs interfaces i915_wedged/i915_forcewake_user into gt (Andi)
- Replace the unconditional clflushes with drm_clflush_virt_range() (Ville)
- Remove IS_ACTIVE macro completely (Lucas)
- Improve kerneldocs for cache_dirty (Matt A)

- Add missing includes (Lucas)
- Selftest improvements (Matt R, Ran, Matt A)

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/YXFmLKoq8Fg9JxSd@jlahtine-mobl.ger.corp.intel.com
3 years agoMerge tag 'drm-intel-next-2021-10-15' of git://anongit.freedesktop.org/drm/drm-intel...
Dave Airlie [Thu, 21 Oct 2021 19:49:21 +0000 (05:49 +1000)]
Merge tag 'drm-intel-next-2021-10-15' of git://anongit.freedesktop.org/drm/drm-intel into drm-next

UAPI Changes:

- No Functional change, but a clarification around I915_TILING values (Matt).

Driver Changes:

- Changes around async flip VT-d w/a (Ville)
- Delete bogus NULL check in intel_ddi_encoder_destroy (Dan)
- DP link training improvements and DP per-lane driver settings (Ville)
- Free the returned object of acpi_evaluate_dsm (Zenghui)
- Fixes and improvements around DP's UHBR and MST (Jani)
- refactor plane config + pin out (Dave)
- remove unused include in intel_dsi_vbt.c (Lucas)
- some code clean up (Lucas, Jani)
- gracefully disable dual eDP (Jani)
- Remove memory frequency calculation (Jose)
- Fix oops on platforms w/o hpd support (Ville)
- Clean up PXP Kconfig info (Rodrigo)

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/YWnMORrixyw90O3/@intel.com
3 years agodrm/rockchip: Implement mmap as GEM object function
Thomas Zimmermann [Thu, 24 Jun 2021 09:55:02 +0000 (11:55 +0200)]
drm/rockchip: Implement mmap as GEM object function

Moving the driver-specific mmap code into a GEM object function allows
for using DRM helpers for various mmap callbacks.

The respective rockchip functions are being removed. The file_operations
structure fops is now being created by the helper macro
DEFINE_DRM_GEM_FOPS().

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
[On rk3288 (pinky), rk3399 (gru-kevin, puma) and rk3328 (rock64)]
Tested-by: Heiko Stuebner <heiko@sntech.de>
[On RK3188/RK3066 (without iommu)]
Tested-by: Alex Bee <knaerzche@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20210624095502.8945-1-tzimmermann@suse.de
3 years agodrm/sun4i: virtual CMA addresses are not needed
Jernej Skrabec [Tue, 19 Oct 2021 18:10:28 +0000 (20:10 +0200)]
drm/sun4i: virtual CMA addresses are not needed

Driver never uses virtual address of DRM CMA buffers. Switch to CMA
helpers which don't deal with virtual mapping.

This was actually already the case before commit ad408c766cef
("drm/sun4i: Use DRM_GEM_CMA_VMAP_DRIVER_OPS for GEM operations"),
but only convenient macro at the time used helpers with virtual
mapping.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20211019181028.4190737-1-jernej.skrabec@gmail.com
3 years agodrm/gma500: Remove generic DRM drivers in probe function
Thomas Zimmermann [Tue, 19 Oct 2021 08:09:42 +0000 (10:09 +0200)]
drm/gma500: Remove generic DRM drivers in probe function

Gma500 currently removes generic fbdev drivers, but ignores
generic DRM drivers. Use aperture helpers to remove all generic
graphics drivers before loading gma500. Makes gma500 compatible
with simpledrm.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20211019080942.24356-1-tzimmermann@suse.de
3 years agodrm/i915/selftests: mark up hugepages object with start_cpu_write
Matthew Auld [Mon, 18 Oct 2021 17:45:08 +0000 (18:45 +0100)]
drm/i915/selftests: mark up hugepages object with start_cpu_write

Just like we do for internal objects. Also just use
i915_gem_object_set_cache_coherency() here. No need for over-flushing on
LLC platforms.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211018174508.2137279-9-matthew.auld@intel.com
3 years agodrm/i915: mark up internal objects with start_cpu_write
Matthew Auld [Mon, 18 Oct 2021 17:45:07 +0000 (18:45 +0100)]
drm/i915: mark up internal objects with start_cpu_write

While the pages can't be swapped out, they can be discarded by the shrinker.
Normally such objects are marked with __I915_MADV_PURGED, which can't be
unset, and therefore requires a new object. For kernel internal objects
this is not true, since the madv hint is reset for our special volatile
objects, such that we can re-acquire new pages, if so desired, without
needing a new object. As a result we should probably be paranoid here
and put the object back into the CPU domain when discarding the pages,
and also correctly set cache_dirty, if required.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211018174508.2137279-8-matthew.auld@intel.com
3 years agodrm/i915: expand on the kernel-doc for cache_dirty
Matthew Auld [Mon, 18 Oct 2021 17:45:06 +0000 (18:45 +0100)]
drm/i915: expand on the kernel-doc for cache_dirty

Add some details around non-LLC platforms and cflushing, when dealing
with the flush-on-acquire, which is potentially security sensitive.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211018174508.2137279-7-matthew.auld@intel.com
3 years agodrm/i915/shmem: ensure flush during swap-in on non-LLC
Matthew Auld [Mon, 18 Oct 2021 17:45:05 +0000 (18:45 +0100)]
drm/i915/shmem: ensure flush during swap-in on non-LLC

On non-LLC platforms, force the flush-on-acquire if this is ever
swapped-in. Our async flush path is not trust worthy enough yet(and
happens in the wrong order), and with some tricks it's conceivable for
userspace to change the cache-level to I915_CACHE_NONE after the pages
are swapped-in, and since execbuf binds the object before doing the
async flush, there is a potential race window.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211018174508.2137279-6-matthew.auld@intel.com
3 years agodrm/i915/userptr: add paranoid flush-on-acquire
Matthew Auld [Mon, 18 Oct 2021 17:45:04 +0000 (18:45 +0100)]
drm/i915/userptr: add paranoid flush-on-acquire

Even though userptr objects are always coherent with the GPU, with no
way for userspace to change this with the set_caching ioctl, even on
non-LLC platforms, there is still the 'Bypass LCC' mocs setting, which
might permit reading the contents of main memory directly.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211018174508.2137279-5-matthew.auld@intel.com
3 years agodrm/i915/dmabuf: add paranoid flush-on-acquire
Matthew Auld [Mon, 18 Oct 2021 17:45:03 +0000 (18:45 +0100)]
drm/i915/dmabuf: add paranoid flush-on-acquire

As pointed out by Thomas, we likely need to flush the pages here if the
GPU can read the page contents directly from main memory. Underneath we
don't know what the sg_table is pointing to, so just add a
wbinvd_on_all_cpus() here, for now.

Reported-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211018174508.2137279-4-matthew.auld@intel.com
3 years agodrm/i915: extract bypass-llc check into helper
Matthew Auld [Mon, 18 Oct 2021 17:45:02 +0000 (18:45 +0100)]
drm/i915: extract bypass-llc check into helper

It looks like we will need this in some more places, so extract as a
helper.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211018174508.2137279-3-matthew.auld@intel.com
3 years agodrm/i915: mark userptr objects as ALLOC_USER
Matthew Auld [Mon, 18 Oct 2021 17:45:01 +0000 (18:45 +0100)]
drm/i915: mark userptr objects as ALLOC_USER

These are userspace objects, so mark them as such. In a later patch it's
useful to determine how paranoid we need to be when managing cache
flushes. In theory no functional changes.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211018174508.2137279-2-matthew.auld@intel.com
3 years agodrm/i915: mark dmabuf objects as ALLOC_USER
Matthew Auld [Mon, 18 Oct 2021 17:45:00 +0000 (18:45 +0100)]
drm/i915: mark dmabuf objects as ALLOC_USER

These are userspace objects, so mark them as such. In a later patch it's
useful to determine how paranoid we need to be when managing cache
flushes. In theory no functional changes.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211018174508.2137279-1-matthew.auld@intel.com
3 years agodrm/radeon: use new iterator in radeon_sync_resv
Christian König [Wed, 16 Jun 2021 07:23:50 +0000 (09:23 +0200)]
drm/radeon: use new iterator in radeon_sync_resv

Simplifying the code a bit.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20211005113742.1101-16-christian.koenig@amd.com
3 years agodrm/msm: use new iterator in msm_gem_describe
Christian König [Wed, 16 Jun 2021 07:19:37 +0000 (09:19 +0200)]
drm/msm: use new iterator in msm_gem_describe

Simplifying the code a bit. Also drop the RCU read side lock since the
object is locked anyway.

Untested since I can't get the driver to compile on !ARM.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20211005113742.1101-15-christian.koenig@amd.com
3 years agodrm/amdgpu: use new iterator in amdgpu_vm_prt_fini
Christian König [Wed, 22 Sep 2021 12:14:01 +0000 (14:14 +0200)]
drm/amdgpu: use new iterator in amdgpu_vm_prt_fini

No need to actually allocate an array of fences here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20211005113742.1101-14-christian.koenig@amd.com
3 years agodrm/i915/selftests: remove duplicate include in mock_region.c
Ran Jianping [Tue, 19 Oct 2021 09:02:05 +0000 (09:02 +0000)]
drm/i915/selftests: remove duplicate include in mock_region.c

'drm/ttm/ttm_placement.h' included in
'drivers/gpu/drm/i915/selftests/mock_region.c' is duplicated.
It is also included on the 9 line.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Ran Jianping <ran.jianping@zte.com.cn>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211019090205.1003458-1-ran.jianping@zte.com.cn
3 years agoMerge tag 'topic/drm-dp-training-delay-helpers-2021-10-19' of git://anongit.freedeskt...
Maxime Ripard [Tue, 19 Oct 2021 13:26:26 +0000 (15:26 +0200)]
Merge tag 'topic/drm-dp-training-delay-helpers-2021-10-19' of git://anongit.freedesktop.org/drm/drm-intel into drm-misc-next

Core Changes:
- drm dp helpers for figuring out link training delays

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
From: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/878ryps5b6.fsf@intel.com
3 years agodrm/scheduler: fix drm_sched_job_add_implicit_dependencies
Christian König [Mon, 18 Oct 2021 19:27:55 +0000 (21:27 +0200)]
drm/scheduler: fix drm_sched_job_add_implicit_dependencies

Trivial fix since we now need to grab a reference to the fence we have
added. Previously the dma_resv function where doing that for us.

Signed-off-by: Christian König <christian.koenig@amd.com>
Fixes: 9c2ba265352a ("drm/scheduler: use new iterator in drm_sched_job_add_implicit_dependencies v2")
Link: https://patchwork.freedesktop.org/patch/msgid/20211019112706.27769-1-christian.koenig@amd.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reported-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
References: https://lore.kernel.org/dri-devel/2023306.UmlnhvANQh@archbook/
Tested-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
3 years agodrm/locking: fix __stack_depot_* name conflict
Stephen Rothwell [Mon, 18 Oct 2021 08:51:13 +0000 (11:51 +0300)]
drm/locking: fix __stack_depot_* name conflict

Commit cd06ab2fd48f ("drm/locking: add backtrace for locking contended
locks without backoff") added functions named __stack_depot_* in drm
which conflict with stack depot. Rename to __drm_stack_depot_*.

v2 by Jani:
- Also rename __stack_depot_print

References: https://lore.kernel.org/r/20211015202648.258445ef@canb.auug.org.au
Fixes: cd06ab2fd48f ("drm/locking: add backtrace for locking contended locks without backoff")
Cc: Daniel Vetter <daniel@ffwll.ch>
Reviewed-by: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211018085113.27033-1-jani.nikula@intel.com
3 years agodrm/bridge: tc358768: Correct BTACNTRL1 programming
Dmitry Osipenko [Sat, 2 Oct 2021 23:34:47 +0000 (02:34 +0300)]
drm/bridge: tc358768: Correct BTACNTRL1 programming

TXTAGOCNT and RXTASURECNT bitfields of BTACNTRL1 register are swapped in
the code, correct them. Driver doesn't implement low power mode for now,
so this change doesn't make a practical difference yet.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # Asus TF700T
Tested-by: Maxim Schwalm <maxim.schwalm@gmail.com> #TF700T
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20211002233447.1105-6-digetx@gmail.com
3 years agodrm/bridge: tc358768: Disable non-continuous clock mode
Dmitry Osipenko [Sat, 2 Oct 2021 23:34:46 +0000 (02:34 +0300)]
drm/bridge: tc358768: Disable non-continuous clock mode

Non-continuous clock mode doesn't work because driver doesn't support it
properly. The bridge driver programs wrong bitfields that are required by
the non-continuous mode (BTACNTRL1 register bitfields are swapped in the
code), but fixing them doesn't help.

Display panel of ASUS Transformer TF700T tablet supports non-continuous
mode and display doesn't work at all using that mode. There are no
device-trees that are actively using this DSI bridge in upstream yet,
so clearly the broken mode wasn't ever tested properly. It's a bit too
difficult to get LP mode working, hence let's disable the offending mode
for now and fall back to continuous mode.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # Asus TF700T
Tested-by: Maxim Schwalm <maxim.schwalm@gmail.com> #TF700T
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20211002233447.1105-5-digetx@gmail.com
3 years agodrm/bridge: tc358768: Calculate video start delay
Dmitry Osipenko [Sat, 2 Oct 2021 23:34:45 +0000 (02:34 +0300)]
drm/bridge: tc358768: Calculate video start delay

Calculate video start delay based on the display timing instead
of hardcoding it to a default value. This fixes "trembling" display
output on Asus Transformer TF700T which uses Panasonic VVX10F004B00
display panel.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # Asus TF700T
Tested-by: Maxim Schwalm <maxim.schwalm@gmail.com> #TF700T
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20211002233447.1105-4-digetx@gmail.com
3 years agodrm/bridge: tc358768: Support pulse mode
Dmitry Osipenko [Sat, 2 Oct 2021 23:34:44 +0000 (02:34 +0300)]
drm/bridge: tc358768: Support pulse mode

Support pulse-mode synchronization which is supported and used by simple
DSI panels like Panasonic VVX10F004B00.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # Asus TF700T
Tested-by: Maxim Schwalm <maxim.schwalm@gmail.com> #TF700T
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20211002233447.1105-3-digetx@gmail.com
3 years agodrm/bridge: tc358768: Enable reference clock
Dmitry Osipenko [Sat, 2 Oct 2021 23:34:43 +0000 (02:34 +0300)]
drm/bridge: tc358768: Enable reference clock

The driver assumes that reference clock is always-enabled, but this is
hardware-dependent and not true for ASUS Transformer TF700T. Make driver
enable / disable the reference clock.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # Asus TF700T
Tested-by: Maxim Schwalm <maxim.schwalm@gmail.com> #TF700T
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20211002233447.1105-2-digetx@gmail.com
3 years agodrm/gma500: Rename struct gtt_range to struct psb_gem_object
Thomas Zimmermann [Fri, 15 Oct 2021 08:40:53 +0000 (10:40 +0200)]
drm/gma500: Rename struct gtt_range to struct psb_gem_object

struct gtt_range represents a GEM object. Rename the structure to struct
psb_gem_object and update all users. No functional changes.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Acked-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211015084053.13708-11-tzimmermann@suse.de
3 years agodrm/gma500: Rewrite GTT page insert/remove without struct gtt_range
Thomas Zimmermann [Fri, 15 Oct 2021 08:40:52 +0000 (10:40 +0200)]
drm/gma500: Rewrite GTT page insert/remove without struct gtt_range

struct gtt_range represents a GEM object and should not be used for GTT
setup. Change psb_gtt_insert() and psb_gtt_remove() to receive all
necessary parameters from their caller. This also eliminates possible
failure from psb_gtt_insert().

There's one exception in psb_gtt_restore(), which requires an upcast
from struct resource to struct gtt_range when restoring the GTT after
hibernation. A possible solution would track the GEM objects that need
restoration separately from the GTT resource.

Rename the functions to psb_gtt_insert_pages() and psb_gtt_remove_pages()
to reflect their similarity to MMU interfaces.

v3:
* restore the comments about locking rules (Patrik)

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Acked-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211015084053.13708-10-tzimmermann@suse.de
3 years agodrm/gma500: Set page-caching flags in GEM pin/unpin
Thomas Zimmermann [Fri, 15 Oct 2021 08:40:51 +0000 (10:40 +0200)]
drm/gma500: Set page-caching flags in GEM pin/unpin

Caching of the GEM object's backing pages are unrelated to GTT
management. Move the respective calls from GTT code to GEM code.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Acked-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211015084053.13708-9-tzimmermann@suse.de
3 years agodrm/gma500: Inline psb_gtt_{alloc,free}_range() into rsp callers
Thomas Zimmermann [Fri, 15 Oct 2021 08:40:50 +0000 (10:40 +0200)]
drm/gma500: Inline psb_gtt_{alloc,free}_range() into rsp callers

psb_gtt_alloc_range() allocates struct gtt_range, create the GTT resource
and performs some half-baked initialization. Inline the function into its
only caller psb_gem_create(). For creating the GTT resource, introduce a
new helper, psb_gtt_alloc_resource() that hides the details of the GTT.

For psb_gtt_free_range(), inline the function into its only caller
psb_gem_free_object(). While at it, remove the explicit invocation of
drm_gem_free_mmap_offset(). The mmap offset is already released by
drm_gem_object_release().

v3:
* replace offset[static 1] with pointer notation (Patrik)

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Acked-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211015084053.13708-8-tzimmermann@suse.de
3 years agodrm/gma500: Inline psb_gtt_attach_pages() and psb_gtt_detach_pages()
Thomas Zimmermann [Fri, 15 Oct 2021 08:40:49 +0000 (10:40 +0200)]
drm/gma500: Inline psb_gtt_attach_pages() and psb_gtt_detach_pages()

psb_gtt_attach_pages() are not GTT functions but deal with the GEM
object's SHMEM pages. The only callers of psb_gtt_attach_pages() and
psb_gtt_detach_pages() are the GEM pin helpers. Inline the calls and
cleanup the resulting code.

v2:
* unlock gtt_mutex in pin-error handling (Patrik)

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Acked-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211015084053.13708-7-tzimmermann@suse.de
3 years agodrm/gma500: Rename psb_gtt_{pin,unpin}() to psb_gem_{pin,unpin}()
Thomas Zimmermann [Fri, 15 Oct 2021 08:40:48 +0000 (10:40 +0200)]
drm/gma500: Rename psb_gtt_{pin,unpin}() to psb_gem_{pin,unpin}()

Rename psb_gtt_pin() to psb_gem_pin() to reflect the semantics of the
function. Same for psb_gtt_unpin(). No functional changes.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Acked-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211015084053.13708-6-tzimmermann@suse.de
3 years agodrm/gma500: Allocate GTT ranges in stolen memory with psb_gem_create()
Thomas Zimmermann [Fri, 15 Oct 2021 08:40:47 +0000 (10:40 +0200)]
drm/gma500: Allocate GTT ranges in stolen memory with psb_gem_create()

Support private objects for stolen memory in psb_gem_create() and
convert users to psb_gem_create(). For stolen memory, psb_gem_create()
now initializes the GEM object via drm_gem_private_object_init().

In the fbdev setup, replace the open-coded initialization of struct
gtt_range with a call to psb_gem_create(). Use drm_gem_object_put()
for release.

In the cursor setup, use psb_gem_create() and get a real GEM object.
Previously the allocated instance of struct gtt_range was only partially
initialized. Release the cursor GEM object in gma_crtc_destroy(). The
release was missing from the original code.

With the conversion of all callers to psb_gem_create(), the extern
declarations of psb_gtt_alloc_range, psb_gtt_free_range and
psb_gem_object_func are not required any longer. Declare them as
static.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Acked-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211015084053.13708-5-tzimmermann@suse.de
3 years agodrm/gma500: Reimplement psb_gem_create()
Thomas Zimmermann [Fri, 15 Oct 2021 08:40:46 +0000 (10:40 +0200)]
drm/gma500: Reimplement psb_gem_create()

Implement psb_gem_create() for general use. Create the GEM handle in
psb_gem_create_dumb(). Allows to use psb_gem_create() for creating all
of the GEM objects.

While at it, clean-up drm_gem_dumb_create() to make it more readable.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Acked-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211015084053.13708-4-tzimmermann@suse.de
3 years agodrm/gma500: Use to_gtt_range() everywhere
Thomas Zimmermann [Fri, 15 Oct 2021 08:40:45 +0000 (10:40 +0200)]
drm/gma500: Use to_gtt_range() everywhere

Convert upcasts from struct drm_gem_object to struct gtt_range to
to_gtt_range(). Some places used container_of() directly.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Acked-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211015084053.13708-3-tzimmermann@suse.de
3 years agodrm/gma500: Move helpers for struct gtt_range from gtt.c to gem.c
Thomas Zimmermann [Fri, 15 Oct 2021 08:40:44 +0000 (10:40 +0200)]
drm/gma500: Move helpers for struct gtt_range from gtt.c to gem.c

Allocation and pinning helpers for struct gtt_range are GEM functions,
so move them to gem.c. No functional changes.

v2:
* keep docs for psb_gtt_{attach,detach}_pages() (Patrik)

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Acked-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211015084053.13708-2-tzimmermann@suse.de
3 years agodrm/dp: reuse the 8b/10b link training delay helpers
Jani Nikula [Thu, 14 Oct 2021 15:00:58 +0000 (18:00 +0300)]
drm/dp: reuse the 8b/10b link training delay helpers

Reuse the 8b/10b link training delay helpers. Functionally this skips
the check for invalid values for DPCD 1.4 and later at clock recovery
delay (as it's a fixed delay and bypasses the rd_interval) but the same
value will be checked and invalid values reported at channel
equalization.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014150059.28957-2-jani.nikula@intel.com
3 years agodrm/dp: add helpers to read link training delays
Jani Nikula [Thu, 14 Oct 2021 15:00:57 +0000 (18:00 +0300)]
drm/dp: add helpers to read link training delays

The link training delays are different and/or available in different
DPCD offsets depending on:

- Clock recovery vs. channel equalization
- DPRX vs. LTTPR
- 128b/132b vs. 8b/10b
- DPCD 1.4+ vs. earlier

Add helpers to get the correct delays in us, reading DPCD if
necessary. This is more straightforward than trying to retrofit the
existing helpers to take 128b/132b into account.

Having to pass in the DPCD receiver cap field seems unavoidable, because
reading it involves checking the revision and reading extended receiver
cap. So unfortunately the interface is mixed cached and read as needed.

v2: Remove delay_us < 0 check and the whole local var (Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014150059.28957-1-jani.nikula@intel.com
3 years agodma-buf: Update obsoluted comments on dma_buf_vmap/vunmap()
Shunsuke Mie [Fri, 8 Oct 2021 11:20:09 +0000 (20:20 +0900)]
dma-buf: Update obsoluted comments on dma_buf_vmap/vunmap()

A comment for the dma_buf_vmap/vunmap() is not catching up a
corresponding implementation.

Signed-off-by: Shunsuke Mie <mie@igel.co.jp>
Link: https://patchwork.freedesktop.org/patch/msgid/20211008112009.118996-1-mie@igel.co.jp
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
3 years agodrm/i915: Catch yet another unconditioal clflush
Ville Syrjälä [Thu, 14 Oct 2021 09:09:40 +0000 (12:09 +0300)]
drm/i915: Catch yet another unconditioal clflush

Replace the unconditional clflush() with drm_clflush_virt_range()
which does the wbinvd() fallback when clflush is not available.

This time no justification is given for the clflush in the
offending commit.

Cc: stable@vger.kernel.org
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Fixes: 2c8ab3339e39 ("drm/i915: Pin timeline map after first timeline pin, v4.")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014090941.12159-4-ville.syrjala@linux.intel.com
Reviewed-by: Dave Airlie <airlied@redhat.com>
3 years agodrm/i915: Convert unconditional clflush to drm_clflush_virt_range()
Ville Syrjälä [Thu, 14 Oct 2021 09:09:39 +0000 (12:09 +0300)]
drm/i915: Convert unconditional clflush to drm_clflush_virt_range()

This one is apparently a "clflush for good measure", so bit more
justification (if you can call it that) than some of the others.
Convert to drm_clflush_virt_range() again so that machines without
clflush will survive the ordeal.

Cc: stable@vger.kernel.org
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Thomas Hellström <thomas.hellstrom@intel.com> #v1
Fixes: 12ca695d2c1e ("drm/i915: Do not share hwsp across contexts any more, v8.")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014090941.12159-3-ville.syrjala@linux.intel.com
Reviewed-by: Dave Airlie <airlied@redhat.com>
3 years agodrm/i915: Replace the unconditional clflush with drm_clflush_virt_range()
Ville Syrjälä [Thu, 14 Oct 2021 09:09:38 +0000 (12:09 +0300)]
drm/i915: Replace the unconditional clflush with drm_clflush_virt_range()

Not all machines have clflush, so don't go assuming they do.
Not really sure why the clflush is even here since hwsp
is supposed to get snooped I thought.

Although in my case we're talking about a i830 machine where
render/blitter snooping is definitely busted. But it might
work for the hswp perhaps. Haven't really reverse engineered
that one fully.

Cc: stable@vger.kernel.org
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Fixes: b436a5f8b6c8 ("drm/i915/gt: Track all timelines created using the HWSP")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014090941.12159-2-ville.syrjala@linux.intel.com
Reviewed-by: Dave Airlie <airlied@redhat.com>
3 years agodrm/rockchip: dsi: Disable PLL clock on bind error
Brian Norris [Tue, 28 Sep 2021 21:35:52 +0000 (14:35 -0700)]
drm/rockchip: dsi: Disable PLL clock on bind error

Fix some error handling here noticed in review of other changes.

Fixes: 2d4f7bdafd70 ("drm/rockchip: dsi: migrate to use dw-mipi-dsi bridge driver")
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reported-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20210928143413.v3.4.I8bb7a91ecc411d56bc155763faa15f289d7fc074@changeid
3 years agodrm/rockchip: dsi: Fix unbalanced clock on probe error
Brian Norris [Tue, 28 Sep 2021 21:35:51 +0000 (14:35 -0700)]
drm/rockchip: dsi: Fix unbalanced clock on probe error

Our probe() function never enabled this clock, so we shouldn't disable
it if we fail to probe the bridge.

Noted by inspection.

Fixes: 2d4f7bdafd70 ("drm/rockchip: dsi: migrate to use dw-mipi-dsi bridge driver")
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20210928143413.v3.3.Ie8ceefb51ab6065a1151869b6fcda41a467d4d2c@changeid
3 years agodrm/rockchip: dsi: Reconfigure hardware on resume()
Brian Norris [Tue, 28 Sep 2021 21:35:50 +0000 (14:35 -0700)]
drm/rockchip: dsi: Reconfigure hardware on resume()

Since commit 43c2de1002d2 ("drm/rockchip: dsi: move all lane config except
LCDC mux to bind()"), we perform most HW configuration in the bind()
function. This configuration may be lost on suspend/resume, so we
need to call it again. That may lead to errors like this after system
suspend/resume:

  dw-mipi-dsi-rockchip ff968000.mipi: failed to write command FIFO
  panel-kingdisplay-kd097d04 ff960000.mipi.0: failed write init cmds: -110

Tested on Acer Chromebook Tab 10 (RK3399 Gru-Scarlet).

Note that early mailing list versions of this driver borrowed Rockchip's
downstream/BSP solution, to do HW configuration in mode_set() (which
*is* called at the appropriate pre-enable() times), but that was
discarded along the way. I've avoided that still, because mode_set()
documentation doesn't suggest this kind of purpose as far as I can tell.

Fixes: 43c2de1002d2 ("drm/rockchip: dsi: move all lane config except LCDC mux to bind()")
Cc: <stable@vger.kernel.org>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20210928143413.v3.2.I4e9d93aadb00b1ffc7d506e3186a25492bf0b732@changeid
3 years agodrm/rockchip: dsi: Hold pm-runtime across bind/unbind
Brian Norris [Tue, 28 Sep 2021 21:35:49 +0000 (14:35 -0700)]
drm/rockchip: dsi: Hold pm-runtime across bind/unbind

In commit 43c2de1002d2 ("drm/rockchip: dsi: move all lane config except
LCDC mux to bind()"), we moved most HW configuration to bind(), but we
didn't move the runtime PM management. Therefore, depending on initial
boot state, runtime-PM workqueue delays, and other timing factors, we
may disable our power domain in between the hardware configuration
(bind()) and when we enable the display. This can cause us to lose
hardware state and fail to configure our display. For example:

  dw-mipi-dsi-rockchip ff968000.mipi: failed to write command FIFO
  panel-innolux-p079zca ff960000.mipi.0: failed to write command 0

or:

  dw-mipi-dsi-rockchip ff968000.mipi: failed to write command FIFO
  panel-kingdisplay-kd097d04 ff960000.mipi.0: failed write init cmds: -110

We should match the runtime PM to the lifetime of the bind()/unbind()
cycle.

Tested on Acer Chrometab 10 (RK3399 Gru-Scarlet), with panel drivers
built either as modules or built-in.

Side notes: it seems one is more likely to see this problem when the
panel driver is built into the kernel. I've also seen this problem
bisect down to commits that simply changed Kconfig dependencies, because
it changed the order in which driver init functions were compiled into
the kernel, and therefore the ordering and timing of built-in device
probe.

Fixes: 43c2de1002d2 ("drm/rockchip: dsi: move all lane config except LCDC mux to bind()")
Link: https://lore.kernel.org/linux-rockchip/9aedfb528600ecf871885f7293ca4207c84d16c1.camel@gmail.com/
Reported-by: <aleksandr.o.makarov@gmail.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20210928143413.v3.1.Ic2904d37f30013a7f3d8476203ad3733c186827e@changeid
3 years agodrm/rockchip: vop: Add timeout for DSP hold
Brian Norris [Fri, 8 Oct 2021 22:31:04 +0000 (15:31 -0700)]
drm/rockchip: vop: Add timeout for DSP hold

If hardware is malfunctioning (e.g., misconfigured clocks?), we can get
stuck here forever, holding various DRM locks and eventually locking up
the entire system. It's better to complain loudly and move on, than to
lock up the system.

In local tests, this operation takes less than 20ms.

Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20211008153102.1.I2a5dbaaada35023a9703a8db7af501528fbb6e31@changeid
3 years agodrm/v3d: nullify pointer se with a NULL
Yang Li [Fri, 15 Oct 2021 07:14:41 +0000 (15:14 +0800)]
drm/v3d: nullify pointer se with a NULL

Currently a plain integer is being used to nullify the pointer
struct v3d_submit_ext *se. Use NULL instead. Cleans up sparse
warnings:
drivers/gpu/drm/v3d/v3d_gem.c:777:53: warning: Using plain integer as
NULL pointer
drivers/gpu/drm/v3d/v3d_gem.c:1010:45: warning: Using plain integer as
NULL pointer

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Reviewed-by: Melissa Wen <mwen@igalia.com>
Signed-off-by: Melissa Wen <melissa.srw@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1634282081-72255-1-git-send-email-yang.lee@linux.alibaba.com
3 years agodrm/panel: Add Sony Tulip Truly NT35521 driver
Shawn Guo [Mon, 9 Aug 2021 05:10:08 +0000 (13:10 +0800)]
drm/panel: Add Sony Tulip Truly NT35521 driver

It adds a DRM panel driver for Sony Tulip Truly NT35521 5.24" 1280x720
DSI panel, which can be found on Sony Xperia M4 Aqua phone.  The panel
backlight is managed through DSI link.

The driver is built using linux-mdss-dsi-panel-driver-generator[1], and
additionally modeling the 5V control GPIOs with regulators and adding
Backlight GPIO support.

[1] https://github.com/msm8916-mainline/linux-mdss-dsi-panel-driver-generator

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210809051008.6172-3-shawn.guo@linaro.org
3 years agodt-bindings: display: Add Sony Tulip Truly NT35521 panel support
Shawn Guo [Mon, 9 Aug 2021 05:10:07 +0000 (13:10 +0800)]
dt-bindings: display: Add Sony Tulip Truly NT35521 panel support

The Sony Tulip Truly NT35521 is a 5.24" 1280x720 DSI panel, which can
be found on Sony Xperia M4 Aqua phone.  The backlight is managed
through DSI link.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210809051008.6172-2-shawn.guo@linaro.org
3 years agodrm/panel: Add BOE BF060Y8M-AJ0 5.99" AMOLED panel driver
AngeloGioacchino Del Regno [Wed, 1 Sep 2021 17:31:14 +0000 (19:31 +0200)]
drm/panel: Add BOE BF060Y8M-AJ0 5.99" AMOLED panel driver

This adds support for the BOE BF060Y8M-AJ0 5.99" AMOLED module
that can be found in some F(x)Tec Pro1 and Elephone U1 devices.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210901173115.998628-1-angelogioacchino.delregno@somainline.org
3 years agodt-bindings: display: Document BOE BF060Y8M-AJ0 panel compatible
AngeloGioacchino Del Regno [Wed, 1 Sep 2021 17:31:15 +0000 (19:31 +0200)]
dt-bindings: display: Document BOE BF060Y8M-AJ0 panel compatible

Document the boe,bf060y8m-aj0 panel.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210901173115.998628-2-angelogioacchino.delregno@somainline.org
3 years agodrm/panel: Add driver for Novatek NT35950 DSI DriverIC panels
AngeloGioacchino Del Regno [Wed, 1 Sep 2021 17:31:26 +0000 (19:31 +0200)]
drm/panel: Add driver for Novatek NT35950 DSI DriverIC panels

Add a driver for panels using the Novatek NT35950 Display Driver IC,
including support for the Sharp LS055D1SX04, found in some Sony Xperia
Z5 Premium and XZ Premium smartphones.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210901173127.998901-1-angelogioacchino.delregno@somainline.org
3 years agodt-bindings: display: Add bindings for Novatek NT35950
AngeloGioacchino Del Regno [Wed, 1 Sep 2021 17:31:27 +0000 (19:31 +0200)]
dt-bindings: display: Add bindings for Novatek NT35950

The nt35950 IC from Novatek is a Driver IC used to drive MIPI-DSI panels,
with Static RAM for content retention in command mode and also supports
video mode with VESA Frame Buffer Compression or Display Stream Compression
on single, or dual dsi port(s).
This DDIC is also capable of upscaling an input image to the panel's native
resolution, for example it can upscale a 1920x1080 input to 3840x2160 with
either bilinear interpolation or pixel duplication.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210901173127.998901-2-angelogioacchino.delregno@somainline.org
3 years agodrm/bridge: ti-sn65dsi83: Optimize reset line toggling
Marek Vasut [Sat, 16 Oct 2021 21:04:02 +0000 (23:04 +0200)]
drm/bridge: ti-sn65dsi83: Optimize reset line toggling

Current code always sets reset line low in .pre_enable callback and
holds it low for 10ms. This is sub-optimal and increases the time
between enablement of the DSI83 and valid LVDS clock.

Rework the reset handling such that the reset line is held low for 10ms
both in probe() of the driver and .disable callback, which guarantees
that the reset line was always held low for more than 10ms and therefore
the reset line timing requirement is satisfied. Furthermore, move the
reset handling into .enable callback so the entire DSI83 initialization
is now in one place.

This reduces DSI83 enablement delay by up to 10ms.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Robert Foss <robert.foss@linaro.org>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20211016210402.171595-1-marex@denx.de
3 years agodrm/panel: ilitek-ili9881c: Make gpio-reset optional
Michael Trimarchi [Sat, 16 Oct 2021 10:22:31 +0000 (10:22 +0000)]
drm/panel: ilitek-ili9881c: Make gpio-reset optional

Depends in how logic is connected to the board the gpio is
not stricly required.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20211016102232.202119-5-michael@amarulasolutions.com
3 years agodrm/panel: ilitek-ili9881d: add support for Wanchanglong W552946ABA panel
Michael Trimarchi [Sat, 16 Oct 2021 10:22:29 +0000 (10:22 +0000)]
drm/panel: ilitek-ili9881d: add support for Wanchanglong W552946ABA panel

W552946ABA is a panel by Wanchanglong. This panel utilizes the
Ilitek ILI9881D controller.

Add this panel's initialzation sequence and timing to ILI9881D driver.
Tested on px30-evb v11

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20211016102232.202119-3-michael@amarulasolutions.com
3 years agodt-bindings: ili9881c: add compatible string for Wanchanglong w552946aba
Michael Trimarchi [Sat, 16 Oct 2021 10:22:30 +0000 (10:22 +0000)]
dt-bindings: ili9881c: add compatible string for Wanchanglong w552946aba

It utilizes an Ilitek ILI9881D controller chip, but its
compatible with ili9881c so should be added to ilitek,ili9881c file.

Add the compatible string for it.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20211016102232.202119-4-michael@amarulasolutions.com
3 years agodt-bindings: vendor-prefix: add Wanchanglong Electronics Technology
Michael Trimarchi [Sat, 16 Oct 2021 10:22:28 +0000 (10:22 +0000)]
dt-bindings: vendor-prefix: add Wanchanglong Electronics Technology

Wanchanglong Electronics Technology is a company to provide LCD
modules.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20211016102232.202119-2-michael@amarulasolutions.com
3 years agodt-bindings: display/bridge: sil, sii9234: Convert to YAML binding
AngeloGioacchino Del Regno [Wed, 6 Oct 2021 15:21:58 +0000 (17:21 +0200)]
dt-bindings: display/bridge: sil, sii9234: Convert to YAML binding

Convert the Silicon Image SiI9234 HDMI/MHL bridge documentation to YAML.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20211006152158.601856-1-angelogioacchino.delregno@collabora.com
3 years agovideo: omapfb: replace snprintf in show functions with sysfs_emit
Qing Wang [Wed, 13 Oct 2021 03:28:13 +0000 (20:28 -0700)]
video: omapfb: replace snprintf in show functions with sysfs_emit

coccicheck complains about the use of snprintf() in sysfs show functions.

Fix the coccicheck warning:
WARNING: use scnprintf or sprintf.

Use sysfs_emit instead of scnprintf or sprintf makes more sense.

Signed-off-by: Qing Wang <wangqing@vivo.com>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/1634095693-4428-1-git-send-email-wangqing@vivo.com
3 years agovideo: fbdev: replace snprintf in show functions with sysfs_emit
Qing Wang [Wed, 13 Oct 2021 03:28:00 +0000 (20:28 -0700)]
video: fbdev: replace snprintf in show functions with sysfs_emit

coccicheck complains about the use of snprintf() in sysfs show functions.

Fix the coccicheck warning:
WARNING: use scnprintf or sprintf.

Use sysfs_emit instead of scnprintf or sprintf makes more sense.

Signed-off-by: Qing Wang <wangqing@vivo.com>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/1634095680-4377-1-git-send-email-wangqing@vivo.com
3 years agodt-bindings: display/bridge: ptn3460: Convert to YAML binding
AngeloGioacchino Del Regno [Thu, 7 Oct 2021 07:58:22 +0000 (09:58 +0200)]
dt-bindings: display/bridge: ptn3460: Convert to YAML binding

Convert the NXP PTN3460 eDP to LVDS bridge documentation to YAML.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20211007075822.62411-1-angelogioacchino.delregno@collabora.com
3 years agodrm/tiny: ili9163: fix build
Sam Ravnborg [Fri, 15 Oct 2021 18:35:00 +0000 (20:35 +0200)]
drm/tiny: ili9163: fix build

Commit build fix that I forgot to amend :-(

Fixes: 50848e3787ad ("drm/tiny: add driver for newhaven, 1.8-128160EF")
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Daniel Mack <daniel@zonque.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20211015150131.1020878-3-daniel@zonque.org
3 years agodrm/tiny: add driver for newhaven, 1.8-128160EF
Daniel Mack [Fri, 15 Oct 2021 15:01:31 +0000 (17:01 +0200)]
drm/tiny: add driver for newhaven, 1.8-128160EF

This patch adds support for Newhaven's NHD-1.8-128160EF display, featuring
an Ilitek ILI9163 controller.

Signed-off-by: Daniel Mack <daniel@zonque.org>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20211015150131.1020878-3-daniel@zonque.org
3 years agodt-bindings: display: add bindings for newhaven, 1.8-128160EF
Daniel Mack [Fri, 15 Oct 2021 15:01:30 +0000 (17:01 +0200)]
dt-bindings: display: add bindings for newhaven, 1.8-128160EF

This adds documentation for a new ILI9163 based, SPI connected display.

Signed-off-by: Daniel Mack <daniel@zonque.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20211015150131.1020878-2-daniel@zonque.org
3 years agodrm/i915: Clean up PXP Kconfig info.
Rodrigo Vivi [Thu, 14 Oct 2021 17:12:54 +0000 (13:12 -0400)]
drm/i915: Clean up PXP Kconfig info.

During the review I focused on stop the using of the "+"
to reference the newer platforms, but I forgot that we are
in a process of making things more clear and differentiate
graphics and display versions. So, let me to clean up this
a bit. Also, we don't need any version mentioned in the
config menu entry, only in the help.

Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211015090916.82968-1-rodrigo.vivi@intel.com
3 years agodrm/panel: dsi-cm: replace snprintf in show functions with sysfs_emit
Qing Wang [Fri, 15 Oct 2021 06:48:10 +0000 (23:48 -0700)]
drm/panel: dsi-cm: replace snprintf in show functions with sysfs_emit

show() must not use snprintf() when formatting the value to be
returned to user space.

Fix the following coccicheck warning:
drivers/gpu/drm/panel/panel-dsi-cm.c:251: WARNING: use scnprintf or sprintf.
drivers/gpu/drm/panel/panel-dsi-cm.c:271: WARNING: use scnprintf or sprintf.

Use sysfs_emit instead of scnprintf or sprintf makes more sense.

Signed-off-by: Qing Wang <wangqing@vivo.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/1634280490-4429-1-git-send-email-wangqing@vivo.com
3 years agodrm/i915: Enable multi-bb execbuf
Matthew Brost [Thu, 14 Oct 2021 17:20:04 +0000 (10:20 -0700)]
drm/i915: Enable multi-bb execbuf

Enable multi-bb execbuf by enabling the set_parallel extension.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-25-matthew.brost@intel.com
3 years agodrm/i915: Update I915_GEM_BUSY IOCTL to understand composite fences
Matthew Brost [Thu, 14 Oct 2021 17:20:03 +0000 (10:20 -0700)]
drm/i915: Update I915_GEM_BUSY IOCTL to understand composite fences

Parallel submission create composite fences (dma_fence_array) for excl /
shared slots in objects. The I915_GEM_BUSY IOCTL checks these slots to
determine the busyness of the object. Prior to patch it only check if
the fence in the slot was a i915_request. Update the check to understand
composite fences and correctly report the busyness.

v2:
 (Tvrtko)
  - Remove duplicate BUILD_BUG_ON

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-24-matthew.brost@intel.com
3 years agodrm/i915: Make request conflict tracking understand parallel submits
Matthew Brost [Thu, 14 Oct 2021 17:20:02 +0000 (10:20 -0700)]
drm/i915: Make request conflict tracking understand parallel submits

If an object in the excl or shared slot is a composite fence from a
parallel submit and the current request in the conflict tracking is from
the same parallel context there is no need to enforce ordering as the
ordering is already implicit. Make the request conflict tracking
understand this by comparing a parallel submit's parent context and
skipping conflict insertion if the values match.

v2:
 (John Harrison)
  - Reword commit message

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-23-matthew.brost@intel.com
3 years agodrm/i915/guc: Handle errors in multi-lrc requests
Matthew Brost [Thu, 14 Oct 2021 17:20:01 +0000 (10:20 -0700)]
drm/i915/guc: Handle errors in multi-lrc requests

If an error occurs in the front end when multi-lrc requests are getting
generated we need to skip these in the backend but we still need to
emit the breadcrumbs seqno. An issues arises because with multi-lrc
breadcrumbs there is a handshake between the parent and children to make
forward progress. If all the requests are not present this handshake
doesn't work. To work around this, if multi-lrc request has an error we
skip the handshake but still emit the breadcrumbs seqno.

v2:
 (John Harrison)
  - Add comment explaining the skipping of the handshake logic
  - Fix typos in the commit message
v3:
 (John Harrison)
  - Fix up some comments about the math to NOP the ring

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-22-matthew.brost@intel.com
3 years agodrm/i915: Multi-BB execbuf
Matthew Brost [Thu, 14 Oct 2021 17:20:00 +0000 (10:20 -0700)]
drm/i915: Multi-BB execbuf

Allow multiple batch buffers to be submitted in a single execbuf IOCTL
after a context has been configured with the 'set_parallel' extension.
The number batches is implicit based on the contexts configuration.

This is implemented with a series of loops. First a loop is used to find
all the batches, a loop to pin all the HW contexts, a loop to create all
the requests, a loop to submit (emit BB start, etc...) all the requests,
a loop to tie the requests to the VMAs they touch, and finally a loop to
commit the requests to the backend.

A composite fence is also created for the generated requests to return
to the user and to stick in dma resv slots.

No behavior from the existing IOCTL should be changed aside from when
throttling because the ring for a context is full. In this situation,
i915 will now wait while holding the object locks. This change was done
because the code is much simpler to wait while holding the locks and we
believe there isn't a huge benefit of dropping these locks. If this
proves false we can restructure the code to drop the locks during the
wait.

IGT: https://patchwork.freedesktop.org/patch/447008/?series=93071&rev=1
media UMD: https://github.com/intel/media-driver/pull/1252

v2:
 (Matthew Brost)
  - Return proper error value if i915_request_create fails
v3:
 (John Harrison)
  - Add comment explaining create / add order loops + locking
  - Update commit message explaining different in IOCTL behavior
  - Line wrap some comments
  - eb_add_request returns void
  - Return -EINVAL rather triggering BUG_ON if cmd parser used
 (Checkpatch)
  - Check eb->batch_len[*current_batch]
v4:
 (CI)
  - Set batch len if passed if via execbuf args
  - Call __i915_request_skip after __i915_request_commit
 (Kernel test robot)
  - Initialize rq to NULL in eb_pin_timeline
v5:
 (John Harrison)
  - Fix typo in comments near bb order loops

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-21-matthew.brost@intel.com
3 years agodrm/i915/guc: Implement no mid batch preemption for multi-lrc
Matthew Brost [Thu, 14 Oct 2021 17:19:59 +0000 (10:19 -0700)]
drm/i915/guc: Implement no mid batch preemption for multi-lrc

For some users of multi-lrc, e.g. split frame, it isn't safe to preempt
mid BB. To safely enable preemption at the BB boundary, a handshake
between parent and child is needed, syncing the set of BBs at the
beginning and end of each batch. This is implemented via custom
emit_bb_start & emit_fini_breadcrumb functions and enabled by default if
a context is configured by set parallel extension.

Lastly, this patch updates the process descriptor to the correct size as
the memory used in the handshake is directly after the process
descriptor.

v2:
 (John Harrison)
  - Fix a few comments wording
  - Add struture for parent page layout
v3:
 (John Harrison)
  - A structure for sync semaphore
  - Use offsetof to calc address
  - Update commit message
v4:
 (John Harrison)
  - Fix typos in comment explaining memory map of scratch page

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-20-matthew.brost@intel.com
3 years agodrm/i915/guc: Add basic GuC multi-lrc selftest
Matthew Brost [Thu, 14 Oct 2021 17:19:58 +0000 (10:19 -0700)]
drm/i915/guc: Add basic GuC multi-lrc selftest

Add very basic (single submission) multi-lrc selftest.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-19-matthew.brost@intel.com
3 years agodrm/i915/doc: Update parallel submit doc to point to i915_drm.h
Matthew Brost [Thu, 14 Oct 2021 17:19:57 +0000 (10:19 -0700)]
drm/i915/doc: Update parallel submit doc to point to i915_drm.h

Update parallel submit doc to point to i915_drm.h

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-18-matthew.brost@intel.com
3 years agodrm/i915/guc: Connect UAPI to GuC multi-lrc interface
Matthew Brost [Thu, 14 Oct 2021 17:19:56 +0000 (10:19 -0700)]
drm/i915/guc: Connect UAPI to GuC multi-lrc interface

Introduce 'set parallel submit' extension to connect UAPI to GuC
multi-lrc interface. Kernel doc in new uAPI should explain it all.

IGT: https://patchwork.freedesktop.org/patch/447008/?series=93071&rev=1
media UMD: https://github.com/intel/media-driver/pull/1252

v2:
 (Daniel Vetter)
  - Add IGT link and placeholder for media UMD link
v3:
 (Kernel test robot)
  - Fix warning in unpin engines call
 (John Harrison)
  - Reword a bunch of the kernel doc
v4:
 (John Harrison)
  - Add comment why perma-pin is done after setting gem context
  - Update some comments / docs for proto contexts
v5:
 (John Harrison)
  - Rework perma-pin comment
  - Add BUG_IN if context is pinned when setting gem context

Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-17-matthew.brost@intel.com
3 years agodrm/i915/guc: Update debugfs for GuC multi-lrc
Matthew Brost [Thu, 14 Oct 2021 17:19:55 +0000 (10:19 -0700)]
drm/i915/guc: Update debugfs for GuC multi-lrc

Display the workqueue status in debugfs for GuC contexts that are in
parent-child relationship.

v2:
 (John Harrison)
  - Output number children in debugfs

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-16-matthew.brost@intel.com
3 years agodrm/i915/guc: Implement multi-lrc reset
Matthew Brost [Thu, 14 Oct 2021 17:19:54 +0000 (10:19 -0700)]
drm/i915/guc: Implement multi-lrc reset

Update context and full GPU reset to work with multi-lrc. The idea is
parent context tracks all the active requests inflight for itself and
its children. The parent context owns the reset replaying / canceling
requests as needed.

v2:
 (John Harrison)
  - Simply loop in find active request
  - Add comments to find ative request / reset loop
v3:
 (John Harrison)
  - s/its'/its/g
  - Fix comment when searching for active request
  - Reorder if state in __guc_reset_context
v4:
 (Kernel test robot)
  - Delete unused is_multi_lrc function

Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-15-matthew.brost@intel.com
3 years agodrm/i915/guc: Insert submit fences between requests in parent-child relationship
Matthew Brost [Thu, 14 Oct 2021 17:19:53 +0000 (10:19 -0700)]
drm/i915/guc: Insert submit fences between requests in parent-child relationship

The GuC must receive requests in the order submitted for contexts in a
parent-child relationship to function correctly. To ensure this, insert
a submit fence between the current request and last request submitted
for requests / contexts in a parent child relationship. This is
conceptually similar to a single timeline.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-14-matthew.brost@intel.com
3 years agodrm/i915/guc: Implement multi-lrc submission
Matthew Brost [Thu, 14 Oct 2021 17:19:52 +0000 (10:19 -0700)]
drm/i915/guc: Implement multi-lrc submission

Implement multi-lrc submission via a single workqueue entry and single
H2G. The workqueue entry contains an updated tail value for each
request, of all the contexts in the multi-lrc submission, and updates
these values simultaneously. As such, the tasklet and bypass path have
been updated to coalesce requests into a single submission.

v2:
 (John Harrison)
  - s/wqe/wqi
  - Use FIELD_PREP macros
  - Add GEM_BUG_ONs ensures length fits within field
  - Add comment / white space to intel_guc_write_barrier
 (Kernel test robot)
  - Make need_tasklet a static function
v3:
 (Docs)
  - A comment for submission_stall_reason
v4:
 (Kernel test robot)
  - Initialize return value in bypass tasklt submit function
 (John Harrison)
  - Add comment near work queue defs
  - Add BUILD_BUG_ON to ensure WQ_SIZE is a power of 2
  - Update write_barrier comment to talk about work queue
v5:
 (John Harrison)
  - Fix typo in work queue comment

Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-13-matthew.brost@intel.com
3 years agodrm/i915/guc: Implement parallel context pin / unpin functions
Matthew Brost [Thu, 14 Oct 2021 17:19:51 +0000 (10:19 -0700)]
drm/i915/guc: Implement parallel context pin / unpin functions

Parallel contexts are perma-pinned by the upper layers which makes the
backend implementation rather simple. The parent pins the guc_id and
children increment the parent's pin count on pin to ensure all the
contexts are unpinned before we disable scheduling with the GuC / or
deregister the context.

v2:
 (Daniel Vetter)
  - Perma-pin parallel contexts

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-12-matthew.brost@intel.com
3 years agodrm/i915/guc: Assign contexts in parent-child relationship consecutive guc_ids
Matthew Brost [Thu, 14 Oct 2021 17:19:50 +0000 (10:19 -0700)]
drm/i915/guc: Assign contexts in parent-child relationship consecutive guc_ids

Assign contexts in parent-child relationship consecutive guc_ids. This
is accomplished by partitioning guc_id space between ones that need to
be consecutive (1/16 available guc_ids) and ones that do not (15/16 of
available guc_ids). The consecutive search is implemented via the bitmap
API.

This is a precursor to the full GuC multi-lrc implementation but aligns
to how GuC mutli-lrc interface is defined - guc_ids must be consecutive
when using the GuC multi-lrc interface.

v2:
 (Daniel Vetter)
  - Explicitly state why we assign consecutive guc_ids
v3:
 (John Harrison)
  - Bring back in spin lock

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-11-matthew.brost@intel.com
3 years agodrm/i915/guc: Ensure GuC schedule operations do not operate on child contexts
Matthew Brost [Thu, 14 Oct 2021 17:19:49 +0000 (10:19 -0700)]
drm/i915/guc: Ensure GuC schedule operations do not operate on child contexts

In GuC parent-child contexts the parent context controls the scheduling,
ensure only the parent does the scheduling operations.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-10-matthew.brost@intel.com
3 years agodrm/i915/guc: Add multi-lrc context registration
Matthew Brost [Thu, 14 Oct 2021 17:19:48 +0000 (10:19 -0700)]
drm/i915/guc: Add multi-lrc context registration

Add multi-lrc context registration H2G. In addition a workqueue and
process descriptor are setup during multi-lrc context registration as
these data structures are needed for multi-lrc submission.

v2:
 (John Harrison)
  - Move GuC specific fields into sub-struct
  - Clean up WQ defines
  - Add comment explaining math to derive WQ / PD address
v3:
 (John Harrison)
  - Add PARENT_SCRATCH_SIZE define
  - Update comment explaining multi-lrc register
v4:
 (John Harrison)
  - Move PARENT_SCRATCH_SIZE to common file

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-9-matthew.brost@intel.com
3 years agodrm/i915/guc: Introduce context parent-child relationship
Matthew Brost [Thu, 14 Oct 2021 17:19:47 +0000 (10:19 -0700)]
drm/i915/guc: Introduce context parent-child relationship

Introduce context parent-child relationship. Once this relationship is
created all pinning / unpinning operations are directed to the parent
context. The parent context is responsible for pinning all of its
children and itself.

This is a precursor to the full GuC multi-lrc implementation but aligns
to how GuC mutli-lrc interface is defined - a single H2G is used
register / deregister all of the contexts simultaneously.

Subsequent patches in the series will implement the pinning / unpinning
operations for parent / child contexts.

v2:
 (Daniel Vetter)
  - Add kernel doc, add wrapper to access parent to ensure safety
v3:
 (John Harrison)
  - Fix comment explaing GEM_BUG_ON in to_parent()
  - Make variable names generic (non-GuC specific)
v4:
 (John Harrison)
  - s/its'/its/g

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-8-matthew.brost@intel.com
3 years agodrm/i915: Expose logical engine instance to user
Matthew Brost [Thu, 14 Oct 2021 17:19:46 +0000 (10:19 -0700)]
drm/i915: Expose logical engine instance to user

Expose logical engine instance to user via query engine info IOCTL. This
is required for split-frame workloads as these needs to be placed on
engines in a logically contiguous order. The logical mapping can change
based on fusing. Rather than having user have knowledge of the fusing we
simply just expose the logical mapping with the existing query engine
info IOCTL.

IGT: https://patchwork.freedesktop.org/patch/445637/?series=92854&rev=1
media UMD: https://github.com/intel/media-driver/pull/1252

v2:
 (Daniel Vetter)
  - Add IGT link, placeholder for media UMD

Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-7-matthew.brost@intel.com
3 years agodrm/i915: Add logical engine mapping
Matthew Brost [Thu, 14 Oct 2021 17:19:45 +0000 (10:19 -0700)]
drm/i915: Add logical engine mapping

Add logical engine mapping. This is required for split-frame, as
workloads need to be placed on engines in a logically contiguous manner.

v2:
 (Daniel Vetter)
  - Add kernel doc for new fields
v3:
 (Tvrtko)
  - Update comment for new logical_mask field
v4:
 (John Harrison)
  - Update comment for new logical_mask field

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-6-matthew.brost@intel.com
3 years agodrm/i915/guc: Don't call switch_to_kernel_context with GuC submission
Matthew Brost [Thu, 14 Oct 2021 17:19:44 +0000 (10:19 -0700)]
drm/i915/guc: Don't call switch_to_kernel_context with GuC submission

Calling switch_to_kernel_context isn't needed if the engine PM reference
is taken while all user contexts are pinned as if don't have PM ref that
guarantees that all user contexts scheduling is disabled. By not calling
switch_to_kernel_context we save on issuing a request to the engine.

v2:
 (Daniel Vetter)
  - Add FIXME comment about pushing switch_to_kernel_context to backend
v3:
 (John Harrison)
  - Update commit message
  - Fix workding comment

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-5-matthew.brost@intel.com
3 years agodrm/i915/guc: Take engine PM when a context is pinned with GuC submission
Matthew Brost [Thu, 14 Oct 2021 17:19:43 +0000 (10:19 -0700)]
drm/i915/guc: Take engine PM when a context is pinned with GuC submission

Taking a PM reference to prevent intel_gt_wait_for_idle from short
circuiting while any user context has scheduling enabled. Returning GT
idle when it is not can cause all sorts of issues throughout the stack.

v2:
 (Daniel Vetter)
  - Add might_lock annotations to pin / unpin function
v3:
 (CI)
  - Drop intel_engine_pm_might_put from unpin path as an async put is
    used
v4:
 (John Harrison)
  - Make intel_engine_pm_might_get/put work with GuC virtual engines
  - Update commit message
v5:
  - Update commit message again

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-4-matthew.brost@intel.com