Boris Brezillon [Thu, 19 Jul 2018 07:37:20 +0000 (09:37 +0200)]
mtd: rawnand: jz4740: Use the proper format specifier to print chipnr
In jz_nand_detect_bank(), chipnr is a size_t argument. Use %zu instead
of %i when printing it.
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Mon, 9 Jul 2018 20:09:44 +0000 (22:09 +0200)]
mtd: rawnand: jz4780: Drop the dependency on MACH_JZ4780
This MACH_JZ4780 dependency is taken care of by JZ4780_NEMC, no need
to repeat it here.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Acked-by: Paul Burton <paul.burton@mips.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Mon, 9 Jul 2018 20:09:43 +0000 (22:09 +0200)]
mtd: rawnand: jz4740: Allow selection of this driver when COMPILE_TEST=y
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having MACH_JZ4740 enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Acked-by: Paul Burton <paul.burton@mips.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Mon, 9 Jul 2018 20:09:42 +0000 (22:09 +0200)]
MIPS: jz4740: Move jz4740_nand.h header to include/linux/platform_data/jz4740
This way we will be able to compile the jz4740_nand driver when
COMPILE_TEST=y.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Acked-by: Paul Burton <paul.burton@mips.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Mon, 9 Jul 2018 20:09:41 +0000 (22:09 +0200)]
mtd: rawnand: txx9ndfmc: Allow selection of this driver when COMPILE_TEST=y
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having SOC_TX4938 or SOC_TX4939
enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Acked-by: Paul Burton <paul.burton@mips.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Mon, 9 Jul 2018 20:09:40 +0000 (22:09 +0200)]
MIPS: txx9: Move the ndfc.h header to include/linux/platform_data/txx9
This way we will be able to compile the ndfmc driver when
COMPILE_TEST=y.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Acked-by: Paul Burton <paul.burton@mips.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Mon, 9 Jul 2018 20:09:39 +0000 (22:09 +0200)]
mtd: rawnand: fsl_ifc: Allow selection of this driver when COMPILE_TEST=y
It just makes maintainers' life easier by allowing them to compile-test
this driver without having FSL_SOC, ARCH_LAYERSCAPE or SOC_LS1021A
enabled.
We also need to add a dependency on HAS_IOMEM to make sure the
driver compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Mon, 9 Jul 2018 20:09:38 +0000 (22:09 +0200)]
mtd: rawnand: fsl_ifc: Add an __iomem specifier on eccstat_regs
The local eccstat_regs variable in fsl_ifc_run_command() is missing an
__iomem specifier, and sparce complains about that.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Mon, 9 Jul 2018 20:09:37 +0000 (22:09 +0200)]
memory: fsl_ifc: Allow selection of this driver when COMPILE_TEST=y
It just makes maintainers' life easier by allowing them to compile-test
this driver without having FSL_SOC, ARCH_LAYERSCAPE or SOC_LS1021A
enabled.
We also need to add a dependency on HAS_IOMEM to make sure the
driver compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Mon, 9 Jul 2018 20:09:36 +0000 (22:09 +0200)]
mtd: rawnand: fsmc: Allow selection of this driver when COMPILE_TEST=y
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having PLAT_SPEAR, ARCH_NOMADIK,
ARCH_U8500 or MACH_U300 enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Mon, 9 Jul 2018 20:09:35 +0000 (22:09 +0200)]
mtd: rawnand: fsmc: Use uintptr_t casts instead of unsigned ones
uintptr_t should be used when casting a pointer to an unsigned int so
that the code compiles without warnings even on 64-bit architectures.
This is needed if we want to allow selection of this driver when
COMPILE_TEST=y.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Mon, 9 Jul 2018 20:09:34 +0000 (22:09 +0200)]
mtd: rawnand: fscm: Avoid collision on PC def when compiling for MIPS
We want to allow this driver to be selected when COMPILE_TEST=y, this
means the driver can be compiled for any arch, including MIPS. When
compiling this driver for MIPS, we end up with a collision on the 'PC'
macro definition (also defined in arch/mips/include/asm/ptrace.h).
Prefix the fsmc one with FSMC_ to avoid this problem.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Mon, 9 Jul 2018 20:09:33 +0000 (22:09 +0200)]
mtd: rawnand: sunxi: Allow selection of this driver when COMPILE_TEST=y
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having ARCH_SUNXI enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Mon, 9 Jul 2018 20:09:32 +0000 (22:09 +0200)]
mtd: rawnand: sunxi: Make sure ret is initialized in sunxi_nfc_read_byte()
Fixes the following smatch warning:
drivers/mtd/nand/raw/sunxi_nand.c:551 sunxi_nfc_read_byte() error: uninitialized symbol 'ret'.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Mon, 9 Jul 2018 20:09:31 +0000 (22:09 +0200)]
mtd: rawnand: sunxi: Add an U suffix to NFC_PAGE_OP definition
Fixes the "warning: large integer implicitly truncated to unsigned type
[-Woverflow]" warning when compiled for x86.
This is needed in order to allow compiling this driver when
COMPILE_TEST=y.
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Mon, 9 Jul 2018 20:09:30 +0000 (22:09 +0200)]
mtd: rawnand: davinci: Allow selection of this driver when COMPILE_TEST=y
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having ARCH_DAVINCI or ARCH_KEYSTONE
enabled.
We also need to add a dependency on HAS_IOMEM to make sure the
driver compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Miquel Raynal [Wed, 18 Jul 2018 07:04:12 +0000 (09:04 +0200)]
mtd: rawnand: fix indentation in Kconfig
Rules about Kconfig are simple but in the raw NAND directory indentation
is somehow archaic. Fix the indentation in the whole file.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Mon, 9 Jul 2018 20:09:29 +0000 (22:09 +0200)]
mtd: rawnand: davinci: Use uintptr_t casts instead of unsigned ones
uintptr_t should be used when casting a pointer to an unsigned int so
that the code compiles without warnings even on 64-bit architectures.
This is needed if we want to allow selection of this driver when
COMPILE_TEST=y.
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Mon, 9 Jul 2018 20:09:28 +0000 (22:09 +0200)]
mtd: rawnand: davinci: Stop doing iomem pointer <-> u32 conversions
There is no point in doing this sort of conversion since we can
replace |= by += operations which are perfectly valid on pointers.
This is done in preparation of COMPILE_TEST addition to the NAND_DAVINCI
Kconfig entry, since building for x86 generates several warnings because
of inappropriate u32 <-> void * conversions (pointers are 64-bit large
on x86_64).
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Mon, 9 Jul 2018 20:09:24 +0000 (22:09 +0200)]
mtd: rawnand: atmel: Allow selection of this driver when COMPILE_TEST=y
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having ARCH_AT91 enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Mon, 9 Jul 2018 20:09:23 +0000 (22:09 +0200)]
mtd: rawnand: atmel: Add an __iomem cast on gen_pool_dma_alloc() call
gen_pool_dma_alloc() return type is void *, while internally, the
memory region exposed by the sram driver has been mapped with
ioremap().
Add a void * to void __iomem * cast to make sparse happy.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Mon, 9 Jul 2018 20:09:22 +0000 (22:09 +0200)]
mtd: rawnand: atmel: Use uintptr_t casts instead of unsigned int
When casting a pointer to an unsigned int, uintptr_t should be used to
cope with the pointer size differences between 32-bit and 64-bit
architectures.
This is needed if we want to allow compilation of this driver when
COMPILE_TEST=y.
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Wed, 4 Jul 2018 14:08:58 +0000 (16:08 +0200)]
mtd: rawnand: hynix: Use ->exec_op() in hynix_nand_reg_write_op()
Modern NAND controller drivers implement ->exec_op() instead of
->cmdfunc(), make sure we don't end up with a NULL pointer dereference
when hynix_nand_reg_write_op() is called.
Fixes:
8878b126df76 ("mtd: nand: add ->exec_op() implementation")
Cc: <stable@vger.kernel.org>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Daniel Mack [Sun, 8 Jul 2018 00:10:08 +0000 (02:10 +0200)]
mtd: rawnand: marvell: set reg_clk to NULL if it can't be obtained
Don't keep an error-pointer around in the private struct. If this optional
clock can't be obtained, simply set the pointer to NULL instead so we can
use clk_prepare_enable() on it without further checks,
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Daniel Mack [Sun, 8 Jul 2018 00:10:07 +0000 (02:10 +0200)]
mtd: rawnand: marvell: remove bogus comment in marvell_nfc_select_chip()
The comment in marvell_nfc_select_chip() about ndtr0 and ndtr1 didn't
reflect what the driver was doing.
The values of NDTR0 and NDTR1 are read from the registers at probe time
and a copy is retained in 'struct marvell_nand_chip'. If keep-config is
set in the DT properties, there are no other writers of these timing
variables so they can safely be used when the chip is selected.
As suggested by Miquel Raynal, simply remove the comment.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Daniel Mack [Sun, 8 Jul 2018 00:10:06 +0000 (02:10 +0200)]
mtd: rawnand: marvell: add suspend and resume hooks
This patch restores the suspend and resume hooks that the old driver used
to have. Apart from stopping and starting the clocks, the resume callback
also nullifies the selected_chip pointer, so the next command that is issued
will re-select the chip and thereby restore the timing registers.
Factor out some code from marvell_nfc_init() into a new function
marvell_nfc_reset() and also call it at resume time to reset some registers
that don't retain their contents during low-power mode.
Without this patch, a PXA3xx based system would cough up an error similar to
the one below after resume.
[ 44.660162] marvell-nfc
43100000.nand-controller: Timeout waiting for RB signal
[ 44.671492] ubi0 error: ubi_io_write: error -110 while writing 2048 bytes to PEB 102:38912, written 0 bytes
[ 44.682887] CPU: 0 PID: 1417 Comm: remote-control Not tainted 4.18.0-rc2+ #344
[ 44.691197] Hardware name: Marvell PXA3xx (Device Tree Support)
[ 44.697111] Backtrace:
[ 44.699593] [<
c0106458>] (dump_backtrace) from [<
c0106718>] (show_stack+0x18/0x1c)
[ 44.708931] r7:
00000800 r6:
00009800 r5:
00000066 r4:
c6139000
[ 44.715833] [<
c0106700>] (show_stack) from [<
c0678a60>] (dump_stack+0x20/0x28)
[ 44.724206] [<
c0678a40>] (dump_stack) from [<
c0456cbc>] (ubi_io_write+0x3d4/0x630)
[ 44.732925] [<
c04568e8>] (ubi_io_write) from [<
c0454428>] (ubi_eba_write_leb+0x690/0x6fc)
...
Fixes:
02f26ecf8c77 ("mtd: nand: add reworked Marvell NAND controller driver")
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Fabio Estevam [Sat, 7 Jul 2018 17:25:21 +0000 (14:25 -0300)]
mtd: rawnand: mxc: Switch to SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance
management.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Fabio Estevam [Sat, 7 Jul 2018 17:25:20 +0000 (14:25 -0300)]
mtd: rawnand: gpmi: Switch to SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance
management.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Thu, 5 Jul 2018 10:27:33 +0000 (12:27 +0200)]
mtd: rawnand: plat_nand: Kill pdata->ctrl.{hwcontrol, read_byte}()
None of the board files are overloading those hooks, so let's drop them
from struct platform_nand_ctrl.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Thu, 5 Jul 2018 10:27:32 +0000 (12:27 +0200)]
mtd: rawnand: orion_nand: Kill orion_nand_data.dev_ready()
None of the boards seem to overload the ->dev_ready() hook, just drop
this field from orion_nand_data.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Thu, 5 Jul 2018 10:27:31 +0000 (12:27 +0200)]
mtd: rawnand: Kill the chip->scan_bbt() hook
None of the existing drivers are overloading the ->scan_bbt() method,
let's get rid of it and replace calls to ->scan_bbt() by
nand_create_bbt() ones.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Thu, 5 Jul 2018 10:27:30 +0000 (12:27 +0200)]
mtd: rawnand: Rename nand_default_bbt() into nand_create_bbt()
Rename nand_default_bbt() into nand_create_bbt() and pass it a nand_chip
object to prepare removal of the chip->scan_bbt() hook.
We add a temporary nand_default_bbt() wrapper which will be dropped
after the removal of ->scan_bbt().
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Thu, 5 Jul 2018 10:27:29 +0000 (12:27 +0200)]
mtd: rawnand: Remove forward declaration of device_node
struct device_node is defined in linux/of.h. Let's include this file
instead of having a forward declaration of this struct.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Thu, 5 Jul 2018 10:27:28 +0000 (12:27 +0200)]
mtd: rawnand: Remove forward declaration of mtd_info
struct mtd_info is defined in linux/mtd/mtd.h which is included
at the beginning of nand_base.c, there's thus no need for the
forward declaration of mtd_info.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Thu, 5 Jul 2018 10:27:27 +0000 (12:27 +0200)]
mtd: rawnand: Remove nand_do_read() prototype from rawnand.h
nand_do_read() is a static function implemented in nand_base.c. There's
no good reason to expose its prototype in rawnand.h.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Thu, 5 Jul 2018 10:27:26 +0000 (12:27 +0200)]
mtd: rawnand: Kill cafe_nand_bug()
Leaving a function pointer to NULL should be enough to trigger a NULL
pointer exception, and anyway, if we want to BUG() when some missing
hooks are called, this should be done in the core, so let's drop the
cafe_nand_bug() dummy function.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Thu, 5 Jul 2018 09:45:16 +0000 (11:45 +0200)]
bcma: Allow selection of this driver when COMPILE_TEST=y
This allows us to increase compile-test coverage without having to build
a kernel for MIPS. That's particularly interesting for subsystem
maintainers that want to test as many drivers as possible in a single
build.
We also add a dependency on HAS_IOMEM in BCMA_HOST_SOC to make sure the
driver is not selected when the arch does not implement IO accessors.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Acked-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Thu, 5 Jul 2018 09:45:13 +0000 (11:45 +0200)]
mtd: rawnand: nuc900: Allow selection of this driver when COMPILE_TEST=y
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having ARCH_W90X900 enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Thu, 5 Jul 2018 09:45:11 +0000 (11:45 +0200)]
mtd: rawnand: qcom: Allow selection of this driver when COMPILE_TEST=y
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having ARCH_QCOM enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Thu, 5 Jul 2018 09:45:08 +0000 (11:45 +0200)]
mtd: rawnand: mxc: Allow selection of this driver when COMPILE_TEST=y
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having ARCH_MXC enabled.
We also need to add a dependency on HAS_IOMEM to make sure the
driver compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Thu, 5 Jul 2018 09:45:07 +0000 (11:45 +0200)]
mtd: rawnand: mxc: Avoid inclusion of asm/mach headers
asm/mach/flash.h does not seem to be needed, drop this #include to make
the code completely machine and arch independent and allow one to
compile it when COMPILE_TEST=y.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Thu, 5 Jul 2018 09:45:04 +0000 (11:45 +0200)]
mtd: rawnand: brcmnand: Allow selection of this driver when COMPILE_TEST=y
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having ARM, ARM64 or MIPS enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Thu, 5 Jul 2018 09:45:03 +0000 (11:45 +0200)]
mtd: rawnand: lpc32xx: Allow selection of these drivers when COMPILE_TEST=y
It just makes NAND maintainers' life easier by allowing them to
compile-test these drivers without having ARCH_LPC32XX enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Thu, 5 Jul 2018 09:45:02 +0000 (11:45 +0200)]
mtd: rawnand: sharpsl: Allow selection of this driver when COMPILE_TEST=y
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having ARCH_PXA enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Thu, 5 Jul 2018 09:45:01 +0000 (11:45 +0200)]
mtd: rawnand: sharpsl: Remove inclusion of mach and asm headers
We don't need mach/hardware.h and sm/mach-types.h, and asm/io.h can be
replaced by linux/io.h.
Now that we removed those inclusions, we're ready to allow selection of
this driver when COMPILE_TEST=y.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Thu, 5 Jul 2018 09:44:59 +0000 (11:44 +0200)]
mtd: rawnand: omap2: Allow selection of this driver when COMPILE_TEST=y
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having ARCH_OMAP2PLUS or ARCH_KEYSTONE
enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Thu, 5 Jul 2018 09:44:57 +0000 (11:44 +0200)]
mtd: rawnand: Add 'depends on HAS_IOMEM' where missing
When COMPILE_TEST is allowed and the platform needs uses the iomem API
we need to add an explicit dependency on HAS_IOMEM to avoid selection
of these drivers when building for an arch that has no iomem support
(this is the case of arch/um).
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Thu, 5 Jul 2018 09:44:56 +0000 (11:44 +0200)]
mtd: rawnand: gpmi: Remove useless dependency on MTD_NAND
The MTD_NAND_GPMI_NAND entry is already defined in an 'if MTD_NAND'
block, no need to add an extra "depends on MTD_NAND".
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Abhishek Sahu [Tue, 3 Jul 2018 12:06:03 +0000 (17:36 +0530)]
mtd: rawnand: qcom: erased page bitflips detection
NAND parts can have bitflips in an erased page due to the
process technology used. In this case, QCOM NAND controller
is not able to identify that page as an erased page.
Currently the driver calls nand_check_erased_ecc_chunk() for
identifying the erased pages but this won’t work always since the
checking is being with ECC engine returned data. In case of
bitflips, the ECC engine tries to correct the data and then it
generates the uncorrectable error. Now, this data is not equal to
original raw data. For erased CW identification, the raw data
should be read again from NAND device and this
nand_check_erased_ecc_chunk function() should be called for raw
data only.
Now following logic is being added to identify the erased
codeword bitflips.
1. In most of the cases, not all the codewords will have bitflips
and only single CW will have bitflips. So, there is no need to
read the complete raw page data. The NAND raw read can be
scheduled for any CW in page. The NAND controller works on CW
basis and it will update the status register after each CW read.
Maintain the bitmask for the CW which generated the uncorrectable
error.
2. Do raw read for all the CW's which generated the uncorrectable
error.
3. Both DATA and OOB need to be checked for number of 0. The
top-level API can be called with only data buf or OOB buf so use
chip->databuf if data buf is null and chip->oob_poi if
OOB buf is null for copying the raw bytes temporarily.
4. For each CW, check the number of 0 in cw_data and usable
oob bytes, The bbm and spare (unused) bytes bit flip won’t
affect the ECC so don’t check the number of bitflips in this area.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Colin Ian King [Tue, 3 Jul 2018 08:12:14 +0000 (09:12 +0100)]
mtd: rawnand: gpmi: remove redundant variable payload_virt
Variable payload_virt is being assigned but is never used hence it is
redundant and can be removed.
Cleans up clang warning:
warning: variable 'payload_virt' set but not used [-Wunused-but-set-variable]
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Miquel Raynal [Sun, 25 Feb 2018 22:09:14 +0000 (23:09 +0100)]
mtd: rawnand: docg4: fix the probe function error path
nand_release() should not be called on an MTD device that has not been
registered. While it should work thanks to the checks done in
mtd_device_unregister() it's a bad practice to cleanup/release
something that has not previously been initialized/allocated.
Rework the error path to follow this rule.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Masahiro Yamada [Fri, 22 Jun 2018 16:06:38 +0000 (01:06 +0900)]
mtd: rawnand: denali: optimize timing parameters for data interface
This commit improves the ->setup_data_interface() hook.
The denali_setup_data_interface() needs the frequency of clk_x
and the ratio of clk_x / clk.
The latter is currently hardcoded in the driver, like this:
#define DENALI_CLK_X_MULT 6
The IP datasheet requires that clk_x / clk be 4, 5, or 6. I just
chose 6 because it is the most defensive value, but it is not optimal.
By getting the clock rate of both "clk" and "clk_x", the driver can
compute the timing values more precisely.
To not break the existing platforms, the fallback value, 50 MHz is
provided. It is true for all upstreamed platforms.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Richard Weinberger <richard@nod.at>
Tested-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Masahiro Yamada [Fri, 22 Jun 2018 16:06:37 +0000 (01:06 +0900)]
mtd: rawnand: denali_dt: add more clocks based on IP datasheet
Currently, denali_dt.c requires a single anonymous clock, but
the Denali User's Guide requires three clocks for this IP:
- clk: controller core clock
- clk_x: bus interface clock
- ecc_clk: clock at which ECC circuitry is run
This commit supports these named clocks to represent the real hardware.
For the backward compatibility, the driver still accepts a single clock
just as before. The clk_x_rate is taken from the clock driver again if
the named clock "clk_x" is available. This will happen only for future
DT, hence the existing DT files are not affected.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Richard Weinberger <richard@nod.at>
Tested-by: Richard Weinberger <richard@nod.at>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Masahiro Yamada [Fri, 22 Jun 2018 16:06:36 +0000 (01:06 +0900)]
dt-binding: mtd: denali_dt: document clock property
Commit
30f9f2fb7ba0 ("mtd: denali: add a DT driver") supported the
clock enablement, but did not document it in the DT binding.
In addition to the existing clock, this commit adds more clocks based
on the IP specification.
According to the Denali User's Guide, this IP needs three clocks:
- clk: controller core clock
- clk_x: bus interface clock
- ecc_clk: clock at which ECC circuitry is run
The driver should accept the current single clock for the backward
compatibility, but the DT binding should represent the real hardware,
and future platforms must follow this.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Masahiro Yamada [Fri, 22 Jun 2018 16:06:35 +0000 (01:06 +0900)]
mtd: rawnand: denali_dt: use dev as a shorthand of &pdev->dev
The probe function references &pdev->dev many times, and I will add
more soon. Add 'dev' as a shorthand.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Richard Weinberger <richard@nod.at>
Tested-by: Richard Weinberger <richard@nod.at>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Martin Kaiser [Wed, 27 Jun 2018 20:47:44 +0000 (22:47 +0200)]
mtd: rawnand: mxc: remove __init qualifier from mxcnd_probe_dt
Using the sysfs unbind, bind nodes, mxcnd_probe and mxcnd_probe_dt can
potentially be called at any time. After the __init functions are cleaned,
mxcnd_probe_dt is no longer available. Calling it anyway causes a crash.
mxcnd_probe used to be marked as __init, this was removed years ago.
Remove the __init qualifier from from mxcnd_probe_dt as well.
Fixes:
06f255106923 ("mtd: remove use of __devinit")
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Miquel Raynal [Fri, 22 Jun 2018 12:28:28 +0000 (14:28 +0200)]
mtd: spinand: macronix: Add support for MX35LF2GE4AB
MX35LF2GE4AB is almost identical to MX35LF1GE4AB except it has 2 times
more eraseblocks per LUN and exposes 2 planes instead of 1.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Boris Brezillon [Fri, 22 Jun 2018 12:28:27 +0000 (14:28 +0200)]
mtd: spinand: Add initial support for the MX35LF1GE4AB chip
Add minimal support for the MX35LF1GE4AB SPI NAND chip.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Frieder Schrempf [Fri, 22 Jun 2018 12:28:26 +0000 (14:28 +0200)]
mtd: spinand: Add initial support for Winbond W25M02GV
Add support for the W25M02GV chip.
Signed-off-by: Frieder Schrempf <frieder.schrempf@exceet.de>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Peter Pan [Fri, 22 Jun 2018 12:28:25 +0000 (14:28 +0200)]
mtd: spinand: Add initial support for Micron MT29F2G01ABAGD
Add a basic driver for Micron SPI NANDs. Only one device is supported
right now, but the driver will be extended to support more devices
afterwards.
Signed-off-by: Peter Pan <peterpandong@micron.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Fri, 22 Jun 2018 12:28:24 +0000 (14:28 +0200)]
dt-bindings: Add bindings for SPI NAND devices
Add bindings for SPI NAND chips.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Peter Pan [Fri, 22 Jun 2018 12:28:23 +0000 (14:28 +0200)]
mtd: nand: Add core infrastructure to support SPI NANDs
Add a SPI NAND framework based on the generic NAND framework and the
spi-mem infrastructure.
In its current state, this framework supports the following features:
- single/dual/quad IO modes
- on-die ECC
Signed-off-by: Peter Pan <peterpandong@micron.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Abhishek Sahu [Wed, 20 Jun 2018 07:27:42 +0000 (12:57 +0530)]
mtd: rawnand: provide only single helper function for ECC conf
Function nand_ecc_choose_conf() will be help for all the cases, so
other helper functions can be made static.
nand_check_ecc_caps(): Invoke nand_ecc_choose_conf() with
both chip->ecc.size and chip->ecc.strength
value set.
nand_maximize_ecc(): Invoke nand_ecc_choose_conf() with
NAND_ECC_MAXIMIZE flag.
nand_match_ecc_req(): Invoke nand_ecc_choose_conf() with either
chip->ecc.size or chip->ecc.strength value
set and without NAND_ECC_MAXIMIZE flag.
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Abhishek Sahu [Wed, 20 Jun 2018 07:27:40 +0000 (12:57 +0530)]
mtd: rawnand: qcom: code reorganization for raw read
Make separate function to perform raw read for one codeword and
call this function multiple times for each codeword in case of
raw page read. This separate function will help in subsequent
patches related with erased codeword bitflip detection.
It will decrease throughput for raw page read. Raw page read
is used for debug purpose so it won't affect normal flash
operations.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Abhishek Sahu [Wed, 20 Jun 2018 07:27:39 +0000 (12:57 +0530)]
mtd: rawnand: qcom: check for operation errors in case of raw read
Currently there is no error checking for raw read. For raw
reads, there won’t be any ECC failure but the operational
failures are possible, so schedule the NAND_FLASH_STATUS read
after each codeword.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Abhishek Sahu [Wed, 20 Jun 2018 07:27:38 +0000 (12:57 +0530)]
mtd: rawnand: qcom: fix return value for raw page read
Fix value returned by ->read_page_raw() to be the
actual operation status, instead of always 0.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Abhishek Sahu [Wed, 20 Jun 2018 07:27:37 +0000 (12:57 +0530)]
mtd: rawnand: qcom: modify write_oob to remove read codeword part
QCOM NAND controller layout protects available OOB data bytes with
ECC also so when ecc->write_oob() is being called then it
can't update just OOB bytes. Currently, it first reads the last
codeword which includes old OOB bytes. Then it updates the old OOB
bytes with new ones and then again writes the codeword back.
The reading codeword is unnecessary since user is responsible to
have these bytes cleared to 0xFF.
This patch removes the read part and updates the OOB bytes with
data area padded with OxFF.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Abhishek Sahu [Wed, 20 Jun 2018 07:27:36 +0000 (12:57 +0530)]
mtd: rawnand: qcom: parse read errors for read oob also
read_page and read_oob both calls the read_page_ecc function.
The QCOM NAND controller protect the OOB available bytes with
ECC so read errors should be checked for read_oob also.
This patch moves the error checking code inside read_page_ecc
so caller does not have to check explicitly for read errors.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Abhishek Sahu [Wed, 20 Jun 2018 07:27:35 +0000 (12:57 +0530)]
mtd: rawnand: qcom: fix null pointer access for erased page detection
parse_read_errors can be called with only oob_buf in which case
data_buf will be NULL. If data_buf is NULL, then don’t
treat this page as completely erased in case of ECC uncorrectable
error for RS ECC. For BCH ECC, the controller itself tells
regarding erased page in status register.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Abhishek Sahu [Wed, 20 Jun 2018 07:27:34 +0000 (12:57 +0530)]
mtd: rawnand: qcom: erased page detection for uncorrectable errors only
Following is the flow in the HW if controller tries to read erased
page:
1. First ECC uncorrectable error will be generated from ECC engine
since ECC engine first calculates the ECC with all 0xff and match
the calculated ECC with ECC code in OOB (which is again all 0xff).
2. After getting ECC error, erased CW detection logic will be
applied which is different for BCH and RS ECC
a. For BCH, HW checks if all the bytes in page are 0xff and then
it updates the status in separate register
NAND_ERASED_CW_DETECT_STATUS.
b. For RS ECC, the HW reports the same error when reading an
erased CW, but it notifies that it is an erased CW by
placing special characters at certain offsets in the
buffer.
So the erased CW detect status should be checked only if ECC engine
generated the uncorrectable error.
Currently for all other operational errors also (like TIMEOUT, MPU
errors, etc.), the erased CW detect logic is being applied so fix this
and return EIO for other operational errors.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Abhishek Sahu [Wed, 20 Jun 2018 07:27:33 +0000 (12:57 +0530)]
mtd: rawnand: qcom: wait for desc completion in all BAM channels
The BAM has 3 channels - tx, rx and command. command channel
is used for register read/writes, tx channel for data writes
and rx channel for data reads. Currently, the driver assumes the
transfer completion once it gets all the command descriptors
completed. Sometimes, there is race condition between data channel
(tx/rx) and command channel completion. In these cases,
the data present in buffer is not valid during small window
between command descriptor completion and data descriptor
completion.
This patch generates NAND transfer completion when both
(Data and Command) DMA channels have completed all its DMA
descriptors. It assigns completion callback in last
DMA descriptors of that channel and wait for completion.
Fixes:
8d6b6d7e135e ("mtd: nand: qcom: support for command descriptor formation")
Cc: stable@vger.kernel.org
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Abhishek Sahu [Wed, 20 Jun 2018 07:27:32 +0000 (12:57 +0530)]
mtd: rawnand: qcom: use the ecc strength from device parameter
Currently the driver uses the ECC strength specified in DT.
The QPIC/EBI2 NAND supports 4 or 8-bit ECC correction. The same
kind of board can have different NAND parts so use the ECC
strength from device parameters if it is not specified in DT.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Abhishek Sahu [Wed, 20 Jun 2018 07:27:31 +0000 (12:57 +0530)]
mtd: rawnand: qcom: remove dt property nand-ecc-step-size
QCOM NAND controller supports only one step size (512) so
nand-ecc-step-size DT property is redundant. This property
can be removed and ecc step size can be assigned with 512 value.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Abhishek Sahu [Wed, 20 Jun 2018 07:27:30 +0000 (12:57 +0530)]
dt-bindings: qcom_nandc: update for ECC strength and step size
1. If nand-ecc-strength specified in DT, then controller will use
this ECC strength otherwise ECC strength will be calculated
according to chip requirement and available OOB size.
2. QCOM NAND controller supports only one step size (512 bytes) but
nand-ecc-step-size is required property in DT. This DT property
can be removed and ecc step size can be assigned in driver with
512 bytes value.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Abhishek Sahu [Wed, 20 Jun 2018 07:27:29 +0000 (12:57 +0530)]
mtd: rawnand: denali: use helper function for ecc setup
Use the NAND core helper function nand_ecc_choose_conf to tune
the ECC parameters instead of the function locally defined.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Abhishek Sahu [Wed, 20 Jun 2018 07:27:28 +0000 (12:57 +0530)]
mtd: rawnand: helper function for setting up ECC configuration
commit
2c8f8afa7f92 ("mtd: nand: add generic helpers to check,
match, maximize ECC settings") provides generic helpers which
drivers can use for setting up ECC parameters.
Since same board can have different ECC strength nand chips so
following is the logic for setting up ECC strength and ECC step
size, which can be used by most of the drivers.
1. If both ECC step size and ECC strength are already set
(usually by DT) then just check whether this setting
is supported by NAND controller.
2. If NAND_ECC_MAXIMIZE is set, then select maximum ECC strength
supported by NAND controller.
3. Otherwise, try to match the ECC step size and ECC strength closest
to the chip's requirement. If available OOB size can't fit the chip
requirement then select maximum ECC strength which can be fit with
available OOB size.
This patch introduces nand_ecc_choose_conf function which calls the
required helper functions for the above logic. The drivers can use
this single function instead of calling the 3 helper functions
individually.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Chris Packham [Sun, 24 Jun 2018 22:44:46 +0000 (10:44 +1200)]
mtd: rawnand: micron: add fixup for ONFI revision
Some Micron NAND chips (MT29F1G08ABAFAWP-ITE:F) report 00 00 for the
revision number field of the ONFI parameter page. Rather than rejecting
these outright assume ONFI version 1.0 if the revision number is 00 00.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Chris Packham [Sun, 24 Jun 2018 22:44:45 +0000 (10:44 +1200)]
mtd: rawnand: add defines for ONFI version bits
Add defines for the ONFI version bits and use them in
nand_flash_detect_onfi().
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Chris Packham [Sun, 24 Jun 2018 22:44:44 +0000 (10:44 +1200)]
mtd: rawnand: add manufacturer fixup for ONFI parameter page
This is called after the ONFI parameter page checksum is verified
and allows us to override the contents of the parameter page.
Suggested-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Chris Packham [Sun, 24 Jun 2018 22:44:43 +0000 (10:44 +1200)]
mtd: rawnand: marvell: Handle on-die ECC
>From the controllers point of view this is the same as no or
software only ECC.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Stefan Agner [Sun, 24 Jun 2018 21:27:25 +0000 (23:27 +0200)]
mtd: rawnand: add NVIDIA Tegra NAND Flash controller driver
Add support for the NAND flash controller found on NVIDIA
Tegra 2 SoCs. This implementation does not make use of the
command queue feature. Regular operations using ->exec_op()
use PIO mode for data transfers. Raw, ECC and OOB read/writes
make use of the DMA mode for data transfer.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Stefan Agner [Sun, 24 Jun 2018 21:27:24 +0000 (23:27 +0200)]
dt-bindings: mtd: add tegra NAND controller binding
This adds the devicetree binding for the Tegra 2 NAND flash
controller.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Stefan Agner [Sun, 24 Jun 2018 21:27:23 +0000 (23:27 +0200)]
mtd: rawnand: add an option to specify NAND chip as a boot device
Allow to define a NAND chip as a boot device. This can be helpful
for the selection of the ECC algorithm and strength in case the boot
ROM supports only a subset of controller provided options.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Stefan Agner [Sun, 24 Jun 2018 21:27:22 +0000 (23:27 +0200)]
mtd: rawnand: add Reed-Solomon error correction algorithm
Add Reed-Solomon (RS) to the enumeration of ECC algorithms.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Martin Blumenstingl [Sun, 24 Jun 2018 20:53:55 +0000 (22:53 +0200)]
mtd: rawnand: hynix: fix decoding the OOB size on H27UCG8T2BTR
The datasheet of the H27UCG8T2BTR states that this chip has a page size
of "16,384 + 1,280(Spare) bytes". The description of the "4th Byte of
Device Identifier Description" indicates that bits 6, 3 and 2 are
encoding the "Redundant Area Size / 8KB", where 640 bytes is a value of
0x6 (110 in binary notation).
hynix_nand_extract_oobsize decodes an OOB size of 640 bytes for this
chip. Kernel boot log extract before this patch:
nand: Could not find valid ONFI parameter page; aborting
nand: device found, Manufacturer ID: 0xad, Chip ID: 0xde
nand: Hynix NAND 8GiB 3,3V 8-bit
nand: 8192 MiB, MLC, erase size: 4096 KiB, page size: 16384,
OOB size: 640
However, based on the description in the datasheet we need to multiply
the OOB size with 2, because it's "640 spare bytes per 8192 bytes page
size" and this NAND chip has a page size of 16384 (= 2 * 8192). After
this patch the kernel boot log reports:
nand: Could not find valid ONFI parameter page; aborting
nand: device found, Manufacturer ID: 0xad, Chip ID: 0xde
nand: Hynix NAND 8GiB 3,3V 8-bit
nand: 8192 MiB, MLC, erase size: 4096 KiB, page size: 16384,
OOB size: 1280
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Boris Brezillon [Wed, 20 Jun 2018 07:44:43 +0000 (09:44 +0200)]
mtd: rawnand: micron: Update ecc_stats.corrected
Even if we can't update ecc_stats.corrected with an accurate value we
should at least increase the number of bitflips so that MTD users can
know that there was some bitflips.
Just add chip->ecc.strength to mtd->ecc_stats.corrected which should
account for the worst case situation.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Peter Rosin [Thu, 29 Mar 2018 13:10:54 +0000 (15:10 +0200)]
mtd: rawnand: atmel: add module param to avoid using dma
On a sama5d31 with a Full-HD dual LVDS panel (132MHz pixel clock) NAND
flash accesses have a tendency to cause display disturbances. Add a
module param to disable DMA from the NAND controller, since that fixes
the display problem for me.
Signed-off-by: Peter Rosin <peda@axentia.se>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Linus Torvalds [Sun, 1 Jul 2018 23:04:53 +0000 (16:04 -0700)]
Linux 4.18-rc3
Linus Torvalds [Sun, 1 Jul 2018 19:38:16 +0000 (12:38 -0700)]
Merge tag 'for-4.18-rc2-tag' of git://git./linux/kernel/git/kdave/linux
Pull btrfs fixes from David Sterba:
"We have a few regression fixes for qgroup rescan status tracking and
the vm_fault_t conversion that mixed up the error values"
* tag 'for-4.18-rc2-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linux:
Btrfs: fix mount failure when qgroup rescan is in progress
Btrfs: fix regression in btrfs_page_mkwrite() from vm_fault_t conversion
btrfs: quota: Set rescan progress to (u64)-1 if we hit last leaf
Linus Torvalds [Sun, 1 Jul 2018 19:32:19 +0000 (12:32 -0700)]
Merge branch 'fixes' of git://git./linux/kernel/git/viro/vfs
Pull vfs fix from Al Viro:
"Followup to procfs-seq_file series this window"
This fixes a memory leak by making sure that proc seq files release any
private data on close. The 'proc_seq_open' has to be properly paired
with 'proc_seq_release' that releases the extra private data.
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
proc: add proc_seq_release
Linus Torvalds [Sun, 1 Jul 2018 19:20:20 +0000 (12:20 -0700)]
Merge tag 'staging-4.18-rc3' of git://git./linux/kernel/git/gregkh/staging
Pull staging/IIO fixes from Greg KH:
"Here are a few small staging and IIO driver fixes for 4.18-rc3.
Nothing major or big, all just fixes for reported problems since
4.18-rc1. All of these have been in linux-next this week with no
reported problems"
* tag 'staging-4.18-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging:
staging: android: ion: Return an ERR_PTR in ion_map_kernel
staging: comedi: quatech_daqp_cs: fix no-op loop daqp_ao_insn_write()
iio: imu: inv_mpu6050: Fix probe() failure on older ACPI based machines
iio: buffer: fix the function signature to match implementation
iio: mma8452: Fix ignoring MMA8452_INT_DRDY
iio: tsl2x7x/tsl2772: avoid potential division by zero
iio: pressure: bmp280: fix relative humidity unit
Linus Torvalds [Sun, 1 Jul 2018 19:05:53 +0000 (12:05 -0700)]
Merge tag 'tty-4.18-rc3' of git://git./linux/kernel/git/gregkh/tty
Pull tty/serial fixes from Greg KH:
"Here are five fixes for the tty core and some serial drivers.
The tty core ones fix some security and other issues reported by the
syzbot that I have taken too long in responding to (sorry Tetsuo!).
The 8350 serial driver fix resolves an issue of devices that used to
work properly stopping working as they shouldn't have been added to a
blacklist.
All of these have been in linux-next for a few days with no reported
issues"
* tag 'tty-4.18-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty:
vt: prevent leaking uninitialized data to userspace via /dev/vcs*
serdev: fix memleak on module unload
serial: 8250_pci: Remove stalled entries in blacklist
n_tty: Access echo_* variables carefully.
n_tty: Fix stall at n_tty_receive_char_special().
Linus Torvalds [Sun, 1 Jul 2018 18:50:16 +0000 (11:50 -0700)]
Merge tag 'usb-4.18-rc3' of git://git./linux/kernel/git/gregkh/usb
Pull USB fixes from Greg KH:
"Here is a number of USB gadget and other driver fixes for 4.18-rc3.
There's a bunch of them here, most of them being gadget driver and
xhci host controller fixes for reported issues (as normal), but there
are also some new device ids, and some fixes for the typec code.
There is an acpi core patch in here that was acked by the acpi
maintainer as it is needed for the typec fixes in order to properly
solve a problem in that driver.
All of these have been in linux-next this week with no reported
issues"
* tag 'usb-4.18-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (33 commits)
usb: chipidea: host: fix disconnection detect issue
usb: typec: tcpm: fix logbuffer index is wrong if _tcpm_log is re-entered
typec: tcpm: Fix a msecs vs jiffies bug
NFC: pn533: Fix wrong GFP flag usage
usb: cdc_acm: Add quirk for Uniden UBC125 scanner
staging/typec: fix tcpci_rt1711h build errors
usb: typec: ucsi: Fix for incorrect status data issue
usb: typec: ucsi: acpi: Workaround for cache mode issue
acpi: Add helper for deactivating memory region
usb: xhci: increase CRS timeout value
usb: xhci: tegra: fix runtime PM error handling
usb: xhci: remove the code build warning
xhci: Fix kernel oops in trace_xhci_free_virt_device
xhci: Fix perceived dead host due to runtime suspend race with event handler
dwc2: gadget: Fix ISOC IN DDMA PID bitfield value calculation
usb: gadget: dwc2: fix memory leak in gadget_init()
usb: gadget: composite: fix delayed_status race condition when set_interface
usb: dwc2: fix isoc split in transfer with no data
usb: dwc2: alloc dma aligned buffer for isoc split in
usb: dwc2: fix the incorrect bitmaps for the ports of multi_tt hub
...
Linus Torvalds [Sun, 1 Jul 2018 17:45:13 +0000 (10:45 -0700)]
Merge tag 'dma-mapping-4.18-2' of git://git.infradead.org/users/hch/dma-mapping
Pull dma mapping fixlet from Christoph Hellwig:
"Add a missing export required by riscv and unicore"
* tag 'dma-mapping-4.18-2' of git://git.infradead.org/users/hch/dma-mapping:
swiotlb: export swiotlb_dma_ops
Linus Torvalds [Sat, 30 Jun 2018 21:16:30 +0000 (14:16 -0700)]
Merge branch 'parisc-4.18-1' of git://git./linux/kernel/git/deller/parisc-linux
Pull parisc fixes and cleanups from Helge Deller:
"Nothing exiting in this patchset, just
- small cleanups of header files
- default to 4 CPUs when building a SMP kernel
- mark 16kB and 64kB page sizes broken
- addition of the new io_pgetevents syscall"
* 'parisc-4.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
parisc: Build kernel without -ffunction-sections
parisc: Reduce debug output in unwind code
parisc: Wire up io_pgetevents syscall
parisc: Default to 4 SMP CPUs
parisc: Convert printk(KERN_LEVEL) to pr_lvl()
parisc: Mark 16kB and 64kB page sizes BROKEN
parisc: Drop struct sigaction from not exported header file
Linus Torvalds [Sat, 30 Jun 2018 21:08:06 +0000 (14:08 -0700)]
Merge tag 'armsoc-fixes' of git://git./linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"A smaller batch for the end of the week (let's see if I can keep the
weekly cadence going for once).
All medium-grade fixes here, nothing worrisome:
- Fixes for some fairly old bugs around SD card write-protect
detection and GPIO interrupt assignments on Davinci.
- Wifi module suspend fix for Hikey.
- Minor DT tweaks to fix inaccuracies for Amlogic platforms, one
of which solves booting with third-party u-boot"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
arm64: dts: hikey960: Define wl1837 power capabilities
arm64: dts: hikey: Define wl1835 power capabilities
ARM64: dts: meson-gxl: fix Mali GPU compatible string
ARM64: dts: meson-axg: fix ethernet stability issue
ARM64: dts: meson-gx: fix ATF reserved memory region
ARM64: dts: meson-gxl-s905x-p212: Add phy-supply for usb0
ARM64: dts: meson: fix register ranges for SD/eMMC
ARM64: dts: meson: disable sd-uhs modes on the libretech-cc
ARM: dts: da850: Fix interrups property for gpio
ARM: davinci: board-da850-evm: fix WP pin polarity for MMC/SD
Linus Torvalds [Sat, 30 Jun 2018 20:05:30 +0000 (13:05 -0700)]
Merge tag 'kbuild-fixes-v4.18' of git://git./linux/kernel/git/masahiroy/linux-kbuild
Pull Kbuild fixes from Masahiro Yamada:
- introduce __diag_* macros and suppress -Wattribute-alias warnings
from GCC 8
- fix stack protector test script for x86_64
- fix line number handling in Kconfig
- document that '#' starts a comment in Kconfig
- handle P_SYMBOL property in dump debugging of Kconfig
- correct help message of LD_DEAD_CODE_DATA_ELIMINATION
- fix occasional segmentation faults in Kconfig
* tag 'kbuild-fixes-v4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild:
kconfig: loop boundary condition fix
kbuild: reword help of LD_DEAD_CODE_DATA_ELIMINATION
kconfig: handle P_SYMBOL in print_symbol()
kconfig: document Kconfig source file comments
kconfig: fix line numbers for if-entries in menu tree
stack-protector: Fix test with 32-bit userland and CONFIG_64BIT=y
powerpc: Remove -Wattribute-alias pragmas
disable -Wattribute-alias warning for SYSCALL_DEFINEx()
kbuild: add macro for controlling warnings to linux/compiler.h
Linus Torvalds [Sat, 30 Jun 2018 18:42:14 +0000 (11:42 -0700)]
Merge branch 'x86-urgent-for-linus' of git://git./linux/kernel/git/tip/tip
Pull x86 fixes from Ingo Molnar:
"The biggest diffstat comes from self-test updates, plus there's entry
code fixes, 5-level paging related fixes, console debug output fixes,
and misc fixes"
* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/mm: Clean up the printk()s in show_fault_oops()
x86/mm: Drop unneeded __always_inline for p4d page table helpers
x86/efi: Fix efi_call_phys_epilog() with CONFIG_X86_5LEVEL=y
selftests/x86/sigreturn: Do minor cleanups
selftests/x86/sigreturn/64: Fix spurious failures on AMD CPUs
x86/entry/64/compat: Fix "x86/entry/64/compat: Preserve r8-r11 in int $0x80"
x86/mm: Don't free P4D table when it is folded at runtime
x86/entry/32: Add explicit 'l' instruction suffix
x86/mm: Get rid of KERN_CONT in show_fault_oops()
Linus Torvalds [Sat, 30 Jun 2018 18:26:25 +0000 (11:26 -0700)]
Merge branch 'perf-urgent-for-linus' of git://git./linux/kernel/git/tip/tip
Pull perf fixes from Ingo Molnar:
"Tooling fixes mostly, plus a build warning fix"
* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (21 commits)
perf/core: Move inline keyword at the beginning of declaration
tools/headers: Pick up latest kernel ABIs
perf tools: Fix crash caused by accessing feat_ops[HEADER_LAST_FEATURE]
perf script: Fix crash because of missing evsel->priv
perf script: Add missing output fields in a hint
perf bench: Fix numa report output code
perf stat: Remove duplicate event counting
perf alias: Rebuild alias expression string to make it comparable
perf alias: Remove trailing newline when reading sysfs files
perf tools: Fix a clang 7.0 compilation error
tools include uapi: Synchronize bpf.h with the kernel
tools include uapi: Update if_link.h to pick IFLA_{BRPORT_ISOLATED,VXLAN_TTL_INHERIT}
tools include powerpc: Update arch/powerpc/include/uapi/asm/unistd.h copy to get 'rseq' syscall
perf tools: Update x86's syscall_64.tbl, adding 'io_pgetevents' and 'rseq'
tools headers uapi: Synchronize drm/drm.h
perf intel-pt: Fix packet decoding of CYC packets
perf tests: Add valid callback for parse-events test
perf tests: Add event parsing error handling to parse events test
perf report powerpc: Fix crash if callchain is empty
perf test session topology: Fix test on s390
...
Linus Torvalds [Sat, 30 Jun 2018 18:15:12 +0000 (11:15 -0700)]
Merge tag 'selinux-pr-
20180629' of git://git./linux/kernel/git/pcmoore/selinux
Pull selinux fix from Paul Moore:
"One fairly straightforward patch to fix a longstanding issue where a
process could stall while accessing files in selinuxfs and block
everyone else due to a held mutex.
The patch passes all our tests and looks to apply cleanly to your
current tree"
* tag 'selinux-pr-
20180629' of git://git.kernel.org/pub/scm/linux/kernel/git/pcmoore/selinux:
selinux: move user accesses in selinuxfs out of locked regions