Ilya Biryukov [Tue, 3 Sep 2019 13:56:03 +0000 (13:56 +0000)]
[clangd] Fix a data race in test code
Found by TSan, thanks bkramer for pointing this out.
llvm-svn: 370758
Sam McCall [Tue, 3 Sep 2019 13:54:27 +0000 (13:54 +0000)]
[clangd] Wrong attribute on debug function in r370746
llvm-svn: 370757
Ed Maste [Tue, 3 Sep 2019 13:44:47 +0000 (13:44 +0000)]
compiler-rt: use 64-bit time_t for all FreeBSD archs except i386
At present only i386 has 32-bit time_t on FreeBSD.
Reviewed by: dim
Differential Revision: https://reviews.llvm.org/D66758
llvm-svn: 370756
Ed Maste [Tue, 3 Sep 2019 13:41:51 +0000 (13:41 +0000)]
compiler-rt: use more __sanitizer_time_t on FreeBSD
A few structs were using long for time_t members. NFC.
Reviewed by: devnexen
Differential Revision: https://reviews.llvm.org/D66756
llvm-svn: 370755
Jonas Paulsson [Tue, 3 Sep 2019 13:31:22 +0000 (13:31 +0000)]
[SystemZ] Recognize INLINEASM_BR in backend.
SystemZInstrInfo::analyzeBranch() needs to check for INLINEASM_BR
instructions, or it will crash.
Review: Ulrich Weigand
llvm-svn: 370753
Nico Weber [Tue, 3 Sep 2019 13:17:16 +0000 (13:17 +0000)]
gn build: (manually) merge r370499
llvm-svn: 370752
Simon Pilgrim [Tue, 3 Sep 2019 13:05:13 +0000 (13:05 +0000)]
Fix MSVC "not all control paths return a value" warning. NFCI.
llvm-svn: 370750
Nico Weber [Tue, 3 Sep 2019 13:01:17 +0000 (13:01 +0000)]
gn build: Merge r370746
llvm-svn: 370749
Michal Gorny [Tue, 3 Sep 2019 12:31:24 +0000 (12:31 +0000)]
[lldb] Replace std::call_once() with llvm::call_once()
Remove the single instance of std::call_once() in lldbTarget library
with llvm::call_once(). The former fails to build on NetBSD when
combined with llvm::once_flag (which replaced std::once_flag
in r369618), and combining the two is probably generally incorrect
anyway.
llvm-svn: 370748
Sam McCall [Tue, 3 Sep 2019 11:35:50 +0000 (11:35 +0000)]
[clangd] Add targetDecl(), which determines what declaration an AST node refers to.
Summary:
This is the first part of an effort to "unbundle" our libIndex use into separate
concerns (AST traversal, token<->node mapping, node<->decl mapping,
decl<->decl relationshipes).
Currently, clangd relies on libIndex to associate tokens, AST nodes, and decls.
This leads to rather convoluted implementations of e.g. hover and
extract-function, which are not naturally thought of as indexing applications.
The idea is that by decoupling different concerns, we make them easier
to use, test, and combine, and more efficient when only one part is needed.
There are some synergies between e.g. traversal and finding
relationships between decls, hopefully the benefits outweight these.
Reviewers: kadircet, ilya-biryukov
Subscribers: mgorny, MaskRay, jkorous, arphaman, jfb, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D66751
llvm-svn: 370746
David Green [Tue, 3 Sep 2019 11:30:54 +0000 (11:30 +0000)]
[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands
The code here seems to date back to r134705, when tablegen lowering was first
being added. I don't believe that we need to include CPSR implicit operands on
the MCInst. This now works more like other backends (like AArch64), where all
implicit registers are skipped.
This allows the AliasInst for CSEL's to match correctly, as can be seen in the
test changes.
Differential revision: https://reviews.llvm.org/D66703
llvm-svn: 370745
Sven van Haastregt [Tue, 3 Sep 2019 11:23:24 +0000 (11:23 +0000)]
[OpenCL] Drop spurious semicolon in generated file; NFC
llvm-svn: 370744
Jonas Paulsson [Tue, 3 Sep 2019 11:21:12 +0000 (11:21 +0000)]
[SystemZ] Add support for fentry.
SystemZAsmPrinter now properly emits function calls to __fentry__.
Review: Ulrich Weigand
llvm-svn: 370743
David Green [Tue, 3 Sep 2019 11:06:24 +0000 (11:06 +0000)]
[ARM] Invert CSEL predicates if the opposite is a simpler constant to materialise
This moves ConstantMaterializationCost into ARMBaseInstrInfo so that it can
also be used in ISel Lowering, adding codesize values to the computed costs, to
be able to compare either approximate instruction counts or codesize costs.
It also adds a HasLowerConstantMaterializationCost, which compares the
ConstantMaterializationCost of two values, returning true if the first is
smaller either in instruction count/codesize, or falling back to the other in
the case that they are equal.
This is used in constant CSEL lowering to invert the predicate if the opposite
is easier to materialise.
Differential revision: https://reviews.llvm.org/D66701
llvm-svn: 370741
David Bolvansky [Tue, 3 Sep 2019 10:54:25 +0000 (10:54 +0000)]
Fixit for -Wfinal-dtor-non-final-class
llvm-svn: 370740
David Green [Tue, 3 Sep 2019 10:53:07 +0000 (10:53 +0000)]
[ARM] Generate 8.1-m CSINC, CSNEG and CSINV instructions.
Arm 8.1-M adds a number of related CSEL instructions, including CSINC, CSNEG and CSINV. These choose between two values given the content in CPSR and a condition, performing an increment, negation or inverse of the false value.
This adds some selection for them, either from constant values or patterns. It does not include CSEL directly, which is currently not always making code better. It is still useful, but we will have to check more carefully where it should and shouldn't be used.
Code by Ranjeet Singh and Simon Tatham, with some modifications from me.
Differential revision: https://reviews.llvm.org/D66483
llvm-svn: 370739
David Green [Tue, 3 Sep 2019 10:32:46 +0000 (10:32 +0000)]
[ARM] Add csel tests. NFC
llvm-svn: 370738
David Bolvansky [Tue, 3 Sep 2019 10:32:21 +0000 (10:32 +0000)]
Added fixit notes for -Wfinal-dtor-non-final-class
llvm-svn: 370737
Simon Atanasyan [Tue, 3 Sep 2019 10:24:07 +0000 (10:24 +0000)]
[mips] Switch to the `.text` section after emitting asm file preamble
Now the last `.section` directive in the MIPS asm file preamble
is the `.section .mdebug.abi`. If assembler code injected for example
by the LLVM `module asm` or the C ` __asm` directives do not contain
explicit switching to the `.text` section it goes to the `.mdebug.abi`
section. It might be unexpected to the user and in fact for example
breaks building some existing code like FreeBSD libc [1].
The patch forces switching to the `.text` section after emitting MIPS
assembler file preamble.
[1] https://bugs.llvm.org/show_bug.cgi?id=43119
Fix PR43119.
Differential Revision: https://reviews.llvm.org/D67014
llvm-svn: 370735
Raphael Isemann [Tue, 3 Sep 2019 10:15:45 +0000 (10:15 +0000)]
[lldb] Test 'frame select -r' and fix that INT32_MIN breaks the option parser
llvm-svn: 370734
Raphael Isemann [Tue, 3 Sep 2019 10:13:45 +0000 (10:13 +0000)]
[lldb][NFC] Test 'command delete'
llvm-svn: 370733
David Green [Tue, 3 Sep 2019 09:57:02 +0000 (09:57 +0000)]
[ARM] Fix MVE ldst offset ranges
We were using isShiftedInt<7, Shift>(RHSC) to detect the ranges of offsets to
fold into MVE loads/stores. The instructions actually take a 7 bit unsigned
integer which is either added or subtracted. So something more like
isShiftedUInt<7, Shift>(abs(RHSC)).
Instead I've changes this to use the isScaledConstantInRange method, same as in
SelectT2AddrModeImm7Offset used by pre/post inc, which seemed to already be
getting this correct.
Differential revision: https://reviews.llvm.org/D66997
llvm-svn: 370731
Oliver Stannard [Tue, 3 Sep 2019 09:55:30 +0000 (09:55 +0000)]
[ARM][MVE] Decoding of VMSR doesn't diagnose some unpredictable encodings
Decoding of VMSR doesn't diagnose some unpredictable encodings, as the unpredictable bits are not correctly set.
Diff-reduce this instruction's internals WRT VMRS so I can see the differences better. Mostly this is s/src/Rt/g.
Fill in the "should-be-(0)" bits.
Designate the Unpredictable{} bits for both VMRS and VMSR.
Patch by Mark Murray!
Differential revision: https://reviews.llvm.org/D66938
llvm-svn: 370729
Oliver Stannard [Tue, 3 Sep 2019 09:51:19 +0000 (09:51 +0000)]
Bug fix on function epilog optimization (ARM backend)
To save a 'add sp,#val' instruction by adding registers to the final pop instruction,
the first register transferred by this pop instruction need to be found.
If the function to be optimized has a non-void return value, the operand list contains
r0 (implicit) which prevents the optimization to take place.
Therefore implicit register references should be skipped in the search loop,
because this registers are never popped from the stack.
Patch by Rainer Herbertz (rOptimizer)!
Differential revision: https://reviews.llvm.org/D66730
llvm-svn: 370728
David Green [Tue, 3 Sep 2019 09:42:16 +0000 (09:42 +0000)]
[ARM] More MVE load/store tests for offsets around the negative limit. NFC
llvm-svn: 370726
Raphael Isemann [Tue, 3 Sep 2019 09:40:25 +0000 (09:40 +0000)]
[lldb][NFC] Test that enabling all log options doesn't crash anything
llvm-svn: 370724
Bjorn Pettersson [Tue, 3 Sep 2019 09:33:55 +0000 (09:33 +0000)]
[LV] Fix miscompiles by adding non-header PHI nodes to AllowedExit
Summary:
Fold-tail currently supports reduction last-vector-value live-out's,
but has yet to support last-scalar-value live-outs, including
non-header phi's. As it relies on AllowedExit in order to detect
them and bail out we need to add the non-header PHI nodes to
AllowedExit, otherwise we end up with miscompiles.
Solves https://bugs.llvm.org/show_bug.cgi?id=43166
Reviewers: fhahn, Ayal
Reviewed By: fhahn, Ayal
Subscribers: anna, hiraditya, rkruppe, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67074
llvm-svn: 370721
Bjorn Pettersson [Tue, 3 Sep 2019 09:33:40 +0000 (09:33 +0000)]
[LV] Precommit test case showing miscompile from PR43166. NFC
Summary: Precommit test case showing miscompile from PR43166.
Reviewers: fhahn, Ayal
Reviewed By: fhahn
Subscribers: rkruppe, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67072
llvm-svn: 370720
Raphael Isemann [Tue, 3 Sep 2019 09:25:02 +0000 (09:25 +0000)]
[lldb][NFC] Remove unnecessary constructors from invalid-args tests
llvm-svn: 370719
Raphael Isemann [Tue, 3 Sep 2019 09:21:47 +0000 (09:21 +0000)]
[lldb][NFC] Simplify script_alias test
llvm-svn: 370718
Raphael Isemann [Tue, 3 Sep 2019 09:19:51 +0000 (09:19 +0000)]
[lldb][NFC] Also test unaliasing in nested_alias test
llvm-svn: 370717
Diogo N. Sampaio [Tue, 3 Sep 2019 09:16:44 +0000 (09:16 +0000)]
[ARM NEON] Avoid duplicated decarations
Summary:
The declaration of arm neon intrinsics that are
"big endian safe" print the same code for big
and small endian targets.
This patch avoids duplicates by checking if an
intrinsic is safe to have a single definition.
(decreases header 11k lines out of 73k).
Reviewers: t.p.northover, ostannard, labrinea
Reviewed By: ostannard
Subscribers: kristof.beyls, cfe-commits, olista01
Tags: #clang
Differential Revision: https://reviews.llvm.org/D66588
llvm-svn: 370716
Raphael Isemann [Tue, 3 Sep 2019 09:06:12 +0000 (09:06 +0000)]
[lldb] Test 'command' commands and fix the found crashes
llvm-svn: 370712
Sjoerd Meijer [Tue, 3 Sep 2019 08:53:02 +0000 (08:53 +0000)]
[LV] Tail-folding, runtime scev checks
Now that we allow tail-folding, not only when we optimise for size, make
sure we do not run in this assert.
Differential revision: https://reviews.llvm.org/D66932
llvm-svn: 370711
Sam Elliott [Tue, 3 Sep 2019 08:47:58 +0000 (08:47 +0000)]
[RISCV] Correct Logic around ilp32e macros
Summary:
GCC seperates the `__riscv_float_abi_*` macros and the
`__riscv_abi_rve` macro. If the chosen abi is ilp32e, `gcc -march=rv32i
-mabi=ilp32i -E -dM` shows that both `__riscv_float_abi_soft` and
`__riscv_abi_rve` are set.
This patch corrects the compiler logic around these defines.
At the moment, this patch will not change clang's behaviour, because we do not
accept the `ilp32e` abi yet.
Reviewers: luismarques, asb
Reviewed By: luismarques
Subscribers: rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, pzheng, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D66591
llvm-svn: 370709
Sjoerd Meijer [Tue, 3 Sep 2019 08:38:24 +0000 (08:38 +0000)]
[LV] Tail-folding with runtime memory checks
The loop vectorizer was running in an assert when it tried to fold the tail and
had to emit runtime memory disambiguation checks.
Differential revision: https://reviews.llvm.org/D66803
llvm-svn: 370707
Raphael Isemann [Tue, 3 Sep 2019 08:30:17 +0000 (08:30 +0000)]
[lldb][NFC] Unify log files in commands/log/basic
llvm-svn: 370706
James Molloy [Tue, 3 Sep 2019 08:20:31 +0000 (08:20 +0000)]
[MachinePipeliner] Add a way to unit-test the schedule emitter
Emitting a schedule is really hard. There are lots of corner cases to take care of; in fact, of the 60+ SWP-specific testcases in the Hexagon backend most of those are testing codegen rather than the schedule creation itself.
One issue is that to test an emission corner case we must craft an input such that the generated schedule uses that corner case; sometimes this is very hard and convolutes testcases. Other times it is impossible but we want to test it anyway.
This patch adds a simple test pass that will consume a module containing a loop and generate pipelined code from it. We use post-instr-symbols as a way to annotate instructions with the stage and cycle that we want to schedule them at.
We also provide a flag that causes the MachinePipeliner to generate these annotations instead of actually emitting code; this allows us to generate an input testcase with:
llc < %s -stop-after=pipeliner -pipeliner-annotate-for-testing -o test.mir
And run the emission in isolation with:
llc < test.mir -run-pass=modulo-schedule-test
llvm-svn: 370705
Sam Tebbs [Tue, 3 Sep 2019 08:17:46 +0000 (08:17 +0000)]
[ARM] Select vmla
This patch adds vmla selection.
Differential revision: https://reviews.llvm.org/D66297
llvm-svn: 370704
Raphael Isemann [Tue, 3 Sep 2019 07:33:32 +0000 (07:33 +0000)]
[lldb][NFC] Remove setup boilerplate from types/ tests
This code doesn't seem to be necessary anymore.
llvm-svn: 370702
Craig Topper [Tue, 3 Sep 2019 05:57:22 +0000 (05:57 +0000)]
[X86] Simplify the setOperationAction handling for fp_to_uint by improving the Custom handler a bit.
This merges the 32-bit and 64-bit mode code to just use Custom
for both i32 and i64. We already had most of the handling in
the custom handling due to the AVX512 having legal fp_to_uint.
Just needed to add the i32->i64 promotion handling. Refactor
the fp_to_uint code in the custom handler to simplify the
number of times we check things.
Tweak cost model tables to match the default handling we were
getting due to Expand before.
llvm-svn: 370700
Craig Topper [Tue, 3 Sep 2019 05:57:18 +0000 (05:57 +0000)]
[X86] Don't use Expand for i32 fp_to_uint on SSE1/2 targets on 32-bit target.
Use Custom lowering instead. Fall back to default expansion only
when the scalar FP type belongs in an XMM register. This improves
lowering for i32 to fp80, and also i32 to double on SSE1 only.
llvm-svn: 370699
Craig Topper [Tue, 3 Sep 2019 05:57:14 +0000 (05:57 +0000)]
[X86] Add an exhaustive test for i32 fptosi/fptoui across different triples and features.
llvm-svn: 370698
Craig Topper [Tue, 3 Sep 2019 02:51:14 +0000 (02:51 +0000)]
[LegalizeDAG] Pass DAG to two calls to SDNode::dump in debug prints so that they will print target specific nodes correctly.
The dump methods can only print target node names correctly if
they can get access to the TLI object.
llvm-svn: 370694
Craig Topper [Tue, 3 Sep 2019 02:51:10 +0000 (02:51 +0000)]
[X86] Custom promote i32->f80 uint_to_fp on AVX512 64-bit targets.
Reuse the same code to promote all i32 uint_to_fp on 64-bit targets
to simplify the X86ISelLowering constructor.
llvm-svn: 370693
Pengfei Wang [Tue, 3 Sep 2019 02:06:15 +0000 (02:06 +0000)]
[x86] Fix bugs of some intrinsic functions in CLANG : _mm512_stream_ps, _mm512_stream_pd, _mm512_stream_si512
Reviewers: craig.topper, pengfei, LuoYuanke, RKSimon, spatel
Reviewed By: RKSimon
Subscribers: llvm-commits
Patch by Bing Yu (yubing)
Differential Revision: https://reviews.llvm.org/D66786
llvm-svn: 370691
Richard Smith [Mon, 2 Sep 2019 23:27:54 +0000 (23:27 +0000)]
Rename -Wc++20-designator to -Wc++2a-designator for consistency and add
some test coverage for the flag.
llvm-svn: 370689
Richard Smith [Mon, 2 Sep 2019 23:17:32 +0000 (23:17 +0000)]
Split -Wreorder into different warnings for reordering a constructor
mem-initializer list and for reordering a designated initializer list.
llvm-svn: 370688
Simon Pilgrim [Mon, 2 Sep 2019 21:02:51 +0000 (21:02 +0000)]
[CostModel][X86] Add scalar sext/zext cost tests
llvm-svn: 370684
Craig Topper [Mon, 2 Sep 2019 20:16:30 +0000 (20:16 +0000)]
[X86] Enable fp128 as a legal type with SSE1 rather than with MMX.
FP128 values are passed in xmm registers so should be asssociated
with an SSE feature rather than MMX which uses a different set
of registers.
llc enables sse1 and sse2 by default with x86_64. But does not
enable mmx. Clang enables all 3 features by default.
I've tried to add command lines to test with -sse
where possible, but any test that returns a value in an xmm
register fails with a fatal error with -sse since we have no
defined ABI for that scenario.
llvm-svn: 370682
David Green [Mon, 2 Sep 2019 19:03:35 +0000 (19:03 +0000)]
[ARM] MVE predicate bitcast test and VPSEL adjustment. NFC
llvm-svn: 370678
Dmitri Gribenko [Mon, 2 Sep 2019 18:24:33 +0000 (18:24 +0000)]
[Wdocumentation] fixes an assertion failure with typedefed function and block pointer
Summary:
The assertion happens when compiling with -Wdocumentation with variable declaration to a typedefed function pointer. I not too familiar with the ObjC syntax but first two tests assert without this patch.
Fixes https://bugs.llvm.org/show_bug.cgi?id=42844
Reviewers: gribozavr
Reviewed By: gribozavr
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D66706
llvm-svn: 370677
David Green [Mon, 2 Sep 2019 17:18:23 +0000 (17:18 +0000)]
[ARM] Use MQPR not QPR for MVE registers
We should be using MQPR, and if we don't we can get COPYs and PHIs created for
QPR. These get folded into instructions, failing verification checks.
Differential revision: https://reviews.llvm.org/D66214
llvm-svn: 370676
Robert Lougher [Mon, 2 Sep 2019 16:53:32 +0000 (16:53 +0000)]
[TargetLowering][PS4] Add sincos(f) lib functions when target is PS4
PS4 supports sincosf and sincos. Adding the library functions enables
the sin(f)+cos(f) -> sincos(f) optimization.
Differential Revision: https://reviews.llvm.org/D67009
llvm-svn: 370675
Ulrich Weigand [Mon, 2 Sep 2019 16:49:29 +0000 (16:49 +0000)]
[SystemZ] Support constrained fpto[su]i intrinsics
Now that constrained fpto[su]i intrinsic are available,
add codegen support to the SystemZ backend.
In addition to pure back-end changes, I've also needed
to add the strict_fp_to_[su]int and any_fp_to_[su]int
pattern fragments in the obvious way.
llvm-svn: 370674
Kerry McLaughlin [Mon, 2 Sep 2019 16:12:31 +0000 (16:12 +0000)]
[SVE][Inline-Asm] Support for SVE asm operands
Summary:
Adds the following inline asm constraints for SVE:
- w: SVE vector register with full range, Z0 to Z31
- x: Restricted to registers Z0 to Z15 inclusive.
- y: Restricted to registers Z0 to Z7 inclusive.
This change also adds the "z" modifier to interpret a register as an SVE register.
Not all of the bitconvert patterns added by this patch are used, but they have been included here for completeness.
Reviewers: t.p.northover, sdesmalen, rovka, momchil.velikov, rengolin, cameron.mcinally, greened
Reviewed By: sdesmalen
Subscribers: javed.absar, tschuett, rkruppe, psnobl, cfe-commits, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66302
llvm-svn: 370673
Sylvestre Ledru [Mon, 2 Sep 2019 15:34:53 +0000 (15:34 +0000)]
ThinLTO: Document the option BOOTSTRAP_LLVM_ENABLE_LTO
llvm-svn: 370671
Simon Pilgrim [Mon, 2 Sep 2019 15:10:35 +0000 (15:10 +0000)]
[X86] getPMOVMSKB - add MVT::v64i8 handling and remove from combineBitcastvxi1. NFCI.
llvm-svn: 370670
George Rimar [Mon, 2 Sep 2019 14:57:35 +0000 (14:57 +0000)]
Recommit r370661 "[llvm-nm] - Add a test case for case when we dump a symbol that belongs to a section with a broken sh_name."
Fix: add a 'consumeError()' call to ObjectFile.cpp.
This error was never checked.
Original commit message:
It adds a test case for a problem fixed by D66976 <https://reviews.llvm.org/D66976>.
It was introduced by me in D66089 <https://reviews.llvm.org/D66089>.
The error reported was never consumed because of a wrong variable name used,
so it could fail when LLVM_ENABLE_ABI_BREAKING_CHECKS is used.
Differential revision: https://reviews.llvm.org/D67002
llvm-svn: 370669
Sanjay Patel [Mon, 2 Sep 2019 14:52:09 +0000 (14:52 +0000)]
[DAGCombiner] try to form test+set out of shift+mask patterns
The motivating bugs are:
https://bugs.llvm.org/show_bug.cgi?id=41340
https://bugs.llvm.org/show_bug.cgi?id=42697
As discussed there, we could view this as a failure of IR canonicalization,
but then we would need to implement a backend fixup with target overrides
to get this right in all cases. Instead, we can just view this as a codegen
opportunity. It's not even clear for x86 exactly when we should favor
test+set; some CPUs have better theoretical throughput for the ALU ops than
bt/test.
This patch is made more complicated than I expected because there's an early
DAGCombine for 'and' that can change types of the intermediate ops via
trunc+anyext.
Differential Revision: https://reviews.llvm.org/D66687
llvm-svn: 370668
Jay Foad [Mon, 2 Sep 2019 14:40:57 +0000 (14:40 +0000)]
Partially revert D61491 "AMDGPU: Be explicit about whether the high-word in SI_PC_ADD_REL_OFFSET is 0"
Summary:
D61491 caused us to use relocs when they're not strictly necessary, to
refer to symbols in the text section. This is a pessimization and it's a
problem for some loaders that don't support relocs yet.
Reviewers: nhaehnle, arsenm, tpr
Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D65813
llvm-svn: 370667
Dmitry Preobrazhensky [Mon, 2 Sep 2019 14:19:52 +0000 (14:19 +0000)]
[AMDGPU][MC][GFX10] Corrected constant bus checks to exclude null
See AMD SWDEV-157286
Reviewers: atamazov, arsenm
Differential Revision: https://reviews.llvm.org/D65229
llvm-svn: 370665
Thomas Preud'homme [Mon, 2 Sep 2019 14:04:05 +0000 (14:04 +0000)]
[FileCheck] Make NumericVariable ctor explicit
Summary:
Make FileCheckNumericVariable constructor explicit to avoid implicit
conversions from StringRef.
Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66640
llvm-svn: 370664
Thomas Preud'homme [Mon, 2 Sep 2019 14:04:00 +0000 (14:04 +0000)]
[FileCheck] Forbid using var defined on same line
Summary:
Commit r366897 introduced the possibility to set a variable from an
expression, such as [[#VAR2:VAR1+3]]. While introducing this feature, it
introduced extra logic to allow using such a variable on the same line
later on. Unfortunately that extra logic is flawed as it relies on a
mapping from variable to expression defining it when the mapping is from
variable definition to expression. This flaw causes among other issues
PR42896.
This commit avoids the problem by forbidding all use of a variable
defined on the same line, and removes the now useless logic. Redesign
will be done in a later commit because it will require some amount of
refactoring first for the solution to be clean. One example is the need
for some sort of transaction mechanism to set a variable temporarily and
from an expression and rollback if the CHECK pattern does not match so
that diagnostics show the right variable values.
Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk
Subscribers: JonChesterfield, rogfer01, hfinkel, kristina, rnk, tra, arichardson, grimar, dblaikie, probinson, llvm-commits, hiraditya
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66141
llvm-svn: 370663
George Rimar [Mon, 2 Sep 2019 14:03:50 +0000 (14:03 +0000)]
Revert r370661 "[llvm-nm] - Add a test case for case when we dump a symbol that belongs to a section with a broken sh_name"
It broke BB:
http://lab.llvm.org:8011/builders/clang-x86_64-debian-fast/builds/16955/steps/test/logs/stdio
Expected<T> must be checked before access or destruction.
Unchecked Expected<T> contained error:
a section [index 1] has an invalid sh_name (0xffff) offset which goes past the end of the section name string tableStack dump:
0. Program arguments: /srv/llvm-buildbot-srcatch/llvm-build-dir/clang-x86_64-debian-fast/llvm.obj/bin/llvm-nm /srv/llvm-buildbot-srcatch/llvm-build-dir/clang-x86_64-debian-fast/llvm.obj/test/tools/llvm-nm/Output/format-sysv-section.test.tmp2.o --format=sysv
#0 0x00000000008af7c4 PrintStackTraceSignalHandler(void*) (/srv/llvm-buildbot-srcatch/llvm-build-dir/clang-x86_64-debian-fast/llvm.obj/bin/llvm-nm+0x8af7c4)
#1 0x00000000008ad8be llvm::sys::RunSignalHandlers() (/srv/llvm-buildbot-srcatch/llvm-build-dir/clang-x86_64-debian-fast/llvm.obj/bin/llvm-nm+0x8ad8be)
#2 0x00000000008afbd8 SignalHandler(int) (/srv/llvm-buildbot-srcatch/llvm-build-dir/clang-x86_64-debian-fast/llvm.obj/bin/llvm-nm+0x8afbd8)
#3 0x00007f0a6b989730 __restore_rt (/lib/x86_64-linux-gnu/libpthread.so.0+0x12730)
#4 0x00007f0a6b48d7bb raise (/lib/x86_64-linux-gnu/libc.so.6+0x377bb)
#5 0x00007f0a6b478535 abort (/lib/x86_64-linux-gnu/libc.so.6+0x22535)
#6 0x000000000042004b llvm::Expected<llvm::StringRef>::fatalUncheckedExpected() const (/srv/llvm-buildbot-srcatch/llvm-build-dir/clang-x86_64-debian-fast/llvm.obj/bin/llvm-nm+0x42004b)
#7 0x00000000008367f5 (/sv/llvm-buildbot-srcatch/llvm-build-dir/clang-x86_64-debian-fast/llvm.obj/bin/llvm-nm+0x8367f5)
#8 0x0000000000817b80 llvm::object::IRObjectFile::findBitcodeInObject(llvm::object::ObjectFile const&) (/srv/llvm-buildbot-srcatch/llvm-build-dir/clang-x86_64-debian-fast/llvm.obj/bin/llvm-nm+0x817b80)
#9 0x0000000000838416 llvm::object::SymbolicFile::createSymbolicFile(llvm::MemoryBufferRef, llvm::file_magic, llvm::LLVMContext*) (/srv/llvm-buildbot-srcatch/llvm-build-dir/clang-x86_64-debian-fast/llvm.obj/bin/llvm-nm+0x838416)
#10 0x00000000007f36cb llvm::object::createBinary(llvm::MemoryBufferRef, llvm::LLVMContext*) (/srv/llvm-buildbot-srcatch/llvm-build-dir/clang-x86_64-debian-fast/llvm.obj/bin/llvm-nm+0x7f36cb)
#11 0x0000000000413123 dumpSymbolNamesFromFile(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> >&) (/srv/llvm-buildbot-srcatch/llvm-build-dir/clang-x86_64-debian-fast/llvm.obj/bin/llvm-nm+0x413123)
#12 0x0000000000412e38 main (/srv/llvm-buildbot-srcatch/llvm-build-dir/clang-x86_64-debian-fast/llvm.obj/bin/llvm-nm+0x412e38)
#13 0x00007f0a6b47a09b __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x2409b)
#14 0x00000000004120da _start (/srv/llvm-buildbot-srcatch/llvm-build-dir/clang-x86_64-debian-fast/llvm.obj/bin/llvm-nm+0x4120da)
FileCheck error: '-' is empty.
FileCheck command line: /srv/llvm-buildbot-srcatch/llvm-build-dir/clang-x86_64-debian-fast/llvm.obj/bin/FileCheck /srv/llvm-buildbot-srcatch/llvm-build-dir/clang-x86_64-debian-fast/llvm.src/test/tools/llvm-nm/format-sysv-section.test --check-prefix=ERR
--
llvm-svn: 370662
George Rimar [Mon, 2 Sep 2019 13:54:45 +0000 (13:54 +0000)]
[llvm-nm] - Add a test case for case when we dump a symbol that belongs to a section with a broken sh_name.
It adds a test case for a problem fixed by D66976.
It was introduced by me in D66089.
The error reported was never consumed because of a wrong variable name used,
so it could fail when LLVM_ENABLE_ABI_BREAKING_CHECKS is used.
Differential revision: https://reviews.llvm.org/D67002
llvm-svn: 370661
Dmitry Preobrazhensky [Mon, 2 Sep 2019 13:42:25 +0000 (13:42 +0000)]
[AMDGPU][MC][GFX10] Enabled null with 64-bit operands
See Bug 42745: https://bugs.llvm.org/show_bug.cgi?id=42745
Reviewers: atamazov, arsenm
https://reviews.llvm.org/D65231
llvm-svn: 370660
Sanjay Patel [Mon, 2 Sep 2019 13:33:20 +0000 (13:33 +0000)]
[InstCombine] recognize bswap disguised as shufflevector
bitcast <N x i8> (shuf X, undef, <N, N-1,...0>) to i{N*8} --> bswap (bitcast X to i{N*8})
In PR43146:
https://bugs.llvm.org/show_bug.cgi?id=43146
...we have a more complicated case where SLP is making a mess of bswap. This patch won't
do anything for that currently, but we need to improve bswap recognition in instcombine,
SLP, and/or a standalone pass to avoid that problem.
This is limited using the data-layout so we don't try to do this transform with actual
vector types. The backend does not appear to have folds to convert in either direction,
so we don't want to mess up something that is actually better lowered as a shuffle.
On x86, we're trading something like this:
vmovd %edi, %xmm0
vpshufb LCPI0_0(%rip), %xmm0, %xmm0 ## xmm0 = xmm0[3,2,1,0,u,u,u,u,u,u,u,u,u,u,u,u]
vmovd %xmm0, %eax
For:
movl %edi, %eax
bswapl %eax
Differential Revision: https://reviews.llvm.org/D66965
llvm-svn: 370659
Pavel Labath [Mon, 2 Sep 2019 13:33:12 +0000 (13:33 +0000)]
[dotest] Add @skipIfCursesSupportMissing and annotate the new gui test
Summary:
The gui command requires curses support, which can be disabled at
compile time. This patch adds the ability to detect this situation in
the test suite and skip the test accordingly.
Reviewers: teemperor, jankratochvil
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D67073
llvm-svn: 370658
Martin Storsjo [Mon, 2 Sep 2019 13:28:21 +0000 (13:28 +0000)]
[test] [llvm-dlltool] Improve test strictness a little. NFC.
llvm-svn: 370657
Martin Storsjo [Mon, 2 Sep 2019 13:28:16 +0000 (13:28 +0000)]
[llvm-dlltool] Handle external and internal names with differing decoration
Also add a missed part of the test from SVN r369747.
Differential Revision: https://reviews.llvm.org/D66996
llvm-svn: 370656
Martin Storsjo [Mon, 2 Sep 2019 13:28:07 +0000 (13:28 +0000)]
[llvm-dlltool] Remove support for implying output name
I don't see GNU dlltool supporting doing this; with only a -d option
and no -l option, GNU dlltool runs successfully but doesn't write any
output file.
Differential Revision: https://reviews.llvm.org/D65645
llvm-svn: 370655
Martin Storsjo [Mon, 2 Sep 2019 13:25:46 +0000 (13:25 +0000)]
[LLD] [COFF] Demangle itanium symbols in mingw mode
Differential Revision: https://reviews.llvm.org/D67051
llvm-svn: 370654
Pavel Labath [Mon, 2 Sep 2019 12:50:18 +0000 (12:50 +0000)]
NativeProcessLinux: Remove some register context boilerplate
Summary:
This patch follows the spirit of D63594, and removes some null checks
for things which should be operating invariants. Specifically
{Read,Write}[GF]PR now no longer check whether the supplied buffers are
null, because they never are. After this, the Do*** versions of these
function no longer serve any purpose and are inlined into their callers.
Other cleanups are possible here too, but I am taking this one step at a
time because this involves a lot of architecture-specific code, which I
don't have the hardware to test on (I did do a build-test though).
Reviewers: mgorny, jankratochvil, omjavaid, alexandreyy, uweigand
Subscribers: nemanjai, javed.absar, kbarton, lldb-commits
Differential Revision: https://reviews.llvm.org/D66744
llvm-svn: 370653
Dmitry Preobrazhensky [Mon, 2 Sep 2019 12:50:05 +0000 (12:50 +0000)]
[AMDGPU][MC][GFX10] Corrected constant bus limit for 64-bit shift instructions
See bug 42744: https://bugs.llvm.org/show_bug.cgi?id=42744
Reviewers: atamazov, arsenm
Differential Revision: https://reviews.llvm.org/D65228
llvm-svn: 370652
Roman Lebedev [Mon, 2 Sep 2019 12:34:21 +0000 (12:34 +0000)]
[unittests][AST] CommentParser: don't name variable 'DEBUG'
It's may be an already-defined macro name,
resulting in compilation errors.
llvm-svn: 370650
Andrea Di Biagio [Mon, 2 Sep 2019 12:32:28 +0000 (12:32 +0000)]
[X86][BtVer2] Fix latency and throughput of conditional SIMD store instructions.
On BtVer2 conditional SIMD stores are heavily microcoded.
The latency is directly proportional to the number of packed elements extracted
from the input vector. Also, according to micro-benchmarks, most of the
computation seems to be done in the integer unit.
Only a minority of the uOPs is executed by the FPU. The observed behaviour on
the FPU looks similar to this:
- The input MASK value is moved to the Integer Unit
-- [ a VMOVMSK-like uOP-executed on JFPU0].
- In parallel, each element of the input XMM/YMM is extracted and then sent to
the IntegerUnit through JFPU1.
As expected, a (conditional) store is executed for every extracted element.
Interestingly, a (speculative) load is executed for every extracted element too.
It is as-if a "LOAD - BIT_EXTRACT- CMOV" sequence of uOPs is repeated by the
integer unit for every contionally stored element.
VMASKMOVDQU is a special case: the number of speculative loads is always 2
(presumably, one load per quadword). That means, extra shifts and masking is
performed on (one of) the loaded quadwords before each conditional store (that
also explains the big number of non-FP uOPs retired).
This patch replaces the existing writes for conditional SIMD stores (i.e.
WriteFMaskedStore, and WriteFMaskedStoreY) with the following new writes:
WriteFMaskedStore32 [ XMM Packed Single ]
WriteFMaskedStore32Y [ YMM Packed Single ]
WriteFMaskedStore64 [ XMM Packed Double ]
WriteFMaskedStore64Y [ YMM Packed Double ]
Added a wrapper class named X86SchedWriteMaskMove in X86Schedule.td to describe
both RM and MR variants for conditional SIMD moves in a single tablegen
definition.
Instances of that class are then passed in input to multiclass avx_movmask_rm
when constructing MASKMOVPS/PD definitions.
Since this patch introduces new writes, I had to update all the X86 scheduling
models.
Differential Revision: https://reviews.llvm.org/D66801
llvm-svn: 370649
Jeremy Morse [Mon, 2 Sep 2019 12:28:36 +0000 (12:28 +0000)]
[DebugInfo] LiveDebugValues: correctly discriminate kinds of variable locations
The missing line added by this patch ensures that only spilt variable
locations are candidates for being restored from the stack. Otherwise,
register or constant-value information can be interpreted as a spill
location, through a union.
The added regression test replicates a scenario where this occurs: the
stack load from [rsp] causes the register-location DBG_VALUE to be
"restored" to rsi, when it should be left alone. See PR43058 for details.
Un x-fail a test that was suffering from this from a previous patch.
Differential Revision: https://reviews.llvm.org/D66895
llvm-svn: 370648
Raphael Isemann [Mon, 2 Sep 2019 12:10:16 +0000 (12:10 +0000)]
[lldb][NFC] Add test for invalid gui command
llvm-svn: 370647
Raphael Isemann [Mon, 2 Sep 2019 11:58:03 +0000 (11:58 +0000)]
[lldb][NFC] Remove unused imports from TestIntegerTypesExpr.py
llvm-svn: 370645
Omair Javaid [Mon, 2 Sep 2019 11:53:29 +0000 (11:53 +0000)]
[ARM64] Simplify RegisterInfos_arm64.h with macro based RegisterInfo array
This patches paves way for upcoming SVE RegisterInfo definitions. This is cosmetic change which allows us to define ARM64 RegisterInfo using macros.
In future we ll have define two different RegisterInfos to choose between SVE vs non-SVE RegisterInfo with decision being made at thread creation.
Differential Revision: https://reviews.llvm.org/D66934
llvm-svn: 370644
James Henderson [Mon, 2 Sep 2019 11:42:30 +0000 (11:42 +0000)]
[llvm-strings][test] Merge two closely related tests
This is a follow-up to feedback on D66015.
Reviewed by: grimar
Differential Revision: https://reviews.llvm.org/D67069
llvm-svn: 370643
Nandor Licker [Mon, 2 Sep 2019 11:34:47 +0000 (11:34 +0000)]
Revert [Clang Interpreter] Initial patch for the constexpr interpreter
This reverts r370636 (git commit
8327fed9475a14c3376b4860c75370c730e08f33)
llvm-svn: 370642
Raphael Isemann [Mon, 2 Sep 2019 11:30:00 +0000 (11:30 +0000)]
[lldb][NFC] Remove unused imports from TestIntegerTypes.py
llvm-svn: 370641
Balazs Keri [Mon, 2 Sep 2019 11:01:09 +0000 (11:01 +0000)]
[AST] AST structural equivalence to work internally with pairs.
Summary:
The structural equivalence check stores now pairs of nodes in the
'from' and 'to' context instead of only the node in 'from' context
and a corresponding one in 'to' context. This is needed to handle
cases when a Decl in the 'from' context is to be compared with
multiple Decls in the 'to' context.
Reviewers: martong, a_sidorin
Reviewed By: martong, a_sidorin
Subscribers: rnkovacs, dkrupp, Szelethus, gamesh411, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D66538
llvm-svn: 370639
Raphael Isemann [Mon, 2 Sep 2019 10:55:52 +0000 (10:55 +0000)]
[lldb][NFC] Add test for source info
llvm-svn: 370638
Simon Pilgrim [Mon, 2 Sep 2019 10:42:48 +0000 (10:42 +0000)]
[X86] combineHorizontalPredicateResult - pull out repeated getTargetLoweringInfo() calls. NFCI.
llvm-svn: 370637
Nandor Licker [Mon, 2 Sep 2019 10:38:08 +0000 (10:38 +0000)]
[Clang Interpreter] Initial patch for the constexpr interpreter
Summary:
This patch introduces the skeleton of the constexpr interpreter,
capable of evaluating a simple constexpr functions consisting of
if statements. The interpreter is described in more detail in the
RFC. Further patches will add more features.
Reviewers: Bigcheese, jfb, rsmith
Subscribers: bruno, uenoku, ldionne, Tyker, thegameg, tschuett, dexonsmith, mgorny, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D64146
llvm-svn: 370636
Fangrui Song [Mon, 2 Sep 2019 10:33:58 +0000 (10:33 +0000)]
[ELF] Do not ICF two sections with different output sections (by SECTIONS commands)
Fixes PR39418. Complements D47241 (the non-linker-script case).
processSectionCommands() assigns input sections to output sections.
ICF is called before it, so .text.foo and .text.bar may be folded even if
their output sections are made different by SECTIONS commands.
```
markLive<ELFT>()
doIcf<ELFT>() // During ICF, we don't know the output sections
writeResult()
combineEhSections<ELFT>()
script->processSectionCommands() // InputSection -> OutputSection assignment
```
This patch splits processSectionCommands() into processSectionCommands() and
processSymbolAssignments(), and moves processSectionCommands() before ICF:
```
markLive<ELFT>()
combineEhSections<ELFT>()
script->processSectionCommands()
doIcf<ELFT>() // should remove folded input sections
writeResult()
script->processSymbolAssignments()
```
An alternative approach is to unfold a section `sec` in
processSectionCommands() when we find `sec` and `sec->repl` belong to
different output sections. I feel this patch is superior because this
can fold more sections and the decouple of
SectionCommand/SymbolAssignment gives flexibility:
* An ExprValue can't be evaluated before its section is assigned to an
output section -> we can delete getOutputSectionVA and simplify
another place where we had to check if the output section is null.
Moreover, a case in linkerscript/early-assign-symbol.s can be handled
now.
* processSectionCommands/processSymbolAssignments can be freely moved
around.
Reviewed By: ruiu
Differential Revision: https://reviews.llvm.org/D66717
llvm-svn: 370635
Piotr Sobczak [Mon, 2 Sep 2019 10:02:54 +0000 (10:02 +0000)]
[AMDGPU] Add test
Summary:
Add test checking that the redundant immediate MOV instruction
(by-product of handling phi nodes) is not found in the generated code.
Reviewers: arsenm, anton-afanasyev, craig.topper, rtereshin, bogner
Reviewed By: arsenm
Subscribers: kzhuravl, yaxunl, dstuttard, tpr, t-tye, wdng, jvesely, nhaehnle, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63860
llvm-svn: 370634
George Rimar [Mon, 2 Sep 2019 09:47:17 +0000 (09:47 +0000)]
[yaml2obj] - Allow overriding sh_name fields of the sections.
This is in line with the previous changes which allowed to
override the sh_offset/sh_size and useful for writing test cases.
Differential revision: https://reviews.llvm.org/D66998
llvm-svn: 370633
Djordje Todorovic [Mon, 2 Sep 2019 09:20:46 +0000 (09:20 +0000)]
[DWARFVerifier] Verify GNU extensions of call site DWARF symbols
Verify that the call site DWARF symbols (added during the implementation
of the debug entry values feature) are generated properly.
Differential Revision: https://reviews.llvm.org/D66865
llvm-svn: 370631
Fangrui Song [Mon, 2 Sep 2019 08:49:50 +0000 (08:49 +0000)]
[ELF] Align SHT_LLVM_PART_EHDR to a maximum page size boundary
Fixes https://bugs.chromium.org/p/chromium/issues/detail?id=998712
SHT_LLVM_PART_EHDR marks the start of a partition. The partition
sections will be extracted to a separate file. Align to the next maximum
page size boundary so that we can find the ELF header at the start. We
cannot benefit from overlapping p_offset ranges with the previous
segment anyway.
It seems we lack some llvm-objcopy --extract-main-partition and
--extract-partition sanity checks. It may place EHDR at the start
even if p_offset if non zero. Anyway, the lld change is justified for
the reasons above.
Reviewed By: ruiu
Differential Revision: https://reviews.llvm.org/D67032
llvm-svn: 370629
Raphael Isemann [Mon, 2 Sep 2019 08:34:57 +0000 (08:34 +0000)]
[lldb] Add description to option completions.
Summary:
Right now our argument completions are rather cryptic for command options as they only list the letters:
```
(lldb) breakpoint set -
Available completions:
-G
-C
-c
-d
-i
-o
-q
-t
-x
[...]
```
With the new completion API we can easily extend this with the flag description so that it looks like this now:
```
(lldb) breakpoint set -
Available completions:
-G -- The breakpoint will auto-continue after running its commands.
-C -- A command to run when the breakpoint is hit, can be provided more than once, the commands will get run in order left to right.
-c -- The breakpoint stops only if this condition expression evaluates to true.
-d -- Disable the breakpoint.
-i -- Set the number of times this breakpoint is skipped before stopping.
-o -- The breakpoint is deleted the first time it stop causes a stop.
-q -- The breakpoint stops only for threads in the queue whose name is given by this argument.
-t -- The breakpoint stops only for the thread whose TID matches this argument.
-x -- The breakpoint stops only for the thread whose index matches this argument.
```
The same happens with --long-options now.
Reviewers: #lldb, labath
Reviewed By: labath
Subscribers: labath, JDevlieghere, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D67063
llvm-svn: 370628
Amara Emerson [Mon, 2 Sep 2019 08:18:55 +0000 (08:18 +0000)]
[AArch64][GlobalISel] Fix zext narrowScalar to use the right type when creating
the merges.
Fixes PR43171.
llvm-svn: 370627
Raphael Isemann [Mon, 2 Sep 2019 08:00:59 +0000 (08:00 +0000)]
[lldb][NFC] Add basic test for GUI command
Summary:
This adds a basic test for the GUI command. Just tests that it starts up, that we can quit the gui
and help window, and that the basic UI elements are rendered. Mostly testing the waters how
testing this command will do on the bots or if that will cause some serious issues when we do
fancy ncurses stuff.
Reviewers: labath, clayborg
Reviewed By: labath
Subscribers: JDevlieghere, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D67018
llvm-svn: 370625
Raphael Isemann [Mon, 2 Sep 2019 07:40:06 +0000 (07:40 +0000)]
[lldb][NFC] Remove unnecessary lldb_enable_attach in TestMultilineCompletion
We don't actually need to call this for this test.
llvm-svn: 370623
Balazs Keri [Mon, 2 Sep 2019 07:17:01 +0000 (07:17 +0000)]
[ASTImporter] At import of records re-order indirect fields too.
Summary:
Correct order of fields and indirect fields in imported RecordDecl
is needed for correct work of record layout calculations.
Reviewers: martong, a.sidorin, shafik, a_sidorin
Reviewed By: martong, a_sidorin
Subscribers: rnkovacs, dkrupp, Szelethus, gamesh411, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D66866
llvm-svn: 370621
Craig Topper [Sun, 1 Sep 2019 22:14:36 +0000 (22:14 +0000)]
[X86] Add initial support for unfolding broadcast loads from arithmetic instructions to enable LICM hoisting of the load
MachineLICM can hoist an invariant load, but if that load is folded it needs to be unfolded. On AVX512 sometimes this load is an broadcast load which we were previously unable to unfold. This patch adds initial support for that with a very basic list of supported instructions as a starting point.
Differential Revision: https://reviews.llvm.org/D67017
llvm-svn: 370620
Raphael Isemann [Sun, 1 Sep 2019 19:29:01 +0000 (19:29 +0000)]
[lldb] Test and fix invalid log command invocations
llvm-svn: 370619