platform/upstream/llvm.git
22 months ago[NFC] Cleanup test for D132913 Preserve vec3 for HLSL
Xiang Li [Fri, 9 Sep 2022 22:03:35 +0000 (15:03 -0700)]
[NFC] Cleanup test for D132913 Preserve vec3 for HLSL

Support number for parameter test added in
https://reviews.llvm.org/D132913

22 months agoRecognize a platform binary in ProcessGDBRemote which determines plugins
Jason Molenda [Fri, 9 Sep 2022 21:52:59 +0000 (14:52 -0700)]
Recognize a platform binary in ProcessGDBRemote which determines plugins

Complete support of the binary-addresses key in the qProcessInfo packet
in ProcessGDBRemote, for detecting if one of the binaries needs to be
handled by a Platform plugin, and can be used to set the Process'
DynamicLoader plugin and the Target's Platform plugin.

Implement this method in PlatformDarwinKernel to recognize a kernel
fileset at that address, find the actual kernel address in the
fileset, set DynamicLoaderDarwinKernel and PlatformDarwinKernel
in the Process/Target; register the kernel address with the dynamic
loader so it will be loaded later during attach.

This patch only addresses the live debug scenario with a gdb remote
serial protocol connection. I'll handle corefiles in a subsequent
patch that builds on this.

Differential Revision: https://reviews.llvm.org/D133534
rdar://98754861

22 months ago[ELF] Merge Symbol::needs* into uint16_t flags. NFC
Fangrui Song [Fri, 9 Sep 2022 21:37:18 +0000 (14:37 -0700)]
[ELF] Merge Symbol::needs* into uint16_t flags. NFC

Split off from D133003 ([ELF] Parallelize relocation scanning) to make its diff smaller.

22 months ago[ADT] Mark `llvm::array_lengthof` as deprecated
Joe Loser [Thu, 8 Sep 2022 15:13:17 +0000 (09:13 -0600)]
[ADT] Mark `llvm::array_lengthof` as deprecated

As a follow-up of 5e96cea1db0623a833d5376c9ea2ce4528771f97, mark
`llvm::array_lengthof` as deprecated in favor of using `std::size` function
directly.

Differential Revision: https://reviews.llvm.org/D133502

22 months ago[lld] Use std::size instead of llvm::array_lengthof
Joe Loser [Fri, 9 Sep 2022 18:43:07 +0000 (12:43 -0600)]
[lld] Use std::size instead of llvm::array_lengthof

LLVM contains a helpful function for getting the size of a C-style
array: `llvm::array_lengthof`. This is useful prior to C++17, but not as
helpful for C++17 or later: `std::size` already has support for C-style
arrays.

Differential Revision: https://reviews.llvm.org/D133598

22 months ago[mlir][arith] Fix unused variable warning. NFC.
Jakub Kuderski [Fri, 9 Sep 2022 21:17:50 +0000 (17:17 -0400)]
[mlir][arith] Fix unused variable warning. NFC.

22 months ago[test] Use either `127.0.0.1` or `[::1]` to run in ipv6-only environments.
Jordan Rupprecht [Wed, 7 Sep 2022 01:46:40 +0000 (18:46 -0700)]
[test] Use either `127.0.0.1` or `[::1]` to run in ipv6-only environments.

Test for both IPv4 and IPv6 support to determine if either `127.0.0.1` or `[::1]` are appropriate IP addresses to attempt to connect to. In an IPv6-only environment, `127.0.0.1` is not available.

Using `localhost` is problematic because we might not be able to get the same port on each IP flavor, and later try to connect to the wrong thing.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D133393

22 months ago[mlir][sparse] Add new option (enable-runtime-library) to sparse compiler pipeline
Peiming Liu [Fri, 9 Sep 2022 18:37:59 +0000 (18:37 +0000)]
[mlir][sparse] Add new option (enable-runtime-library) to sparse compiler pipeline

Add new option (enable-runtime-library) to sparse compiler pipeline, it allows us to decide whether we need to rewrite operations (e.g., concatenate, reshape) within sparsification (when using codegen) or convert them after sparsification (when using runtime library).

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D133597

22 months ago[mlir][arith] Support wide integer addition emulation
Jakub Kuderski [Fri, 9 Sep 2022 20:48:00 +0000 (16:48 -0400)]
[mlir][arith] Support wide integer addition emulation

I tested this implementation for all i16 input pairs, when emulating i16
operations with i8 operations.

Reviewed By: antiagainst, Mogball

Differential Revision: https://reviews.llvm.org/D133137

22 months ago[mlir][spirv] Add support for fast math mode
Lei Zhang [Fri, 9 Sep 2022 20:16:36 +0000 (16:16 -0400)]
[mlir][spirv] Add support for fast math mode

This commit introduces a new option to SPIRVConversionOptions
to allow enabling fast math mode. With it, various patterns
would assume no NaN/infinity for floating point values and
avoid guards to check them. This is particularly useful for
CodeGen towards WebGPU environment, where fast math is assumed.

Along the way, fixed the conversion for arith.minf/maxf to
handle the NaN cases properly for Shader cases.

Part of https://github.com/llvm/llvm-project/issues/57584.

Reviewed By: ThomasRaoux, hanchung

Differential Revision: https://reviews.llvm.org/D133599

22 months ago[Libomptarget][NFC] Remove unused variable
Joseph Huber [Fri, 9 Sep 2022 20:26:02 +0000 (15:26 -0500)]
[Libomptarget][NFC] Remove unused variable

22 months ago[Libomptarget] Fix compiling with asserts using the bitcode library
Joseph Huber [Fri, 9 Sep 2022 18:18:16 +0000 (13:18 -0500)]
[Libomptarget] Fix compiling with asserts using the bitcode library

Sumnmary:
A previous patch introduces an `exports` file which contains all the
symbol names that are not internalized in the bitcode library. This is
done to reduce the size of the bitcode library and only export needed
functions. This export file must contain all the functoins expected to
be called from the device. Since its introduction the `__assert_fail`
function used to be provided but was mistakenly not included. This patch
adds it.

Fixes #57656

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D133594

22 months ago[mlir][spirv] NFC: move conversion options out of the type converter
Lei Zhang [Fri, 9 Sep 2022 19:46:17 +0000 (15:46 -0400)]
[mlir][spirv] NFC: move conversion options out of the type converter

This is a step for adding more options not directly related to type
conversion. Also with this we can now avoid the explicit constructor.

Reviewed By: kuhar

Differential Revision: https://reviews.llvm.org/D133596

22 months ago[LV] Remove now dead variable after 2a78890b7b7f08 (NFC).
Florian Hahn [Fri, 9 Sep 2022 19:25:54 +0000 (20:25 +0100)]
[LV] Remove now dead variable after 2a78890b7b7f08 (NFC).

22 months ago[gn build] port 4d50a392401c (llvm-exegesis multi-target)
Nico Weber [Fri, 9 Sep 2022 19:04:04 +0000 (15:04 -0400)]
[gn build] port 4d50a392401c (llvm-exegesis multi-target)

Also ports follow-up 5a425b0b2f855c (I'm getting linker errors without it).

22 months ago[mlir] NFC: ConvertAsyncToLLVM: sort deps alphabetically
Emilio Cota [Fri, 9 Sep 2022 18:59:46 +0000 (14:59 -0400)]
[mlir] NFC: ConvertAsyncToLLVM: sort deps alphabetically

22 months ago[mlir] Improve bitEnumContains methods.
Hanhan Wang [Fri, 9 Sep 2022 18:56:29 +0000 (11:56 -0700)]
[mlir] Improve bitEnumContains methods.

https://github.com/llvm/llvm-project/commit/839b436c93604e042f74050cf2adadd75f30e898
changes the behavior. Based on the discussion, we also want to support
"and" behavior. The revision changes it into two functions, bitEnumContainsAny
and bitEnumContainsAll.

Reviewed By: krzysz00, antiagainst

Differential Revision: https://reviews.llvm.org/D133507

22 months ago[gn build] port 5e0464e38bcb (lld test zstd)
Nico Weber [Fri, 9 Sep 2022 18:48:26 +0000 (14:48 -0400)]
[gn build] port 5e0464e38bcb (lld test zstd)

22 months ago[mlir][CallGraph] Add special call graph node for representing unknown callees
Markus Böck [Fri, 9 Sep 2022 18:13:08 +0000 (20:13 +0200)]
[mlir][CallGraph] Add special call graph node for representing unknown callees

The callgraph currently contains a special external node that is used both as the quasi caller for any externally callable as well as callees that could not be resolved.
This has one negative side effect however, which is the motivation for this patch: It leads to every externally callable which contains a call that could not be resolved (eg. an indirect call), to be put into one giant SCC when iterating over the SCCs of the call graph.

This patch fixes that issue by creating a second special callgraph node that acts as the callee for any unresolved callable. This breaks the cycles produced in the callgraph, yielding proper SCCs for all direct calls.

Differential Revision: https://reviews.llvm.org/D133585

22 months ago[VPlan] Move SCEV expansion for pointer induction to VPExpandSCEV (NFC).
Florian Hahn [Fri, 9 Sep 2022 18:20:12 +0000 (19:20 +0100)]
[VPlan] Move SCEV expansion for pointer induction to VPExpandSCEV (NFC).

Use VPExpandSCEVRecipe to expand the step of pointer inductions. This
cleanup addresses a corresponding FIXME.

It should be NFC, as steps for pointer induction must be constants,
which makes expansion trivial.

22 months agoSpeculative bot fix after 4d50a392
Philip Reames [Fri, 9 Sep 2022 18:16:53 +0000 (11:16 -0700)]
Speculative bot fix after 4d50a392

https://lab.llvm.org/buildbot#builders/56/builds/3201 failed with a link error being unable to initialize the disassembler.  Oddly, this bot is the *only* bot which appears to have failed in this way.  (A bunch sent warnings, but that appears to be spurious due to cmake rebuilds on incremental bots.)  Why only polly would witness this is an excercise for the reader - because I have no clue.

22 months agoOpenMP: mark allocptr attribute on __kmpc_free_shared
Augie Fackler [Wed, 27 Apr 2022 00:33:35 +0000 (20:33 -0400)]
OpenMP: mark allocptr attribute on __kmpc_free_shared

Differential Revision: https://reviews.llvm.org/D124491

22 months ago[mlir][sparse] Avoid generating DimOp in conversion passes.
Peiming Liu [Fri, 9 Sep 2022 17:29:16 +0000 (17:29 +0000)]
[mlir][sparse] Avoid generating DimOp in conversion passes.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D133592

22 months ago[HLSL] Preserve vec3 for HLSL.
Xiang Li [Tue, 30 Aug 2022 07:35:25 +0000 (00:35 -0700)]
[HLSL] Preserve vec3 for HLSL.

Preserve vec3 for HLSL by set -fpreserve-vec3-type.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D132913

22 months agoLoop names used in reporting can grow very large
Jamie Schmeiser [Fri, 9 Sep 2022 17:43:58 +0000 (13:43 -0400)]
Loop names used in reporting can grow very large

Summary:
The code for generating a name for loops for various reporting scenarios
created a name by serializing the loop into a string.  This may result in
a very large name for a loop containing many blocks.  Use the getName()
function on the loop instead.

Author: Jamie Schmeiser <schmeise@ca.ibm.com>
Reviewed By: Whitney (Whitney Tsang), aeubanks (Arthur Eubanks)
Differential Revision: https://reviews.llvm.org/D133587

22 months agoTemporarily XFAIL libcxx tests.
Adrian Prantl [Fri, 9 Sep 2022 17:40:41 +0000 (10:40 -0700)]
Temporarily XFAIL libcxx tests.

These tests started failing on green dragon after a configuration change that compiles tests using the just-built libcxx. We may need to force the system libcxx here, or change LLDB to import the std module from the just-built libcxx, too.

22 months ago[ELF] Add --compress-debug-sections=zstd
Fangrui Song [Fri, 9 Sep 2022 17:30:18 +0000 (10:30 -0700)]
[ELF] Add --compress-debug-sections=zstd

`clang -gz=zstd a.o` passes this option to the linker. This option compresses output
debug sections with zstd and sets ch_type to ELFCOMPRESS_ZSTD. As of today, very
few DWARF consumers recognize ELFCOMPRESS_ZSTD.

Use the llvm::zstd::compress API with level llvm::zstd::DefaultCompression (5),
which we may tune after we have more experience with zstd output.
zstd has built-in parallel compression support (so we don't need to do D117853
for zlib), which is not leveraged yet.

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D133548

22 months ago[Flang][OpenMP] Add support for logical and reduction in worksharing-loop
Dylan Fleming [Fri, 9 Sep 2022 17:18:27 +0000 (17:18 +0000)]
[Flang][OpenMP] Add support for logical and reduction in worksharing-loop

Adds support for .and. reductions with logical types.

Because arith.addi doesn'to work with fir.logical<4> types
logical<4> must be converted to i1 prior to the operation.

This means that the pattern matched by integer reductions
(load -> op -> store) will not match logical reductions.
Instead, the pattern being searched for here is
load -> convert(logical<4> to i1) -> op -> convert(i1 to logical<4>) -> store

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D132228

22 months ago[ELF] Support ELFCOMPRESS_ZSTD input
Fangrui Song [Fri, 9 Sep 2022 17:25:37 +0000 (10:25 -0700)]
[ELF] Support ELFCOMPRESS_ZSTD input

so that lld accepts relocatable object files produced by `clang -c -g -gz=zstd`.

We don't want to increase the size of InputSection, so do redundant but cheap
ch_type checks instead.

Differential Revision: https://reviews.llvm.org/D129406

22 months ago[ELF] Rename InputSectionBase::uncompress to decompress. NFC
Fangrui Song [Fri, 9 Sep 2022 17:18:46 +0000 (10:18 -0700)]
[ELF] Rename InputSectionBase::uncompress to decompress. NFC

The canonical verb is "decompress" (also used in llvm-objcopy). "uncompressed"
describes the state.

22 months ago[NFC] Remove a FIXME fixed by an earlier patch.
Yitzhak Mandelbaum [Fri, 9 Sep 2022 17:04:24 +0000 (17:04 +0000)]
[NFC] Remove a FIXME fixed by an earlier patch.

Commit 28bd7945eabdbde2b1fc071ab2f9b78e6e754a1a incidentally fixed the
associated FIXME, but didn't delete it.

Differential Revision: https://reviews.llvm.org/D133588

22 months ago[AArch64][CostModel] Detects that {extract,insert}-element at lane 0 has the same...
Mingming Liu [Tue, 21 Jun 2022 20:38:30 +0000 (13:38 -0700)]
[AArch64][CostModel] Detects that {extract,insert}-element at lane 0 has the same cost as the other lane for vector instructions in the IR.

Currently, {extract,insert}-element has zero cost at lane 0 [1]. However, there is a cost (by fmov instruction [2], or ext/ins instruction) to move values from SIMD registers to GPR registers, when the element is used explicitly as integers.

See https://godbolt.org/z/faPE1nTn8, when fmov is generated for d* register -> x* register conversion.

Implementation-wise, add a private method `AArch64TTIImpl::getVectorInstrCostHelper` as a helper function. This way, instruction-based method could share the core logic (e.g.,
returning zero cost if type is legalized to scalar).

[1] https://github.com/llvm/llvm-project/blob/2cf320d41ed708679e01eeeb93f58d6c5c88ba7a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp#L1853
[2] https://github.com/llvm/llvm-project/blob/2cf320d41ed708679e01eeeb93f58d6c5c88ba7a/llvm/lib/Target/AArch64/AArch64InstrInfo.td#L8150-L8157

Differential Revision: https://reviews.llvm.org/D128302

22 months ago[llvm-exegesis] Cross compile all enabled targets
Philip Reames [Fri, 9 Sep 2022 15:30:50 +0000 (08:30 -0700)]
[llvm-exegesis] Cross compile all enabled targets

llvm-exegesis is rather odd in the LLVM ecosystem in code is selectively compiled based on the native machine. LLVM is cross compiler by default, so this stands out as odd. It's also less then helpful when working on code for a target other than your native dev environment.

This change only changes the build setup. A later change will enable -march support to allow actual benchmarking under e.g. simulators in a cross compilation environment.

Differential Revision: https://reviews.llvm.org/D133150

22 months ago[mlir][vector] Fix bug in transfer op flattening
Thomas Raoux [Fri, 9 Sep 2022 00:34:47 +0000 (00:34 +0000)]
[mlir][vector] Fix bug in transfer op flattening

The logic to figure out if a transfer op can be flattened wasn't
considering the shape being loaded therefore it was incorrectly assuming
some transfer ops were reading contigous data.

Differential Revision: https://reviews.llvm.org/D133544

22 months agoFrontend: Respect -working-directory when checking if output files can be written
Steven Wu [Fri, 9 Sep 2022 15:56:53 +0000 (08:56 -0700)]
Frontend: Respect -working-directory when checking if output files can be written

Call `FixupRelativePath` when opening output files to ensure that
`-working-directory` is used when checking up front for write failures,
not just when finalizing the files at the end. This also moves the
temporary file into the same directory as the output file.

Reviewed By: benlangmuir

Differential Revision: https://reviews.llvm.org/D95497

22 months ago[MLIR] Improve interaction of TypedValue with BlockAndValueMapping
Tyker [Fri, 9 Sep 2022 15:26:06 +0000 (08:26 -0700)]
[MLIR] Improve interaction of TypedValue with BlockAndValueMapping

22 months ago[ASAN][DARWIN] Remove getpwnam(NULL) test for undefined behavior
Blue Gaston [Fri, 9 Sep 2022 15:53:05 +0000 (08:53 -0700)]
[ASAN][DARWIN] Remove getpwnam(NULL) test for undefined behavior

Reverting a patch that was added to test for getpwnam(NULL) -- it was noted at the time the behavior might have been a bug, however the patch was added for binary compatibility. Because of the change in the expected behavior, we are reverting this commit, as the test added is no longer passing.

Update: Rather than reverting the original commit, updating this to only remove the unnecessary test.

Original Patch: https://reviews.llvm.org/D40052

rdar://98592334

22 months ago[AArch64][CodeGen]Fold the mov and lsl into ubfiz
zhongyunde [Fri, 9 Sep 2022 15:44:58 +0000 (23:44 +0800)]
[AArch64][CodeGen]Fold the mov and lsl into ubfiz

Fix the issue exposed by D132322, depand on D132939
Reviewed By: efriedma, paulwalker-arm
Differential Revision: https://reviews.llvm.org/D132325

22 months ago[InstCombine] move/adjust comments about demanded bits; NFC
Sanjay Patel [Fri, 9 Sep 2022 15:46:50 +0000 (11:46 -0400)]
[InstCombine] move/adjust comments about demanded bits; NFC

The code has been moved/copied around, but the comments were not updated to match.

22 months ago[flang] Compute type allocation size based on the actual target representation.
Slava Zakharin [Thu, 8 Sep 2022 17:13:45 +0000 (10:13 -0700)]
[flang] Compute type allocation size based on the actual target representation.

This change makes sure that we compute the element size and the byte stride
based on the target representation of the element type.

For example, when REAL*10 is mapped to x86_fp80 each element occupies
16 bytes rather than 10 because of the padding.

Note that the size computation method used here actually returns
the distance between two adjacent element of the *same* type in memory
(which is equivalent to llvm::DataLayout::getTypeAllocSize()).
It does not return the number of bytes that may be overwritten
by storing a value of the specified type (e.g. what can be computed
via llvm::DataLayout::getTypeStoreSize(), but not available in
mlir::DataLayout).

Differential Revision: https://reviews.llvm.org/D133508

22 months ago[Libomptarget] Add proper LLVM libraries now that the AMDGPU plugin uses them
Joseph Huber [Fri, 9 Sep 2022 15:31:03 +0000 (10:31 -0500)]
[Libomptarget] Add proper LLVM libraries now that the AMDGPU plugin uses them

Summary:
The AMDGPU and CUDA plugins now relies on the Object and Support
libraries. This patch adds them explicitly rather than hoping that they
share the symbols loaded from the standard `libomptarget`.

22 months ago[mlir][linalg] Fix tiling interface implementation ordering of parallel_insert_slice
Guray Ozen [Fri, 9 Sep 2022 14:39:50 +0000 (16:39 +0200)]
[mlir][linalg] Fix tiling interface implementation ordering of parallel_insert_slice

The tiling interface generates the order of parallel_insert_slice incorrectly when there are multiple destionation operands. This revision fixes that and adds a test for it. It depends on D132937

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D133204

22 months ago[LV] Autogen a test for ease of update
Philip Reames [Fri, 9 Sep 2022 15:12:29 +0000 (08:12 -0700)]
[LV] Autogen a test for ease of update

22 months ago[gdb-remote] Move broadcasting logic down to GDBRemoteClientBase
Michał Górny [Wed, 7 Sep 2022 15:13:57 +0000 (17:13 +0200)]
[gdb-remote] Move broadcasting logic down to GDBRemoteClientBase

Move the broadcasting support from GDBRemoteCommunication
to GDBRemoteClientBase since this is where it is actually used.  Remove
GDBRemoteCommunication and subclass constructor arguments left over
after Communication cleanup.

Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.llvm.org/D133427

22 months ago[clang-format] NFC remove incorrect whitespace causing documentation issue
mydeveloperday [Fri, 9 Sep 2022 14:55:34 +0000 (15:55 +0100)]
[clang-format] NFC remove incorrect whitespace causing documentation issue

22 months ago[AMDGPU] Fix crash legalizing G_EXTRACT_VECTOR_ELT with negative index
Jay Foad [Tue, 30 Aug 2022 13:09:19 +0000 (14:09 +0100)]
[AMDGPU] Fix crash legalizing G_EXTRACT_VECTOR_ELT with negative index

Fixes https://github.com/llvm/llvm-project/issues/57408

Differential Revision: https://reviews.llvm.org/D132938

22 months ago[mlir][linalg] Relax tiling constraint when there are multiple destination operands
Guray Ozen [Fri, 9 Sep 2022 14:34:10 +0000 (16:34 +0200)]
[mlir][linalg] Relax tiling constraint when there are multiple destination operands

This revision relaxes constraint of tiling when there are multiple destination operands. It also adds a test.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D132937

22 months ago[LV] Pull out common expression [nfc]
Philip Reames [Fri, 9 Sep 2022 14:31:46 +0000 (07:31 -0700)]
[LV] Pull out common expression [nfc]

22 months ago[VPlan] Only generate single instr for stores uniform across all parts.
Philip Reames [Fri, 9 Sep 2022 14:14:19 +0000 (07:14 -0700)]
[VPlan] Only generate single instr for stores uniform across all parts.

Extend the approach taken by D133019 to store instructions.

Differential Revision: https://reviews.llvm.org/D133497

22 months ago[AST] Fix unit test to use BatchAA (NFC)
Nikita Popov [Fri, 9 Sep 2022 14:06:49 +0000 (16:06 +0200)]
[AST] Fix unit test to use BatchAA (NFC)

22 months ago[HLSL] Call global constructors inside entry
Chris Bieneman [Wed, 7 Sep 2022 15:05:44 +0000 (10:05 -0500)]
[HLSL] Call global constructors inside entry

HLSL doesn't have a runtime loader model that supports global
construction by a loader or runtime initializer. To allow us to leverage
global constructors with minimal code generation impact we put calls to
the global constructors inside the generated entry function.

Differential Revision: https://reviews.llvm.org/D132977

22 months ago[libc][math] Implement acosf function correctly rounded for all rounding modes.
Tue Ly [Fri, 9 Sep 2022 02:30:37 +0000 (22:30 -0400)]
[libc][math] Implement acosf function correctly rounded for all rounding modes.

Implement acosf function correctly rounded for all rounding modes.

We perform range reduction as follows:

- When `|x| < 2^(-10)`, we use cubic Taylor polynomial:
```
  acos(x) = pi/2 - asin(x) ~ pi/2 - x - x^3 / 6.
```
- When `2^(-10) <= |x| <= 0.5`, we use the same approximation that is used for `asinf(x)` when `|x| <= 0.5`:
```
  acos(x) = pi/2 - asin(x) ~ pi/2 - x - x^3 * P(x^2).
```
- When `0.5 < x <= 1`, we use the double angle formula: `cos(2y) = 1 - 2 * sin^2 (y)` to reduce to:
```
  acos(x) = 2 * asin( sqrt( (1 - x)/2 ) )
```
- When `-1 <= x < -0.5`, we reduce to the positive case above using the formula:
```
  acos(x) = pi - acos(-x)
```

Performance benchmark using perf tool from the CORE-MATH project on Ryzen 1700:
```
$ CORE_MATH_PERF_MODE="rdtsc" ./perf.sh acosf
GNU libc version: 2.35
GNU libc release: stable
CORE-MATH reciprocal throughput   : 28.613
System LIBC reciprocal throughput : 29.204
LIBC reciprocal throughput        : 24.271

$ CORE_MATH_PERF_MODE="rdtsc" ./perf.sh asinf --latency
GNU libc version: 2.35
GNU libc release: stable
CORE-MATH latency   : 55.554
System LIBC latency : 76.879
LIBC latency        : 62.118
```

Reviewed By: orex, zimmermann6

Differential Revision: https://reviews.llvm.org/D133550

22 months ago[AST] Use BatchAA in aliasesUnknownInst() (NFCI)
Nikita Popov [Fri, 9 Sep 2022 13:54:24 +0000 (15:54 +0200)]
[AST] Use BatchAA in aliasesUnknownInst() (NFCI)

22 months ago[mlir][vector] Extend WarpExecutionOnLane0 pattern support to allow deduplicating...
Nicolas Vasilache [Fri, 9 Sep 2022 08:13:09 +0000 (01:13 -0700)]
[mlir][vector] Extend WarpExecutionOnLane0 pattern support to allow deduplicating identical yield values.

Differential Revision: https://reviews.llvm.org/D133573

22 months ago[Flang] Update build documentation
Peter Steinfeld [Tue, 23 Aug 2022 20:18:04 +0000 (13:18 -0700)]
[Flang] Update build documentation

Changes to build instructions based on the latest requirements with
compiler-rt.

Differential Revision: https://reviews.llvm.org/D131041

22 months agoAdd helper func to get first non-alloca position
Sebastian Neubauer [Fri, 9 Sep 2022 13:14:59 +0000 (15:14 +0200)]
Add helper func to get first non-alloca position

The LLVM performance tips suggest that allocas should be placed at the
beginning of the entry block. So far, llvm doesn’t provide any helper to
find that position.

Add BasicBlock::getFirstNonPHIOrDbgOrAlloca and IRBuilder::SetInsertPointPastAllocas(Function*)
that get an insert position after the (static) allocas at the start of a
function and use it in ShadowStackGCLowering.

Differential Revision: https://reviews.llvm.org/D132554

22 months agoAdd command line argument parsing to the Windows packaging script.
Carlos Alberto Enciso [Fri, 9 Sep 2022 13:36:40 +0000 (14:36 +0100)]
Add command line argument parsing to the Windows packaging script.

As discussed here:
https://discourse.llvm.org/t/build-llvm-release-bat-script-options

Add a function to parse command line arguments: `parse_args`.

The format for the arguments is:
  Boolean: --option
  Value:   --option<separator>value
    with `<separator>` being: space, colon, semicolon or equal sign

Command line usage example:
  my-batch-file.bat --build --type=release --version 123

It will create 3 variables:
  `build` with the value `true`
  `type` with the value `release`
  `version` with the value `123`

Usage:
  set "build="
  set "type="
  set "version="

  REM Parse arguments.
  call :parse_args %*

  if defined build (
    ...
  )
  if %type%=='release' (
    ...
  )
  if %version%=='123' (
    ...
  )

22 months ago[LICM] Regenerate test checks (NFC)
Nikita Popov [Fri, 9 Sep 2022 13:30:05 +0000 (15:30 +0200)]
[LICM] Regenerate test checks (NFC)

22 months ago[mlir][linalg] Retire LinalgStrategyEnablePass
Guray Ozen [Fri, 9 Sep 2022 08:19:48 +0000 (10:19 +0200)]
[mlir][linalg] Retire LinalgStrategyEnablePass

This revision retires LinalgStrategyEnablePass.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D133557

22 months ago[lldb-server] Report launch error in vRun packets
Pavel Labath [Tue, 6 Sep 2022 13:36:23 +0000 (15:36 +0200)]
[lldb-server] Report launch error in vRun packets

Uses our existing "error string" extension to provide a better
indication of why the launch failed (the client does not make use of the
error yet).

Also, fix the way we obtain the launch error message (make sure we read
the whole message, and skip trailing garbage), and reduce the size of
TestLldbGdbServer by splitting some tests into a separate file.

Differential Revision: https://reviews.llvm.org/D133352

22 months ago[lldb] Fix ThreadedCommunication races
Pavel Labath [Wed, 7 Sep 2022 09:25:44 +0000 (11:25 +0200)]
[lldb] Fix ThreadedCommunication races

The Read function could end up blocking if data (or EOF) arrived just as
it was about to start waiting for the events. This was only discovered
now, because we did not have unit tests for this functionality before.
We need to check for data *after* we start listening for incoming
events. There were no changes to the read thread code needed, as we
already use this pattern in SynchronizeWithReadThread, so I just updated
the comments to make it clear that it is used for reading as well.

Differential Revision: https://reviews.llvm.org/D133410

22 months ago[X86] Fix VPPERM load folding latency
Simon Pilgrim [Fri, 9 Sep 2022 12:57:39 +0000 (13:57 +0100)]
[X86] Fix VPPERM load folding latency

Noticed while investigating BITREVERSE cost numbers with the D103695 script - VPPERM folded loads was using the WriteVarShuffleX defaults and was missing an override like the VPPERM reg-reg variants

22 months ago[NFC][AMDGPU] Pre-commit test for D132837.
Thomas Symalla [Fri, 9 Sep 2022 12:08:10 +0000 (14:08 +0200)]
[NFC][AMDGPU] Pre-commit test for D132837.

22 months agoFix LLVM sphinx build
Aaron Ballman [Fri, 9 Sep 2022 11:55:12 +0000 (07:55 -0400)]
Fix LLVM sphinx build

Addresses the issue found by:
https://lab.llvm.org/buildbot/#/builders/30/builds/25791

We can use anonymous references rather than explicit ones.

22 months ago[llvm-objdump] Create name for fake sections
Namhyung Kim [Fri, 9 Sep 2022 08:36:41 +0000 (09:36 +0100)]
[llvm-objdump] Create name for fake sections

It doesn't have a section header string table so add a vector to have
the strings and create name based on the program header type and the
index.

Differential Revision: https://reviews.llvm.org/D131290

22 months ago[Clang] Use virtual FS in processing config files
Serge Pavlov [Fri, 9 Sep 2022 11:23:52 +0000 (18:23 +0700)]
[Clang] Use virtual FS in processing config files

Clang has support of virtual file system for the purpose of testing, but
treatment of config files did not use it. This change enables VFS in it
as well.

Differential Revision: https://reviews.llvm.org/D132867

22 months ago[LICM] Allow promotion with non-load/store users
Nikita Popov [Thu, 8 Sep 2022 12:27:31 +0000 (14:27 +0200)]
[LICM] Allow promotion with non-load/store users

If there are non-load/store users of the promoted pointer, we
currently abort promotion. However, having such users isn't really
relevant to the transform. We already separately check that a)
there are no instructions that modref the promoted pointer and
b) that a pointer capture disables store promotion.

In the affected @test_captured_in_loop test case we have a readnone
capture of the promoted pointer, which means that load promotion
can be performed (while store promotion cannot).

Differential Revision: https://reviews.llvm.org/D133485

22 months ago[AMDGPU][MC][GFX11][NFC] Update disassembler tests for VOPD instructions
Dmitry Preobrazhensky [Fri, 9 Sep 2022 10:10:55 +0000 (13:10 +0300)]
[AMDGPU][MC][GFX11][NFC] Update disassembler tests for VOPD instructions

Differential Revision: https://reviews.llvm.org/D133414

22 months ago[AMDGPU][MC][GFX11][NFC] Update disassembler tests for VOP3P instructions
Dmitry Preobrazhensky [Fri, 9 Sep 2022 10:06:44 +0000 (13:06 +0300)]
[AMDGPU][MC][GFX11][NFC] Update disassembler tests for VOP3P instructions

Differential Revision: https://reviews.llvm.org/D133412

22 months ago[AMDGPU][MC][GFX11][NFC] Correct VOPD parsing
Dmitry Preobrazhensky [Fri, 9 Sep 2022 10:01:17 +0000 (13:01 +0300)]
[AMDGPU][MC][GFX11][NFC] Correct VOPD parsing

Differential Revision: https://reviews.llvm.org/D133492

22 months ago[CostModel][X86] Add missing i8 throughput cost
Simon Pilgrim [Fri, 9 Sep 2022 09:58:40 +0000 (10:58 +0100)]
[CostModel][X86] Add missing i8 throughput cost

22 months ago[mlir][vector] NFC - Clean up vector patterns and propagate benefit through populate...
Nicolas Vasilache [Fri, 9 Sep 2022 08:13:09 +0000 (01:13 -0700)]
[mlir][vector] NFC - Clean up vector patterns and propagate benefit through populate functions

Differential Revision: https://reviews.llvm.org/D133559

22 months agoRevert "[Clang] Use virtual FS in processing config files"
Serge Pavlov [Fri, 9 Sep 2022 09:42:00 +0000 (16:42 +0700)]
Revert "[Clang] Use virtual FS in processing config files"

This reverts commit 9424497e43aff088e014d65fd952ec557e28e6cf.
Some buildbots failed, reverted for investigation.

22 months ago[mlir] Bump building CRunnerUtils from C++11 to C++17
Brad Smith [Fri, 9 Sep 2022 09:31:44 +0000 (05:31 -0400)]
[mlir] Bump building CRunnerUtils from C++11 to C++17

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D133553

22 months ago[Clang] Use virtual FS in processing config files
Serge Pavlov [Mon, 29 Aug 2022 05:50:36 +0000 (12:50 +0700)]
[Clang] Use virtual FS in processing config files

Clang has support of virtual file system for the purpose of testing, but
treatment of config files did not use it. This change enables VFS in it
as well.

Differential Revision: https://reviews.llvm.org/D132867

22 months ago[NFC][LV] Convert masked call tests to use update script
Graham Hunter [Fri, 9 Sep 2022 09:07:39 +0000 (10:07 +0100)]
[NFC][LV] Convert masked call tests to use update script

22 months ago"Recommit "[AggressiveInstCombine] Lower Table Based CTTZ""
Djordje Todorovic [Fri, 9 Sep 2022 07:44:10 +0000 (09:44 +0200)]
"Recommit "[AggressiveInstCombine] Lower Table Based CTTZ""

This reverts commit 053841c5624ca7eacd108a26071d8a1cefe1bebd.

We faced a use-after-free after pushing the D113291, since the
foldSqrt() has a call to eraseFromParent(). The function
should be at the end of the main loop that folds the patterns.
This patch fixes that.

22 months ago[OpenMP] Install ompt-multiplex.h alongside omp.h
serge-sans-paille [Wed, 7 Sep 2022 12:48:10 +0000 (14:48 +0200)]
[OpenMP] Install ompt-multiplex.h alongside omp.h

The default install direction may not be in the compiler search path.

Differential Revision: https://reviews.llvm.org/D133420

22 months ago[msan] Insert simplification passes after instrumentation
Vitaly Buka [Fri, 9 Sep 2022 06:33:07 +0000 (23:33 -0700)]
[msan] Insert simplification passes after instrumentation

This resolves TODO from D96406.
InstCombine issue is fixed with D133394.

Save 4.5% of .text on CTMark.

22 months ago[bazel] Port 7fa1d743d073
Benjamin Kramer [Fri, 9 Sep 2022 07:31:13 +0000 (09:31 +0200)]
[bazel] Port 7fa1d743d073

22 months ago[clang][MinGW] Add `-mguard=cf` and `-mguard=cf-nochecks`
Alvin Wong [Fri, 9 Sep 2022 06:18:02 +0000 (09:18 +0300)]
[clang][MinGW] Add `-mguard=cf` and `-mguard=cf-nochecks`

This option can be used to enable Control Flow Guard checks and
generation of address-taken function table. They are equivalent to
`/guard:cf` and `/guard:cf,nochecks` in clang-cl. Passing this flag to
the Clang driver will also pass `--guard-cf` to the MinGW linker.

This feature is disabled by default. The option `-mguard=none` is also
available to explicitly disable this feature.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D132810

22 months ago[LLD][MinGW] Add --[no-]guard-cf and --[no-]guard-longjmp
Alvin Wong [Fri, 9 Sep 2022 06:17:33 +0000 (09:17 +0300)]
[LLD][MinGW] Add --[no-]guard-cf and --[no-]guard-longjmp

These will be LLD-specific options to support Control Flow Guard for the
MinGW target. They are disabled by default, but enabling `--guard-cf`
will also enable `--guard-longjmp` unless `--no-guard-longjmp` is also
specified. These options maps to `-guard:cf,[no]longjmp`.

Note that these features require the `_load_config_used` symbol to
contain the load config directory and be filled with the required
symbols. While current versions of mingw-w64 do not supply this symbol,
the user can provide their own version of it.

Reviewed By: MaskRay, rnk

Differential Revision: https://reviews.llvm.org/D132808

22 months ago[mlir][vector] Don't duplicate transfer_read during vector distribution
Thomas Raoux [Thu, 8 Sep 2022 22:57:54 +0000 (22:57 +0000)]
[mlir][vector] Don't duplicate transfer_read during vector distribution

Only apply the pattern if the transfer_read can be distributed for all
its uses.

Differential Revision: https://reviews.llvm.org/D133538

22 months ago[LoongArch] Add codegen support for frint
gonglingqin [Fri, 9 Sep 2022 06:12:07 +0000 (14:12 +0800)]
[LoongArch] Add codegen support for frint

According to the revised description in `LoongArch Reference Manual v1.02`,
frint.[s/d] does not judge whether floating-point inexact exceptions are
allowed indicated by FCSR, i.e. always executes roundToIntegralExact(x).
What's more, the manual also specifically defines that frint.s/d is only
necessary to be defined in LA64. So ISD::FRINT is legal for LA64.

Differential Revision: https://reviews.llvm.org/D133337

22 months ago[DAGCombiner][X86] Fold (sub (subcarry X, 0, Carry), Y) -> (subcarry X, Y, Carry)
Craig Topper [Fri, 9 Sep 2022 05:56:46 +0000 (22:56 -0700)]
[DAGCombiner][X86] Fold (sub (subcarry X, 0, Carry), Y) -> (subcarry X, Y, Carry)

Fixes PR57576.

Differential Revision: https://reviews.llvm.org/D133471

22 months ago[mlir][arith] Support wide integer constant emulation
Jakub Kuderski [Thu, 8 Sep 2022 18:17:53 +0000 (14:17 -0400)]
[mlir][arith] Support wide integer constant emulation

Reviewed By: antiagainst, Mogball

Differential Revision: https://reviews.llvm.org/D133136

22 months ago[mlir][Tensor] Add rewrites to extract slices through `tensor.collape_shape`
Christopher Bate [Thu, 8 Sep 2022 21:21:57 +0000 (15:21 -0600)]
[mlir][Tensor] Add rewrites to extract slices through `tensor.collape_shape`

This change adds a set of utilities to replace the result of a
`tensor.collapse_shape -> tensor.extract_slice` chain with the
equivalent result formed by aggregating slices of the
`tensor.collapse_shape` source. In general, it is not possible to
commute `extract_slice` and `collapse_shape` if linearized dimensions
are sliced. The i-th dimension of the `tensor.collapse_shape`
result is a "linearized sliced dimension" if:

1) Reassociation indices of tensor.collapse_shape in the i'th position
   is greater than size 1 (multiple dimensions of the input are collapsed)
2) The i-th dimension is sliced by `tensor.extract_slice`.

We can work around this by stitching together the result of
`tensor.extract_slice` by iterating over any linearized sliced dimensions.
This is equivalent to "tiling" the linearized-and-sliced dimensions of
the `tensor.collapse_shape` operation in order to manifest the result
tile (the result of the `tensor.extract_slice`). The user of the
utilities must provide the mechanism to create the tiling (e.g. a loop).
In the tests, it is demonstrated how to apply the utilities using either
`scf.for` or `scf.foreach_thread`.

The below example illustrates the pattern using `scf.for`:

```
%0 = linalg.generic ... -> tensor<3x7x11x10xf32>
%1 = tensor.collapse_shape %0 [[0, 1, 2], [3]] : ... to tensor<341x10xf32>
%2 = tensor.extract_slice %1 [13, 0] [10, 10] [2, 1] : .... tensor<10x10xf32>
```

We can construct %2 by generating the following IR:

```
%dest = linalg.init_tensor() : tensor<10x10xf32>
%2 = scf.for %iv = %c0 to %c10 step %c1 iter_args(%arg0) -> tensor<10x10xf32> {
   // Step 1: Map this output idx (%iv) to a multi-index for the input (%3):
   %linear_index = affine.apply affine_map<(d0)[]->(d0*2 + 11)>(%iv)
   %3:3 = arith.delinearize_index %iv into (3, 7, 11)
   // Step 2: Extract the slice from the input
   %4 = tensor.extract_slice %0 [%3#0, %3#1, %3#2, 0] [1, 1, 1, 10] [1, 1, 1, 1] :
         tensor<3x7x11x10xf32> to tensor<1x1x1x10xf32>
   %5 = tensor.collapse_shape %4 [[0, 1, 2], [3]] :
         tensor<1x1x1x10xf32> into tensor<1x10xf32>
   // Step 3: Insert the slice into the destination
   %6 = tensor.insert_slice %5 into %arg0 [%iv, 0] [1, 10] [1, 1] :
         tensor<1x10xf32> into tensor<10x10xf32>
   scf.yield %6 : tensor<10x10xf32>
}
```

The pattern was discussed in the RFC here: https://discourse.llvm.org/t/rfc-tensor-extracting-slices-from-tensor-collapse-shape/64034

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D129699

22 months agoReland "[mlir][arith] Add wide integer emulation pass"
Jakub Kuderski [Fri, 9 Sep 2022 03:23:44 +0000 (23:23 -0400)]
Reland "[mlir][arith] Add wide integer emulation pass"

This reverts commit 45b5e8abe56d7f28c88b0c6cdd60ff741874fb1d.

Relands https://reviews.llvm.org/D133135 after fixing shared libs
builds.

22 months ago[NFC][M68k] Correct debug message.
Sheng [Fri, 9 Sep 2022 02:57:37 +0000 (10:57 +0800)]
[NFC][M68k] Correct debug message.

22 months ago[LLD] Imply "longjmp" in `/guard:cf`
Phoebe Wang [Fri, 9 Sep 2022 02:38:02 +0000 (10:38 +0800)]
[LLD] Imply "longjmp" in `/guard:cf`

This is MSVC's behaviour. LLD was matching it before D99078. Let's go back this way.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D132901

22 months ago[sanitizers] Add experimental flag to insert sanitizers earlier
Vitaly Buka [Fri, 9 Sep 2022 00:26:53 +0000 (17:26 -0700)]
[sanitizers] Add experimental flag to insert sanitizers earlier

22 months ago[mlir][Math] Add TruncOp.
jacquesguan [Tue, 6 Sep 2022 08:06:48 +0000 (16:06 +0800)]
[mlir][Math] Add TruncOp.

This patch adds TruncOp for Math, it returns the operand rounded to the nearest integer not larger in magnitude than the operand. And this patch also adds the correspond llvm intrinsic op.

Reviewed By: Mogball

Differential Revision: https://reviews.llvm.org/D133342

22 months ago[RISCV] Add the GlobalMerge pass (disabled by default)
Alex Bradbury [Fri, 9 Sep 2022 01:40:21 +0000 (18:40 -0700)]
[RISCV] Add the GlobalMerge pass (disabled by default)

Split out from D129178, this just adds the GlobalMerge tests (other than global-merge-minsize.ll which is testing a specific configuration of the pass when it's enabled) and exposes `-riscv-enable-global-merge` and //doesn't enable it by default//.

Note that the comment "// FIXME: Unify control over GlobalMerge." is copied from the Arm and AArch64 backends, which expose the same flag. Presumably the author is imagining some later refactoring that provides a target-independent flag.

Reviewed By: craig.topper, reames, hiraditya

Differential Revision: https://reviews.llvm.org/D130481

22 months ago[AArch64] Fix -Wunused-variable. NFC
Fangrui Song [Fri, 9 Sep 2022 01:27:16 +0000 (18:27 -0700)]
[AArch64] Fix -Wunused-variable. NFC

22 months ago[mlir][math] Canonicalization for math.floor op
Kai Sasaki [Thu, 8 Sep 2022 23:59:18 +0000 (08:59 +0900)]
[mlir][math] Canonicalization for math.floor op

Support constant folding for math.floor op as well as math.ceil.

Reviewed By: Mogball

Differential Revision: https://reviews.llvm.org/D133398

22 months ago[Peephole] rewrite INSERT_SUBREG to SUBREG_TO_REG if upper bits zero
zhongyunde [Fri, 9 Sep 2022 01:00:20 +0000 (09:00 +0800)]
[Peephole] rewrite INSERT_SUBREG to SUBREG_TO_REG if upper bits zero

Restrict the 32-bit form of an instruction of integer as too many test cases
will be clobber as the register number updated.
    From %reg = INSERT_SUBREG %reg, %subreg, subidx
    To   %reg:subidx =  SUBREG_TO_REG 0, %subreg, subidx
Try to prefix the redundant mov instruction at D132325 as the SUBREG_TO_REG should not generate code.

Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D132939

22 months ago[mlir][sparse] fix a bug in sparse2sparse reshape.
Peiming Liu [Thu, 8 Sep 2022 20:48:26 +0000 (20:48 +0000)]
[mlir][sparse] fix a bug in sparse2sparse reshape.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D133521

22 months ago[mlir][sparse] rename lex_insert into insert
Aart Bik [Thu, 8 Sep 2022 21:41:18 +0000 (14:41 -0700)]
[mlir][sparse] rename lex_insert into insert

This change goes not impact any semantics yet, but it
is in preparation for implementing the unordered and not-unique
properties. Changing lex_insert to insert is a first step.

Reviewed By: Peiming

Differential Revision: https://reviews.llvm.org/D133531

22 months ago[BOLT] Add test checking LP trampolines in multi-split
Fabian Parzefall [Fri, 9 Sep 2022 00:10:36 +0000 (17:10 -0700)]
[BOLT] Add test checking LP trampolines in multi-split

This adds a test to verify that when splitting all blocks, landing pad
trampolines are inserted in all blocks.

Reviewed By: maksfb

Differential Revision: https://reviews.llvm.org/D132426

22 months ago[BOLT] Emit LSDA call sites for all fragments
Fabian Parzefall [Fri, 9 Sep 2022 00:10:27 +0000 (17:10 -0700)]
[BOLT] Emit LSDA call sites for all fragments

For exception handling, LSDA call sites have to be emitted for each
fragment individually. With this patch, call sites and respective LSDA
symbols are generated and associated with each fragment of their
function, such that they can be used by the emitter.

Reviewed By: maksfb

Differential Revision: https://reviews.llvm.org/D132052