radeonsi: Don't prefer interlaced for video decode

Preferring interlaced results in all surfaces being allocated
as interlaced for H264 decode regardless of whether the decoded
pic is interlaced or progressive, which makes VA postproc
apply deinterlacing even for progressive pics.

Deinterlacing interlaced pics still works because VA frontend
will now reallocate surface as interlaced when decoding interlaced
pics.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24361>

frontends/vdpau: Alloc interlaced surface for interlaced pics

When decoding interlaced pics, the output surface should
also be allocated as interlaced to make the deinterlace
postproc filter work correctly.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24361>

frontends/va: Alloc interlaced surface for interlaced pics

When decoding interlaced pics, the output surface should
also be allocated as interlaced to make the deinterlace
postproc filter work correctly.

This makes deinterlacing work for drivers that supports, but
not prefers, interlaced surfaces.

Use extra buffer instead of reallocating as non-interlaced
when exporting interlaced surfaces.

v2: Avoid reallocating in vlVaExportSurfaceHandle

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24361>

mesa/main: allow readpix/teximage to read from implicitly multisampled fbos

The GL_EXT_multisampled_render_to_texture spec explicitly allow reading
from these FBOs.

"Similarly, for ReadPixels:
 'An INVALID_OPERATION error is generated if the value of READ_-
FRAMEBUFFER_BINDING (see section 9) is non-zero, the read framebuffer is
framebuffer complete, and the value of SAMPLE_BUFFERS for the read
framebuffer is one.'

 These errors do not apply to textures and renderbuffers that have
associated multisample data specified by the mechanisms described in
this extension, i.e., the above operations are allowed even when
SAMPLE_BUFFERS is non-zero for renderbuffers created via Renderbuffer-
StorageMultisampleEXT or textures attached via FramebufferTexture2D-
MultisampleEXT."

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10747>

mesa/main: account for RTT samples when updating framebuffer

For EXT_multisampled_render_to_texture, we store the number of samples
in Attachment->NumSamples instead of Renderbuffer->NumSamples. This
meant that the previous code ignored that the framebuffer was
multisampled. Because of this, pipe_rasterizer_state::multisample is set
incorrectly, leading to visual artifacts on drivers that support MS-RTT
extension, such as panfrost.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10747>

gallium: bump PIPE_MAX_SO_OUTPUTS to 128

this is the number of components supported for streamout

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24285>

ir3: bump max xfb output to 128

this is the number of components supported for streamout

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24285>

radv: bump max xfb output to 128

this is the number of components supported for streamout

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24285>

zink: Hash only first 32 bits of zink_gfx_pipeline_state with full DS3

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8245
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24430>

intel/genxml/gen125: Set MI_MATH MOCS field as non-zero

All MOCS tables have 0 as a invalid value, so this will asssert
in case some place misset to set MI_MATH MOCS field.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22508>

intel/tests/mi_builder: Set MI_MATH MOCS field

MOCS = 0 is a invalid MOCS index on MTL, so it is necessary get a
valid value and set to MI_MATH instructions.

So here the mocs index is set with mi_builder_set_mocs(), it can be
always set but it is required when mi_build will emit MI_MATH
instructions.
The mocs index will only be stored and used in gfx12.5+ platforms
so no changes were are required in crocus or hasvk.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22508>

anv: Set MI_MATH MOCS field

MOCS = 0 is a invalid MOCS index, so it is necessary get a valid value
and set to MI_MATH instructions.

So here the mocs index is set with mi_builder_set_mocs(), it can be
always set but it is required when mi_build will emit MI_MATH
instructions.
The mocs index will only be stored and used in gfx12.5+ platforms
so no changes were are required in crocus or hasvk.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22508>

iris: Set MI_MATH MOCS field

MOCS = 0 is a invalid MOCS index on MTL, so it is necessary get a
valid value and set to MI_MATH instructions.

So here the mocs index is set with mi_builder_set_mocs(), it can be
always set but it is required when mi_build will emit MI_MATH
instructions.
The mocs index will only be stored and used in gfx12.5+ platforms
so no changes were are required in crocus or hasvk.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22508>

intel/genxml/gen125: Add missing fields in MI_MATH

BSpec: 53415
BSpec: 45737
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22508>

anv: Use the common versions of vkBegin/EndQuery()

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24409>

anv: Use vk_query_pool

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24409>

vulkan: Add init/finish helpers for vk_query_pool

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24409>

anv: Use vk_buffer_view

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24409>

anv: Use vk_sampler

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24409>

nv/codegen: Implement nir_op_fquantize2f16

Passes most of dEQP-VK.spirv_assembly.instruction.graphics.opquantize.* but
not the too_small_* tests for some reason. (Tested on kepler.)

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>

nv50/ir: Run nir_divergence_analysis before out-of-SSA

We don't actually use or need this information but it gets generated by
nir_opt_non_uniform_access() and stale divergence information can cause
out-of-SSA to assert in parallel copy lowering.

Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>

nouveau/codegen: Add capability to pre-specify tessellation domain

In the case of SPIRV tessellation shaders, the execution mode can be
specified in the tessellation control shader. So we need a way to know the domain
when compiling the tessellation evaluation shader.

Acked-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>

nouveau/codegen: Fix compact patch varyings in case of NIR

The code path was not implemented and an assert was reached.

Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>

nouveau/codegen: Don't convertSurfaceFormat for unknown formats

Without this and the previous patch, it would see PIPE_FORMAT_NONE as a
zero-component format and delete the whole load.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>

nouveau/codegen: Use a NULL format for PIPE_FORMAT_NONE for images

Get rid of our own FMT_NONE and just use a NULL format in that case.
We're already checking su->tex.format != NULL in a bunch of cases but
none of those NULL checks are doing anything right now execpt detecting
when its an actual texture op and not an image op.  We'd like them to
start also applying for image load/store with an unspecified format.

Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>

nouveau/codegen: Handle nir op amul

This came from CTS clipping tests with geometry shaders.  Maybe can be
done as a lowering operation instead.

Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>

nouveau/codegen: Support compact clip distances with arrayed_io

Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>

nouveau/codegen: Set lower_device_index_to_zero

This instructs NIR to lower DeviceIndex to zero, which is needed
for a no-op implementation of VK_KHR_device_group.

Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>

nouveau/codegen: Support nir_intrinsic_load_workgroup_id_zero_base

Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>

nouveau/codegen: Handle/indirect goes before sample index

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>

nouveau/nir: Implement support for compact arrays

This is needed for clip and cull distances.

Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>

nv/codegen: Call nir_shader_gather_info

We need this info to be up-to-date for slot assignment.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>

nouveau: Allow GLSL_SAMPLER_DIM_SUBPASS*

Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>

nv50/nir: Lower to scratch AFTER optimization

Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>

lima/gpir: switch to register intrinsics

gp has explicit load and store reg instructions so it can implement
the new nir_intrinsic_{decl,load,store}_reg intrinsics.
The implementation reuses the gpir_node_find and register_node functions
instead of just emitting load and store instructions in order to
preserve the behavior that there will never be a store_reg followed by
a load_reg of the same register in the same block.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24246>

lima/ppir: convert to nir_legacy

With the upcoming transition away from nir_register and modifiers in
nir, ppir needs to prepare for those features to be removed.
The most straightforward way for ppir without major reworks at this time
is to use the new nir_legacy helpers so that most of the backend can be
kept untouched (particularly due to use of abs/neg/sat modifiers).
Do this for now to unblock the transition with little impact; ppir can
be optimized at a later moment to have its own passes which will allow
it to drop the nir_legacy use and use just the chasing helpers.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24246>

lima/ppir: don't optimize loads with different block successors

Even if loads are initially duplicated for each user, with new
optimizations such as folding modifiers, it may happen that loads
end up with only users in different blocks.
Handle that and don't delete or pipeline those nodes.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24246>

Revert "ci: Disable nouveau CI"

This reverts commit 1440a0f95bede8c77ba842273cf8264dd2dc6a47.

runner got wedged, it's back up now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24427>

aco: fix non constant 16bit bitnz/bitz

Fixes: 573e98f34ac ("aco: implement nir_op_bitz/bitnz")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24420>

frontends/va: Also map VAImageBufferType for reading

VAImageBufferType can be used for both reading and writing,
so map it as such.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24390>

mesa: Implement and advertise GL_MESA_sampler_objects

This is the GLES3 sampler object API trivially backported to GLES2,
because it allows for simpler/better support in glamor and mutter.

The only code change we need is adding these to the generated dispatch
tables for ES2 contexts. The interactions with EXT_shadow_samplers,
EXT_texture_filter_anisotropic and EXT_texture_sRGB_decode are already
in place before this change, and OES_texture_border_clamp is always
supported in Mesa.

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2440>

gallium/u_simple_shaders: Optimize out ffloors

ffloor(f2i(x)) can't be optimized to f2i(x) due to differing behaviour for
negative x, but u_blitter only uses this with nonnegative x so we can instead
use ftrunc(f2i(x)) which NIR will optimize to f2i(x) for us. This gets rid of
the silly ffloor instructions in blit shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24319>

nir/schedule: Assume no old-style registers

True for all users. I intentionally didn't add is_ssa asserts because they're
pointless and will be deleted, like, next week and will just make that churn
even more annoying.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24319>

rusticl/nir: use the new nir_pass macro

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21451>

rusticl/nir: add a nir_pass macro

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21451>

rusticl/nir: add helper functions we need for a NIR_PASS macro

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21451>

meson,ci: bump meson req for rusticl to 1.2

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21451>

zink: Removes `disable_xcb_surface`

This dri config is no longer necessary since the case where it was
required is being handled in the previous commit.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Igor Torrente <igor.torrente@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24222>

zink: Fix enumerate devices when running compositor

When we try to run a compositor on top of Zink, we hit a lockup
when enumerating the Vulkan devices. The vulkan_device_select
tries to reorder the devices and gets stuck waiting for the Xserver.

With this patch, we avoid this issue by detecting when we are running
a compositor and disabling the X and Wayland instance extensions.

And code is added to try to pick the same device as the display.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Igor Torrente <igor.torrente@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24222>

egl: Always set _EGLDisplay->Device during eglGetPlatformDisplay()

Make sure that all platform specific implementations of
eglGetPlatformDisplay() overwrite the Device field.

Fixes: c237539d621 ("egl: Implement EGL_EXT_explicit_device")

Signed-off-by: Robert Foss <rfoss@kernel.org>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24394>

egl: Fix attrib_list[0] == EGL_NONE check

_eglGetSurfacelessDisplay(), _eglGetWaylandDisplay() and
_eglGetGbmDisplay() handle the attrib_list[0] == EGL_NONE
case incorrectly by returning an EGL_BAD_ATTRIBUTE error.

Fix this bug, and switch the functions to use switch/case
in order to have the same structure as the sibling
_eglGetXXXDisplay() functions which support multiple attributes.

Fixes: c237539d621 ("egl: Implement EGL_EXT_explicit_device")

Signed-off-by: Robert Foss <rfoss@kernel.org>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24394>

ci: Disable nouveau CI

It's offline.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24426>

rusticl/kernel: only handle function_temp memory before lowering printf

There was no need to handle the other variable modes. This also fixes
double accounting of shared memory.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9058
Fixes: 5795ee0e083 ("rusticl: translate spirv to nir and first steps to kernel arg handling")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24398>

turnip: Use common nir_vk_is_not_xfb_output

On a7xx fixes:
 dEQP-VK.rasterization.provoking_vertex.transform_feedback.*

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24318>

radv: Use common nir_vk_is_not_xfb_output

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24318>

vulkan/nir: Add common helper to check if output is XFB

It was not taken into account that without Offset decoration
the output is not written into XFB.

Aside from eliminating more outputs this change prevents gl_PerVertex
builtins generated by glslang from being kept alive in case when XFB
is enabled. Keeping such outputs alive may upset a driver.

VUID-StandaloneSpirv-Offset-04716:
    "Only variables or block members in the output interface decorated
    with Offset can be captured for transform feedback, and those
    variables or block members must also be decorated with XfbBuffer
    and XfbStride, or inherit XfbBuffer and XfbStride decorations from
    a block containing them"

Additional info about glslang behavior could be found at:
 https://github.com/KhronosGroup/glslang/issues/1526

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24318>

radv: fix unused non-xfb shader outputs not being removed

It was not taken into account that without Offset decoration
the output is not written into XFB.

Aside from eliminating more outputs this change prevents gl_PerVertex
builtins generated by glslang from being kept alive in case when XFB
is enabled. Keeping such outputs alive may upset a driver.

VUID-StandaloneSpirv-Offset-04716:
    "Only variables or block members in the output interface decorated
    with Offset can be captured for transform feedback, and those
    variables or block members must also be decorated with XfbBuffer
    and XfbStride, or inherit XfbBuffer and XfbStride decorations from
    a block containing them"

Additional info about glslang behavior could be found at:
 https://github.com/KhronosGroup/glslang/issues/1526

Fixes: e95531e101f0ba61d28195fe38414e411bf418b3
("radv: fix gathering XFB info if there is dead outputs")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24318>

aco/gfx11: use v_cmp_class_f16 with opsel for bitnz/bitz

Foz-DB GFX11:
Totals from 1607 (1.21% of 132657) affected shaders:
MaxWaves: 36511 -> 36513 (+0.01%)
Instrs: 2412601 -> 2408770 (-0.16%); split: -0.16%, +0.00%
CodeSize: 12434716 -> 12414536 (-0.16%); split: -0.17%, +0.00%
VGPRs: 108872 -> 108860 (-0.01%)
Latency: 27555570 -> 27541897 (-0.05%); split: -0.05%, +0.00%
InvThroughput: 3144382 -> 3140929 (-0.11%); split: -0.11%, +0.00%
SClause: 65762 -> 65770 (+0.01%)
Copies: 127148 -> 127170 (+0.02%); split: -0.06%, +0.08%
PreVGPRs: 96737 -> 96447 (-0.30%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24380>

aco: combine a & ~b to bfi(b, 0, a)

Foz-DB Navi21:
Totals from 905 (0.68% of 132657) affected shaders:
Instrs: 1223583 -> 1221016 (-0.21%); split: -0.22%, +0.01%
CodeSize: 6567272 -> 6567064 (-0.00%); split: -0.04%, +0.03%
SpillSGPRs: 1231 -> 1223 (-0.65%)
SpillVGPRs: 829 -> 823 (-0.72%); split: -1.45%, +0.72%
Latency: 40952209 -> 40946230 (-0.01%); split: -0.02%, +0.01%
InvThroughput: 9411929 -> 9397932 (-0.15%); split: -0.17%, +0.02%
VClause: 29108 -> 29112 (+0.01%); split: -0.04%, +0.05%
Copies: 105272 -> 105221 (-0.05%); split: -0.28%, +0.23%
Branches: 29330 -> 29329 (-0.00%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24383>

clang-format: Ignore original panfrost commit

Blame better.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24406>

radv: correctly skip MRT output NaN fixup for meta shaders

radv_nir_compiler_options::enable_mrt_output_nan_fixup is only used for
epilogs, these days.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 290c3d360e5a ("aco,radv: lower outputs to exports when nir for monolithic ps")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9414
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24352>

vulkan: Add a core vk_sampler struct

Unlike some other core structs, I didn't bother to copy the entire
VkSamplerCreateInfo into the sampler.  There isn't typcially a lot of
pre-processing we can or need to do here and we may as well keep the
struct small for now.  It does, however, handle most things involving
chain-in structs.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24335>

vulkan/format: Add the remaining 1-plane YCbCr formats

Each of these are just themselves in a single plane.  This is copied
from the 8888 version, these are just the 10, 12, and 16-bit versions.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24335>

vulkan: Add common vkCmdBegin/EndQuery wrappers

These are identical to the IndexedEXT versions with index == 0.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24335>

vulkan: Add a vk_query_pool base object

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24335>

vulkan: Add a more direct way to use a NIR shader

This follows the pipeline libraries method of including SPIR-V and lets
you provide the NIR shader without wrapping it in a VkShaderModule.

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24335>

vulkan: Add a core vk_buffer_view struct

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24335>

iris: Add support for userptr in Xe KMD

Xe KMD only requires userptr to be bound to VM, so here returning
UINT32_MAX as gem_handle in Xe version of gem_create_userptr() for all
userptr bos.

As no bo is created it was also necessary to add additional handling
to xe_gem_close().

The vm bind side of userptr was already implemented, so it was only
necessary add the special handling and the kmd vm bind call.

This fixes piglit@amd_pinned_memory subtests that makes uses of
userptr.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23817>

iris: Add gem_create_userptr() to KMD backend

Xe support of userptr will be implemented in the next patch,
this is just moving the i915 function to KMD backend.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23817>

iris: Move iris_bufmgr_bo_close() to kmd backend

The next patch will need a special handling when closing userptr bos
in Xe KMD, so here moving iris_bufmgr_bo_close() to kmd backend
and changing the gem_handle parameter to iris_bo.

There still one DRM_IOCTL_GEM_CLOSE call left in iris_bufmgr, that
is used to close exported gem handles.
iris_bufmgr_get_for_fd() could be used to get the iris_bufmgr but
we would still have problems with bo_export != iris_bo, so leaving
as is until a better solution is found.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23817>

iris: Move i915_gem_set_domain() call to i915 backend

This was being called from the common code, so it was being executed
for Xe KMD.
Luckily Xe don't have any uAPI at 0x1f offset.

There is still one user of i915_gem_set_domain() in iris_bufmgr.c
so it was duplicated in i915 backend but a future patch in this series
will take to remove it when the userptr code moves to backend.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23817>

anv: partially revert 2e8b1f6d

set_image_compressed_bit checks for the image aux usage whereas
cmd_buffer_mark_image_written checks for the subresource's aux usage.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Fixes: 2e8b1f6d ('anv: drop duplicate checks when setting the compressed bit')
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24363>

anv: enable EDS3 ConservativeRasterizationMode

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24395>

anv: fix 3DSTATE_RASTER::APIMode field setting

The APIMode field is set in the dynamic part in gfx8_cmd_buffer.c

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 55951ac28e ("anv: fix emitting dynamic primitive topology")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24395>

radv: workaround WWZ exporting index=1 through location=1

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Fixes: 290c3d360e5a ("aco,radv: lower outputs to exports when nir for monolithic ps")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9232
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24354>

r600/sfn: Don't try to propagate to vec4 with more than one use

Otherwise we end up with weird dependencies that make the scheduler
choke.

Fixes: 18a8d148d862d4a0f5b83f4385f00cf8a4a71b6d
    r600/sfn: Cleanup copy-prop into vec4 source values

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24393>

venus: suppress a false logging

Should only log when there's batched query feedbacks in the suspended
render pass instance. Additionally gate behind debug option.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24379>

r600: Force CF when emitting a NOP on R600 in gs copy shader

Fixes: 9d4104d4fb21813b527805cf3b40e133cab4d028
    r600: Explicitly force new CF in gs copy shader

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24391>

nv50/ir/nir: Fix zero source handling of tex instructions.

For TXQ we know make sure that we at least add one source. If the nir
instruction however didn't had any sources, we inserted a fake 0 source
ending up with two 0s for TXQ.

It's unclear to me if we have other ops where this would be necessary.

Fixes: 85a31fa1fc9 ("nv50/ir/nir: fix txq emission on MS textures")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Acked-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24373>

intel/compiler: Use nir SUBGROUP_INVOCATION for RT TOPOLOGY_ID

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21774>

intel/isl: Use intel_needs_workaround() for MTL CCS WA

Also use parent WA number of 14017240301 instead of 14017353530.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22401>

lavapipe/ci: use tighter changes: rules

This removes src/{egl,glx,loader,mapi,mesa}/* from the match.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24372>

nir/builder: Add a nir_txs_deref() helper

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24375>

nir/builder: Allow tex helpers on image types

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24375>

freedreno/afuc: Initial a7xx support

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

afuc: Fix writing $00

This is valid and should do nothing. Don't make the PC overlap $00 in
the reg file, so that we can print out "writes" to $00 but they're still
discarded.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

afuc: Add setbit/clrbit

First introduced in a660_sqe.fw.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

afuc: Convert to isaspec

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

afuc: Fix xmov lexer typo

This happened to work by luck, but was caught with the isaspec encoding
assertions.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

isaspec: Add initial decoding support

This reuses the <map> entries in the <encode> block to go in the reverse
direction and parse an instruction into a machine-readable structure. It
currently assumes that <map> entries are simple l-values like
"src->src[0]" or "src->flag", which is enough for afuc, but the plan for
the future is to use the <decode> block to allow us to override that for
more complex cases.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

isaspec: Rename isa_decode() to isa_disasm()

This actually disassembles the binary, and we will add a function that
actually decodes it to the same structure that the encoder uses.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

isaspec: Add callback after decoding an instruction

This will be used by afuc for printing register decodings in a comment.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

isaspec: Add "custom" field type

Add support for a field which is decoded by a user callback. This will
be used for decoding control registers in cread/cwrite by afuc.

In order for this to interact well with the align feature, we need to
pull print() out of the decode implementation so that the callback can
call it and keep track of the line column.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

isaspec: Add support for function and entrypoint labels

Functions (i.e. labels reached from call instructions) should be printed
differently from normal labels. In addition we also need to add support
for entrypoints with user-defined names in order to show packet names in
afuc.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

isaspec: Add support for "absolute" branches

afuc has branches which use an absolute offset in instructions from the
microcode base. Add another type to support them.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

isaspec: Add "displayname" for altering {NAME} when decoding

In afuc, we have the situation where there are a number of ALU
instructions with two (almost) completely different encodings, including
a different opcode location, etc. These need to be different leaf
bitsets with different names for the encoder to work, because otherwise
the encoder has no way of descriminating between them, but when
displaying them we want to use the same name. This adds a small facility
to make the name used for {NAME} when displaying and for the opcode
when encoding different, so that e.g. OPC_ADDI can display as "add"
instead of "addi".

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>

egl: Implement EGL_EXT_explicit_device

Implement support for EGL_EXT_explicit_device[1].

[1] https://registry.khronos.org/EGL/extensions/EXT/EGL_EXT_explicit_device.txt

Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Robert Foss <rfoss@redhat.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23873>

egl: android: Remove legacy name-based shared buffers support

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3415
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16578>

intel: Rename intel_gem_add_ext() to intel_i915_gem_add_ext()

gem_add_ext() is i915 specific so adding it to the name.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23905>

intel/common: Move functions inside of C++ ifdef

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23905>