Roman Lebedev [Fri, 1 Oct 2021 13:53:32 +0000 (16:53 +0300)]
[X86][Costmodel] Load/store i64/f64 Stride=2 VF=4 interleaving costs
The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3
For load we have:
https://godbolt.org/z/j5co1qWEW - for intels `Block RThroughput: =4.0`; for ryzens, `Block RThroughput: <=2.0`
So pick cost of `4`.
For store we have:
https://godbolt.org/z/j5co1qWEW - for intels `Block RThroughput: =4.0`; for ryzens, `Block RThroughput: <=4.0`
So pick cost of `4`.
I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D110837
Roman Lebedev [Fri, 1 Oct 2021 13:53:28 +0000 (16:53 +0300)]
[X86][Costmodel] Load/store i64/f64 Stride=2 VF=2 interleaving costs
The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3
For load we have:
https://godbolt.org/z/8a1cfGeMn - for intels `Block RThroughput: =2.0`; for ryzens, `Block RThroughput: =1.0`
So pick cost of `2`.
For store we have:
https://godbolt.org/z/jMdcM47bx - for intels `Block RThroughput: =2.0`; for ryzens, `Block RThroughput: <=2.0`
So pick cost of `2`.
I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D110835
Roman Lebedev [Fri, 1 Oct 2021 13:52:51 +0000 (16:52 +0300)]
[X86][Costmodel] Load/store i32/f32 Stride=2 VF=32 interleaving costs
The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3
Here for `store` pattern we are starting to have spilling,
so accurate modelling may be problematic,
although if i drop the spilling, the measurements don't change.
For load we have:
https://godbolt.org/z/1oTTnncbx - for intels `Block RThroughput: =16.0`; for ryzens, `Block RThroughput: <=8.0`
So pick cost of `16`.
For store we have:
https://godbolt.org/z/1oTTnncbx - for intels `Block RThroughput: =16.0`; for ryzens, `Block RThroughput: =8.0`
So pick cost of `16`.
I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D110761
Roman Lebedev [Fri, 1 Oct 2021 13:52:51 +0000 (16:52 +0300)]
[X86][Costmodel] Load/store i32/f32 Stride=2 VF=16 interleaving costs
The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3
For load we have:
https://godbolt.org/z/M9eev3xe8 - for intels `Block RThroughput: =8.0`; for ryzens, `Block RThroughput: <=4.0`
So pick cost of `8`.
For store we have:
https://godbolt.org/z/M9eev3xe8 - for intels `Block RThroughput: =8.0`; for ryzens, `Block RThroughput: =4.0`
So pick cost of `8`.
I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D110756
Roman Lebedev [Fri, 1 Oct 2021 13:52:46 +0000 (16:52 +0300)]
[X86][Costmodel] Load/store i32/f32 Stride=2 VF=8 interleaving costs
The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3
For load we have:
https://godbolt.org/z/n8aMKeo4E - for intels `Block RThroughput: =4.0`; for ryzens, `Block RThroughput: <=2.0`
So pick cost of `4`.
For store we have:
https://godbolt.org/z/n8aMKeo4E - for intels `Block RThroughput: =4.0`; for ryzens, `Block RThroughput: =2.0`
So pick cost of `4`.
I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D110755
Roman Lebedev [Fri, 1 Oct 2021 13:52:41 +0000 (16:52 +0300)]
[X86][Costmodel] Load/store i32/f32 Stride=2 VF=4 interleaving costs
The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3
For load we have:
https://godbolt.org/z/EM5Ean7bd - for intels `Block RThroughput: =2.0`; for ryzens, `Block RThroughput: =1.0`
So pick cost of `2`.
For store we have:
https://godbolt.org/z/EM5Ean7bd - for intels `Block RThroughput: =2.0`; for ryzens, `Block RThroughput: <=2.0`
So pick cost of `2`.
I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D110754
Roman Lebedev [Fri, 1 Oct 2021 13:52:36 +0000 (16:52 +0300)]
[X86][Costmodel] Load/store i32/f32 Stride=2 VF=2 interleaving costs
The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3
For load we have:
https://godbolt.org/z/4rY96hnGT - for intels `Block RThroughput: =2.0`; for ryzens, `Block RThroughput: =1.0`
So pick cost of `2`.
For store we have:
https://godbolt.org/z/vbo37Y3r9 - for intels `Block RThroughput: =1.0`; for ryzens, `Block RThroughput: =0.5`
So pick cost of `1`.
I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D110753
LLVM GN Syncbot [Fri, 1 Oct 2021 14:29:37 +0000 (14:29 +0000)]
[gn build] Port
fb99424a6f65
Anirudh Prasad [Fri, 1 Oct 2021 14:29:02 +0000 (10:29 -0400)]
[SystemZ][z/OS] Introduce initial support for GOFF asm parser
- Introduce a skeleton outline for the GOFFAsmParser
- Before instantiating AsmParser/HLASMAsmParser, target specific asm parsers are attempted to be initialized first before proceeding. If it doesn't exist for a particular file type, we report a fatal error.
- This patch allows to properly instantiate the HLASMAsmParser on z/OS, and ensures we can write lit tests and unit tests which will involve the instantiation of asm parsers, without an assert / fatal error.
Reviewed By: uweigand, Kai
Differential Revision: https://reviews.llvm.org/D110730
Eric Schweitz [Fri, 1 Oct 2021 14:10:24 +0000 (16:10 +0200)]
[fir] Remove obsolete fir.negf and fir.modf ops
fir.negf op is replaced by mlir.negf and
fir.modf is just deleted.
Reviewed By: kiranchandramohan
Differential Revision: https://reviews.llvm.org/D110932
Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Valentin Clement <clementval@gmail.com>
Jon Chesterfield [Fri, 1 Oct 2021 13:38:36 +0000 (14:38 +0100)]
[libomptarget][amdgpu] Refactor memory pool collection
Tobias Gysi [Fri, 1 Oct 2021 13:29:35 +0000 (13:29 +0000)]
[mlir][linalg] Retire PoolingMaxOp/PoolingMinOp/PoolingSumOp.
The pooling ops are among the last remaining hard coded Linalg operations that have no region attached. They got obsolete due to the OpDSL pooling operations. Removing them allows us to delete specialized code and tests that are not needed for the OpDSL counterparts that rely on the standard code paths.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D110909
Pavel Labath [Fri, 1 Oct 2021 13:47:22 +0000 (15:47 +0200)]
[lldb] Simplify TestCompletion.py
Fraser Cormack [Fri, 1 Oct 2021 13:23:54 +0000 (14:23 +0100)]
[RISCV][NFC] Reformat a line of frame lowering code
Nico Weber [Fri, 1 Oct 2021 13:31:10 +0000 (09:31 -0400)]
[clang] Try to unbreak crash-report.cpp on PS4 bot after
8dfbe9b0a
Looks like exceptions are off-by-default with the PS4 triple.
Since adding -fexceptions defeats the purpose of the test change
in
8dfbe9b0a, pass an explicit triple instead.
Nemanja Ivanovic [Fri, 1 Oct 2021 13:05:15 +0000 (08:05 -0500)]
[PowerPC] Optimal sequence for doubleword vec_all_{eq|ne} on Power7
These builtins produce inefficient code for CPU's prior to Power8
due to vcmpequd being unavailable. The predicate forms can actually
leverage the available vcmpequw along with xxlxor to produce a better
sequence.
Michał Górny [Fri, 1 Oct 2021 13:24:49 +0000 (15:24 +0200)]
[lldb] [test] Delay pty/tty imports to fix Windows builds
Delay pty/tty module imports until they are actually used, in order
to prevent their import failures on Windows.
Marcelo Juchem [Fri, 1 Oct 2021 07:42:23 +0000 (08:42 +0100)]
Fix ambiguous overload build failure
LLVM (llvmorg-14-init) under Debian sid using latest gcc (Debian
10.3.0-9) 10.3.0 fails due to ambiguous overload on operators == and !=:
/root/src/llvm/src/llvm/tools/obj2yaml/elf2yaml.cpp:212:22:
error: ambiguous overload for 'operator!='
(operand types are 'llvm::ELFYAML::ELF_SHF' and 'int')
/root/src/llvm/src/llvm/tools/obj2yaml/elf2yaml.cpp:204:32:
error: ambiguous overload for 'operator!='
(operand types are 'const llvm::yaml::Hex64' and 'int')
/root/src/llvm/src/llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp:629:35:
error: ambiguous overload for 'operator=='
(operand types are 'const uint64_t' {aka 'const long unsigned int'} and
'llvm::Register')
Reviewed by: StephenTozer, jmorse, Higuoxing
Differential Revision: https://reviews.llvm.org/D109534
Valentin Clement [Fri, 1 Oct 2021 12:41:25 +0000 (14:41 +0200)]
[fir][NFC] Remove explicit num of inlined element for SmallVectors
Remove explicit number of inlined elements for SmallVector.
This patch is part of the upstreaming effort from fir-dev branch.
Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Reviewed By: awarzynski
Differential Revision: https://reviews.llvm.org/D110912
Eric Schweitz [Fri, 1 Oct 2021 12:39:03 +0000 (14:39 +0200)]
[fir] Add fir.char_convert op
Add the fir-char_convert op.
This patch is part of the upstreaming effort from fir-dev branch.
Reviewed By: kiranchandramohan
Differential Revision: https://reviews.llvm.org/D110818
Co-authored-by: Valentin Clement <clementval@gmail.com>
Michał Górny [Thu, 30 Sep 2021 20:30:30 +0000 (22:30 +0200)]
[lldb] Add a gdb_remote_client test for connecting to pty
Add a minimal mock server utilizing a pty, and add a client test
connecting to that server.
Differential Revision: https://reviews.llvm.org/D110878
Uday Bondhugula [Tue, 14 Sep 2021 08:43:21 +0000 (14:13 +0530)]
[MLIR][GPU] Add GPU launch op support for dynamic shared memory
Add support for dynamic shared memory for GPU launch ops: add an
optional operand to gpu.launch and gpu.launch_func ops to specify the
amount of "dynamic" shared memory to use. Update lowerings to connect
this operand to the GPU runtime.
Differential Revision: https://reviews.llvm.org/D110800
Hans Wennborg [Fri, 1 Oct 2021 08:59:43 +0000 (10:59 +0200)]
[libFuzzer] Fix two typos
Alexander Belyaev [Fri, 1 Oct 2021 11:02:42 +0000 (13:02 +0200)]
[mlir] Enable loop peeling for "reduction" dimensions of tiled_loop.
Differential Revision: https://reviews.llvm.org/D110919
Fraser Cormack [Fri, 1 Oct 2021 10:57:55 +0000 (11:57 +0100)]
[RISCV][NFC] Add closing parentheses to frame layout comments
Michał Górny [Wed, 29 Sep 2021 15:51:51 +0000 (17:51 +0200)]
[lldb] [Host] Refactor TerminalState
Refactor TerminalState to make the code simpler. Move 'struct termios'
to a PImpl-style subclass. Add an RAII interface to automatically store
and restore the state.
Differential revision: https://reviews.llvm.org/D110721
Kadir Cetinkaya [Thu, 30 Sep 2021 13:25:42 +0000 (15:25 +0200)]
[clangd] Handle members of anon structs in SelectionTree
References to fields inside anon structs contain an implicit children
for the container, which has the same SourceLocation with the field.
This was resulting in SelectionTree always picking the anon-struct rather than
the field as the selection.
This patch prevents that by claiming the range for the field early.
https://github.com/clangd/clangd/issues/877.
Differential Revision: https://reviews.llvm.org/D110825
Florian Hahn [Fri, 1 Oct 2021 10:25:16 +0000 (11:25 +0100)]
[BasicAA] Add test showing 32 bit overflow issue for GEPs.
This patch additional tests with i64 GEP indices for 32 bit pointers.
@mustalias_overflow_in_32_bit_add_mul_gep highlights a case where
BasicAA currently incorrectly determines noalias.
Modeled in Alive2 for 32 bit pointers: https://alive2.llvm.org/ce/z/HHjQgb
Modeled in Alive2 for 64 bit pointers: https://alive2.llvm.org/ce/z/DoWK2c
Matthew Devereau [Wed, 1 Sep 2021 15:41:42 +0000 (16:41 +0100)]
[AArch64][SVE] Replace fmul, fadd and fsub LLVM IR instrinsics with LLVM IR binary ops
Replacing fmul and fadd instrinsics with their binary ops results
more succinct AArch64 SVE output, e.g.:
4:
65428041 fmul z1.h, p0/m, z1.h, z2.h
8:
65408020 fadd z0.h, p0/m, z0.h, z1.h
->
4:
65620020 fmla z0.h, p0/m, z1.h, z2.h
Kerry McLaughlin [Fri, 1 Oct 2021 08:43:27 +0000 (09:43 +0100)]
[SLPVectorizer] Fix crash in isShuffle with scalable vectors
D104809 changed `buildTree_rec` to check for extract element instructions
with scalable types. However, if the extract is extended or truncated,
these changes do not apply and we assert later on in isShuffle(), which
attempts to cast the type of the extract to FixedVectorType.
Reviewed By: ABataev
Differential Revision: https://reviews.llvm.org/D110640
Florian Hahn [Fri, 1 Oct 2021 08:56:08 +0000 (09:56 +0100)]
[llvm-reduce] Skip updating calls where OldF isn't the called fn.
When replacing function calls, skip call instructions where the old
function is not the called function, but e.g. the old function is passed
as an argument.
This fixes a crash due to trying to construct invalid IR for the test
case.
Reviewed By: aeubanks
Differential Revision: https://reviews.llvm.org/D109759
David Spickett [Fri, 1 Oct 2021 09:44:44 +0000 (09:44 +0000)]
Revert "[libcxx][test] Use python specified by build rather than system default python"
This reverts commit
9f641c96cb15c9752c976bff286bb57adf86acab.
The "python" command in gdb uses the python gdb is linked to,
not what "python" would give you if you used it directly in the shell.
David Spickett [Fri, 1 Oct 2021 09:43:16 +0000 (09:43 +0000)]
Revert "[libcxx] Run u16string tests for gdb pretty printers"
This reverts commit
e9564c3698edffc64439a8f957c7c28b19214613
due to a report of these tests failing.
Krasimir Georgiev [Fri, 1 Oct 2021 09:37:40 +0000 (11:37 +0200)]
Revert "[LoopVectorize] Permit vectorisation of more select(cmp(), X, Y) reduction patterns"
It appears to cause stage2 clang build failures, e.g.,
https://lab.llvm.org/buildbot/#/builders/74/builds/7145.
This reverts commit
1fb37334bdb3cdb028977382fbd84cebde64ebb2.
Balázs Kéri [Fri, 1 Oct 2021 09:04:54 +0000 (11:04 +0200)]
[clang][ASTImporter] Import ConstructorUsingShadowDecl correctly.
Fix import of ConstructorUsingShadowDecl and add tests.
Reviewed By: martong
Differential Revision: https://reviews.llvm.org/D110398
David Spickett [Wed, 29 Sep 2021 11:30:55 +0000 (12:30 +0100)]
[flang][driver] Error if uuidgen is not installed
Ubuntu Bionic installs it by default, Focal does not.
Differential Revision: https://reviews.llvm.org/D110694
Gabor Marton [Fri, 1 Oct 2021 07:24:41 +0000 (09:24 +0200)]
[clang][ASTImporter] Import InheritedConstructor and ConstructorUsingShadowDecl.
Reviewed By: martong
Differential Revision: https://reviews.llvm.org/D110395
David Sherwood [Wed, 4 Aug 2021 07:10:51 +0000 (08:10 +0100)]
[LoopVectorize] Permit vectorisation of more select(cmp(), X, Y) reduction patterns
This patch adds further support for vectorisation of loops that involve
selecting an integer value based on a previous comparison. Consider the
following C++ loop:
int r = a;
for (int i = 0; i < n; i++) {
if (src[i] > 3) {
r = b;
}
src[i] += 2;
}
We should be able to vectorise this loop because all we are doing is
selecting between two states - 'a' and 'b' - both of which are loop
invariant. This just involves building a vector of values that contain
either 'a' or 'b', where the final reduced value will be 'b' if any lane
contains 'b'.
The IR generated by clang typically looks like this:
%phi = phi i32 [ %a, %entry ], [ %phi.update, %for.body ]
...
%pred = icmp ugt i32 %val, i32 3
%phi.update = select i1 %pred, i32 %b, i32 %phi
We already detect min/max patterns, which also involve a select + cmp.
However, with the min/max patterns we are selecting loaded values (and
hence loop variant) in the loop. In addition we only support certain
cmp predicates. This patch adds a new pattern matching function
(isSelectCmpPattern) and new RecurKind enums - SelectICmp & SelectFCmp.
We only support selecting values that are integer and loop invariant,
however we can support any kind of compare - integer or float.
Tests have been added here:
Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
Transforms/LoopVectorize/select-cmp-predicated.ll
Transforms/LoopVectorize/select-cmp.ll
Differential Revision: https://reviews.llvm.org/D108136
Sander de Smalen [Thu, 16 Sep 2021 15:03:52 +0000 (16:03 +0100)]
[SelectionDAG] Handle promotion + widening in getCopyToPartsVector
Some vectors require both widening and promotion for their legalization.
This case is not yet handled in getCopyToPartsVector and falls back
on scalarizing by default. BBecause scalable vectors can't easily be
scalarised, we need to implement this in two separate stages:
1. Widen the vector.
2. Promote the vector.
As part of this patch, PromoteIntRes_CONCAT_VECTORS also needed to be
made scalable aware. Instead of falling back on scalarizing the vector
(fixed-width only), each sub-part of the CONCAT vector is promoted,
and the operation is performed on the type with the widest element type,
finally truncating the result to the promoted result type.
Differential Revision: https://reviews.llvm.org/D110646
Valentin Clement [Fri, 1 Oct 2021 07:19:17 +0000 (09:19 +0200)]
[fir][NFC] Move fir.select_type builder to cpp file
Move the big builder out of the td file to the cpp file.
This patch is part of the upstreaming effort from fir-dev branch.
Reviewed By: kiranchandramohan
Differential Revision: https://reviews.llvm.org/D110820
Valentin Clement [Fri, 1 Oct 2021 07:17:41 +0000 (09:17 +0200)]
[fir][NFC] Update doc for pinned attr in fir.alloca
Add descritpion for the attribute added in D110815.
Reviewed By: kiranchandramohan
Differential Revision: https://reviews.llvm.org/D110877
Jean Perier [Fri, 1 Oct 2021 06:58:52 +0000 (08:58 +0200)]
[flang] Revert 3 commits pushed by mistake along
b7c07ce15ffe6da9dcd69d457a3eca987452edc7
Revert "[flang][NFC] Add debug dump method to evaluate::Expr and semantics::Symbol"
This reverts commit
b0e35fde21ecb47799603e1acfc9ffa7b83dea13.
Revert "[flang] Add a wrapper for Fortran main program"
This reverts commit
2c1ce0755e09909c41db93845c4c3f42457cb9c8.
Revert "[flang][NFC] Fix header comments in some runtime headers"
This reverts commit
a63f57674d511eb287edbabad9674c6298cf8b84.
Jean Perier [Fri, 1 Oct 2021 06:42:42 +0000 (08:42 +0200)]
[flang] Improve runtime interface with C99 complex
Follow up of https://reviews.llvm.org/D83397.
In folding, make pgmath usage conditional to C99 complex
support in C++. Disable warning in such case.
In lowering, use an empty class type to indicate C99 complex
type in runtime interface.
Add a unit test enforcing C99 complex can be processed
by FIR runtime interface builder.
Differential Revision: https://reviews.llvm.org/D110860
Jean Perier [Thu, 30 Sep 2021 14:22:16 +0000 (07:22 -0700)]
[flang][NFC] Add debug dump method to evaluate::Expr and semantics::Symbol
Helps debugging when working with symbol/expression issue. The dump
method is easy to call in the debugger.
Jean Perier [Thu, 30 Sep 2021 13:26:00 +0000 (06:26 -0700)]
[flang] Add a wrapper for Fortran main program
Add a C wrapper that calls the Fortran runtime initialization and
finalization routines as well as the compiled Fortran main program
_QQmain.
Place it in its own library to satisfy shared library builds since it
contains a C main function.
- https://github.com/flang-compiler/f18-llvm-project/commit/
cc7ac498f916d32a9b197d3ace816f4de5d36aad#diff-fa35a5efa62731fd2845e5e982eca9a2e36439783e11a4e4a463753c2160ec10R53
- was created in flang/test/Examples/main.c in Eric's branch
Jean Perier [Thu, 30 Sep 2021 12:04:47 +0000 (05:04 -0700)]
[flang][NFC] Fix header comments in some runtime headers
Teresa Johnson [Fri, 1 Oct 2021 04:13:51 +0000 (21:13 -0700)]
[MemProf] Loosen matching of profile data to avoid bot flakes
Allow for the allocations to have migrated cpus, assuming they wouldn't
is causing some bot flakiness, e.g.:
https://lab.llvm.org/buildbot/#/builders/37/builds/7197
Koutheir Attouchi [Fri, 1 Oct 2021 03:57:53 +0000 (20:57 -0700)]
Expose `DIBuilder::finalizeSubprogram()` through the LLVM C API
The LLVM C API function is called `LLVMDIBuilderFinalizeSubprogram()`.
Reviewed By: CodaFi
Differential Revision: https://reviews.llvm.org/D104794
Albion Fung [Thu, 30 Sep 2021 23:50:09 +0000 (18:50 -0500)]
[PowerPC] Fix lharx and lbarx builtin signatures
The signatures for the PowerPC builtins lharx and
lbarx are incorrect, and causes issues when used in a function
that requires the return of the builtin to be promoted.
This patch fixes these signatures.
Differential revision: https://reviews.llvm.org/D110273
Vitaly Buka [Fri, 1 Oct 2021 02:36:53 +0000 (19:36 -0700)]
[NFC][asan] Remove redundant functions
Vitaly Buka [Fri, 1 Oct 2021 02:24:53 +0000 (19:24 -0700)]
[NFC][lsan] Expand use StackDepotReverseMap
Before StackDepotReverseMap was used only by ProcessPC.
Vitaly Buka [Fri, 1 Oct 2021 02:10:20 +0000 (19:10 -0700)]
[NFC][sanitizer] Lazy init in StackDepotReverseMap
LLVM GN Syncbot [Fri, 1 Oct 2021 00:43:50 +0000 (00:43 +0000)]
[gn build] Port
3077bc90de8d
Christopher Tetreault [Thu, 30 Sep 2021 17:34:56 +0000 (10:34 -0700)]
[NFC] Restore magic and magicu to a globally visible location
While these functions are only used in one location in upstream,
it has been reused in multiple downstreams. Restore this file to
a globally visibile location (outside of APInt.h) to eliminate
donwstream breakage and enable potential future reuse.
Additionally, this patch renames types and cleans up
clang-tidy issues.
ZijunZhao [Fri, 1 Oct 2021 00:19:35 +0000 (00:19 +0000)]
add tsan shared library
Vitaly Buka [Fri, 1 Oct 2021 00:15:07 +0000 (17:15 -0700)]
[NFC][sanitizer] Add const into method
Yonghong Song [Mon, 27 Sep 2021 15:21:48 +0000 (08:21 -0700)]
BPF: implement isLegalAddressingMode() properly
Latest upstream llvm caused the kernel bpf selftest emitting the
following warnings:
In file included from progs/profiler3.c:6:
progs/profiler.inc.h:489:2: warning: loop not unrolled:
the optimizer was unable to perform the requested transformation;
the transformation might be disabled or specified as part of an unsupported
transformation ordering [-Wpass-failed=transform-warning]
for (int i = 0; i < MAX_PATH_DEPTH; i++) {
^
Further bisecting shows this SimplifyCFG patch ([1]) changed
the condition on how to fold branch to common dest. This caused
some unroll pragma is not honored in selftests/bpf.
The patch [1] test getUserCost() as the condition to
perform the certain basic block folding transformation.
For the above example, before the loop unroll pass, the control flow
looks like:
cond_block:
branch target: body_block, cleanup_block
body_block:
branch target: cleanup_block, end_block
end_block:
branch target: cleanup_block, end10_block
end10_block:
%add.ptr = getelementptr i8, i8* %payload.addr.0, i64 %call2
%inc = add nuw nsw i32 %i.0, 1
branch target: cond_block
In the above, %call2 is an unknown scalar.
Before patch [1], end10_block will be folded into end_block, forming
the code like
cond_block:
branch target: body_block, cleanup_block
body_block:
branch target: cleanup_block, end_block
end_block:
branch target: cleanup_block, cond_block
and the compiler is happy to perform unrolling.
With patch [1], getUserCost(), which calls getGEPCost(), which calls
isLegalAddressingMode() in TargetLoweringBase.cpp, considers IR
%add.ptr = getelementptr i8, i8* %payload.addr.0, i64 %call2
is free, so the above basic block folding transformation is not performed
and unrolling does not happen.
For BPF target, the IR
%add.ptr = getelementptr i8, i8* %payload.addr.0, i64 %call2
is not free and we don't have ld/st instruction address with 'r+r' mode.
This patch implemented a BPF hook for isLegalAddressingMode(), which is
identical to Mips isLegalAddressingMode() implementation where
the address pattern like 'r+r', 'r+r+i' or '2*r' are not allowed.
With testing kernel bpf selftests, all loop not unrolled warnings
are gone and all selftests run successfully.
[1] https://reviews.llvm.org/D108837
Differential Revision: https://reviews.llvm.org/D110789
Philip Reames [Thu, 30 Sep 2021 23:14:55 +0000 (16:14 -0700)]
[test] Add tests covering a missing opt in SCEV's isSCEVExprNeverPoison
Leonard Chan [Thu, 30 Sep 2021 22:34:30 +0000 (15:34 -0700)]
[libcxx][test] Use python specified by build rather than system default python
As of
e9564c3698edffc64439a8f957c7c28b19214613, libcxx/gdb/gdb_pretty_printer_test.sh.cpp
fails locally for me because the REQUIRES check for host-has-gdb-with-python
uses python, which for me expands to python 2.7.18. This failure does not seem
to be caught on any upstream builders, potentially because they don't have gdb,
python, or a version of python that makes the test UNSUPPORTED (like python3).
This updates the check to use the python specified by the build (which should
be the python that runs this code), rather than just python.
Differential Revision: https://reviews.llvm.org/D110887
Philip Reames [Thu, 30 Sep 2021 22:13:00 +0000 (15:13 -0700)]
[SCEV] Modernize code style of isSCEVExprNeverPoison [NFC]
Use for-range and all_of to make code easier to read in advance of other changes.
Teresa Johnson [Thu, 30 Sep 2021 02:14:09 +0000 (19:14 -0700)]
[MemProf] Record accesses for all words touched in mem intrinsic
Previously for mem* intrinsics we only incremented the access count for
the first word in the range. However, after thinking it through I think
it makes more sense to record an access for every word in the range.
This better matches the behavior of inlined memory intrinsics, and also
allows better analysis of utilization at a future date.
Differential Revision: https://reviews.llvm.org/D110799
Rafael Auler [Thu, 30 Sep 2021 21:35:38 +0000 (14:35 -0700)]
[MC] Fix buildbots with shared lib builds
In D109412 I forgot to add a dependency on libObject. Fix that.
Reviewed By: maksfb
Differential Revision: https://reviews.llvm.org/D110886
Amara Emerson [Thu, 30 Sep 2021 07:20:56 +0000 (00:20 -0700)]
[GlobalISel] Extend CombinerHelper::matchConstantOp() to match constant splat vectors.
This allows the "x op 0 -> x" fold to optimize vector constant RHSs.
Differential Revision: https://reviews.llvm.org/D110802
Jean Perier [Thu, 30 Sep 2021 21:16:29 +0000 (23:16 +0200)]
[flang][NFC] Add debug dump method to evaluate::Expr and semantics::Symbol
Helps debugging when working with symbol/expression issue. The dump
method is easy to call in the debugger.
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Differential Revision: https://reviews.llvm.org/D110856
Craig Topper [Thu, 30 Sep 2021 19:00:31 +0000 (12:00 -0700)]
[RISCV] Remove Zbproposedc extension
This consists of 3 compressed instructions, c.not, c.neg, and c.zext.w.
I believe these have been picked up by the Zce effort using different
encodings. I don't think it makes sense to keep them in bitmanip. It
will eventually cause a conflict if/when Zce is implemented in llvm.
Differential Revision: https://reviews.llvm.org/D110871
Jean Perier [Thu, 30 Sep 2021 21:06:22 +0000 (23:06 +0200)]
[flang] Take into account SubprogramDetails in GetInterfaceSymbol
When the ProcRef is Symbol is a SubprogramDetails, the interface is
the SubprogramDetails. Do not return nullptr.
Differential Revision: https://reviews.llvm.org/D110853
Jon Chesterfield [Thu, 30 Sep 2021 21:05:11 +0000 (22:05 +0100)]
[openmp][docs] Describe how the internal components are found
Add a FAQ entry about the names of openmp offloading components
and how they are searched for.
Reviewed By: jhuber6
Differential Revision: https://reviews.llvm.org/D109619
Jean Perier [Thu, 30 Sep 2021 21:04:03 +0000 (23:04 +0200)]
[flang][NFC] Fix header comments in some runtime headers
Differential Revision: https://reviews.llvm.org/D110850
Petr Hosek [Thu, 30 Sep 2021 20:41:57 +0000 (13:41 -0700)]
[CMake] Remove the LLD LTO check for Darwin
LLD now supports LTO on Darwin.
Differential Revision: https://reviews.llvm.org/D110881
Gwen Mittertreiner [Thu, 30 Sep 2021 20:52:51 +0000 (13:52 -0700)]
[compiler-rt] Add -fno-omit-frame-pointer check to builtins
rG210d72e9d6b4a8e7633921d0bd7186fd3c7a2c8c moved the check from
builtin-config-ix to config-ix so that the check would be made even when
the builtins are not built. However, now the check is no longer made
when the builtins are built standalone which causes the builtins to fail
to build.
Add the check back to builtins-config-ix so that the check gets
performed both when the builtins are not built, and when they are built
standalone.
Reviewed By: smeenai
Differential Revision: https://reviews.llvm.org/D110879
Jon Chesterfield [Thu, 30 Sep 2021 20:36:30 +0000 (21:36 +0100)]
[openmp] Add addrspacecast to getOrCreateIdent
Fixes 51982. Adds a missing CreatePointerCast and allocates a global in
the correct address space.
Test case derived from https://github.com/ROCm-Developer-Tools/aomp/\
blob/aomp-dev/test/smoke/nest_call_par2/nest_call_par2.c by deleting
parts while checking the assertion failure still occurred.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D110556
Jon Chesterfield [Thu, 30 Sep 2021 20:29:36 +0000 (21:29 +0100)]
[libomptarget] Apply D110029 to amdgpu
Use enum for execution mode.
This is partly a port from ROCm and partly a port from D110029. Attempted to
make the same choices as ROCm as far as comments etc go to reduce the merge
conflicts.
There is some cleanup warranted here - in particular I like the cuda patch
factoring out the comparisons into named variables - but I'd like to leave
that for a follow up patch, keeping this one minimal.
Reviewed By: carlo.bertolli
Differential Revision: https://reviews.llvm.org/D110845
Arnold Schwaighofer [Tue, 21 Sep 2021 18:07:07 +0000 (11:07 -0700)]
[cora async] Cleanup undefined llvm.coro.async.resume
In situations where the coroutine function is not split we can just
replace the async.resume by null.
rdar://
82591919
Differential Revision: https://reviews.llvm.org/D110191
Nicolas Vasilache [Thu, 30 Sep 2021 19:51:45 +0000 (19:51 +0000)]
[mlir][Linalg] Refactor comprehensive bufferize for external uses - NFC
This revision exposes some minimal funcitonality to allow comprehensive
bufferization to interop with external projects.
Differential Revision: https://reviews.llvm.org/D110875
Jinsong Ji [Thu, 30 Sep 2021 19:58:39 +0000 (19:58 +0000)]
[AIX] Rename binder option for PGO support
Update the binder option.
Florian Hahn [Thu, 30 Sep 2021 17:52:38 +0000 (18:52 +0100)]
Revert "Recommit "[SCEV] Look through single value PHIs." (take 2)"
This reverts commit
764d9aa97905f202385b4f25f8d234630b4feef3.
This patch exposed a few additional cases where SCEV expressions are not
properly invalidated.
See PR52024, PR52023.
Andrew Browne [Wed, 29 Sep 2021 17:07:17 +0000 (10:07 -0700)]
[DFSan] Optimize code for writing to shadow. Move SetShadow to namespace.
Writing zeros to shadow (including checking for existing zero) is now ~2x
faster on one example.
Reviewed By: morehouse
Differential Revision: https://reviews.llvm.org/D110733
LLVM GN Syncbot [Thu, 30 Sep 2021 19:35:12 +0000 (19:35 +0000)]
[gn build] Port
050edef8538e
Maksim Panchenko [Fri, 17 Sep 2021 20:24:15 +0000 (13:24 -0700)]
[MC] Make MCDwarfLineStr class public
Add MCDwarfLineStr class to the public API.
Note that MCDwarfLineTableHeader::Emit(), takes MCDwarfLineStr as
an Optional<> parameter making it impossible to use the API if the class
is not publicly defined.
Reviewed By: alexander-shaposhnikov
Differential Revision: https://reviews.llvm.org/D109412
Albion Fung [Thu, 30 Sep 2021 18:45:29 +0000 (13:45 -0500)]
[PowerPC] Improved codegen related to xscvdpsxws/xscvdpuxws
This patch removes the uneccessary mf/mtvsr generated in conjunction
with xscvdpsxws/xscvdpuxws.
Differential revision: https://reviews.llvm.org/D109902
Amara Emerson [Wed, 29 Sep 2021 22:38:59 +0000 (15:38 -0700)]
[GlobalISel] Extend G_SELECT of known condition combine to vectors.
Adds a new utility function: isConstantOrConstantSplatVector().
Differential Revision: https://reviews.llvm.org/D110786
Peter Klausler [Tue, 28 Sep 2021 16:56:38 +0000 (09:56 -0700)]
[flang] Fold FINDLOC()
Fold the transformational intrinsic function FINDLOC() for
all combinations of optional arguments and data types.
Differential Revision: https://reviews.llvm.org/D110757
Sanjay Patel [Thu, 30 Sep 2021 18:47:02 +0000 (14:47 -0400)]
[InstCombine] restrict shift-trunc-shift fold to opposite direction shifts
This is NFCI because the pattern with 2 left-shifts should get
folded independently by smaller folds.
The motivation is to refine this block to avoid infinite loops
seen with D110170.
Sanjay Patel [Thu, 30 Sep 2021 18:09:24 +0000 (14:09 -0400)]
[InstCombine] add tests for shift-trunc-shift; NFC
Nico Weber [Thu, 30 Sep 2021 18:41:58 +0000 (14:41 -0400)]
Reland "[clang-cl] Accept `#pragma warning(disable : N)` for some N"
This reverts commit
0cd9d8a48bdddb17de2c6388f9d775353f9acab9 and
adds the changes described in https://reviews.llvm.org/D110668#3034461.
Nikita Popov [Thu, 30 Sep 2021 17:09:11 +0000 (19:09 +0200)]
[BasicAA] Move more extension logic into ExtendedValue (NFC)
Add methods to appropriately extend KnownBits/ConstantRange there,
same as with APInt. Also clean up the known bits handling by
actually doing that extension rather than checking ZExtBits. This
doesn't matter now, but becomes relevant once truncation is
involved.
wren romano [Wed, 29 Sep 2021 22:01:35 +0000 (15:01 -0700)]
[mlir][sparse] Correcting a few typos
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D110773
Arthur Eubanks [Wed, 29 Sep 2021 01:33:26 +0000 (18:33 -0700)]
[clang] Don't modify OptRemark if the argument is not relevant
A followup to D110201.
For example, we'd set OptimizationRemarkMissed's Regex to '.*' when
encountering -Rpass. Normally this doesn't actually affect remarks we
emit because in clang::ProcessWarningOptions() we'll separately look at
all -R arguments and turn on/off corresponding diagnostic groups.
However, this is reproducible with -round-trip-args.
Reviewed By: JamesNagurne
Differential Revision: https://reviews.llvm.org/D110673
peter klausler [Tue, 28 Sep 2021 22:43:27 +0000 (15:43 -0700)]
[flang] Fix test regression from SQRT folding
The algorithm used to fold SQRT has some holes that
led to test failures; debug and add more tests.
Differential Revision: https://reviews.llvm.org/D110744
Nico Weber [Wed, 29 Sep 2021 22:46:24 +0000 (18:46 -0400)]
[clang] Make crash reproducer work with clang-cl
When clang crashes, it writes a standalone source file and shell script
to reproduce the crash.
The Driver used to set `Mode = CPPMode` in generateCompilationDiagnostics()
to force preprocessing mode. This has the side effect of making
IsCLMode() return false, which in turn meant Clang::AddClangCLArgs()
didn't get called when creating the standalone source file, which meant
the stand-alone file was preprocessed with the gcc driver's defaults
In particular, exceptions default to on with the gcc driver, but to
off with the cl driver. The .sh script did use the original command
line, so in the reproducer for a clang-cl crash, the standalone source
file could contain exception-using code after preprocessing that the
compiler invocation in the shell script would then complain about.
This patch removes the `Mode = CPPMode;` line and instead additionally
checks for `CCGenDiagnostics` in most places that check `CCCIsCPP().
This also matches the strategy Clang::ConstructJob() uses to add
-frewrite-includes for creating the standalone source file for a crash
report.
Fixes PR52007.
Differential Revision: https://reviews.llvm.org/D110783
Zequan Wu [Wed, 29 Sep 2021 22:00:39 +0000 (15:00 -0700)]
[clang] do not emit note for bad conversion when destination type qualifiers are not compatibly include source type qualifiers
llvm.org/PR52014
Differential Revision: https://reviews.llvm.org/D110780
Nico Weber [Wed, 29 Sep 2021 19:19:36 +0000 (15:19 -0400)]
[clang] Remove duplication in types::getCompilationPhases()
Call Driver::getFinalPhase() instead of duplicating it.
https://reviews.llvm.org/D65993 added the duplication, then
02e35832c301e maded it more obviously a copy of getFinalPhase().
The only difference is that getCompilationPhases() used to use
LastPhase / IfsMerge where getFinalPhase() used Link. Adapt
getFinalPhase() to return IfsMerge when needed.
No intentional behavior change.
Differential Revision: https://reviews.llvm.org/D110770
Louis Dionne [Thu, 30 Sep 2021 17:29:12 +0000 (13:29 -0400)]
[libc++abi][NFCI] Consistently group new_handler, unexpected_handler and terminate_handler
Previously, the definitions of __cxa_terminate_handler and __cxa_unexpected_handler
(and their set_xxx_handler functions) were grouped together, but the
definition of __cxa_new_handler wasn't. This commit simply moves those
to the same file to treat all handlers consistently.
Haowei Wu [Thu, 30 Sep 2021 18:03:59 +0000 (11:03 -0700)]
Revert "[libc++][libc++abi] Add tests for vendor-specific properties"
This reverts commit
9892d1644f62cf8f5133ee0d2ebafb56f6500cc1, which
causes clang test failures in libcxx tests.
peter klausler [Thu, 23 Sep 2021 23:36:04 +0000 (16:36 -0700)]
[flang] Front-end and runtime support for CALL EXIT and ABORT
Support the extension intrinsic subroutines EXIT([status]) and ABORT()
in the intrinsic table and runtime support library. Lowering remains
to be done.
Differential Revision: https://reviews.llvm.org/D110741
Lei Zhang [Thu, 30 Sep 2021 17:50:44 +0000 (13:50 -0400)]
[mlir][linalg] Fix incorrect bound calculation for tiling conv
For convolution, the input window dimension's access affine map
is of the form `(d0 * s0 + d1)`, where `d0`/`d1` is the output/
filter window dimension, and `s0` is the stride.
When tiling, https://reviews.llvm.org/D109267 changed how the
way dimensions are acquired. Instead of directly querying using
`*.dim` ops on the original convolution op, we now get it by
applying the access affine map to the loop upper bounds. This
is fine for dimensions having single-dimension affine maps,
like matmul, but not for convolution input. It will cause
incorrect compuation and out of bound. A concrete example, say
we have 1x225x225x3 (NHWC) input, 3x3x3x32 (HWCF) filter, and
1x112x112x3 (NHWC) output with stride 2, (112 * 2 + 3) would be
227, which is different from the correct input window dimension
size 225.
Instead, we should first calculate the max indices for each loop,
and apply the affine map to them, and then plus one to get the
dimension size. Note this makes no difference for matmul-like
ops given they will have `d0 - 1 + 1` effectively.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D110849
Jonas Devlieghere [Thu, 30 Sep 2021 05:32:21 +0000 (22:32 -0700)]
[lldb] Remove support for replaying the test suite from a reproducer
This patch removes the infrastructure to replay the test suite from a
reproducer, as well as the modifications made to the individual tests.
Stanislav Mekhanoshin [Wed, 29 Sep 2021 19:43:12 +0000 (12:43 -0700)]
[AMDGPU] move hasAGPRs/hasVGPRs into header
It is now very simple and can go right into the header
allowing optimizer to combine callers, such as isVGPRClass
and similar.
It does not need anything from the TRI itself anymore, so
make it static class member along with the callers.
Differential Revision: https://reviews.llvm.org/D110762
Arthur Eubanks [Wed, 29 Sep 2021 23:04:39 +0000 (16:04 -0700)]
Manually create unique_ptr in various pass adaptors
This avoids creating tons of make_unique template instantiations. And we
only create a unique_ptr of the actual pass concept type, rather than
creating a unique_ptr of the pass model subclass then casting it to the
pass concept type.
This reduces the work spent compiling PassBuilder.cpp from 83M -> 73M
instructions according to perf stat.
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D110784
Nikita Popov [Thu, 30 Sep 2021 16:18:15 +0000 (18:18 +0200)]
[BasicAA] Use ExtendedValue in VariableGEPIndex (NFC)
Use the ExtendedValue structure which is used for LinearExpression
in VariableGEPIndex as well.