Adam Ford [Sat, 19 Feb 2022 23:08:45 +0000 (17:08 -0600)]
usb: ehci-omap: Use PHY system to manage phy resets
There are a few boards that use hard-coded GPIO definitions in
their respective defconfig files. If the GPIO's are listed
in their device trees, the nop-phy can toggle the GPIO's,
so the EHCI driver does not need to know anything about the
GPIO's. Add functions for getting the phys and remove the GPIO
toggles since the phy will now do that.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sat, 19 Feb 2022 23:08:44 +0000 (17:08 -0600)]
usb: ehci-omap: Make Kconfig select PHY if USB_EHCI_OMAP
The USB_EHCI_OMAP driver currently has a series of Kconfig options
which let users specify a GPIO for the reset pin. Some devices
may have only one reset, while others might have more.
Since there is a nop phy driver, let's selct enable the PHY
system, and imply the nop phy driver. The nop phy driver can now
toggle the reset pins when putting the phy in and out of reset.
If the gpio is listed under the phy, it will get toggled and
the hard-coded config options specifying the GPIO numbers can
eventually go away.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sat, 19 Feb 2022 23:08:43 +0000 (17:08 -0600)]
phy: nop-phy: Fix enabling reset
The reset function should place the phy into reset, while the
init function should take the phy out of reset. Currently the
reset function takes it out of reset, and the init calls the
reset.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sat, 19 Feb 2022 23:08:42 +0000 (17:08 -0600)]
usb: ehci-omap: Move omap_ehci_hcd_init to omap_ehci_probe
The OMAP3 hierarchy has the ehci node as a sub-node of the
usbhshost. The usbhshost node contains an ohci and an ehci
subnode. The configuration of the ehci belongs in the
EHCI node and not its parent. Move it to the proper probe.
usb start
starting USB...
Bus ehci@
48064800: USB EHCI 1.00
Bus usb_otg_hs@
480ab000: Port not available.
scanning bus ehci@
48064800 for devices... 3 USB Device(s) found
scanning usb for storage devices... 1 Storage Device(s) found
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sat, 19 Feb 2022 23:08:41 +0000 (17:08 -0600)]
usb: ehci-omap: Drop dead code
omap_ehci_hcd_stop appears to be dead code, and omap_ehci_hcd_init
is only called by the probe function, so it can be static to that
function. Remove both from the header along with some additional
checking for DM_USB.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tom Rini [Mon, 21 Feb 2022 13:53:24 +0000 (08:53 -0500)]
Merge branch '2022-02-21-platform-updates'
- Assorted updates / fixes for Apple, TI and Aspeed platforms
Nikita Yushchenko [Tue, 15 Feb 2022 18:10:09 +0000 (21:10 +0300)]
ti: i2c: fix probe_chip() return value
Per documentation, dm_i2c_ops.probe_chip() shall return -EREMOTEIO if
probe fails.
Currently, omap_i2c_probe_chip() returns 1 instead. Fix that.
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Neal Liu [Tue, 15 Feb 2022 10:14:40 +0000 (18:14 +0800)]
crypto: aspeed: fix polling RSA status wrong issue
Check interrupt status to see if RSA engine is completed. After completion
of the task, write-clear the status to finish operation.
Add missing register base for completion.
Fixes:
89c36cca0b6 ("crypto: aspeed: Add AST2600 ACRY support")
Signed-off-by: Neal Liu <neal_liu@aspeedtech.com>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Suman Anna [Sun, 13 Feb 2022 18:48:48 +0000 (12:48 -0600)]
arm: dts: k3-j7200: Fix up MAIN R5FSS cluster mode back to Split-mode
The default U-Boot environment variables and design are all set up for
the MAIN R5FSS cluster to be in Split-mode. This is the setting used
when the dts nodes were originally added in v2021.01 U-Boot and the
dt nodes are synched with the kernel binding property names in
commit
468ec2f3ef8f ("remoteproc: k3_r5: Sync to upstreamed kernel DT
property names") merged in v2021.04-rc2.
The modes for the MAIN R5FSS cluster got switched back to LockStep mode
by mistake in commit
fa09b12dc5f6 ("arm: ti: k3: Resync dts files and
bindings with Linux Kernel v5.14") in v2022.01-rc1. This throws the
following warning messages when early-booting the cores using default
env variables,
k3_r5f_rproc r5f@5d00000: Invalid op: Trying to start secondary core 7 in lockstep mode
Load Remote Processor 3 with data@addr=0x82000000 83148 bytes: Failed!
Fix this by switching back both the clusters to the expected Split-mode.
Make this mode change in the u-boot specific dtsi file to avoid such
sync overrides in the future until the kernel dts is also switched to
Split-mode by default.
Fixes:
fa09b12dc5f6 ("arm: ti: k3: Resync dts files and bindings with Linux Kernel v5.14")
Signed-off-by: Suman Anna <s-anna@ti.com>
Adam Ford [Sat, 12 Feb 2022 12:12:41 +0000 (06:12 -0600)]
arm: omap3: Make some memory functions static and clean headers
There are a few memory functions for both the emif4 (AM3517)
and sdrc (OMAP35/DM37) code that can be defined as static,
because those functions are not used externally. Make them
static and clean up some of the corresponding headers.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sat, 12 Feb 2022 12:12:40 +0000 (06:12 -0600)]
arm: omap3: Cleanup sys_info to fit OMAP3 booting with LTO
With LTO enabled, some functions appear to be optimized in a
way that causes hanging on some OMAP3 boards after some
unrelated patches were applied. The solution appears to make
several functions __used. There also appears be to be some
dead code, so remove it while cleaning this up.
This has been tested on a general purpose OMAP3530, DM3730,
and AM3517.
Signed-off-by: Adam Ford <aford173@gmail.com>
Keerthy [Thu, 10 Feb 2022 03:55:58 +0000 (09:25 +0530)]
arm: dts: k3-j721e-r5-common-proc-board: tps659413: Correct the min/max voltages of VDD_CPU
Correct the min/max voltages of VDD_CPU. As per data sheet the VDD_CPU
minimum voltage is .6V & maximum voltage is .9V.
Correct the same. While at it fix the comment to reflect VDD_CPU
instead of VDD_MPU.
Link: https://www.ti.com/lit/gpn/dra829v
Signed-off-by: Keerthy <j-keerthy@ti.com>
Janne Grunau [Tue, 8 Feb 2022 21:27:49 +0000 (22:27 +0100)]
iommu: Add M1 Pro/Max support to Apple DART driver
For the purpose of this driver (activating bypass mode) t6000-dart
and t8103-dart are fully compatible.
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Mark Kettenis [Mon, 14 Feb 2022 21:09:26 +0000 (22:09 +0100)]
doc: board: apple: Update Apple M1 documentation
U-Boot now supports NVMe storage and on the laptop models, the
SPI keyboard. Since we now disable the debug console by default
provide instructions on how the enable the debug console including
a table listing the appropriate UART base address for each of the
supported SoCs.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Mark Kettenis [Mon, 14 Feb 2022 21:09:25 +0000 (22:09 +0100)]
arm: apple: Disable debug UART
The address of the debug UART varies differs between the M1 and
the M1 Pro/Max SoCs. So we have to disable it to make a single
U-Boot binary that works on all SoC generations. Leave the
settings for the base address and clock rate of the M1 in place
to make it easier to re-enable the debug UART when needed.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Mark Kettenis [Tue, 8 Feb 2022 21:00:09 +0000 (22:00 +0100)]
arm: apple: Add M1 Pro/Max support
Choose the memory map based on the compatible property from the
device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max
starts at a different address avoid hardcoding the top of usable
memory. Also make sure that the addresses entered into the memory
map are page aligned such that we don't crash in dcache_enable().
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Tested on: Macbook M1 Max
Tested-by: Janne Grunau <j@jannau.net>
Tom Rini [Mon, 21 Feb 2022 13:32:02 +0000 (08:32 -0500)]
Merge tag 'xilinx-for-v2022.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2022.04-rc3
microblaze:
- Fix exception handler
zynqmp:
- Show information about secure images
- DT changes (som u-boot file removal)
- Fix zynqmp_pm_cfg_obj_convert.py
- Fix platform boot
xilinx:
- Fix bootm_size calculation
- Remove GPIO_EXTRA_HEADER selection
power:
- Add zynqmp power management driver
scsi:
- Add phy support to ceva driver
zynq qspi:
- Fix unaligned accesses and check baudrate setup
- Add support for spi memory operations
net:
- Fix 64bit calculation in axi_emac
video:
- Add missing gpio dependency for seps driver
Michal Simek [Tue, 15 Feb 2022 07:57:52 +0000 (08:57 +0100)]
arm64: zynqmp: Remove additional gpio header from dlc21
This header shouldn't be in this file and there is already pointer to
dt-bindings/gpio/gpio.h.
Fixes:
d2d14383bae4 ("arm64: zynqmp: Add support for DLC21 (Smartlynq+) board")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/266bc91073f1149f3f60b1c9c0ba509c48470e2e.1644911870.git.michal.simek@xilinx.com
Michal Simek [Thu, 17 Feb 2022 13:28:42 +0000 (14:28 +0100)]
arm64: zynqmp: Fix debug uart initialization
The commit
0dba45864b2a ("arm: Init the debug UART") calls
debug_uart_init() from crt0.S but it won't work because SOC is not
configured yet. That's why create board_debug_uart_init() which calls
psu_init() via new psu_uboot_init() earlier before the first access to UART
in SPL. In full U-Boot call psu_uboot_init() only when
CONFIG_ZYNQMP_PSU_INIT_ENABLED is enabled.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/878dc2daaa8685346f889989fbfb98b2e44da7fb.1645104518.git.michal.simek@xilinx.com
Michal Simek [Thu, 17 Feb 2022 13:28:41 +0000 (14:28 +0100)]
ARM: zynq: Fix debug uart initialization
The commit
0dba45864b2a ("arm: Init the debug UART") calls
debug_uart_init() from crt0.S but it won't work because SOC is not
configured yet. That's why create board_debug_uart_init() which calls
ps7_init() earlier before the first access to UART.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/18e67e02a0c7190839a1ef3a11f3fd6babcf34cc.1645104518.git.michal.simek@xilinx.com
Michal Simek [Thu, 17 Feb 2022 13:28:40 +0000 (14:28 +0100)]
arm64: zynqmp: Fix dependencies around ZYNQMP_PSU_INIT_ENABLED
ZYNQMP_PSU_INIT_ENABLED is called only when BOARD_EARLY_INIT_F is defined
that's why cover this dependency in Kconfig.
board_early_init_f() is only part related to
CONFIG_ZYNQMP_PSU_INIT_ENABLED which is disabled now that's why disable
BOARD_EARLY_INIT_F and also build board_early_init_f() only when
CONFIG_BOARD_EARLY_INIT_F is enabled.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/d89253ec1590cd513dcd4bfbedebae618bd6d605.1645104518.git.michal.simek@xilinx.com
Michal Simek [Thu, 17 Feb 2022 13:28:39 +0000 (14:28 +0100)]
arm64: zynqmp: Build psu_spl_init for SPL all the time
ZYNQMP_PSU_INIT_ENABLED specifically saying that has connection to full
U-Boot not SPL that's why build psu_spl_init for SPL all the time.
Also disable ZYNQMP_PSU_INIT_ENABLED because it ends up in situation that
psu_init() is called twice which is wrong. By default only SPL should call
it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/bf1e5d9a163f8853c7d951ad42965114ab0b1f50.1645104518.git.michal.simek@xilinx.com
Michal Simek [Thu, 17 Feb 2022 13:28:38 +0000 (14:28 +0100)]
xilinx: Enable OF_BOARD for zynq and zynqmp boards
The commit
985503439762 ("fdt: Don't call board_fdt_blob_setup() without
OF_BOARD") forced to enable OF_BOARD for platforms which provide DT
externally. Zynq/ZynqMP boards are using this feature for a long time
that's why there is a need to enable it by default.
Also code expects to return error in case of error that's why also fill it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com
Tom Rini [Sun, 20 Feb 2022 13:09:08 +0000 (08:09 -0500)]
Merge tag 'u-boot-imx-
20220220' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-
20220220
-------------------
CI : https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/11037
- ESDHC fixes
- imx8mq : MNT Reform 2 board
- imx8m: add support for Advantech RSB-3720
- fixes for imx8mn-ddr4-evk
- fixes gateworks boards
- doc : fix build for imx8mn_beacon
- fuses: compare and read functions
- imx8mn-ddr4-evk: boot from SD and Ethernet support
Marek Vasut [Sat, 19 Feb 2022 16:13:54 +0000 (17:13 +0100)]
ARM: imx: imx8mn-ddr4-evk: Add ethernet support
Add support for ethernet on the imx8mn-ddr4-evk.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Heiko Thiery [Wed, 16 Feb 2022 14:58:10 +0000 (15:58 +0100)]
kontron-pitx-imx8m: fix board_mmc_getcd()
The function wrongly will return the card detection status of the SD card
(USDHC2) for the eMMC (USDHC1). Thus booting from eMMC without an inserted
SD card will fail.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Heiko Thiery [Wed, 16 Feb 2022 12:25:14 +0000 (13:25 +0100)]
kontron-sl-mx8mm: change environment address variables
Currently the space between kernel_addr_r and the fdt_addr_r is only 32MB.
To have enought space to load kernel images bigger than 32MB change the
variables to a feasible value.
The new environment variables layout is based on the scheme from
"include/configs/ti_armv7_common.h".
The CONFIG_SYS_LOAD_ADDR value is set to 0x42000000. With that we have
the same value as for the kernel_addr_r.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Francesco Dolcini [Thu, 3 Feb 2022 17:41:24 +0000 (18:41 +0100)]
colibri-imx6ull: improve env badblock management
Use the complete 512kb (4 blocks) nand partition reserved for u-boot
environment instead of just the first block, this allows the module to
have a working environment even if 3 blocks are bad.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Michael Trimarchi [Wed, 17 Nov 2021 14:34:56 +0000 (15:34 +0100)]
imx8m: Drop unused function env_get_offset
This function is used in nxp u-boot tree.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Lukasz Majewski [Mon, 27 Dec 2021 10:46:39 +0000 (11:46 +0100)]
xea: defconfig: Update defconfig to support mtd partitions r/w by name
After this change it would be possible to use 'mtd' command to get access
to XEA's SPI-NOR partitions by name (e.g. SPL), not by offsets.
To enable this feature the CONFIG_SPI_FLASH_MTD needs to be defined in the
Kconfig, not in xea.h.
=> mtd list
=> mtd read spl-boot-data1 ${loadaddr} 0x0 4
=> md.l ${loadaddr} 1
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Marek Vasut [Sun, 13 Feb 2022 23:36:16 +0000 (00:36 +0100)]
ARM: imx: imx8mn-ddr4-evk: Fix boot from SD card
Enable missing config options to make the board boot from SD card.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Tim Harvey [Fri, 11 Feb 2022 18:52:06 +0000 (10:52 -0800)]
board: gateworks: venice: config file cleanups
Clean up config file:
- remove unnecessary IMX_FEC_BASE
- remove unnecessary comment
- remove ipaddr/serverip from env
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Tim Harvey [Fri, 11 Feb 2022 18:48:56 +0000 (10:48 -0800)]
board: gateworks: venice: add imx8mn-gw7902 support
The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- LTE CAT M1 modem
- USB 2.0 HUB
- M.2 Socket with USB2.0, PCIe, and dual-SIM
- IMX8M FEC
- PCIe based GbE
- RS232/RS485/RS422 serial transceiver
- GPS
- CAN bus
- WiFi / Bluetooth
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- PMIC
To add support for the i.MX8M Nano GW7902:
- Add imx8mn-venice dts/defconfig/include
- Add imx8mn-gw7902 dts
- Add imx8mn-2gb lpddr4 dram configs
- Add misc support for IMX8M Nano SoC
- rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific
- update README with differences for IMX8MN vs IMX8MM
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Haibo Chen [Fri, 11 Feb 2022 11:16:57 +0000 (19:16 +0800)]
mmc: fsl_esdhc_imx: correct the actual card clock
The original code logic can not show the correct card clock, and also
has one risk when the div is 0. Because there is div -=1 before.
So move the operation before div -=1, and also involve ddr_pre_div
to get the correct value.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Haibo Chen [Fri, 11 Feb 2022 11:16:56 +0000 (19:16 +0800)]
mmc: fsl_esdhc_imx: remove redundant ARCH_MXC
Now original fsl_esdhc.c are split as fsl_esdhc.c and fsl_esdhc_imx.c.
fsl_esdhc_imx.c only cover i.MX SoC. So ARCH_MXC is redundant.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Ying-Chun Liu (PaulLiu) [Tue, 8 Feb 2022 01:22:38 +0000 (09:22 +0800)]
arm: imx8m: add support for Advantech RSB-3720
Add initial support for Advantech RSB-3720 board.
The initial support includes:
- MMC
- eMMC
- I2C
- FEC
- Serial console
Signed-off-by: Darren Huang <darren.huang@advantech.com.tw>
Signed-off-by: Kevin12.Chen <Kevin12.Chen@advantech.com.tw>
Signed-off-by: Phill.Liu <Phill.Liu@advantech.com.tw>
Signed-off-by: Tim Liang <tim.liang@advantech.com.tw>
Signed-off-by: wei.zeng <wei.zeng@advantech.com.cn>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: uboot-imx <uboot-imx@nxp.com>
Cc: Peng Fan (OSS) <peng.fan@oss.nxp.com>
Heiko Thiery [Sun, 30 Jan 2022 06:37:08 +0000 (07:37 +0100)]
configs/*imx8mn*: remove [SPL_]CLK_COMPOSITE_CCF
This option is selected implicitly when [SPL_]CLK_IMX8MN is selected.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Heiko Thiery [Sun, 30 Jan 2022 06:37:06 +0000 (07:37 +0100)]
clk: imx: select [SPL_]CLK_COMPOSITE_CCF for imx8mn
The clock composite is required when using the clock framework. So
select it automatically.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Adam Ford [Sat, 22 Jan 2022 20:48:40 +0000 (14:48 -0600)]
imx8mm_beacon/imx8mn_beacon: Update build instructions
With binman generating flash.bin, it's not longer necessary to
specify either the location of ATF nor is it necessary to
specify building flash.bin, so let's update the build instructions
to remove those. While in here, update the revision of ATF and
DDR firmware so both Mini and Nano reference the same revision.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Adam Ford [Wed, 12 Jan 2022 13:53:56 +0000 (07:53 -0600)]
mmc: fsl_esdhc_imx: Use esdhc_soc_data flags to set host caps
The Linux driver automatically can detect and enable UHS, HS200, HS400
and HS400_ES automatically without extra flags being placed into the
device tree.
Right now, for U-Boot to use UHS, HS200 or HS400, the extra flags are
needed in the device tree. Instead, go through the esdhc_soc_data
flags and enable the host caps where applicable to automatically
enable higher speeds.
Suggested-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Patrick Wildt [Sat, 8 Jan 2022 15:04:55 +0000 (16:04 +0100)]
arm: dts: imx8mq: add MNT Reform 2
Device tree taken from Linux v5.16-rc5.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Tommaso Merciai [Sun, 26 Dec 2021 17:23:11 +0000 (18:23 +0100)]
freescale: imx8mm_evk: Use IS_ENABLED instead of #ifdef
Use IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG) to make the code
more readable and fix checkpatch.pl warning
Signed-off-by: Tommaso Merciai <tomm.merciai@gmail.com>
Oleh Kravchenko [Mon, 20 Dec 2021 14:00:01 +0000 (16:00 +0200)]
Enable Fastboot(UUU) for O4-iMX6ULL-NANO boards
Make O4-iMX6ULL-NANO-based board compatible with Yocto layer meta-out4 and
fix device flashing by UUU (aka MFG Tools).
Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
Harald Seiler [Wed, 1 Dec 2021 09:02:54 +0000 (10:02 +0100)]
imx: spl: Fix typo BMODE_EMI -> BMODE_EIM
The interface for NOR/OneNAND is called "EIM" not "EMI". Fix this.
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Angus Ainslie [Sun, 28 Nov 2021 16:02:53 +0000 (08:02 -0800)]
cmd: fuse: Add a command to read fuses to memory
With the fuse values in memory we can use some of the other u-boot shell
conditonal operators to do tests.
Signed-off-by: Angus Ainslie <angus@akkea.ca>
Angus Ainslie [Sun, 28 Nov 2021 16:02:52 +0000 (08:02 -0800)]
cmd: fuse: add a fuse comparison function
Compare a hexval to the fuse value and return pass or fail.
Signed-off-by: Angus Ainslie <angus@akkea.ca>
Tom Rini [Thu, 17 Feb 2022 16:03:50 +0000 (11:03 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- a37xx: pci: Cleanup and minor fix for root port check (Pali)
- pci: mvebu: Ensure that root port is always on root zero bus (Pali)
- kwbimage: Fix dumping DATA registers for v0 images (Pali)
- kwbimage: Support for parsing extended v0 format (Pali)
- a37xx: Fix code and update DTS files to upstream version (Pali)
- a37xx: Fix and extend building memory map (Pali)
- ddr: marvell: a38x: fix BYTE_HOMOGENEOUS_SPLIT_OUT decision (Marek)
- mvebu: Optionally reset board on DDR training failure (Marek)
Marek Behún [Thu, 17 Feb 2022 12:54:43 +0000 (13:54 +0100)]
arm: mvebu: turris_omnia: Reset the board immediately on DDR training failure
The state of the current DDR training code for Armada 38x is such that
we cannot be sure it will always train successfully - although after the
last change we were yet unable to find a board that failed DDR training,
from experience in the last 2 years we know that it is possible.
The experience also tells us that in many cases the board fails training
only sometimes, and after a reset the training is successful.
Enable the new option that makes the board reset itself on DDR training
failure immediately. Until now we called hang() in such a case, which
meant that the board was reset by the MCU after 120 seconds.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
Marek Behún [Thu, 17 Feb 2022 12:54:42 +0000 (13:54 +0100)]
arm: mvebu: spl: Add option to reset the board on DDR training failure
Some boards may occacionally fail DDR training. Currently we hang() in
this case. Add an option that makes the board do an immediate reset in
such a case, so that a new training is tried as soon as possible,
instead of hanging and possibly waiting for watchdog to reset the board.
(If the DDR training fails while booting the image via UART, we will
still hang - it doesn't make sense to reset in such a case, because
after reset the board will try booting from another medium, and the
UART booting utility does not expect that.)
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 17 Feb 2022 09:43:40 +0000 (10:43 +0100)]
tools: kwbimage: Add me as an author of kwbimage
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 17 Feb 2022 09:43:39 +0000 (10:43 +0100)]
tools: kwbimage: Fix help how to extract DDR3 training code
First binary executable header is extracted by '-p 1' argument.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 17 Feb 2022 09:43:38 +0000 (10:43 +0100)]
tools: kwbimage: Add support for NAND_BLKSZ and NAND_BADBLK_LOCATION for v0 images
These two commands are currently not processed when generating v0 images.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 17 Feb 2022 09:43:37 +0000 (10:43 +0100)]
tools: kwbimage: Do not show mkimage error message in dumpimage
When pflag is set then kwbimage was invoked by dumpimage and not mkimage.
So do not show mkimage error message in this case.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 17 Feb 2022 09:43:36 +0000 (10:43 +0100)]
tools: kwbimage: Add support for dumping extended and binary v0 headers
dumpimage is now able to successfully parse and dump content of the Dove
bootloader image.
Note that support for generating these extended parts of v0 images is not
included yet.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 17 Feb 2022 09:43:35 +0000 (10:43 +0100)]
tools: kwbimage: Fix calculating size of kwbimage v0 header
Extended and binary headers are optional and are part of the image header.
Fixes kwboot to determinate correct length of Dove images.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 17 Feb 2022 09:43:34 +0000 (10:43 +0100)]
tools: kwbimage: Define structures for extended kwbimage v0 headers
They are used by Marvell Dove 88AP510 BootROM.
After the main header is a list of optional extended headers and after that
is a list of optional binary executable headers. Between each two extended
headers is additional 0x20 byte long padding.
Original Kirkwood SoCs support only one extended header and no binary
executable header.
Extension of struct ext_hdr_v0 is backward compatible with the old
definition. Only reserved[] fields are changed.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Marek Behún [Thu, 17 Feb 2022 00:08:37 +0000 (01:08 +0100)]
ddr: marvell: a38x: fix BYTE_HOMOGENEOUS_SPLIT_OUT decision
In commit
3fc92a215b69 ("ddr: marvell: a38x: fix SPLIT_OUT_MIX state
decision") I ported a cleaned up and changed version of patch
mv_ddr: a380: fix SPLIT_OUT_MIX state decision
In the port we removed checking for BYTE_HOMOGENEOUS_SPLIT_OUT bit,
because:
- the fix seemed to work without it
- the bit was checked for only at one place out of two, while the second
bit, BYTE_SPLIT_OUT_MIX, was checked for in both cases
- without the removal it didn't work on Allied Telesis' x530 board
We recently had a chance to test on more boards, and it seems that the
change needs to be opposite: instead of removing the check for
BYTE_HOMOGENEOUS_SPLIT_OUT from the first if() statement, the check
needs to be added also to the second one - it needs to be at both
places.
With this change all the Turris Omnia boards I have had available to
test seem to work, I didn't encounter not even one failed DDR training.
As last time, I am noting that I do not understand what this code is
actually doing, I haven't studied the DDR training algorithm and
I suspect that no one will be able to explain it to U-Boot contributors,
so we are left with this blind poking in the code with testing whether
it works on several boards and hoping it doesn't break anything for
anyone :-(.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 16 Feb 2022 10:18:45 +0000 (11:18 +0100)]
arm: mvebu: a37xx: Fix comment with name of the function
Function is named build_mem_map, not a3700_build_mem_map.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Pali Rohár [Wed, 16 Feb 2022 10:18:44 +0000 (11:18 +0100)]
arm: mvebu: a37xx: Map CCI-400 and AP BootROM address space
In function build_mem_map() prepare also mapping for CCI-400 and
BootROM windows.
BootROM window is 1 MB long and by default starts at address 0xfff00000.
A53 AP BootROM is 16 kB long and repeats in this BootROM window 64 times.
RVBAR_EL3 register is set to value 0xffff0000, so by default A53 AP BootROM
is accessed via range 0xffff0000-0xffff3fff.
CCI-400 window when new TF-A version is used, starts at address 0xfe000000
and when old TF-A version is used, starts at address 0xd8000000.
Physical addresses are read directly from mvebu registers, so if TF-A
remaps it in future (again) then it would not cause any issue for U-Boot.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 16 Feb 2022 10:18:43 +0000 (11:18 +0100)]
arm: mvebu: a37xx: Fix calling build_mem_map()
Function build_mem_map() modifies global variable mem_map. This variable is
used by the get_page_table_size() function which is called by function
arm_reserve_mmu() (as aliased macro PGTABLE_SIZE). Function
arm_reserve_mmu() is called earlier than enable_caches() which calls
build_mem_map(). So arm_reserve_mmu() does not calculate reserved memory
correctly.
Fix this issue by calling build_mem_map() from a3700_dram_init() which is
called before arm_reserve_mmu().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Pali Rohár [Tue, 15 Feb 2022 10:34:01 +0000 (11:34 +0100)]
pci: mvebu: Ensure that root port is always on root zero bus
Writing to the PCI_PRIMARY_BUS register of the root port should not change
bus number on which is root port present.
Same change and exactly same fix as was done in commit for pci-aardvark.c.
Fixes:
a7b61ab58d5d ("pci: pci_mvebu: Properly configure and use PCI Bridge (PCIe Root Port)")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Tue, 15 Feb 2022 10:23:37 +0000 (11:23 +0100)]
arm: a37xx: pci: Update comment about Command/Direct mode
Code is changing PCIe controller from Command mode to Direct mode.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Tue, 15 Feb 2022 10:23:36 +0000 (11:23 +0100)]
arm: a37xx: pci: Register controller also when no PCIe card is connected
Allow access to config space of PCIe Root Port (which is always present on
the root bus) even when PCIe link is down or no card is connected.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Tue, 15 Feb 2022 10:23:35 +0000 (11:23 +0100)]
arm: a37xx: pci: Do not try to access other buses when link is down
If a PIO request is executed while link-down, the whole controller gets
stuck in a non-functional state, and even after link comes up again, PIO
requests won't work anymore, and a reset of the whole PCIe controller is
needed. Therefore we need to prevent sending PIO requests while the link
is down.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 14 Feb 2022 10:34:30 +0000 (11:34 +0100)]
arm: a37xx: Update DTS files to version from upstream Linux kernel
This change updates all Armada 37xx DTS files to version which is used by
Linux kernel v5.18.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 14 Feb 2022 10:34:29 +0000 (11:34 +0100)]
arm: a37xx: espressobin: Explicitly enable eMMC node in -u-boot.dtsi
Official DT bindings for Espressobin have disabled eMMC node.
As U-Boot requires to have this node enabled by default, do it in
armada-3720-espressobin-u-boot.dtsi DTS file.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 14 Feb 2022 10:34:28 +0000 (11:34 +0100)]
arm: a37xx: espressobin: Move U-Boot specific partitions node to -u-boot.dtsi
U-Boot specific changes should be in armada-3720-espressobin-u-boot.dtsi DTS file.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 14 Feb 2022 10:34:27 +0000 (11:34 +0100)]
arm: a37xx: Update sdhci pointers to official DT bindings
In Linux kernel version of armada-37xx.dtsi file sdhci1 pointer refers to
sdhci@d0000 node and sdhci0 pointer to sdhci@d8000 node.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 14 Feb 2022 10:34:26 +0000 (11:34 +0100)]
arm: mvebu: turris_mox: Remove hardcoded ethernet node names
Armada 3720 DTS files in upstream kernel use ethernet nodes named
'ethernet@30000' and 'ethernet@40000'. U-Boot have them named 'neta@30000'
and 'neta@40000'. To have Turris Mox U-Boot board code independent of
ethernet node names, find ethernet node via alias.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 14 Feb 2022 10:34:25 +0000 (11:34 +0100)]
watchdog: armada_37xx: Convert to official DT bindings
Official DT bindings have only one reg property: watchdog address space.
Convert armada-37xx-wdt.c driver to offical DT bindings and access sel_reg
register via MVEBU_REGISTER() macro, as its value (required by U-Boot
driver) is not in DT yet. In later stage can be driver cleaned to not use
it.
This change would allow U-Boot to use A3720 watchdog DTS structure from
Linux kernel.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 14 Feb 2022 10:34:24 +0000 (11:34 +0100)]
usb: ehci: ehci-marvell: Update compatible string to official DT bindings
Official DT bindings use compatible string marvell,armada-3700-ehci.
Update drivers and DTS files.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 14 Feb 2022 10:34:23 +0000 (11:34 +0100)]
phy: marvell: a3700: Update compatible string to official DT bindings
In commit
d368e1070514 ("phy: marvell: a3700: Convert to official DT
bindings in COMPHY driver") was done update to official DT bindings but
compatible string of official DT bindings was not updated.
Fix it now.
Fixes:
d368e1070514 ("phy: marvell: a3700: Convert to official DT bindings in COMPHY driver")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 14 Feb 2022 10:34:22 +0000 (11:34 +0100)]
rtc: ds1307: Add bindings for microchip, mcp7940x
Compatible string microchip,mcp7940x is used by Turris Mox DTS file in
Linux kernel and U-Boot ds1307.c driver works fine with it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Sun, 13 Feb 2022 00:04:33 +0000 (01:04 +0100)]
tools: kwbimage: Fix dumping DATA registers for v0 images
End of DATA register section is indicated by zero value in both raddr and
rdata.
So do not stop dumping registers with non-zero address and zero value.
And also print end of DATA registers section.
Fixes:
1a8e6b63e24f ("tools: kwbimage: Dump kwbimage config file on '-p -1' option")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reported-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 10 Feb 2022 13:53:45 +0000 (14:53 +0100)]
arm: a37xx: pci: Ensure that root port is always on root zero bus
Writing to the PCI_PRIMARY_BUS register of the root port should not change
bus number on which is root port present.
This PCI_PRIMARY_BUS register is used only for correct configuration of
legacy PCI stuff, like forwarding of PCI special cycles between buses.
Aardvark HW does not support PCI special cycles, so it does not have HW
register for PCI_PRIMARY_BUS and therefore it does not matter what is
stored in this register.
So fix this issue and do not use PCI_PRIMARY_BUS register in pci-aardvark.c
driver for moving root bus of the root port.
After this change there is no reason for storing bus number (zero) into
first_busno variable, so remove this variable.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes:
cb056005dc67 ("arm: a37xx: pci: Add support for accessing PCI Bridge on root bus")
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 10 Feb 2022 13:53:44 +0000 (14:53 +0100)]
arm: a37xx: pci: Use dev_read_addr()
There is only one base address, so use dev_read_addr() instead of dev_read_addr_index().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 10 Feb 2022 13:53:43 +0000 (14:53 +0100)]
arm: a37xx: pci: Cleanup macro names
Remove "PCI_" prefix from all macros which are aardvark specific to not
conflict with macros defined in global include file pci.h. Instead add
"ADVK_" prefix for them so it is visible that they are aardvark specific.
After "ADVK_" prefix append keyword which describes register group, so it
would be clear to which register each macro value belongs.
Rename some macros for consistency with other macros.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 10 Feb 2022 13:53:42 +0000 (14:53 +0100)]
arm: a37xx: pci: Use standard register macros from pci.h
PCI config space of the aardvark PCIe Root Port is available only in
internal aardvark memory space starting at offset 0x0. PCI Express
registers (PCI_EXP_*) start at offset 0xc0. And Advanced Error Reporting
registers (PCI_ERR_*) start at offset 0x100.
Replace custom aardvark register macros by standard PCI macros from
include/pci.h file with fixed offset.
Some DEVCTL and AER macros are not defined in include/pci.h file, so define
them in the same way as in linux uapi header file pci_regs.h.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tom Rini [Wed, 16 Feb 2022 23:21:41 +0000 (18:21 -0500)]
Merge branch 'master' of git://source.denx.de/u-boot-usb
Tom Rini [Wed, 16 Feb 2022 23:21:21 +0000 (18:21 -0500)]
Merge branch '2022-02-16-add-TI-J721E-SK'
- Add TI J721E SK support
Sinthu Raja [Tue, 2 Nov 2021 14:29:45 +0000 (19:59 +0530)]
arm: dts: k3-j721e-r5-sk: Update R5 DT to pick the new DDR config
A new lpddr4 configuration is introduced for J7 SK with 4266 MTs data
rate. Therefore, update the R5 DTS file to point to the new DDR config
file.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Sinthu Raja [Tue, 2 Nov 2021 14:29:44 +0000 (19:59 +0530)]
arm: dts: k3-j721e-sk: EMIF tool update to 0.6.1 with 4266MTs for lpddr4
EMIF tool for J721E SK is now updated to 0.6.1 that includes
* Updated write DQ training pattern to enable user pattern and clock
pattern (from 0x7 to 0x6).
* Updated IO drive strength to 40-80-80 Ohms.
J721E SK uses the lpddr4 configuration of 4266 MTs data rate which is
the same as J721E EVM but facing random failures. As the tool update is
specific to the SK board, add a new lpddr4 config of 4266 MTs.
Signed-off-by: Kevin Scholz <k-scholz@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Sinthu Raja [Wed, 9 Feb 2022 09:37:01 +0000 (15:07 +0530)]
include: configs: Update env for selecting right dtb
Now that single defconfig can be used for booting J721E EVM and
SK, default device tree will not work for selecting dtb for
kernel. Update the findfdt env to select right dtb based on
board_name env variable.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Sinthu Raja [Wed, 9 Feb 2022 09:37:00 +0000 (15:07 +0530)]
configs: j721e_evm: Store env in MMC FAT partition
Enable defconfigs relevant for storing env on FAT partion of MMC.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Sinthu Raja [Wed, 9 Feb 2022 09:36:59 +0000 (15:06 +0530)]
configs: j721e_evm_a72: Align OSPI partitions on erase block boundary
S28HS512T on TI SK has sector size of 256KB, so update OSPI partition
to align on 256KB sector size. Since the sector size for MT35XU512ABA
on EVM is 128KB, partitions will remain aligned for EVM.
Also, now since the sector size is 256KB ospi.env.backup will collide
with ospi.sysfw, so move ospi.env.backup to the padding space (0x7C0000)
before ospi.rootfs partition.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Sinthu Raja [Wed, 9 Feb 2022 09:36:58 +0000 (15:06 +0530)]
configs: j721e_evm_a72: Add SK dtb as part of DTB FIT
Add k3-j721e-sk dtb along with other dtbs inside DTB FIT image.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Sinthu Raja [Wed, 9 Feb 2022 09:36:57 +0000 (15:06 +0530)]
configs: j721e_evm_r5: Enable support for building multiple dtbs into FIT
Enable configs for building multiple dtbs into a single fit image
and load the right dtb for next stage. This will help to use same
defconfig for both J721E EVM and SK boards.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Sinthu Raja [Wed, 9 Feb 2022 09:36:56 +0000 (15:06 +0530)]
arm: dts: k3-j721e-r5-sk: Add initial R5 specific dts support for j721e-sk
Add R5 specific dts for J721E-SK
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Sinthu Raja [Wed, 9 Feb 2022 09:36:55 +0000 (15:06 +0530)]
arm: dts: k3-j721e-sk: Add initial A72 specific dts support
J721E Starter Kit (SK)[1] is a low cost, small form factor board designed
for TI’s J721E SoC. TI’s J721E SoC comprises of dual core A72, high
performance vision accelerators, video codec accelerators, latest C71x
and C66x DSP, high bandwidth real-time IPs for capture and display, GPU,
dedicated safety island and security accelerators. The SoC is power
optimized to provide best in class performance for industrial and
automotive applications.
J721E SK supports the following interfaces:
* 4 GB LPDDR4 RAM
* x1 Gigabit Ethernet interface
* x1 USB 3.0 Type-C port
* x3 USB 3.0 Type-A ports
* x1 PCIe M.2 E Key
* x1 PCIe M.2 M Key
* 512 Mbit OSPI flash
* x2 CSI2 Camera interface (RPi and TI Camera connector)
* 40-pin Raspberry Pi GPIO header
Add A72 specific dts for J721E-SK.
[1] https://www.ti.com/tool/SK-TDA4VM
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Sinthu Raja [Wed, 9 Feb 2022 09:36:54 +0000 (15:06 +0530)]
arm: dts: k3-j721e-r5-common-proc-board: Do not use power-domains for I2C
Board ID I2C EEPROM will be probed before SYSFW is available.
So drop the power-domains property for wakup_i2c0 on which
board ID EEPROM is connected.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Sinthu Raja [Wed, 9 Feb 2022 09:36:53 +0000 (15:06 +0530)]
arm: j721e: Add support for selecting DT based on board name
Enable support for selecting DTB from FIT within SPL based on the
board name read from EEPROM. This will help to use single defconfig
for both EVM and SK.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Sinthu Raja [Wed, 9 Feb 2022 09:36:52 +0000 (15:06 +0530)]
board: ti: j721e: Add support for detecting multiple device trees
Update the board_fit_config_name_match() to choose the right dtb
based on the board name read from EEPROM.
Also restrict multpile EEPROM reads by verifying if EEPROM is already
read.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Sinthu Raja [Wed, 9 Feb 2022 09:36:51 +0000 (15:06 +0530)]
board: ti: j721e: Disable probing of daughtercards
j721e-sk doesn't have any daughter cards, so disable daughter
card probing inside board_late_init() and spl_board_init() for
j721e-sk.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Sinthu Raja [Wed, 9 Feb 2022 09:36:50 +0000 (15:06 +0530)]
board: ti: j721e: Add support to update board_name for j721e-sk
Update setup_board_eeprom_env() to choose the right board name
for j721e-sk.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Sinthu Raja [Wed, 9 Feb 2022 09:36:49 +0000 (15:06 +0530)]
board: ti: j721e: Enable support for reading EEPROM at next alternate address
J721E EVM has EEPROM populated at 0x50. J721E SK has EEPROM populated
at next address 0x51 in order to be compatible with RPi. So start
looking for TI specific EEPROM at 0x50, if not found look for EEPROM at
0x51.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Sinthu Raja [Wed, 9 Feb 2022 09:36:48 +0000 (15:06 +0530)]
board: ti: j721e: Guard functions with right #ifdef to avoid build warnings
board_late_init(), setup_board_eeprom_env() and setup_serial() is
called only under CONFIG_BOARD_LATE_INIT, so guard these functions
with the same. Also, reorder these functions to place it under
single #ifdef
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Sinthu Raja [Wed, 9 Feb 2022 09:36:47 +0000 (15:06 +0530)]
drivers: power: regulator: tps65941_regulator: Add support for 3Phase buck
Buck regulator 1, 2 and 3 of TPS6594132 on j721e-sk is in 3 Phase
confguration, in-order to support this, add configuring 3 Phase buck
in tps65941 while driver probing.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Sinthu Raja [Wed, 9 Feb 2022 09:36:46 +0000 (15:06 +0530)]
drivers: power: pmic: Add support for tps659412 PMIC
Since TPS659412 and TPS659413 are both software compatible,
add a compatible string for the same inside tps65941.c.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Tom Rini [Wed, 16 Feb 2022 19:18:44 +0000 (14:18 -0500)]
fdtdec.h: Remove gurads around fdtdec_resetup function
This function has not been conditionally compiled for some time, so
remove the incorrect guards around the declaration.
Signed-off-by: Tom Rini <trini@konsulko.com>
Stefan Agner [Mon, 27 Sep 2021 12:42:58 +0000 (14:42 +0200)]
usb: xhci: reset endpoint on USB stall
There are devices which cause a USB stall when trying to read strings.
Specifically Arduino Mega R3 stalls when trying to read the product
string.
The stall currently remains unhandled, and subsequent retries submit new
transfers on a stopped endpoint which ultimately cause a crash in
abort_td():
WARN halted endpoint, queueing URB anyway.
XHCI control transfer timed out, aborting...
Unexpected XHCI event TRB, skipping... (
3affe040 00000000 13000000 02008401)
BUG at drivers/usb/host/xhci-ring.c:505/abort_td()!
BUG!
resetting ...
Linux seems to be able to recover from the stall by issuing a
TRB_RESET_EP command.
Introduce reset_ep() which issues a TRB_RESET_EP followed by setting the
transfer ring dequeue pointer via TRB_SET_DEQ. This allows to properly
recover from a USB stall error and continue communicating with the USB
device.
Signed-off-by: Stefan Agner <stefan@agner.ch>