vdonaldson [Mon, 13 Jun 2022 15:32:26 +0000 (17:32 +0200)]
[flang] system_clock intrinsic calls with dynamically optional arguments
system_clock intrinsic calls with dynamically optional arguments
Modify intrinsic system_clock calls to allow for an argument that is optional
or a disassociated pointer or an unallocated allocatable. A call with such an
argument is the same as a call that does not specify that argument.
Rename (genIsNotNull -> genIsNotNullAddr) and (genIsNull -> genIsNullAddr)
and add a use of genIsNotNullAddr.
This patch is part of the upstreaming effort from fir-dev branch.
Reviewed By: PeteSteinfeld
Differential Revision: https://reviews.llvm.org/D127616
Co-authored-by: V Donaldson <vdonaldson@nvidia.com>
Guillaume Chatelet [Mon, 13 Jun 2022 14:51:27 +0000 (14:51 +0000)]
[NFC][Alignment] Use getAlign in Attributor classes
Guillaume Chatelet [Mon, 13 Jun 2022 14:48:59 +0000 (14:48 +0000)]
[NFC][Alignment] Use getAlign in VNCoercion
Guillaume Chatelet [Mon, 13 Jun 2022 14:33:37 +0000 (14:33 +0000)]
[NFC][Alignment] Use getAlign in SPIRVEmitIntrinsics
Guillaume Chatelet [Mon, 13 Jun 2022 14:30:36 +0000 (14:30 +0000)]
[NFC][Alignment] Use getAlign in SelectionDAGBuilder
Jan Svoboda [Mon, 13 Jun 2022 14:04:37 +0000 (16:04 +0200)]
Reapply "[clang][lex] NFCI: Use DirectoryEntryRef in HeaderSearch::load*()"
This reverts commit
340654e0f246cddb3fb6ebddb843ade9bfcff0a5, essentially reapplying
1d3ba05e4a288b49287fe997763e90234b8c62db.
The test VFS/real-path-found-first.m that was failing on Windows is now passing with a workaround.
Matthias Springer [Mon, 13 Jun 2022 14:38:11 +0000 (16:38 +0200)]
[mlir][shape][bufferize] Fix typo in external model
Differential Revision: https://reviews.llvm.org/D127639
Kazu Hirata [Mon, 13 Jun 2022 14:21:29 +0000 (07:21 -0700)]
[CodeGen] Remove EvictionTrack (NFC)
The last of getEvictor use was removed on Jun 5, 2022 in commit
5c06f7168fd1bd589b831cacd5f1cb8a928446fb, which was itself a patch to
remove unused code.
Once we remove getEvictor, EvictionTrack becomes a write-only data
structure. The data in it won't affect compilation, so the entire
class is essentially dead.
Quinn Pham [Wed, 8 Jun 2022 15:03:11 +0000 (10:03 -0500)]
[clang][driver] fix to correctly set devtoolset on RHEL
This patch correctly sets the devtoolset on RHEL.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D127310
Andrzej Warzynski [Mon, 13 Jun 2022 13:25:50 +0000 (13:25 +0000)]
[flang] Add target/triple in a test
A test added in https://reviews.llvm.org/D127207 is missing
target/triple. This has caused the PowerPC buildbot to start failing:
* https://lab.llvm.org/buildbot/#/builders/21/builds/42860
(on PowerPC `; CHECK: ret` should be replaced with `; CHECK: `blr`).
Sending this without a review as the fix is rather straightforward. Note
that I've decided to add triple/target instead of e.g. removing:
`; CHECK: ret`. That's for consistency with other tests that generate
assembly. We could change that if that's what folks prefer.
Kazu Hirata [Mon, 13 Jun 2022 13:58:36 +0000 (06:58 -0700)]
[GlobalISel] Remove buildSequence (NFC)
The last use was removed on Jun 27, 2019 in commit
8138996128cd17d78d9d3e6ef7b49987565cb310.
Sanjay Patel [Fri, 10 Jun 2022 19:51:05 +0000 (15:51 -0400)]
[InstCombine] reorder mask folds for efficiency
This shows narrowing improvements on the logic tests
(transforms recently added with
e247b0e5c921).
This is not a complete fix. That would require adding
folds to visitOr/visitXor. But it enables the expected
transforms for the basic patterns in the affected tests.
Stephen Tozer [Thu, 28 Apr 2022 14:01:28 +0000 (15:01 +0100)]
[Dexter] Allow Dexter watch commands to specify a range of acceptable FP values
This patch adds an optional argument to DexExpectWatchBase, float_range,
which defines a +- acceptance range for expected floating point values.
If passed, this assumes every expected value to be a floating point
value, and an exception will be thrown if this is not the case.
Differential Revision: https://reviews.llvm.org/D124511
Arnamoy Bhattacharyya [Mon, 13 Jun 2022 13:07:23 +0000 (09:07 -0400)]
[Flang][OpenMP] Implementation of lowering of SIMD construct.
This patch adds code so that using bbc we are able to see an end-to-end lowering of simd construct in action.
Reviewed By: kiranchandramohan, peixin, shraiysh
Differential Revision: https://reviews.llvm.org/D125282
Guillaume Chatelet [Mon, 13 Jun 2022 13:36:22 +0000 (13:36 +0000)]
[NFC][Alignment] Simplify code in MemorySanitizer
Guillaume Chatelet [Mon, 13 Jun 2022 13:35:47 +0000 (13:35 +0000)]
[NFC][Alignment] Simplify code in JSONExporter
Guillaume Chatelet [Mon, 13 Jun 2022 13:35:05 +0000 (13:35 +0000)]
[NFC] Remove dead code in MipsFastISel
Guillaume Chatelet [Mon, 13 Jun 2022 13:34:23 +0000 (13:34 +0000)]
[NFC][Alignment] Use getAlign in DXILBitcodeWriter
Guillaume Chatelet [Mon, 13 Jun 2022 13:33:23 +0000 (13:33 +0000)]
[NFC][Alignment] Use getAlign in ARMFastISel
Nikita Popov [Mon, 13 Jun 2022 13:05:13 +0000 (15:05 +0200)]
[SelectionDAG] Handle trapping aggregate (PR49839)
Call canTrap() on Constant to account for trapping
ConstantAggregate.
Nikita Popov [Mon, 13 Jun 2022 13:03:59 +0000 (15:03 +0200)]
[SelectionDAG] Add test for PR49839 (NFC)
Guillaume Chatelet [Mon, 13 Jun 2022 12:59:01 +0000 (12:59 +0000)]
[NFC] Remove dead code
Guillaume Chatelet [Mon, 13 Jun 2022 12:50:20 +0000 (12:50 +0000)]
[NFC][Alignment] Use proper type in tests
Guillaume Chatelet [Mon, 13 Jun 2022 12:49:50 +0000 (12:49 +0000)]
[NFC][Alignment] Use proper type in instrumentLoadOrStore
Guillaume Chatelet [Mon, 13 Jun 2022 12:48:52 +0000 (12:48 +0000)]
[NFC][Alignment] Use proper version of getAlign
Guillaume Chatelet [Mon, 13 Jun 2022 12:46:57 +0000 (12:46 +0000)]
[NFC][Alignment] Use proper type in LLVMGetAlignment
Nikita Popov [Mon, 13 Jun 2022 12:55:14 +0000 (14:55 +0200)]
[SimplifyCFG] Handle trapping aggregates (PR49839)
Handle the fact that not only constant expressions, but also
constant aggregates containing expressions can trap.
This still doesn't fix the original C reproducer, probably due to
more issues remaining in other passes.
Amaury Séchet [Mon, 6 Jun 2022 15:01:06 +0000 (15:01 +0000)]
[AArch64] Autogenerate sve-fixed-length tests. NFC
As per title. This makes it easier to work onc hange that require "shotgun diffs" over the codebase.
Reviewed By: paulwalker-arm
Differential Revision: https://reviews.llvm.org/D127118
Vladislav Khmelevsky [Thu, 9 Jun 2022 16:00:24 +0000 (19:00 +0300)]
[BOLT][AARCH64] Skip R_AARCH64_LD_PREL_LO19 relocation
Supress failed to analyze relocations warning for R_AARCH64_LD_PREL_LO19
relocation. This relocation is mostly used to get value stored in CI and
we don't process it since we are caluclating target address using the
instruction value in evaluateMemOperandTarget().
Differential Revision: https://reviews.llvm.org/D127413
wangpc [Mon, 13 Jun 2022 12:31:58 +0000 (20:31 +0800)]
[RISCV] Add vread_csr and vwrite_csr to riscv_vector.h
These two functions are described in RVV intrinsics doc
to read/write RVV CSRs. This matches what GCC does.
This reapply aebe24a which was reverted in 0f6f429 due
to missing REQUIRES in tests.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D125875
Jay Foad [Mon, 13 Jun 2022 12:29:28 +0000 (13:29 +0100)]
[AMDGPU] Add GFX11 flat scratch test coverage
Nikita Popov [Mon, 13 Jun 2022 12:34:47 +0000 (14:34 +0200)]
[SimplifyCFG] Add test for PR49839 (NFC)
Benjamin Kramer [Mon, 13 Jun 2022 12:31:43 +0000 (14:31 +0200)]
[InstCombine] Only fold trunc(ext) pairs to bitcast if the source and destination types are the same
This used to be always the case, but the addition of bfloat to the type
matrix makes this invalid.
Frederik Gossen [Mon, 13 Jun 2022 12:25:13 +0000 (08:25 -0400)]
Add `createDynamicDimValues` to tensor dialect utils
The function creates dim ops for each dynamic dimension of the raked tensor
argument and returns these as values.
Differential Revision: https://reviews.llvm.org/D127533
Valentin Clement [Mon, 13 Jun 2022 12:19:45 +0000 (14:19 +0200)]
[flang][NFC] Fix typo
LLVM GN Syncbot [Mon, 13 Jun 2022 12:03:48 +0000 (12:03 +0000)]
[gn build] Port
e183bf8e1599
Jan Svoboda [Mon, 13 Jun 2022 12:03:02 +0000 (14:03 +0200)]
[clang][driver] Only run multi-arch tests on Darwin
This fixes the test introduced in
a85670001ba2487988839656299771915ebc7633 that causes failures on non-Darwin systems.
Jez Ng [Mon, 13 Jun 2022 11:32:49 +0000 (07:32 -0400)]
[lld-macho][reland] Support EH frames under arm64
This reverts commit
10641a42e2286679e0d36ca827e1a40d95ae8ef1.
Differential Revision: https://reviews.llvm.org/D124561
Jez Ng [Mon, 13 Jun 2022 01:56:45 +0000 (21:56 -0400)]
[lld-macho][reland] Initial support for EH Frames
This reverts commit
942f4e3a7cc9a9f8b2654817cff12907d1276031.
The additional change required to avoid the assertion errors seen
previously is:
--- a/lld/MachO/ICF.cpp
+++ b/lld/MachO/ICF.cpp
@@ -443,7 +443,9 @@ void macho::foldIdenticalSections() {
/*relocVA=*/0);
isec->data = copy;
}
- } else {
+ } else if (!isEhFrameSection(isec)) {
+ // EH frames are gathered as hashables from unwindEntry above; give a
+ // unique ID to everything else.
isec->icfEqClass[0] = ++icfUniqueID;
}
}
Differential Revision: https://reviews.llvm.org/D123435
Jez Ng [Mon, 13 Jun 2022 11:41:17 +0000 (07:41 -0400)]
[MC] Fix likely uninitialized memory bug
See https://reviews.llvm.org/D122258#inline-1223493. I can't repro the
issue locally but this seems like the likely culprit.
Reviewed By: uabelho
Differential Revision: https://reviews.llvm.org/D127630
wangpc [Mon, 13 Jun 2022 11:28:22 +0000 (19:28 +0800)]
Revert "[RISCV] Add vread_csr and vwrite_csr to riscv_vector.h"
This reverts commit
aebe24a856d2f40284d940970d4e159319dbb90f.
`REQUIRES` for RISCV target is needed in tests.
Jan Svoboda [Thu, 9 Jun 2022 14:58:09 +0000 (16:58 +0200)]
[clang][driver] Fix compilation database dump with multiple architectures
Command lines with multiple `-arch` arguments expand into multiple entries in the compilation database. However, the file writes are not appending, meaning subsequent writes end up overwriting the previous ones, resulting in garbled output.
This patch fixes that by always appending to the file.
rdar://
90165004
Reviewed By: dexonsmith
Differential Revision: https://reviews.llvm.org/D121997
Jan Svoboda [Thu, 9 Jun 2022 14:58:09 +0000 (16:58 +0200)]
[clang][driver] Introduce new -fdriver-only flag
This patch introduces the new -fdriver-only flag which instructs Clang to only execute the driver logic without running individual jobs. In a way, this is very similar to -###, with the following differences:
* it doesn't automatically print all jobs,
* it doesn't avoid side effects (e.g. it will generate compilation database when -MJ is specified).
This flag will be useful in testing D121997.
Reviewed By: dexonsmith, egorzhdan
Differential Revision: https://reviews.llvm.org/D127408
Mats Petersson [Tue, 7 Jun 2022 13:00:08 +0000 (14:00 +0100)]
[flang]Add support for do concurrent
[flang]Add support for do concurrent
Upstreaming from fir-dev on https://github.com/flang-compiler/f18-llvm-project
Support for concurrent execution in do-loops.
A selection of tests are also added.
Co-authored-by: V Donaldson <vdonaldson@nvidia.com>
Reviewed By: kiranchandramohan
Differential Revision: https://reviews.llvm.org/D127240
wangpc [Mon, 13 Jun 2022 11:11:05 +0000 (19:11 +0800)]
[RISCV] Add vread_csr and vwrite_csr to riscv_vector.h
These two functions are described in RVV intrinsics doc
to read/write RVV CSRs. This matches what GCC does.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D125875
Simon Pilgrim [Mon, 13 Jun 2022 10:47:14 +0000 (11:47 +0100)]
[DAG] visitINSERT_VECTOR_ELT - attempt to reconstruct BUILD_VECTOR before other fold interfere
Another issue unearthed by D127115
We take a long time to canonicalize an insert_vector_elt chain before being able to convert it into a build_vector - even if they are already in ascending insertion order, we fold the nodes one at a time into the build_vector 'seed', leaving plenty of time for other folds to alter it (in particular recognising when they come from extract_vector_elt resulting in a shuffle_vector that is much harder to fold with).
D127115 makes this particularly difficult as we're almost guaranteed to have the lost the sequence before all possible insertions have been folded.
This patch proposes to begin at the last insertion and attempt to collect all the (oneuse) insertions right away and create the build_vector before its too late.
Differential Revision: https://reviews.llvm.org/D127595
Simon Pilgrim [Mon, 13 Jun 2022 10:47:58 +0000 (11:47 +0100)]
[ARM] Fix "local variable is initialized but not referenced" MSVX warning. NFC
zhongyunde [Mon, 13 Jun 2022 10:37:06 +0000 (18:37 +0800)]
[test] Add test for D126700 NFC
Nikita Popov [Mon, 13 Jun 2022 10:32:22 +0000 (12:32 +0200)]
[InstSimplify][IR] Handle trapping constant aggregate (PR49839)
Unfortunately, it's not just constant expressions that can trap,
we might also have a trapping constant expression nested inside
a constant aggregate.
Perform the check during phi folding on Constant rather than
ConstantExpr, and extend the Constant::mayTrap() implementation
to also recursive into ConstantAggregates, not just ConstantExprs.
Fixes https://github.com/llvm/llvm-project/issues/49839.
LLVM GN Syncbot [Mon, 13 Jun 2022 10:23:45 +0000 (10:23 +0000)]
[gn build] Port
988682a3892e
Nikita Popov [Mon, 13 Jun 2022 10:22:56 +0000 (12:22 +0200)]
[InstSimplify] Add additional test for PR49839 (NFC)
This is a variant involving an aggregate constant, which was not
covered by the previous patch.
David Truby [Mon, 13 Jun 2022 09:54:26 +0000 (09:54 +0000)]
[clang][AArch64][SVE] Implicit conversions for vector-scalar operations
This patch allows the same implicit conversions for vector-scalar
operations in SVE that are allowed for NEON.
Depends on D126377
Reviewed By: c-rhodes
Differential Revision: https://reviews.llvm.org/D126380
Nikolas Klauser [Mon, 13 Jun 2022 08:43:43 +0000 (10:43 +0200)]
[libc++] Fix std::lower_bound with C++20-hostile iterators
Reviewed By: EricWF, #libc
Spies: sstefan1, libcxx-commits, mgorny
Differential Revision: https://reviews.llvm.org/D127577
Guillaume Chatelet [Mon, 13 Jun 2022 08:52:45 +0000 (08:52 +0000)]
[NFC][Alignment] Convert MemCpyOptimizer.cpp
Lucas Prates [Mon, 13 Jun 2022 10:00:49 +0000 (11:00 +0100)]
Revert "[ARM][Thumb] Command-line option to ensure AAPCS compliant Frame Records"
Reverting change due to test failure.
This reverts commit
6119053dab67129eb1700dbf36db3524dd3e421f.
David Sherwood [Fri, 10 Jun 2022 12:41:53 +0000 (13:41 +0100)]
[NFC][InstCombine] Refactor InstCombinerImpl::foldSelectIntoOp
Introduce a lambda function so that we remove a lot of code
duplication.
Differential Revision: https://reviews.llvm.org/D127493
zhongyunde [Mon, 13 Jun 2022 09:24:59 +0000 (17:24 +0800)]
[MachineScheduler] Order more stores by ascending address
According D125377, we order STP Q's by ascending address. While on some
targets, paired 128 bit loads and stores are slow, so the STP will split
into STRQ and STUR, so I hope these stores will also be ordered.
Also add subtarget feature ascend-store-address to control the aggressive order.
Reviewed By: dmgreen, fhahn
Differential Revision: https://reviews.llvm.org/D126700
Lucas Prates [Fri, 6 May 2022 09:31:11 +0000 (10:31 +0100)]
[ARM][Thumb] Command-line option to ensure AAPCS compliant Frame Records
Currently the a AAPCS compliant frame record is not always created for
functions when it should. Although a consistent frame record might not
be required in some cases, there are still scenarios where applications
may want to make use of the call hierarchy made available trough it.
In order to enable the use of AAPCS compliant frame records whilst keep
backwards compatibility, this patch introduces a new command-line option
(`-mframe-chain=[none|aapcs|aapcs+leaf]`) for Aarch32 and Thumb backends.
The option allows users to explicitly select when to use it, and is also
useful to ensure the extra overhead introduced by the frame records is
only introduced when necessary, in particular for Thumb targets.
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D125094
Lucas Prates [Mon, 23 May 2022 15:40:38 +0000 (16:40 +0100)]
[NFC][Thumb1] Use FrameDestroy flag to identify epilog instructions
Simiarly to what's done on both ARM's and AArch64's frame lowering code,
this updates Thumb1FrameLowering to use the FrameDestroy Machine
Instruction flag to identify instructions inserted as part of the epilog
instead of relying on assumptions about specific machine instructions.
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D126285
Adrian Kuegel [Mon, 13 Jun 2022 08:48:17 +0000 (10:48 +0200)]
[mlir] Fix ClangTidyPerformance finding (NFC).
Nikita Popov [Fri, 10 Jun 2022 14:17:19 +0000 (16:17 +0200)]
[InstCombine] Don't push operation across loop phi
When pushing an operation across a phi node, we should avoid doing
so across a loop backedge. This is generally non-profitable, because
it does not reduce the number of times the operation is executed,
and could lead to an infinite combine loop.
The code was already guarding against this, but using an
insufficiently strong condition, which did not cover the case where
the operation was originally outside the loop (in which case the
transform moves the operation from outside the loop into the loop,
which is particularly undesirable).
Differential Revision: https://reviews.llvm.org/D127499
Nikita Popov [Fri, 10 Jun 2022 15:18:33 +0000 (17:18 +0200)]
[InstSimplify] Update GEP test to use opaque pointers (NFC)
With opaque pointers, we end up merging these GEPs and dropping
the inrange attribute (in the last two cases). This did not happen
previously, because typed pointers use less powerful GEP folding logic.
I'm a bit unsure whether this is something we need to be concerned
about or not. I believe that generally our stance is that we should
perform folds even if this requires losing poison-generating flags
like inrange.
We can either a) accept this as-is, b) try to inhibit folding if it
requires dropping inrange or c) try to fold to poison if we know
that inrange is going to be violated.
For now, we accept it as-is.
Differential Revision: https://reviews.llvm.org/D127503
David Green [Mon, 13 Jun 2022 08:24:15 +0000 (09:24 +0100)]
[AArch64] Mark smull and umull as commutative.
Nuno Lopes [Mon, 13 Jun 2022 07:59:07 +0000 (08:59 +0100)]
[NFC] Remove straight UB from SROA tests
Including 'br undef', store/load to undef pointers.
Plus some cosmetics: select undef, insertvalue undef -> poison.
Recommit c1b6103 with fix.
Guillaume Chatelet [Mon, 13 Jun 2022 07:50:35 +0000 (07:50 +0000)]
[NFC][polly] Removed dead code
Maksim Panchenko [Tue, 31 May 2022 21:50:19 +0000 (14:50 -0700)]
[X86][Disassembler] Fix displacement operand size for symbolizer
On 64-bit X86, 0x66 operand-size override prefix will change the size of
the instruction operand, e.g. from 32 bits to 16 bits, but it will not
modify the size of the displacement operand used for memory addressing,
which will always be 32 bits.
Reviewed By: skan, rafauler
Differential Revision: https://reviews.llvm.org/D126726
owenca [Sat, 11 Jun 2022 20:06:58 +0000 (13:06 -0700)]
[clang-format] Handle deprecated options in dump_format_style.py
Also add two deprecated options as comments back to Format.h.
Fangrui Song [Mon, 13 Jun 2022 04:15:06 +0000 (21:15 -0700)]
[ELF] Change getRISCVPCRelHi20 error to conventional errorOrWarn
Craig Topper [Mon, 13 Jun 2022 03:34:14 +0000 (20:34 -0700)]
[RISCV] Use isShiftedInt to improve readability. NFC
Kazushi (Jam) Marukawa [Mon, 13 Jun 2022 03:32:25 +0000 (12:32 +0900)]
Revert "[NFC] Remove 'br i1 undef' from SROA tests"
Transforms/SROA/vector-promotion-different-size.ll causes errors.
This reverts commit
c1b610307df22d12687bde26919e45752c33ab0b.
Kazu Hirata [Mon, 13 Jun 2022 01:52:02 +0000 (18:52 -0700)]
[AArch64] Use default member initialization (NFC)
Identified with modernize-use-default-member-init.
Kazu Hirata [Mon, 13 Jun 2022 01:46:25 +0000 (18:46 -0700)]
[Support] Use default member initialization (NFC)
Identified with modernize-use-default-member-init.
Kazu Hirata [Mon, 13 Jun 2022 01:39:05 +0000 (18:39 -0700)]
[Transforms] Use default member initialization (NFC)
Identified with modernize-use-default-member-init.
Kazu Hirata [Mon, 13 Jun 2022 01:30:45 +0000 (18:30 -0700)]
[X86] Use default member initialization (NFC)
Identified with modernize-use-default-member-init.
Petr Hosek [Mon, 28 Mar 2022 21:12:23 +0000 (14:12 -0700)]
[CMake][libcxx] Use target_include_directories for libc++ headers
This is the idiomatic way to handle include directories in CMake.
Differential Revision: https://reviews.llvm.org/D122614
Jez Ng [Sun, 12 Jun 2022 21:26:08 +0000 (17:26 -0400)]
[lld-macho] Make `--icf=safe` work with LTO
Just matter of enabling the config option.
(Also changed the platform of the input test file to macOS, since that's
the default that we specify in the `%lld` substitution. The conflict was
causing errors when linking with LTO.)
Reviewed By: #lld-macho, thakis
Differential Revision: https://reviews.llvm.org/D127600
Jez Ng [Sun, 12 Jun 2022 21:15:56 +0000 (17:15 -0400)]
[MC][re-land] Omit DWARF unwind info if compact unwind is present where eligible
This reverts commit
d941d597837d9e1405086f008c9bd6a71e7263c9.
Differential Revision: https://reviews.llvm.org/D122258
Hubert Tong [Sun, 12 Jun 2022 20:31:55 +0000 (16:31 -0400)]
[NFC] Remove unused variable `MF`
https://reviews.llvm.org/D127583 removed the only use of this variable
and broke builds with warnings-as-errors.
Nikolas Klauser [Sat, 11 Jun 2022 21:43:00 +0000 (23:43 +0200)]
[libc++] Use unsigned char in basic_string::__short again
D125496 changed the string layout on windows. Change `__is_long_` and `__size_` back to using `unsigned char` to fix the issue.
Reviewed By: Mordante, #libc
Spies: jloser, libcxx-commits, ayzhao
Differential Revision: https://reviews.llvm.org/D127566
Nuno Lopes [Sun, 12 Jun 2022 18:29:00 +0000 (19:29 +0100)]
fix test expected output (fixes arm buildbot failure) [NFC]
Simon Pilgrim [Sun, 12 Jun 2022 17:56:24 +0000 (18:56 +0100)]
[DAG] Enable ISD::FSHL/R SimplifyMultipleUseDemandedBits handling inside SimplifyDemandedBits
This patch allows SimplifyDemandedBits to call SimplifyMultipleUseDemandedBits in cases where the source operand has other uses, enabling us to peek through the shifted value if we don't demand all the bits/elts.
This helps with several of the regressions from D125836
Nuno Lopes [Sun, 12 Jun 2022 18:03:47 +0000 (19:03 +0100)]
[clang][CodeGen] Switch a few placeholders from UndefValue to PoisonValue
This change is cosmetic, as these are dummy values that are not observable, but it
gets us closer to removing undef.
NFC
Craig Topper [Sun, 12 Jun 2022 17:38:29 +0000 (10:38 -0700)]
[RISCV] Move some methods out of RISCVInstrInfo and into RISCV namespace.
These methods don't access any state from RISCVInstrInfo. Make them
free functions in the RISCV namespace.
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D127583
Kazu Hirata [Sun, 12 Jun 2022 17:47:06 +0000 (10:47 -0700)]
[IR] Call DenseMap::erase directly (NFC)
We can erase an item in DenseMap without checking its membership first.
Kazu Hirata [Sun, 12 Jun 2022 17:17:12 +0000 (10:17 -0700)]
[clang] Use any_of and none_of (NFC)
Florian Hahn [Sun, 12 Jun 2022 17:03:26 +0000 (18:03 +0100)]
[SimplifyCFG,EarlyCSE] Update 2 tests to not branch on undef (NFC).
Florian Hahn [Sun, 12 Jun 2022 15:57:47 +0000 (16:57 +0100)]
[LV] Update test to use GEP so it is not dead.
The test should use the GEP for the store, so it is not dead.
Mehdi Amini [Sun, 12 Jun 2022 15:14:37 +0000 (15:14 +0000)]
Revert "[X86][RFC] Enable `_Float16` type support on X86 following the psABI"
This reverts commit
2d2da259c8726fd5c974c01122a9689981a12196.
This breaks MLIR integration test (JIT crashing), reverting in the
meantime.
Jez Ng [Sun, 12 Jun 2022 14:46:49 +0000 (10:46 -0400)]
Revert "[MC] Omit DWARF unwind info if compact unwind is present where eligible"
This reverts commit
ef501bf85d8c869248e51371f0e74bcec0e7b229.
Simon Pilgrim [Sun, 12 Jun 2022 14:40:24 +0000 (15:40 +0100)]
[X86] combineConcatVectorOps - add support for concatenation of VSELECT/BLENDV nodes (REAPPLIED)
If the LHS/RHS selection operands can be cheaply concatenated back together then replace 2 x 128-bit selection nodes with 1 x 256-bit node
Addresses the regression introduced in the bug fix from rGd5af6a38082b39ae520a328e44dc29ebcb036bb2
REAPPLIED with for bug identified in rGea8fb3b60196
Simon Pilgrim [Sun, 12 Jun 2022 14:27:11 +0000 (15:27 +0100)]
[X86] Add regression test for rGea8fb3b60196
Reduced from test case reported by @srj for the concatenation of VSELECT/BLENDV nodes
Nuno Lopes [Sun, 12 Jun 2022 14:29:59 +0000 (15:29 +0100)]
[NFC] Remove 'br i1 undef' from SROA tests
Ulrich Weigand [Sun, 12 Jun 2022 14:03:30 +0000 (16:03 +0200)]
Fix endian conversion of sub-byte types
When convertEndianOfCharForBEmachine is called with elementBitWidth
smaller than CHAR_BIT, the default case is invoked, but this does
nothing at all and leaves the output array unchanged.
Fix DenseIntOrFPElementsAttr::convertEndianOfArrayRefForBEmachine
by not calling convertEndianOfCharForBEmachine in this case, and
instead simply copying the input to the output (for sub-byte types,
endian conversion is in fact a no-op).
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D125676
Jez Ng [Sun, 12 Jun 2022 14:03:56 +0000 (10:03 -0400)]
[MC] Omit DWARF unwind info if compact unwind is present where eligible
Previously, omitting unnecessary DWARF unwinds was only done in two
cases:
* For Darwin + aarch64, if no DWARF unwind info is needed for all the
functions in a TU, then the `__eh_frame` section would be omitted
entirely. If any one function needed DWARF unwind, then MC would emit
DWARF unwind entries for all the functions in the TU.
* For watchOS, MC would omit DWARF unwind on a per-function basis, as
long as compact unwind was available for that function.
This diff makes it so that we omit DWARF unwind on a per-function basis
for Darwin + aarch64 as well. In addition, we introduce the flag
`--emit-dwarf-unwind=` which can toggle between `always`,
`no-compact-unwind` (only emit DWARF when CU cannot be emitted for a
given function), and the target platform `default`. `no-compact-unwind`
is particularly useful for newer x86_64 platforms: we don't want to omit
DWARF unwind for x86_64 in general due to possible backwards compat
issues, but we should make it possible for people to opt into this
behavior if they are only targeting newer platforms.
**Motivation:** I'm working on adding support for `__eh_frame` to LLD,
but I'm concerned that we would suffer a perf hit. Processing compact
unwind is already expensive, and that's a simpler format than EH frames.
Given that MC currently produces one EH frame entry for every compact
unwind entry, I don't think processing them will be cheap. I tried to do
something clever on LLD's end to drop the unnecessary EH frames at parse
time, but this made the code significantly more complex. So I'm looking
at fixing this at the MC level instead.
**Addendum:** It turns out that there was a latent bug in the X86
backend when `OmitDwarfIfHaveCompactUnwind` is naively enabled, which is
not too surprising given that this combination has not been heretofore
used.
For functions that have unwind info that cannot be encoded with CU, MC
would end up dropping both the compact unwind entry (OK; existing
behavior) as well as the DWARF entries (not OK). This diff fixes things
so that we emit the DWARF entry, as well as a CU entry with encoding
`UNWIND_X86_MODE_DWARF` -- this basically tells the unwinder to look for
the DWARF entry. I'm not 100% sure the `UNWIND_X86_MODE_DWARF` CU entry
is necessary, this was the simplest fix. ld64 seems to be able to handle
both the absence and presence of this CU entry. Ultimately ld64 (and
LLD) will synthesize `UNWIND_X86_MODE_DWARF` if it is absent, so there
is no impact to the final binary size.
Reviewed By: davide, lhames
Differential Revision: https://reviews.llvm.org/D122258
Yuki Okushi [Sat, 28 May 2022 16:59:56 +0000 (01:59 +0900)]
[docs][clang] Fix a broken link on the APINotes doc
This patch replaces a link with a GitHub one.
Fixes llvm#55748
Differential Revision: https://reviews.llvm.org/D126599
Simon Pilgrim [Sun, 12 Jun 2022 13:02:23 +0000 (14:02 +0100)]
[DAG] visitSRL - pull out ShiftVT. NFC.
David Green [Sun, 12 Jun 2022 09:59:09 +0000 (10:59 +0100)]
[AArch64] Look through bitcast when looking for extract_high subvector
Since D61806, DAGCombiner has folded subvector_extract(bitcast(..)) to
bitcast(subvector_extract(..)), which would place a bitcast between a
subvector_extract and the operation that could be converted to a high
neon instruction (like smull2). This adds better matching for the
subvector_extract, through the tablegen extract_high PatFrags to
optionally skip the bitcast under little ending, still matchings an
extract of the high half of the input vector.
I didn't update the extract_high of a duplicate patterns, as the
ComplexPattern need names operands. I did add a extract_high_dup_v8i16
PatFrag to abstract away the common code, which can be extended in a
future patch.
Differential Revision: https://reviews.llvm.org/D126782
Phoebe Wang [Sat, 11 Jun 2022 15:19:25 +0000 (23:19 +0800)]
[X86][RFC] Enable `_Float16` type support on X86 following the psABI
GCC and Clang/LLVM will support `_Float16` on X86 in C/C++, following
the latest X86 psABI. (https://gitlab.com/x86-psABIs)
_Float16 arithmetic will be performed using native half-precision. If
native arithmetic instructions are not available, it will be performed
at a higher precision (currently always float) and then truncated down
to _Float16 immediately after each single arithmetic operation.
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D107082
Alex Brachet [Sun, 12 Jun 2022 03:01:08 +0000 (03:01 +0000)]
Revert "[lit] Passthrough CLANG_MODULE_CACHE_PATH env var"
This reverts commit
6466c9abf3674bade1f6ee859f24ebc7aaf9cd88.
Weining Lu [Sun, 12 Jun 2022 02:41:56 +0000 (10:41 +0800)]
[LoongArch] clang-format some code in LoongArchISelLowering.cpp. NFC