Hans Wennborg [Tue, 9 May 2023 07:15:18 +0000 (09:15 +0200)]
Revert "[ValutTracking] Use isGuaranteedNotToBePoison in impliesPoison"
This broke two lit tests:
LLVM :: Transforms/LoopSimplify/merge-exits.ll
LLVM :: Transforms/PhaseOrdering/X86/vector-reductions.ll
see comment on the code review.
> Differential Revision: https://reviews.llvm.org/D149934
This reverts commit
2ba4cfd56769ab50c9c6f432f93265d7793bd1f2.
pvanhout [Mon, 8 May 2023 07:31:09 +0000 (09:31 +0200)]
[AMDGPU] Recompute liveness in SIOptimizeExecMaskingPreRA
Instead of ad-hoc updating liveness, recompute it completely for the affected register.
This does not affect any existing test and fixes an edge case that
caused a "Non-empty but used interval" error in the register allocator
due to how the pass updated liveranges. It created a "isolated" live-through
segment.
Overall this change just seems to be a net positive with no side effect observed. There may be a compile time impact but it's expected to be minimal.
Fixes SWDEV-388279
Reviewed By: critson
Differential Revision: https://reviews.llvm.org/D150105
Weining Lu [Mon, 8 May 2023 03:34:34 +0000 (11:34 +0800)]
[LoongArch] Support fcc* (condition flag) registers in inlineasm clobbers
Differential Revision: https://reviews.llvm.org/D150089
varconst [Tue, 9 May 2023 06:40:21 +0000 (23:40 -0700)]
[libc++][ranges] Implement the changes to vector from P1206 (`ranges::to`):
- add the `from_range_t` constructors and the related deduction guides;
- add the `insert_range`/`assign_range`/etc. member functions.
(Note: this patch is split from https://reviews.llvm.org/D142335)
Differential Revision: https://reviews.llvm.org/D149826
Shengchen Kan [Tue, 9 May 2023 06:05:30 +0000 (14:05 +0800)]
Set mayLoad = 1 for shift/rotate with a memory operand
Amara Emerson [Mon, 8 May 2023 05:09:27 +0000 (22:09 -0700)]
[GlobalISel] Implement commuting shl (add/or x, c1), c2 -> add/or (shl x, c2), c1 << c2
There's a target hook that's called in DAGCombiner that we stub here, I'll
implement the equivalent override for AArch64 in a subsequent patch since it's
used by different shift combine.
This change by itself has minor code size improvements on arm64 -Os CTMark:
Program size.__text
outputg181ppyy output8av1cxfn diff
consumer-typeset/consumer-typeset 410648.00 410648.00 0.0%
tramp3d-v4/tramp3d-v4 364176.00 364176.00 0.0%
kimwitu++/kc 449216.00 449212.00 -0.0%
7zip/7zip-benchmark 576128.00 576120.00 -0.0%
sqlite3/sqlite3 285108.00 285100.00 -0.0%
SPASS/SPASS 411720.00 411688.00 -0.0%
ClamAV/clamscan 379868.00 379764.00 -0.0%
Bullet/bullet 452064.00 451928.00 -0.0%
mafft/pairlocalalign 246184.00 246108.00 -0.0%
lencod/lencod 428524.00 428152.00 -0.1%
Geomean difference -0.0%
Differential Revision: https://reviews.llvm.org/D150086
Jon Roelofs [Tue, 9 May 2023 04:52:12 +0000 (21:52 -0700)]
CMake: add missing dependency on intrinsics_gen
luxufan [Fri, 5 May 2023 07:53:16 +0000 (15:53 +0800)]
[ValutTracking] Use isGuaranteedNotToBePoison in impliesPoison
Differential Revision: https://reviews.llvm.org/D149934
William Huang [Tue, 9 May 2023 04:37:08 +0000 (04:37 +0000)]
[llvm-profdata] ProfileReader cleanup - preparation for MD5 refactoring - 2
Cleanup profile reader classes to prepare for complex refactoring as propsed in D147740, continuing D148868
This is patch 2/n. This patch refactors CSNameTable and related things
The decision to move CSNameTable up to the base class is because a planned improvement (D147740) to use MD5 to lookup Functions/Context frames. In this case we want a unified data structure between contextless function or Context frames, so that it can be mapped by MD5 value. Since Context Frames can represent contextless functions, it is being used for MD5 lookup, therefore exposing it to the base class
Reviewed By: snehasish, wenlei
Differential Revision: https://reviews.llvm.org/D148872
Jason Molenda [Tue, 9 May 2023 03:28:52 +0000 (20:28 -0700)]
Add a new report_load_commands option to jGetLoadedDynamicLibrariesInfos
jGetLoadedDynamicLibrariesInfos has a mode where it will list
every binary in the process - the load address and filepath from dyld
SPI, and the mach-o header and load commands from a scan by debugserver
for perf reasons. With a large enough number of libraries, creating
that StructuredData representation of all of this, and formatting it
into an ascii string to send up to lldb, can grow debugserver's heap
size too large for some environments.
This patch adds a new report_load_commands:false boolean to the
jGetLoadedDynamicLibrariesInfos packet, where debugserver will now
only report the dyld SPI load address and filepath for all of the
binaries. lldb can then ask for the detailed information on
the process binaries in smaller chunks, and avoid debugserver
having ever growing heap use as the number of binaries inevitably
increases.
This patch also removes a version of jGetLoadedDynamicLibrariesInfos
for pre-iOS 10 and pre-macOS 10.12 systems where we did not use
dyld SPI. We can't back compile to those OS builds any longer
with modern Xcode.
Finally, it removes a requirement in DynamicLoaderMacOS that the
JSON reply from jGetLoadedDynamicLibrariesInfos include the
mod_date field for each binary. This has always been reported as
0 in modern dyld, and is another reason for packet growth in
the reply. debugserver still puts the mod_date field in its replies
for interop with existing lldb's, but we will be able to remove it
the field from debugserver's output after the next release cycle
when this patch has had time to circulate.
I'll add lldb support for requesting the load addresses only
and splitting the request up into chunks in a separate patch.
Differential Revision: https://reviews.llvm.org/D150158
rdar://
107848326
Kazu Hirata [Tue, 9 May 2023 03:23:33 +0000 (20:23 -0700)]
[clang] Modernize LoopHint (NFC)
Kazu Hirata [Tue, 9 May 2023 03:23:32 +0000 (20:23 -0700)]
[Hexagon] Remove unused struct AlignVectors::Segment
Kazu Hirata [Tue, 9 May 2023 03:23:31 +0000 (20:23 -0700)]
[mlir] Replace None with std::nullopt in comments (NFC)
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Amir Aupov [Tue, 9 May 2023 03:16:58 +0000 (20:16 -0700)]
[BOLT][test] Fix retpoline-synthetic.test
Fix test on BOLT's buildbot, e.g.
https://lab.llvm.org/buildbot/#/builders/244/builds/10885
Owen Pan [Sat, 6 May 2023 23:29:16 +0000 (16:29 -0700)]
[clang-format] Fix consecutive alignments in #else blocks
Since 3.8 or earlier, clang-format has been lumping all #else, #elif,
etc blocks together when doing whitespace replacements and causing
consecutive alignments across #else blocks.
Commit c077975 partially addressed the problem but also triggered
"regressions".
This patch fixes the root cause of the problem and "reverts" c077975
(except for the unit tests).
Fixes #36070.
Fixes #55265.
Fixes #60721.
Fixes #61498.
Differential Revision: https://reviews.llvm.org/D150057
Joseph Huber [Mon, 8 May 2023 23:37:55 +0000 (18:37 -0500)]
[OpenMP] Fix incorrect interop type for number of dependencies
The interop types use the number of dependencies in the function
interface. Every other function uses an `i32` to count the number of
dependencies except for the initialization function. This leads to
codegen issues when the rest of the compiler passes in an `i32` that
then creates an invalid call. Fix this to be consistent with the other
uses.
Reviewed By: tianshilei1992
Differential Revision: https://reviews.llvm.org/D150156
Amir Ayupov [Tue, 9 May 2023 01:53:48 +0000 (18:53 -0700)]
[BOLT] Use opcode name in hashBlock
Use MCInst opcode name instead of opcode value in hashing.
Opcode values are unstable wrt changes to target tablegen definitions,
and we notice that as output mismatches in NFC testing. This makes BOLT YAML
profile tied to a particular LLVM revision which is less portable than
offset-based fdata profile.
Switch to using opcode names which have 1:1 mapping with opcode values for any
given LLVM revision, and are stable wrt modifications to .td files (except of
course modifications to names themselves).
Test Plan:
D150154 is a test commit adding new X86 instruction which shifts opcode values.
With current change, pre-aggregated-perf.test passes in nfc check mode.
Without current change, pre-aggregated-perf.test expectedly fails.
Reviewed By: #bolt, rafauler
Differential Revision: https://reviews.llvm.org/D150005
Amir Ayupov [Tue, 9 May 2023 01:48:40 +0000 (18:48 -0700)]
[BOLT] Use MCInstPrinter in createRetpolineFunctionTag
Make retpoline functions invariant of X86 register numbers.
retpoline-synthetic.test is known to fail NFC testing due to shifting
register numbers. Use canonical register names instead of tablegen
numbers.
Before:
```
__retpoline_r51_
__retpoline_mem_r58+DATAat0x200fe8
__retpoline_mem_r51+0
__retpoline_mem_r132+0+8*53
```
After:
```
__retpoline_%rax_
__retpoline_mem_%rip+DATAat0x200fe8
__retpoline_mem_%rax+0
__retpoline_mem_%r12+0+8*%rbx
```
Test Plan:
- Revert
67bd3c58c0c7389e39c5a2f4d3b1a30459ccf5b7 that touches X86RegisterInfo.td.
- retpoline-synthetic.test passes in NFC mode with this diff, fails without it.
Reviewed By: #bolt, rafauler
Differential Revision: https://reviews.llvm.org/D150138
David Blaikie [Tue, 9 May 2023 00:40:11 +0000 (00:40 +0000)]
Fix for release notes (follow-up to D149182/
a8b0c6fa)
David Blaikie [Tue, 25 Apr 2023 20:01:43 +0000 (20:01 +0000)]
Remove -Wpacked false positive for non-pod types where the layout isn't directly changed
The packed attribute can still be useful in this case if the struct is
then placed inside another packed struct - the non-pod element type's
packed attribute declares that it's OK to misalign this element inside
the packed structure. (otherwise the non-pod element is not packed/its
alignment is preserved, as per D117616/2771233)
Fixes PR62353
Differential Revision: https://reviews.llvm.org/D149182
Pierre Calixte [Tue, 9 May 2023 00:03:35 +0000 (00:03 +0000)]
Do not optimize debug locations across section boundaries
Prevent optimization of DebugLoc across section boundaries, such optimization will yield incorrect source location if memory layout of sections does not strictly match the Asm file.
Reviewed By: #debug-info, dblaikie, MaskRay
Differential Revision: https://reviews.llvm.org/D149294
Slava Zakharin [Mon, 8 May 2023 23:21:14 +0000 (16:21 -0700)]
[flang] Prevent character length setting with dangling ac-do-variable.
This fixes LEN inquiry on array constructors where the length
expression includes references to the ac-do-variable.
Reviewed By: klausler
Differential Revision: https://reviews.llvm.org/D150149
Vitaly Buka [Mon, 8 May 2023 22:24:33 +0000 (15:24 -0700)]
[NFC][HWASAN] Use InternalAlloc for ThreadStartArg
Vitaly Buka [Mon, 8 May 2023 18:03:40 +0000 (11:03 -0700)]
[NFC][ASAN] Hide placeholder buffer
Alan Zhao [Mon, 8 May 2023 23:26:32 +0000 (16:26 -0700)]
Revert "[CodeGen][ShrinkWrap] Split restore point"
This reverts commit
1ddfd1c8186735c62b642df05c505dc4907ffac4.
The original commit causes a Chrome build assertion failure with
ThinLTO: https://crbug.com/1443635
Vitaly Buka [Mon, 8 May 2023 22:15:15 +0000 (15:15 -0700)]
[NFC][HWASAN] Move HwasanThreadStartFunc
Vitaly Buka [Mon, 8 May 2023 22:03:22 +0000 (15:03 -0700)]
[NFC][HWASAN] Reformat the file
Vitaly Buka [Mon, 8 May 2023 22:32:55 +0000 (15:32 -0700)]
[NFC][HWASAN] Hide thread_list_placeholder
Vitaly Buka [Mon, 8 May 2023 22:58:24 +0000 (15:58 -0700)]
[NFC][sanitizer] Rename internal function
Peter Klausler [Fri, 21 Apr 2023 17:03:17 +0000 (10:03 -0700)]
[flang] Semantics for ISO_C_BINDING's C_LOC()
Make __builtin_c_loc() into an intrinsic function and verify the
special semantic requirements on its actual arguments.
Differential Revision: https://reviews.llvm.org/D149988
Michael Francis [Sun, 19 Mar 2023 22:42:35 +0000 (22:42 +0000)]
[AIX][Clang][K] Create `-K` Option for AIX.
`-K` is a linker option on AIX, that is used to align the header, text, data, and loader sections of the output file so that each section begins on a page boundary.
This patch creates the `-K` option in clang. On non-AIX targets, the "unsupported option" error is thrown.
Differential Revision: https://reviews.llvm.org/D146399
Peter Klausler [Thu, 20 Apr 2023 21:12:24 +0000 (14:12 -0700)]
[flang] Procedure pointers are not descriptors
Code in Evaluate/type.cpp was maintaining a very old assumption that
procedure pointers would need to be represented as descriptors. This
is not the case -- they are code or thunk addresses.
Differential Revision: https://reviews.llvm.org/D149984
Alexander Yermolovich [Mon, 8 May 2023 22:39:10 +0000 (15:39 -0700)]
[BOLT][DWARF] Fix dwarf5-one-loclists-two-bases test
Fix assembly for the helper file to work with the new DWARF rewriter.
Reviewed By: maksfb
Differential Revision: https://reviews.llvm.org/D150147
Jon Roelofs [Mon, 8 May 2023 21:10:18 +0000 (14:10 -0700)]
cmake: add missing dependencies on Attributes.inc
Differential revision: https://reviews.llvm.org/D150144
Peter Klausler [Wed, 19 Apr 2023 18:59:43 +0000 (11:59 -0700)]
[flang][runtime] Initialize uninitialized pointer components
Pointer components without default initialization pose some
difficult (or impossible) problems when they appear as right-hand
side targets in pointer assignment statements; they may contain
garbage or stale data that looks enough like a valid descriptor
to cause a crash. Solve the problem by avoiding it -- ensure
that pointers' descriptors are at least minimally established.
Differential Revision: https://reviews.llvm.org/D149979
Vitaly Buka [Sat, 6 May 2023 00:28:57 +0000 (17:28 -0700)]
[msan] Add pthread_*join_np interceptors
Vitaly Buka [Sat, 6 May 2023 00:28:41 +0000 (17:28 -0700)]
[NFC][msan] Rename function parameter
Joseph Huber [Mon, 8 May 2023 19:02:48 +0000 (14:02 -0500)]
[Clang] Change default triple to LLVM_HOST_TRIPLE for the CUDA toolchain
When cross-compiling NVPTX we use the triple to indicate which paths to
search for the CUDA toolchain. Currently this uses the default target
triple. This might not be exactly correct, as this is the default triple
used to compile binaries, not the host system. We want the host triple
because it indicates which folders should hold CUDA.
Reviewed By: tra
Differential Revision: https://reviews.llvm.org/D150136
Elizabeth Andrews [Mon, 8 May 2023 19:55:31 +0000 (12:55 -0700)]
[SYCL][NFC] Remove dead code
Craig Topper [Mon, 8 May 2023 20:02:18 +0000 (13:02 -0700)]
[RISCV] Improve RV64 codegen for i32 ISD::SADDO when RHS is constant.
This uses the same sequence we get from LegalizeDAG for i32 on RV32, but modified
to use W instructions.
When the RHS is constant one of the setccs simplifies to a constant and the xor will either
be an xori with 1 or get removed.
When the RHS is not a constant it was not an obvious improvement and it was a regression
when used with a branch. So I've restricted to the constant case.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D150135
Vitaly Buka [Mon, 8 May 2023 19:20:13 +0000 (12:20 -0700)]
[NFC][ASAN] Remove unused function
Vitaly Buka [Mon, 8 May 2023 19:19:35 +0000 (12:19 -0700)]
[NFC][LSAN] Move GetAdditionalThreadContextPtrsLocked
Aaron Ballman [Mon, 8 May 2023 19:10:35 +0000 (15:10 -0400)]
Update my office hours.
No longer lie about them only being 30 minutes long and add Fridays.
Nikolas Klauser [Sun, 7 May 2023 17:59:05 +0000 (10:59 -0700)]
[clang] Fix __is_trivially_equality_comparable for non-trivially-copyable types
Reviewed By: aaron.ballman
Spies: cfe-commits
Differential Revision: https://reviews.llvm.org/D150072
Vitaly Buka [Mon, 8 May 2023 18:53:43 +0000 (11:53 -0700)]
[test][TSAN] Disable new test crashing with tsan
Siva Chandra Reddy [Sat, 6 May 2023 05:11:41 +0000 (05:11 +0000)]
[libc][NFC] Simplify string-table generation internals.
Reviewed By: michaelrj
Differential Revision: https://reviews.llvm.org/D150088
Teresa Johnson [Mon, 8 May 2023 18:25:10 +0000 (11:25 -0700)]
Fix for windows bot failure (switch uint to unsigned)
Fix windows bot failure from
b8d2f7177c39af7be371ba7f46cb00b9c63ef8f5:
https://lab.llvm.org/buildbot/#/builders/216/builds/20923
by switching uint to unsigned, as the former is not recognized there.
Stefan Pintilie [Mon, 8 May 2023 16:22:03 +0000 (12:22 -0400)]
[PowerPC] Look through OR, AND, XOR instructions when checking a clear.
This patch adds the additional step of looking through AND, OR, XOR
instructions when we check the number of leading zeros.
Reviewed By: shchenz
Differential Revision: https://reviews.llvm.org/D149223
Vitaly Buka [Mon, 8 May 2023 18:07:13 +0000 (11:07 -0700)]
Revert "[PowerPC] Add target feature requirement to builtins"
Breaks PPC bots, see D143467.
This reverts commit
651b0e2e7afca926c3d4f8d7f988db40b9832676.
Shafik Yaghmour [Mon, 8 May 2023 18:13:08 +0000 (11:13 -0700)]
[Clang] Update warning on some designator initializer cases involving unions
Currently when using designated initializers in C++ we have a few
extension. Two extension which are dangerous involved assigning to
multiple members of union which will likely be a mistake since unions
can only have one active member. I have updated to be a warning by
default.
The second case if when we assign to multiple union members and one of
the previous members had a non-trivial destructor, which could lead to
leaking resources. This one is now an error by default.
Fixes: https://github.com/llvm/llvm-project/issues/62156
Differential Revision: https://reviews.llvm.org/D149694
Hanhan Wang [Mon, 8 May 2023 17:57:30 +0000 (10:57 -0700)]
[mlir][vector] Remove unused variable `srcShape`.
Differential Revision: https://reviews.llvm.org/D150130
Vassil Vassilev [Mon, 8 May 2023 10:48:03 +0000 (10:48 +0000)]
[clang-repl] Consider the scope spec in template lookups for deduction guides.
isDeductionGuideName looks up the underlying template and if the template name
is qualified we miss that qualification resulting in an error. This issue
resurfaced in clang-repl where we call isDeductionGuideName more often to
distinguish between if we had a statement or declaration.
This patch passes the CXXScopeSpec information down to LookupTemplateName to
make the lookup more precise.
Differential revision: https://reviews.llvm.org/D147319
Hanhan Wang [Thu, 4 May 2023 21:31:44 +0000 (14:31 -0700)]
[mlir][vector] Generalize vector.transpose lowering to n-D vectors
The existing vector.transpose lowering patterns only triggers if the
input vector is 2D. The revision extends the pattern to handle n-D
vectors which are effectively 2-D vectors (e.g., vector<1x4x1x8x1).
It refactors a common check about 2-D vectors from X86Vector
lowering to VectorUtils.h so it can be reused by both sides.
Reviewed By: dcaballe
Differential Revision: https://reviews.llvm.org/D149908
Craig Topper [Mon, 8 May 2023 17:40:05 +0000 (10:40 -0700)]
[RISCV] Use parseToken to simplify code. Add missing check for Identifier token.
Jake Egan [Mon, 8 May 2023 17:36:09 +0000 (13:36 -0400)]
[AIX] Adjust support of format function tests
escaped_output.unicode.pass.cpp is failing only on 32-bit AIX. The rest are passing.
Reviewed by: #libc, Mordante
Differential Revision: https://reviews.llvm.org/D149078
Kan Wu [Fri, 5 May 2023 23:29:50 +0000 (16:29 -0700)]
[MemProf] Add hot allocation type
Add "Hot" AllocationType (in addition to existing cold, notcold).
Use lifetime access density as metric to identify hot allocations.
Treat hot as notcold for MemProfContextDisambiguation for now
before the disambiguation for "hot" is done.
Reviewed By: tejohnson
Differential Revision: https://reviews.llvm.org/D149932
David Stone [Mon, 8 May 2023 17:27:36 +0000 (13:27 -0400)]
[clang][AST][NFC] Factor out check for structural equivalence of names.
We have four places that we try to decide which name to use for the
test for structural equivalence, and in each of those we evaluate
getTypedefNameForAnonDecl twice. Pull out the check into a function to
reduce duplication and evaluate things only once.
Differential Revision: https://reviews.llvm.org/D149981
Zhongyunde [Tue, 25 Apr 2023 11:36:12 +0000 (19:36 +0800)]
[MergeICmps] Adapt to non-eq comparisons, bugfix
Fix the last runtime issue as some sequent comparisons need be spilted.
For the origin equal comparisons chain, the new spilted Icmp chain will
still be end with equal, while for the new not-equal comparisons chain,
the new spilted Icmp chain will still be end with equal, so should address
this carefully, see detail wih case partial_sequent_ne
Thanks for @aeubanks, @glandium and @ayzhao report the runtime issue
and carefully examine.
Fix https://github.com/llvm/llvm-project/issues/59740.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D141188
Valentin Clement [Mon, 8 May 2023 17:03:04 +0000 (10:03 -0700)]
[mlir][openacc] Cleanup acc.update from old data clause operands
Since the new data operand operations have been added in D148389 and
adopted on acc.update in D149909, the old clause operands are no longer
needed. This is a first patch to start cleaning the OpenACC operations
with data clause operands.
The `LegalizeDataOpForLLVMTranslation` will become obsolete when all
operations will be cleaned. For the time being only the appropriate
part are being removed.
`processOperands` will also receive some updates once all the operands
will be coming from an acc data operand operation.
Reviewed By: razvanlupusoru, jeanPerier
Differential Revision: https://reviews.llvm.org/D150053
Hans Wennborg [Mon, 8 May 2023 13:51:52 +0000 (15:51 +0200)]
Use LLVM-style include guard in regex_impl.h
The previous include guard (_REGEX_H_) is also used in a macOS SDK
header (xlocale.h), causing potential for trouble. This was previously
addressed in
2b8b90a7686858b1d22cae6fcfbd0904135112aa, but renaming the
macro in line with LLVM's other include guards seems like a better fix.
Differential revision: https://reviews.llvm.org/D150117
Craig Topper [Mon, 8 May 2023 16:52:52 +0000 (09:52 -0700)]
[RISCV] Implement shouldTransformSignedTruncationCheck.
This helps avoid constant materialization for the patterns
InstCombine emits for something like INT_MIN <= X && x <= INT_MAX.
See top of changed test files for more detailed explanation.
I've enabled this for i16 when Zbb is enabled. sext.b did not seem
to be a benefit due to the constants folding into addi/sltiu.
This an alternative to https://reviews.llvm.org/D149814
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D149977
Craig Topper [Mon, 8 May 2023 16:48:08 +0000 (09:48 -0700)]
[RISCV] Simplify matchRegisterNameHelper interface. NFC
This previously returned a bool to indicate success or failure and
returns a register through an output parameter.
Some callers used the bool to check for success. Some callers checked
for RISCV::NoRegister.
To make everything uniform, return the MCRegister directly and update
all callers to use MCRegister::isValid().
Reviewed By: barannikov88
Differential Revision: https://reviews.llvm.org/D150049
Dave Lee [Sun, 7 May 2023 23:51:59 +0000 (16:51 -0700)]
[lldb] Prevent mutation of CommandAlias::GetOptionArguments
Fix a mutation of `CommandAlias::m_option_args_sp`, which resulted in cases where
aliases would fail to run on second, and subsequent times.
For example, an alias such as:
```
command alias p1 p 1
```
When run the second time, the following error would be reported to the user:
```
error: expression failed to parse:
error: <user expression 1>:1:1: expression is not assignable
-- 1
^ ~
```
To fix this, `CommandAlias::Desugar` now constructs options to a freshly constructed
vector, rather than by appending to the results of `GetOptionArguments`.
rdar://
107770836
Differential Revision: https://reviews.llvm.org/D150078
Corentin Jabot [Sat, 6 May 2023 13:21:15 +0000 (15:21 +0200)]
[Clang] Improve compile times when forming a DeclRef outside of a capturing scope.
The logic of whether an entity needs to be captured has become
quite complex and the recent changes in https://reviews.llvm.org/D124351
ad a mesurable negative impact on compile times.
However, in the absence of capturing scopes (lambda, block, region)
we usually can avoid running most of that logic
(except that we do need to diagnostic when a nested function
refers to a local variable in the scope of the outer function.).
This patch track whether there is currently an active capturing
scope and exit `tryCaptureVariable` early when there isn't.
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D150038
Jon Chesterfield [Mon, 8 May 2023 16:37:53 +0000 (17:37 +0100)]
[libc][rpc][nfc] Encapsulate access to outbox pointer
Reviewed By: jhuber6
Differential Revision: https://reviews.llvm.org/D150065
Valentin Clement [Mon, 8 May 2023 16:30:01 +0000 (09:30 -0700)]
[mlir][openacc] Add verifier for dataOperands on compute operations
Data operands associated with acc.parallel, acc.serial and
acc.kernels should comes from acc data entry/exit operations
or acc.getdeviceptr.
Reviewed By: razvanlupusoru, jeanPerier
Differential Revision: https://reviews.llvm.org/D149994
Valentin Clement [Mon, 8 May 2023 16:29:08 +0000 (09:29 -0700)]
[mlir][opeancc] Update acc.update verifier for dataOperands
Data operands associated with acc.update should comes
from acc data entry/exit operations or acc.getdeviceptr.
Reviewed By: razvanlupusoru
Differential Revision: https://reviews.llvm.org/D149990
Florian Hahn [Mon, 8 May 2023 16:28:50 +0000 (17:28 +0100)]
[VPlan] Record IR flags on VPWidenRecipe directly (NFC).
This patch introduces a VPRecipeWithIRFlags class to record various IR
flags for a recipe. This allows de-coupling of IR flags from the
underlying instructions. The main benefit is that it allows dropping of
IR flags from recipes directly, without the need to go through
State::MayGeneratePoisonRecipes. The plan is to remove
MayGeneratePoisonRecipes once all relevant recipes are transitioned.
It also allows dropping IR flags during VPlan-to-VPlan transforms, which
will be used in a follow-up patch to implement truncateToMinimalBitwidths
as VPlan-to-VPlan transform.
Reviewed By: Ayal
Differential Revision: https://reviews.llvm.org/D149079
Valentin Clement [Mon, 8 May 2023 16:28:13 +0000 (09:28 -0700)]
[mlir][openacc] Update acc.enter_data verifier for dataOperands
Data operands associated with acc.enter_data should comes
from acc data entry operations.
Reviewed By: razvanlupusoru
Differential Revision: https://reviews.llvm.org/D149991
Valentin Clement [Mon, 8 May 2023 16:26:34 +0000 (09:26 -0700)]
[mlir][openacc] Update acc.data verifier for dataOperands
Data operands associated with acc.data should comes
from acc data entry/exit operations or acc.getdeviceptr.
Reviewed By: razvanlupusoru
Differential Revision: https://reviews.llvm.org/D149992
Adrian Prantl [Mon, 8 May 2023 16:24:40 +0000 (09:24 -0700)]
Skip test when compiling with older versions of clang
Joseph Huber [Mon, 8 May 2023 13:38:24 +0000 (08:38 -0500)]
[libc] Make the opcode parameter a compile time constant
Currently the opcode is only valid if it is the same between all of the
ports. This is possible to violate if the opcode is places into a memory
location and then read in a non-uniform manner by the warp / wavefront.
Moving this to a compile time constant makes it impossible to break this
invariant.
Reviewed By: JonChesterfield
Differential Revision: https://reviews.llvm.org/D150115
Alvin Wong [Sat, 6 May 2023 18:28:44 +0000 (02:28 +0800)]
[X86][MC] Reject `call`/`jmp [offset fn_ref]` in Intel syntax
This syntax is confusing and likely invalid. In addition, MASM rejects
it and GAS seems to behave oddly with it. Therefore we shall reject this
syntax for both unconditional `call` and `jmp` instructions, as
discussed in D149579.
Depends on D150047
Differential Revision: https://reviews.llvm.org/D150048
Alvin Wong [Sat, 6 May 2023 15:27:59 +0000 (23:27 +0800)]
[X86][CodeGen] Do not add `offset` for memory reference using symbol
In the past, D71436 added writing the `offset` operator for some
legitimate cases. However, for memory references in Intel syntax, the
`offset` operator (`[offset sym]`) appears to be superfluous at best,
possibly wrong and contradictory at worst.
This patch bypasses writing the `offset` operator in
`X86AsmPrinter::PrintIntelMemReference` which affects exactly this
case. A similar code flow exists in `X86IntelInstPrinter.cpp` -
`X86IntelInstPrinter::printMemReference`.
The motivation for fixing this output is to allow us to reject the
confusing `call [offset fn_ref]` syntax in MC, as discussed in D149579.
Depends on D149579
Differential Revision: https://reviews.llvm.org/D150047
Alvin Wong [Mon, 1 May 2023 11:03:37 +0000 (19:03 +0800)]
[X86][MC] Fix parsing Intel syntax indirect branch with symbol only
Clang on Windows targets often requires indirect calls through the
import address table (IAT), and also .refptr stubs for MinGW target.
On 32-bit this generates assembly in the form of
`call dword ptr [__imp__func]`, which MC had failed to handle correctly.
64-bit targets are not affected because rip-relative addressing is used.
Reported on: https://github.com/llvm/llvm-project/issues/62010
Depends on D149695, D149920
Differential Revision: https://reviews.llvm.org/D149579
max [Sun, 7 May 2023 23:19:46 +0000 (18:19 -0500)]
[MLIR][python bindings] Add `PyValue.print_as_operand` (`Value::printAsOperand`)
Useful for easier debugging (no need to regex out all of the stuff around the id).
Differential Revision: https://reviews.llvm.org/D149902
Mehdi Amini [Fri, 21 Apr 2023 06:22:03 +0000 (00:22 -0600)]
Adopt Properties to store operations inherent Attributes in the Async dialect
This is part of an on-going migration to adopt Properties inside MLIR.
Differential Revision: https://reviews.llvm.org/D148883
Mehdi Amini [Fri, 21 Apr 2023 06:21:19 +0000 (00:21 -0600)]
Adopt Properties to store operations inherent Attributes in the ARMSVE dialect
This is part of an on-going migration to adopt Properties inside MLIR.
Differential Revision: https://reviews.llvm.org/D148882
Mehdi Amini [Fri, 21 Apr 2023 06:20:50 +0000 (00:20 -0600)]
Adopt Properties to store operations inherent Attributes in the ARMNeon dialect
This is part of an on-going migration to adopt Properties inside MLIR.
Differential Revision: https://reviews.llvm.org/D148881
Mehdi Amini [Fri, 21 Apr 2023 06:17:58 +0000 (00:17 -0600)]
Adopt Properties to store operations inherent Attributes in the AMX dialect
This is part of an on-going migration to adopt Properties inside MLIR.
Differential Revision: https://reviews.llvm.org/D148880
Mehdi Amini [Fri, 21 Apr 2023 05:36:14 +0000 (23:36 -0600)]
Adopt Properties to store operations inherent Attributes in the AMDGPU dialect
This is part of an on-going migration to adopt Properties inside MLIR.
Differential Revision: https://reviews.llvm.org/D148879
Mehdi Amini [Fri, 21 Apr 2023 05:04:00 +0000 (23:04 -0600)]
Adopt Properties to store operations inherent Attributes in the Affine dialect
This is part of an on-going migration to adopt Properties inside MLIR.
Differential Revision: https://reviews.llvm.org/D148878
Jonas Paulsson [Mon, 8 May 2023 13:46:36 +0000 (15:46 +0200)]
[MachineLateInstrsCleanup] Bugfix for handling of kill flags.
With
cb57b7a7, the kill flags are now tracked during the forward search over
the instructions and the call to findRegisterUseOperandIdx() should therefore
only check for killing uses.
As shown with the failing test CodeGen/Hexagon/vector-sint-to-fp.ll, it could
otherwise be the case that an undef use after the instruction that killed the
register will be inserted into MBBKills, and the kill flag will not be
cleared.
Teresa Johnson [Sat, 6 May 2023 14:14:56 +0000 (07:14 -0700)]
[MemProf] Control availability of hot/cold operator new from LTO link
Adds an LTO option to indicate that whether we are linking with an
allocator that supports hot/cold operator new interfaces. If not,
at the start of the LTO backends any existing memprof hot/cold
attributes are removed from the IR, and we also remove memprof metadata
so that post-LTO inlining doesn't add any new attributes.
This is done via setting a new flag in the module summary index. It is
important to communicate via the index to the LTO backends so that
distributed ThinLTO handles this correctly, as they are invoked by
separate clang processes and the combined index is how we communicate
information from the LTO link. Specifically, for distributed ThinLTO the
LTO related processes look like:
```
# Thin link:
$ lld --thinlto-index-only obj1.o ... objN.o -llib ...
# ThinLTO backends:
$ clang -x ir obj1.o -fthinlto-index=obj1.o.thinlto.bc -c -O2
...
$ clang -x ir objN.o -fthinlto-index=objN.o.thinlto.bc -c -O2
```
It is during the thin link (lld --thinlto-index-only) that we have
visibility into linker dependences and want to be able to pass the new
option via -Wl,-supports-hot-cold-new. This will be recorded in the
summary indexes created for the distributed backend processes
(*.thinlto.bc) and queried from there, so that we don't need to know
during those individual clang backends what allocation library was
linked. Since in-process ThinLTO and regular LTO also use a combined
index, for consistency we query the flag out of the index in all LTO
backends.
Additionally, when the LTO option is disabled, exit early from the
MemProfContextDisambiguation handling performed during LTO, as this is
unnecessary.
Depends on D149117 and D149192.
Differential Revision: https://reviews.llvm.org/D149215
Jake Egan [Mon, 8 May 2023 14:52:21 +0000 (10:52 -0400)]
[libc++][AIX] Remove LIBCXX-AIX-FIXME feature from test
This test was originally unsupported for `LIBCXX-AIX-FIXME` feature because we lacked `-fvisibility=hidden` support. AIX now has visibility support and the test passes in debug mode.
Reviewed By: #libc, Mordante
Differential Revision: https://reviews.llvm.org/D149255
Yonghong Song [Fri, 5 May 2023 21:41:13 +0000 (14:41 -0700)]
[Clang][BPF] Type print btf_type_tag properly
When running bcc tool execsnoop ([1]) which is built with latest llvm,
I hit the following error:
$ sudo ./execsnoop.py
/virtual/main.c:99:157: error: expected ')'
data.ppid = ({ typeof(pid_t) _val; __builtin_memset(&_val, 0, sizeof(_val)); bpf_probe_read(&_val, sizeof(_val),
(void *)&({ typeof(struct task_struct btf_type_tag(rcu)*) _val; __builtin_memset(&_val, 0, sizeof(_val));
^
bpf_probe_read(&_val, sizeof(_val), (void *)&task->real_parent); _val; })->tgid); _val; });
The failure reason is due to that the bcc rewriter printed type like
struct task_struct btf_type_tag(rcu)*
where the compiler cannot recognize what 'btf_type_tag(rcu)' is.
The above type is printed in [2] by UnaryOperator->getType().getAsString() (from clang)
in function ProbeVisitor::VisitUnaryOperator.
The original source type looks like ([3])
struct task_struct {
...
struct task_struct __rcu *real_parent;
...
}
where '__rcu' is a macro expanding to '__attribute__((btf_type_tag("rcu")))'.
Let us print btf_type_tag properly in clang so bcc tools and broader type printing
will work properly.
With this patch, the above rewrited source code looks like
data.ppid = ({ typeof(pid_t) _val; __builtin_memset(&_val, 0, sizeof(_val)); bpf_probe_read(&_val, sizeof(_val),
(void *)&({ typeof(struct task_struct __attribute__((btf_type_tag("rcu")))*) _val; __builtin_memset(&_val, 0, sizeof(_val));
bpf_probe_read(&_val, sizeof(_val), (void *)&task->real_parent); _val; })->tgid); _val; });
and execsnoop.py tool can run properly.
[1] https://github.com/iovisor/bcc/blob/master/tools/exitsnoop.py
[2] https://github.com/iovisor/bcc/blob/master/src/cc/frontends/clang/b_frontend_action.cc
[3] https://github.com/torvalds/linux/blob/master/include/linux/sched.h
Differential Revision: https://reviews.llvm.org/D150017
Simon Pilgrim [Mon, 8 May 2023 14:30:33 +0000 (15:30 +0100)]
[X86] vector-reduce-or-bool.ll - add common AVX prefix
Share with AVX512 to reduce duplication
Corentin Jabot [Sat, 6 May 2023 12:45:42 +0000 (14:45 +0200)]
[Clang] Correctly handle allocation in template arguments
Fixes #62462
Reviewed By: #clang-language-wg, erichkeane
Differential Revision: https://reviews.llvm.org/D150036
Dhruv Chawla [Mon, 8 May 2023 14:11:19 +0000 (16:11 +0200)]
[TargetLowering] Fix unnecessary call to `computeKnownBits` (NFCI)
In the SimplifyDemandedBits function, there is a fallthrough to the
default case in the case of ISD::ADD, ISD::MUL and ISD::SUB. This
leads to a call to computeKnownBits which is unnecessary as the
calls to SimplifyDemandedBits in the cases themselves handle the
calculation of the known bits. This information is discarded through
the Known2 variables.
By keeping this information around and calling
KnownBits::mul or KnownBits::computeForAddSub directly, the
unnecessary computation can be avoided. For now, the NSW bit is not
passed through to KnownBits as this is something that
computeKnownBits does not handle either. This requires updating
computeForAddCarry to handle the flag as well.
Differential Revision: https://reviews.llvm.org/D150110
Hristo Hristov [Sat, 6 May 2023 12:41:41 +0000 (15:41 +0300)]
[libc++][spaceship] Implement `operator<=>` for `array`
Implements part of P1614R2 "The Mothership has Landed"
Reviewed By: Mordante, #libc, philnik
Differential Revision: https://reviews.llvm.org/D132265
Samira Bazuzi [Mon, 8 May 2023 13:46:01 +0000 (13:46 +0000)]
[clang][dataflow] Remove deprecated pass-through APIs for DataflowAnalysisContext.
These were recently deprecated in https://reviews.llvm.org/D149464.
Reviewed By: ymandel, gribozavr2, xazax.hun
Differential Revision: https://reviews.llvm.org/D149869
Quentin Colombet [Mon, 8 May 2023 12:20:01 +0000 (14:20 +0200)]
[Transform] Support more case for the transform pad operation
Don't choke on `outs` arguments that are not produced by `tensor.empty` or
`tensor.extract_slice`.
When the `outs` argument has a static shape we have all the necessary
information to proceed with the padding.
This makes the `transform.structured.pad` a little bit more resilient.
Differential Revision: https://reviews.llvm.org/D150112
Tobias Gysi [Mon, 8 May 2023 13:27:49 +0000 (13:27 +0000)]
Revert "[mlir][mem2reg] Expose algorithm internals."
The commit causes build bot failures due to a missing dependencies:
https://buildkite.com/llvm-project/llvm-main/builds/7036#
0187fb40-e4b6-4471-a2a0-
2820b71c727b
This reverts commit
91cff8a71872cf49f0c5c9e5510f8065bfefa3c3.
Akshay Khadse [Mon, 8 May 2023 13:17:51 +0000 (21:17 +0800)]
Reapply [Coverity] Fix explicit null dereferences
This change fixes static code analysis errors
Reviewed By: skan
Differential Revision: https://reviews.llvm.org/D149506
Simon Pilgrim [Mon, 8 May 2023 12:50:26 +0000 (13:50 +0100)]
[X86] avx512-insert-extract.ll - add nounwind to silence cfi noise
Whitney Tsang [Mon, 8 May 2023 13:07:10 +0000 (06:07 -0700)]
[mlir][CallOpInterface] Add `setCalleeFromCallable` method
Currently `CallOpInterface` has a method `getCallableForCallee` to have a consistent way to get the callee from an operation with `CallOpInterface`, but missing a consistent way to set a callee for an operation with `CallOpInterface`.
A set callee method is useful for transformations that operate on `CallOpInterface`, and change the callee, e.g., a pass that specialize function, which clone the callee, and change the `CallOpInterface`'s callee to the cloned version. Without such method, transformation would need to understand the implementation for every operations with `CallOpInterface`, and have a type switch to handle them.
This review adds a method to set callee for operation with `CallOpInterface`.
Reviewed By: gysit, zero9178o
Differential Revision: https://reviews.llvm.org/D149763
Louis Dionne [Mon, 8 May 2023 12:59:01 +0000 (08:59 -0400)]
[libc++] Fix mistake in documentation of libcxx-lit script
Théo Degioanni [Mon, 8 May 2023 11:42:40 +0000 (11:42 +0000)]
[mlir][mem2reg] Expose algorithm internals.
This patch refactors the Mem2Reg infrastructure. It decouples
analysis from promotion, allowing for more control over the execution of
the logic. It also adjusts the interfaces to be less coupled to mem2reg
and more general. This will be useful for an upcoming revision
introducing generic SROA.
Reviewed By: gysit
Differential Revision: https://reviews.llvm.org/D149825
Jacques Pienaar [Mon, 8 May 2023 11:30:48 +0000 (04:30 -0700)]
[mlir][bytecode] Fix typo in DenseElementsAttr.
Was incorrectly marked as DenseIntElementsAttr (only used for
SparseElementsAttr).
Oleksandr "Alex" Zinenko [Mon, 8 May 2023 11:37:49 +0000 (13:37 +0200)]
[mlir] warn about passthrough in LLVM dialect doc
This mechanism has never been intended for anything but prototyping.