platform/upstream/llvm.git
5 years ago[llvm-nm] Update clang tests based on changed llvm-nm output
Jordan Rupprecht [Wed, 3 Oct 2018 23:40:04 +0000 (23:40 +0000)]
[llvm-nm] Update clang tests based on changed llvm-nm output

llvm-svn: 343744

5 years ago[llvm-nm] Update lld tests based on changed llvm-nm output
Jordan Rupprecht [Wed, 3 Oct 2018 23:39:59 +0000 (23:39 +0000)]
[llvm-nm] Update lld tests based on changed llvm-nm output

llvm-svn: 343743

5 years ago[llvm-nm] Print an explicit "no symbols" message when an object file has no symbols
Jordan Rupprecht [Wed, 3 Oct 2018 23:39:49 +0000 (23:39 +0000)]
[llvm-nm] Print an explicit "no symbols" message when an object file has no symbols

Summary:
GNU nm (and other nm implementations, such as "go tool nm") prints an explicit "no symbols" message when an object file has no symbols. Currently llvm-nm just doesn't print anything. Adding an explicit "no symbols" message will allow llvm-nm to be used in place of nm: some scripts and build processes use `nm <file> | grep "no symbols"` as a test to see if a file has no symbols. It will also be more familiar to anyone used to nm.

That said, the format implemented here is slightly different, in that it doesn't print the tool name in the message (which IMHO is not useful to include).

Demo:
```
$ for nm in nm bin/llvm-nm ; do echo "nm implementation: $nm"; $nm /tmp/foo{1,2}.o; echo; done
nm implementation: nm

/tmp/foo1.o:
nm: /tmp/foo1.o: no symbols

/tmp/foo2.o:
0000000000000000 T foo2

nm implementation: bin/llvm-nm

/tmp/foo1.o:
no symbols

/tmp/foo2.o:
0000000000000000 T foo2
```

Reviewers: MaskRay

Reviewed By: MaskRay

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52810

llvm-svn: 343742

5 years ago[RISCV] Handle redundant SplitF64+BuildPairF64 pairs in a DAGCombine
Alex Bradbury [Wed, 3 Oct 2018 23:30:16 +0000 (23:30 +0000)]
[RISCV] Handle redundant SplitF64+BuildPairF64 pairs in a DAGCombine

r343712 performed this optimisation during instruction selection. As Eli
Friedman pointed out in post-commit review, implementing this as a DAGCombine
might allow opportunities for further optimisations.

llvm-svn: 343741

5 years ago[SEMA] split ExtWarn dupl-decl-spec's into Extension and ExtWarn
Nick Desaulniers [Wed, 3 Oct 2018 23:09:29 +0000 (23:09 +0000)]
[SEMA] split ExtWarn dupl-decl-spec's into Extension and ExtWarn

Summary:
For types deduced from typedef's and typeof's, don't warn for duplicate
declaration specifiers in C90 unless -pedantic.

Create a third diagnostic type for duplicate declaration specifiers.
Previously, we had an ExtWarn and a Warning. This change adds a third,
Extension, which only warns when -pedantic is set, staying silent
otherwise.

Fixes PR32985.

Reviewers: rsmith

Reviewed By: rsmith

Subscribers: srhines, cfe-commits

Differential Revision: https://reviews.llvm.org/D52849

llvm-svn: 343740

5 years ago[WebAssembly] Bitselect intrinsic and instruction
Thomas Lively [Wed, 3 Oct 2018 23:02:23 +0000 (23:02 +0000)]
[WebAssembly] Bitselect intrinsic and instruction

Summary: Depends on D52755.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52805

llvm-svn: 343739

5 years agoRevert "[ASTMatchers] Fix DynamicASTMatchersTests again"
Fangrui Song [Wed, 3 Oct 2018 22:56:26 +0000 (22:56 +0000)]
Revert "[ASTMatchers] Fix DynamicASTMatchersTests again"

This reverts commit 8a6631a983ec9c1d22cc77c5f55a524a651740f0.

The last fix seems good in Debug mode.

llvm-svn: 343738

5 years ago[RISCV][NFC] Refactor LocVT<->ValVT converstion in RISCVISelLowering
Alex Bradbury [Wed, 3 Oct 2018 22:53:25 +0000 (22:53 +0000)]
[RISCV][NFC] Refactor LocVT<->ValVT converstion in RISCVISelLowering

There was some duplicated logic for using the LocInfo of a CCValAssign in
order to convert from the ValVT to LocVT or vice versa. Resolve this by
factoring out convertLocVTFromValVT from unpackFromRegLoc. Also rename
packIntoRegLoc to the more appropriate convertValVTToLocVT and call these
helper functions consistently.

llvm-svn: 343737

5 years ago[analyzer] [tests] [quickfix] Make more test more resilient for non-defaut -std.
Artem Dergachev [Wed, 3 Oct 2018 22:48:00 +0000 (22:48 +0000)]
[analyzer] [tests] [quickfix] Make more test more resilient for non-defaut -std.

It is important to specify the version of the standard because tests should
test the same thing regardless of the current default version of the standard.

llvm-svn: 343736

5 years ago[analyzer] Do not crash if the assumption added in TrustNonNullChecker is enough...
George Karpenkov [Wed, 3 Oct 2018 22:31:09 +0000 (22:31 +0000)]
[analyzer] Do not crash if the assumption added in TrustNonNullChecker is enough to make the state unfeasible

rdar://43541814

Differential Revision: https://reviews.llvm.org/D52848

llvm-svn: 343735

5 years ago[WebAssembly] Refactor use of signatures
Derek Schuff [Wed, 3 Oct 2018 22:25:32 +0000 (22:25 +0000)]
[WebAssembly] Refactor use of signatures

Update use of WebAssemblySignature to go along with D52580

Differential Revision: https://reviews.llvm.org/D52622

llvm-svn: 343734

5 years ago[WebAssembly] Refactor WasmSignature and use it for MCSymbolWasm
Derek Schuff [Wed, 3 Oct 2018 22:22:48 +0000 (22:22 +0000)]
[WebAssembly] Refactor WasmSignature and use it for MCSymbolWasm

MCContext does not destroy MCSymbols on shutdown. So, rather than putting
SmallVectors (which may heap-allocate) inside MCSymbolWasm, use unowned pointer
to a WasmSignature instead. The signatures are now owned by the AsmPrinter.
Also uses WasmSignature instead of param and result vectors in TargetStreamer,
and leaves some TODOs for further simplification.

 Differential Revision: https://reviews.llvm.org/D52580

llvm-svn: 343733

5 years agoMinor refacotring of Relocations.cpp. NFC.
Rui Ueyama [Wed, 3 Oct 2018 22:20:26 +0000 (22:20 +0000)]
Minor refacotring of Relocations.cpp. NFC.

This patch splits ThunkCreator::mergeThunks into two smaller functions.
Also adds blank lines to various places so that the code doesn't look
too dense.

llvm-svn: 343732

5 years ago[machineverifier] Detect PHI's that are preceeded by non-PHI's
Daniel Sanders [Wed, 3 Oct 2018 22:05:31 +0000 (22:05 +0000)]
[machineverifier] Detect PHI's that are preceeded by non-PHI's

If present, PHI nodes must appear before non-PHI nodes in a basic block. The
register allocator relies on this and will fail to eliminate PHI's that do not
meet this requirement.

llvm-svn: 343731

5 years ago[mips] Remove -allow-deprecated-dag-overlap flag from tests. NFC
Simon Atanasyan [Wed, 3 Oct 2018 22:02:23 +0000 (22:02 +0000)]
[mips] Remove -allow-deprecated-dag-overlap flag from tests. NFC

Fix DAG check statements in MIPS codegen tests to remove
-allow-deprecated-dag-overlap flag.

llvm-svn: 343730

5 years ago[PPC64] Test documenting toc-restore after interposable recursive call. [NFC]
Sean Fertile [Wed, 3 Oct 2018 21:58:44 +0000 (21:58 +0000)]
[PPC64] Test documenting toc-restore after interposable recursive call. [NFC]

A test verifying that toc restores are properly inserted following recursive
calls, as well as briefly describing why they are needed.

Differential Revision: https://reviews.llvm.org/D52564

llvm-svn: 343729

5 years ago[PPC64] Add test documenting toc-restore when linking with -Bsymbolic. [NFC]
Sean Fertile [Wed, 3 Oct 2018 21:58:42 +0000 (21:58 +0000)]
[PPC64] Add test documenting toc-restore when linking with -Bsymbolic. [NFC]

Differential Revision: https://reviews.llvm.org/D52523

llvm-svn: 343728

5 years ago[InstCombine] allow SimplifyDemandedVectorElts to work with FP binops
Sanjay Patel [Wed, 3 Oct 2018 21:44:59 +0000 (21:44 +0000)]
[InstCombine] allow SimplifyDemandedVectorElts to work with FP binops

We're a long way from D50992 and D51553, but this is where we have to start.
We weren't back-propagating undefs into binop constant values for anything but
add/sub/mul/and/or/xor.

This is likely because we have to be careful about not introducing UB/poison
with div/rem/shift. But I suspect we already are getting the poison part wrong
for add/sub/mul (although it may not be possible to expose the bug currently
because we use SimplifyDemandedVectorElts from a limited set of opcodes).
See the discussion/implementation from D48987 and D49047.

This patch just enables functionality for FP ops because those do not have
UB/poison potential.

llvm-svn: 343727

5 years agoFix buildbot regression by rL339929: NameError: global name 'test_directory' is not...
Jan Kratochvil [Wed, 3 Oct 2018 21:42:54 +0000 (21:42 +0000)]
Fix buildbot regression by rL339929: NameError: global name 'test_directory' is not defined

With buildbot slave under test - I get after rL339929:
http://lab.llvm.org:8014/builders/lldb-x86_64-fedora-28-cmake/builds/243/steps/test1/logs/stdio

  File "/home/buildbot/lldbroot/lldb-x86_64-fedora-28-cmake/scripts/../llvm/tools/lldb/test/dotest.py", line 7, in <module>
    lldbsuite.test.run_suite()
  File "/quad/home/buildbot/lldbroot/lldb-x86_64-fedora-28-cmake/llvm/tools/lldb/packages/Python/lldbsuite/test/dotest.py", line 1177, in run_suite
    configuration.results_formatter_object)
  File "/quad/home/buildbot/lldbroot/lldb-x86_64-fedora-28-cmake/llvm/tools/lldb/packages/Python/lldbsuite/test/dosep.py", line 1692, in main
    dst = core.replace(test_directory, "")[1:]
NameError: global name 'test_directory' is not defined

Patch by Vedant Kumar.

Differential Revision: https://reviews.llvm.org/D51874

llvm-svn: 343726

5 years ago[libc++][NFC] Add error messages to a couple of static_asserts in span
Louis Dionne [Wed, 3 Oct 2018 21:36:16 +0000 (21:36 +0000)]
[libc++][NFC] Add error messages to a couple of static_asserts in span

Summary:
Add error messages to a couple of static_asserts in span to match the
style used in the rest of the file. Also fix an extra paren typo in a
assert error message.

Committed on behalf of Jason Lovett.

Reviewers: ldionne

Subscribers: libcxx-commits

Differential Revision: https://reviews.llvm.org/D52841

llvm-svn: 343725

5 years agoMake meanings of variables clearer in action table generation (NFC)
Heejin Ahn [Wed, 3 Oct 2018 21:30:15 +0000 (21:30 +0000)]
Make meanings of variables clearer in action table generation (NFC)

Summary:

Reviewers: kristina, zhmu, dschuff, rnk

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52680

llvm-svn: 343724

5 years ago[X86] Stop promoting vector ISD::SELECT to vXi64.
Craig Topper [Wed, 3 Oct 2018 21:10:29 +0000 (21:10 +0000)]
[X86] Stop promoting vector ISD::SELECT to vXi64.

The additional patterns needed for this aren't overwhelming and introducing extra bitcasts during lowering limits our ability to do computeNumSignBits. Not that I have a good example of that for select. I'm just becoming increasingly grumpy about promotion of AND/OR/XOR. SELECT was just a lot easier to fix.

llvm-svn: 343723

5 years ago[ASTMatchers] Fix DynamicASTMatchersTests again
Fangrui Song [Wed, 3 Oct 2018 21:00:44 +0000 (21:00 +0000)]
[ASTMatchers] Fix DynamicASTMatchersTests again

llvm-svn: 343722

5 years ago[test] Fix -Wunused-variable in rC343665
Fangrui Song [Wed, 3 Oct 2018 20:53:53 +0000 (20:53 +0000)]
[test] Fix -Wunused-variable in rC343665

llvm-svn: 343721

5 years agoRemove stray character from docs
Stephen Kelly [Wed, 3 Oct 2018 20:53:02 +0000 (20:53 +0000)]
Remove stray character from docs

llvm-svn: 343720

5 years agoUpdate documentation for correctness
Stephen Kelly [Wed, 3 Oct 2018 20:52:57 +0000 (20:52 +0000)]
Update documentation for correctness

llvm-svn: 343719

5 years agoAdding skipIf to std::variant libc++ data-formatter test since get is not available...
Shafik Yaghmour [Wed, 3 Oct 2018 20:52:56 +0000 (20:52 +0000)]
Adding skipIf to std::variant libc++ data-formatter test since get is not available before macOS 10.14

Patch by Shafik Yaghmour

llvm-svn: 343718

5 years agoAdd matchers missing from dynamic AST registry
Stephen Kelly [Wed, 3 Oct 2018 20:52:51 +0000 (20:52 +0000)]
Add matchers missing from dynamic AST registry

llvm-svn: 343717

5 years agoSort list of matchers
Stephen Kelly [Wed, 3 Oct 2018 20:52:45 +0000 (20:52 +0000)]
Sort list of matchers

llvm-svn: 343716

5 years ago[analyzer] [tests] [quickfix] Make the test more resilient for a non-defaut std confi...
George Karpenkov [Wed, 3 Oct 2018 20:46:50 +0000 (20:46 +0000)]
[analyzer] [tests] [quickfix] Make the test more resilient for a non-defaut std configuration

llvm-svn: 343715

5 years ago[InstCombine] add tests for binop undef-into-constant propagation; NFC
Sanjay Patel [Wed, 3 Oct 2018 20:35:25 +0000 (20:35 +0000)]
[InstCombine] add tests for binop undef-into-constant propagation; NFC

llvm-svn: 343714

5 years ago[X86] Add CMOV_VK2/VK4 pseudos and remove lowering code that turned v2i1/v4i1 SELECT...
Craig Topper [Wed, 3 Oct 2018 20:28:43 +0000 (20:28 +0000)]
[X86] Add CMOV_VK2/VK4 pseudos and remove lowering code that turned v2i1/v4i1 SELECT into v8i1.

llvm-svn: 343713

5 years ago[RISCV][NFCI] Handle redundant splitf64+buildpairf64 pairs during instruction selection
Alex Bradbury [Wed, 3 Oct 2018 20:12:10 +0000 (20:12 +0000)]
[RISCV][NFCI] Handle redundant splitf64+buildpairf64 pairs during instruction selection

Although we can't write a tablegen pattern to remove redundant
splitf64+buildf64 pairs due to the multiple return values, we can handle it
with some C++ selection code. This is simpler than removing them after
instruction selection through RISCVDAGToDAGISel::PostprocessISelDAG, as was
done previously.

llvm-svn: 343712

5 years ago[OPENMP] Add reverse_offload clause to requires directive
Patrick Lyster [Wed, 3 Oct 2018 20:07:58 +0000 (20:07 +0000)]
[OPENMP] Add reverse_offload clause to requires directive

llvm-svn: 343711

5 years ago[X86] Add CMOV pseudos for VR128X and VR256X register classes. Use them when AVX512VL...
Craig Topper [Wed, 3 Oct 2018 19:48:26 +0000 (19:48 +0000)]
[X86] Add CMOV pseudos for VR128X and VR256X register classes. Use them when AVX512VL is enabled.

This allows the phi nodes to be generated with the correct register class when expanded.

llvm-svn: 343710

5 years ago[X86] Don't break CMOV pseudo instructions down by type. Just by register class.
Craig Topper [Wed, 3 Oct 2018 19:48:23 +0000 (19:48 +0000)]
[X86] Don't break CMOV pseudo instructions down by type. Just by register class.

The register class is all that's important for the pseudo instructions. We can use patterns to handle the different types.

llvm-svn: 343709

5 years ago[X86] PUSH/POP 'mem-mem' instructions are not RMW - these are 2 different addresses
Simon Pilgrim [Wed, 3 Oct 2018 19:02:38 +0000 (19:02 +0000)]
[X86] PUSH/POP 'mem-mem' instructions are not RMW - these are 2 different addresses

This patch adds a 'WriteCopy' [WriteLoad, WriteStore] schedule sequence instead to better model the behaviour

Found by @andreadb during llvm-mca testing on btver2 which was crashing on "zero uop" WriteRMW only instructions

llvm-svn: 343708

5 years agoAdd template type and value parameter metadata nodes to template variable specializations
Matthew Voss [Wed, 3 Oct 2018 18:45:04 +0000 (18:45 +0000)]
Add template type and value parameter metadata nodes to template variable specializations

Summary: Add an optional attribute referring to a tuple of type and value template parameter nodes to the DIGlobalVariable node. This allows us to record the parameters of template variable specializations.

Reviewers: dblaikie, aprantl, probinson, JDevlieghere, clayborg, jingham

Reviewed By: JDevlieghere

Subscribers: cfe-commits

Tags: #debug-info

Differential Revision: https://reviews.llvm.org/D52058

llvm-svn: 343707

5 years agoEmit template type and value parameter DIEs for template variables.
Matthew Voss [Wed, 3 Oct 2018 18:44:53 +0000 (18:44 +0000)]
Emit template type and value parameter DIEs for template variables.

Summary:
Ensure the TemplateParam attribute of the DIGlobalVariable node is translated into the proper DIEs.

Resolves https://bugs.llvm.org/show_bug.cgi?id=22119

Reviewers: dblaikie, probinson, aprantl, JDevlieghere, clayborg, whitequark, deadalnix

Reviewed By: dblaikie

Subscribers: llvm-commits

Tags: #debug-info

Differential Revision: https://reviews.llvm.org/D52057

llvm-svn: 343706

5 years ago[X86] Move Atomic binops to use WriteALURMW schedule class
Simon Pilgrim [Wed, 3 Oct 2018 18:38:28 +0000 (18:38 +0000)]
[X86] Move Atomic binops to use WriteALURMW schedule class

These were being tagged as <WriteALULd, WriteRMW> instead of properly using the RMW sequence

llvm-svn: 343705

5 years ago[COFF] Cope with weak aliases produced by GNU tools
Martin Storsjo [Wed, 3 Oct 2018 18:31:53 +0000 (18:31 +0000)]
[COFF] Cope with weak aliases produced by GNU tools

When GNU tools create a weak alias, they produce a strong symbol
named .weak.<weaksymbol>.<relatedstrongsymbol>.

GNU ld allows many such weak alternatives for the same weak symbol, and
the linker picks the first one encountered.

This can't be reproduced by assembling from .s files, since llvm-mc
produces symbols named .weak.<weaksymbol>.default in these cases.

Differential Revision: https://reviews.llvm.org/D52601

llvm-svn: 343704

5 years ago[clang-doc] Avoid parsing undefined base classes
Julie Hockett [Wed, 3 Oct 2018 18:25:27 +0000 (18:25 +0000)]
[clang-doc] Avoid parsing undefined base classes

Don't try to parse base classes for declarations that are not
definitions (segfaults, as there is no DefinitionData to access).

Differential Revision: https://reviews.llvm.org/D52313

llvm-svn: 343703

5 years ago[test] Use --sysroot instead of -B in print-multi-directory.c
Martin Storsjo [Wed, 3 Oct 2018 18:24:05 +0000 (18:24 +0000)]
[test] Use --sysroot instead of -B in print-multi-directory.c

This avoids finding a similar matching GCC installation outside
of the test directory tree in the surrounding environment, which
would make the test fail. (This happened on Ubuntu 16.04.)

Differential Revision: https://reviews.llvm.org/D52533

llvm-svn: 343702

5 years ago[X86][Btver2] Fix MMX PSHUFB schedule
Simon Pilgrim [Wed, 3 Oct 2018 18:18:50 +0000 (18:18 +0000)]
[X86][Btver2] Fix MMX PSHUFB schedule

Match AMD Fam16h SOG + llvm-exegesis tests

llvm-svn: 343701

5 years ago[X86] Move Atomic CMPXCHG to WriteCMPXCHGRMW schedule class
Simon Pilgrim [Wed, 3 Oct 2018 18:05:01 +0000 (18:05 +0000)]
[X86] Move Atomic CMPXCHG to WriteCMPXCHGRMW schedule class

llvm-svn: 343700

5 years ago[COFF, ARM64] Add _ReadWriteBarrier intrinsic
Mandeep Singh Grang [Wed, 3 Oct 2018 17:24:21 +0000 (17:24 +0000)]
[COFF, ARM64] Add _ReadWriteBarrier intrinsic

Reviewers: rnk, mstorsjo, compnerd, TomTan, haripul, javed.absar

Reviewed By: rnk

Subscribers: kristof.beyls, chrib, jfb, cfe-commits

Differential Revision: https://reviews.llvm.org/D52809

llvm-svn: 343699

5 years agolld-link: Several tweaks to default entry point selection.
Nico Weber [Wed, 3 Oct 2018 17:01:39 +0000 (17:01 +0000)]
lld-link: Several tweaks to default entry point selection.

Three related changes:

1. link.exe uses the presence of main and wmain to decide if it should call
   mainCRTStartup or wmainCRTStartup, even if /nodefaultlib is passed. For
   compatibility, remove FindMain logic.

2. Default to the non-wide entrypoint if main is not found. This has two effects:

2a. In normal links, lld-link now prints

        lld-link: error: undefined symbol: _main
        >>> referenced by f:\dd\vctools\crt\vcstartup\src\startup\exe_common.inl:78
        >>>               libcmt.lib(exe_main.obj):("int __cdecl invoke_main(void)" (?invoke_main@@YAHXZ))
        >>> referenced by f:\dd\vctools\crt\vcstartup\src\startup\exe_common.inl:283
        >>>               libcmt.lib(exe_main.obj):("int __cdecl __scrt_common_main_seh(void)" (?__scrt_common_main_seh@@YAHXZ))

    instead of

        lld-link: error: entry point must be defined

    This is arguably a better error message, since it now mentions that _main is
    missing. (This matches link.exe's diagnostic in this case.)

2b. With /nodefautlib, we now default to mainCRTStartup if no main() is
    present, again matching link.exe. This makes r337407 obsolete.

This means if you have a cc file containing both mainCRTStartup and
wmainCRTStartup and you pass /nodefaultlib /subsystem:console, lld-link will
now call mainCRTStartup, matching link.exe

3. Print a warning if both main and wmain are present, similar to link.exe's
   LNK4067.

Differential Revision: https://reviews.llvm.org/D52832

llvm-svn: 343698

5 years ago[X86] Add SkylakeClient uops counter - same as the other Intel models.
Simon Pilgrim [Wed, 3 Oct 2018 16:45:26 +0000 (16:45 +0000)]
[X86] Add SkylakeClient uops counter - same as the other Intel models.

llvm-svn: 343697

5 years agoCorrect implementation of -verify-machineinstrs such that it's still overridable...
Daniel Sanders [Wed, 3 Oct 2018 16:29:24 +0000 (16:29 +0000)]
Correct implementation of -verify-machineinstrs such that it's still overridable for EXPENSIVE_CHECKS

-verify-machineinstrs was implemented as a simple bool. As a result, the
'VerifyMachineCode == cl::BOU_UNSET' used by EXPENSIVE_CHECKS to make it on by
default but possible to disable didn't work as intended. Changed
-verify-machineinstrs to a boolOrDefault to correct this.

llvm-svn: 343696

5 years agoSkip test with older versions of clang
Adrian Prantl [Wed, 3 Oct 2018 16:24:14 +0000 (16:24 +0000)]
Skip test with older versions of clang

llvm-svn: 343695

5 years ago[InstCombine] clean up foldVectorBinop(); NFC
Sanjay Patel [Wed, 3 Oct 2018 15:46:03 +0000 (15:46 +0000)]
[InstCombine] clean up foldVectorBinop(); NFC

1. Fix include ordering.
2. Improve variable name (width is bitwidth not number-of-elements).
3. Add local Opcode variable to reduce code duplication.

llvm-svn: 343694

5 years ago[globalisel][combines] Don't sink G_TRUNC down to use if that use is a G_PHI
Daniel Sanders [Wed, 3 Oct 2018 15:43:39 +0000 (15:43 +0000)]
[globalisel][combines] Don't sink G_TRUNC down to use if that use is a G_PHI

This fixes a problem where the register allocator fails to eliminate a PHI
because there's a non-PHI in the middle of the PHI instructions at the start
of a BB.

This G_TRUNC can be better placed but this at least fixes the correctness issue
quickly. I'll follow up with a patch to the verifier to catch this kind of bug
in future.

llvm-svn: 343693

5 years ago[InstCombine] name change: foldShuffledBinop -> foldVectorBinop; NFC
Sanjay Patel [Wed, 3 Oct 2018 15:20:58 +0000 (15:20 +0000)]
[InstCombine] name change: foldShuffledBinop -> foldVectorBinop; NFC

This function will deal with more than shuffles with D50992, and I
have another potential per-element fold that could live here.

llvm-svn: 343692

5 years ago[llvm-mca] Add support for move elimination in class RegisterFile.
Andrea Di Biagio [Wed, 3 Oct 2018 15:02:44 +0000 (15:02 +0000)]
[llvm-mca] Add support for move elimination in class RegisterFile.

This patch teaches class RegisterFile how to analyze register writes from
instructions that are move elimination candidates.
In particular, it teaches it how to check if a move can be effectively eliminated
by the underlying PRF, and (if necessary) how to perform move elimination.

The long term goal is to allow processor models to describe instructions that
are valid move elimination candidates.
The idea is to let register file definitions in tablegen declare if/when moves
can be eliminated.

This patch is a non functional change.
The logic that performs move elimination is currently disabled.  A future patch
will add support for move elimination in the processor models, and enable this
new code path.

llvm-svn: 343691

5 years ago[llvm-exegesis] Avoid yaml parser from calling sscanf for obvious non-matches (PR39102)
Simon Pilgrim [Wed, 3 Oct 2018 14:51:09 +0000 (14:51 +0000)]
[llvm-exegesis] Avoid yaml parser from calling sscanf for obvious non-matches (PR39102)

deserializeMCOperand - ensure that we at least match the first character of the sscanf pattern before calling

This reduces llvm-exegesis uops analysis of the instructions supported from btver2 from 5m13s to 2m1s on debug builds.

llvm-svn: 343690

5 years ago[X86] Correctly use SSE registers if no-x87 is selected.
Nirav Dave [Wed, 3 Oct 2018 14:13:30 +0000 (14:13 +0000)]
[X86] Correctly use SSE registers if no-x87 is selected.

Fix use of SSE1 registers for f32 ops in no-x87 mode.

Notably, allow use of SSE instructions for f32 operations in 64-bit
mode (but not 32-bit which is disallowed by callign convention).

Also avoid translating memset/memcopy/memmove into SSE registers
without X87 for 32-bit mode.

This fixes PR38738.

Reviewers: nickdesaulniers, craig.topper

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D52555

llvm-svn: 343689

5 years ago[RISCV][NFC] Refactor RISCVDAGToDAGISel::Select
Alex Bradbury [Wed, 3 Oct 2018 13:13:13 +0000 (13:13 +0000)]
[RISCV][NFC] Refactor RISCVDAGToDAGISel::Select

Introduce and use a switch on the opcode.

llvm-svn: 343688

5 years ago[ThinLTO]Expose cache entry expiration time option in llvm-lto and fix a test
James Henderson [Wed, 3 Oct 2018 13:00:20 +0000 (13:00 +0000)]
[ThinLTO]Expose cache entry expiration time option in llvm-lto and fix a test

Two cases in a ThinLTO test were passing for the wrong reasons, since
rL340374. The tests were supposed to be testing that files were being
pruned due to the cache size, but they were in fact being pruned because
they were older than the default expiration period of 1 week.

This change fixes the tests by explicitly setting the expiration time to
the maximum value. This required the option to be exposed in llvm-lto.

By assigning all files in the cache a similar time, it is possible to see
that the newest files are still being kept, and that we aren't passing
for the wrong reason again. In the event that the entry expiration were
to expire for them, then the test would start failing, because these
files would be removed too.

Reviewed by: rnk, inglorion

Differential Revision: https://reviews.llvm.org/D51992

llvm-svn: 343687

5 years ago[RA CopyHints] Fix compile-time regression
Jonas Paulsson [Wed, 3 Oct 2018 12:51:19 +0000 (12:51 +0000)]
[RA CopyHints] Fix compile-time regression

This patch makes sure that a register is only hinted once to RA. In extreme
cases the same register can otherwise be hinted numerous times and cause a
compile time slowdown.

Review: Simon Pilgrim
https://reviews.llvm.org/D52826

llvm-svn: 343686

5 years ago[llvm-exegesis][NFC] Revert rL343682 "Fix unused variable warning".
Clement Courbet [Wed, 3 Oct 2018 12:48:50 +0000 (12:48 +0000)]
[llvm-exegesis][NFC] Revert rL343682 "Fix unused variable warning".

That was not the proper fix: the variable is used in debug mode.

llvm-svn: 343685

5 years ago[llvm-exegesis] Fix rL343680 in release mode.
Clement Courbet [Wed, 3 Oct 2018 12:35:35 +0000 (12:35 +0000)]
[llvm-exegesis] Fix rL343680 in release mode.

llvm-svn: 343684

5 years agoPull FixupBreakpointPCAsNeeded into base class
Pavel Labath [Wed, 3 Oct 2018 12:29:33 +0000 (12:29 +0000)]
Pull FixupBreakpointPCAsNeeded into base class

Summary:
This function existed (with identical code) in both NativeProcessLinux
and NativeProcessNetBSD, and it is likely that it would be useful to any
future implementation of NativeProcessProtocol.

Therefore I move it to the base class.

Reviewers: krytarowski

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D52719

llvm-svn: 343683

5 years ago[llvm-exegesis][NFC] Fix unused variable warning.
Clement Courbet [Wed, 3 Oct 2018 12:27:43 +0000 (12:27 +0000)]
[llvm-exegesis][NFC] Fix unused variable warning.

llvm-svn: 343682

5 years agoThread safety analysis: Unwrap __builtin_expect in getTrylockCallExpr
Aaron Puchert [Wed, 3 Oct 2018 11:58:19 +0000 (11:58 +0000)]
Thread safety analysis: Unwrap __builtin_expect in getTrylockCallExpr

Summary:
When people are really sure they'll get the lock they sometimes use
__builtin_expect. It's also used by some assertion implementations.
Asserting that try-lock succeeded is basically the same as asserting
that the lock is not held by anyone else (and acquiring it).

Reviewers: aaron.ballman, delesley

Reviewed By: aaron.ballman

Subscribers: kristina, cfe-commits

Differential Revision: https://reviews.llvm.org/D52398

llvm-svn: 343681

5 years ago[llvm-exegesis] Resolve variant classes in analysis.
Clement Courbet [Wed, 3 Oct 2018 11:50:25 +0000 (11:50 +0000)]
[llvm-exegesis] Resolve variant classes in analysis.

Summary: See PR38884.

Reviewers: gchatelet

Subscribers: tschuett, RKSimon, llvm-commits

Differential Revision: https://reviews.llvm.org/D52825

llvm-svn: 343680

5 years ago[RISCV] Gate float<->int and double<->int conversion patterns on IsRV32
Alex Bradbury [Wed, 3 Oct 2018 11:35:22 +0000 (11:35 +0000)]
[RISCV] Gate float<->int and double<->int conversion patterns on IsRV32

The patterns as defined are correct only when XLen==32.

This is another preparatory patch for a set of patches that flesh out RV64
codegen.

llvm-svn: 343679

5 years ago[RISCV] Remove XLenVT==i32 assumptions from RISCVInstrInfo td
Alex Bradbury [Wed, 3 Oct 2018 11:14:26 +0000 (11:14 +0000)]
[RISCV] Remove XLenVT==i32 assumptions from RISCVInstrInfo td

1. brcond operates on an condition.
2. atomic_fence and the pseudo AMO instructions should all take xlen immediates

This allows the same definitions and patterns to work for RV64 (XLenVT==i64).

llvm-svn: 343678

5 years ago[RISCV] Gate simm32 materialisation pattern and SW pattern on IsRV32
Alex Bradbury [Wed, 3 Oct 2018 11:04:59 +0000 (11:04 +0000)]
[RISCV] Gate simm32 materialisation pattern and SW pattern on IsRV32

These patterns are not correct for RV64.

llvm-svn: 343677

5 years ago[LoopInterchange] Remove unused variable PreserveLCSSA (NFC).
Florian Hahn [Wed, 3 Oct 2018 11:01:23 +0000 (11:01 +0000)]
[LoopInterchange] Remove unused variable PreserveLCSSA (NFC).

llvm-svn: 343676

5 years ago[RISCV] Remove RV64 test lines from umulo-128-legalisation-lowering.ll
Alex Bradbury [Wed, 3 Oct 2018 10:59:42 +0000 (10:59 +0000)]
[RISCV] Remove RV64 test lines from umulo-128-legalisation-lowering.ll

The generated code is incorrect anyway, and this test adds noise to the
upcoming set of patches that flesh out RV64 support.

llvm-svn: 343675

5 years ago[CodeGen] NFC fix pedantic warning from extra semicolon
Jonas Toth [Wed, 3 Oct 2018 10:59:19 +0000 (10:59 +0000)]
[CodeGen] NFC fix pedantic warning from extra semicolon

llvm-svn: 343674

5 years ago[clang-tidy] NFC reorder registering in CppCoreGuidelines module
Jonas Toth [Wed, 3 Oct 2018 10:37:19 +0000 (10:37 +0000)]
[clang-tidy] NFC reorder registering in CppCoreGuidelines module

llvm-svn: 343673

5 years ago[AMDGPU] Fix for negative offsets in buffer/tbuffer intrinsics
Tim Renouf [Wed, 3 Oct 2018 10:29:43 +0000 (10:29 +0000)]
[AMDGPU] Fix for negative offsets in buffer/tbuffer intrinsics

Summary:
The new buffer/tbuffer intrinsics handle an out-of-range immediate
offset by moving/adding offset&-4096 to a vgpr, leaving an in-range
immediate offset, with a chance of the move/add being CSEd for similar
loads/stores.

However it turns out that a negative offset in a vgpr is illegal, even
if adding the immediate offset makes it legal again.

Therefore, this commit disables the offset&-4096 thing if the offset is
negative.

Differential Revision: https://reviews.llvm.org/D52683

Change-Id: Ie02f0a74f240a138dc2a29d17cfbd9e350e4ed13
llvm-svn: 343672

5 years ago[X86][Btver2] Most RMW instructions don't require an additional uop
Simon Pilgrim [Wed, 3 Oct 2018 10:28:43 +0000 (10:28 +0000)]
[X86][Btver2] Most RMW instructions don't require an additional uop

Remove uop on WriteRMW and move it into the few instructions that need it.

Match AMD Fam16h SOG + llvm-exegesis tests

llvm-svn: 343671

5 years ago[X86] ALU/ADC RMW instructions should use the WriteRMW sequence class
Simon Pilgrim [Wed, 3 Oct 2018 10:01:13 +0000 (10:01 +0000)]
[X86] ALU/ADC RMW instructions should use the WriteRMW sequence class

I was expecting this to be a nfc but Silvermont seems to be setup a little differently:

// A folded store needs a cycle on MEC_RSV for the store data, but it does not need an extra port cycle to recompute the address.
def : WriteRes<WriteRMW, [SLM_MEC_RSV]>;

So moving from WriteStore to WriteRMW reduces predicted port pressure, confirmed by @craig.topper that this is correct.

Differential Revision: https://reviews.llvm.org/D52740

llvm-svn: 343670

5 years ago[ELF] - Fix BB after r343668
George Rimar [Wed, 3 Oct 2018 09:59:08 +0000 (09:59 +0000)]
[ELF] - Fix BB after r343668

This stops testing the value of .rela.plt section offset.

Also makes _start global to eliminate
'cannot find entry symbol _start' warning.

llvm-svn: 343669

5 years ago[ELF] - Do not forget to include to .dymsym symbols that were converted to Defined.
George Rimar [Wed, 3 Oct 2018 09:33:00 +0000 (09:33 +0000)]
[ELF] - Do not forget to include to .dymsym symbols that were converted to Defined.

This is the fix for
"Bug 39104 - LLD links incorrect ELF executable if version script contains "local: *;"
(https://bugs.llvm.org/show_bug.cgi?id=39104).

The issue happens when we have non-PIC program call to function in a shared library.
(for example, the PR above has R_X86_64_PC32 relocation against __libc_start_main)

LLD converts symbol to Defined in that case with the use of replaceWithDefined()

The issue is that after above we create a broken relocation because do not
include the symbol into .dynsym.

That happens when the version script is used because we treat the symbol as
STB_LOCAL if the following condition match:
VersionId == VER_NDX_LOCAL && isDefined() and do not include it to
.dynsym because of that. Patch fixes the issue.

Differential revision: https://reviews.llvm.org/D52724

llvm-svn: 343668

5 years ago[LLD] - Do not crash when reporting errors when .debug_line_str (DWARF5) is used
George Rimar [Wed, 3 Oct 2018 08:59:46 +0000 (08:59 +0000)]
[LLD] - Do not crash when reporting errors when .debug_line_str (DWARF5) is used

Imagine we have the following code:

int foo();
int main() { return foo(); }

It will crash if you try to compile it with
`clang -O0 -gdwarf-5 test.cpp -o test -g -fuse-ld=lld`

The crash happens inside the LLVM DWARF parser because LLD does not provide
the .debug_line_str section. At the same time for correct parsing and reporting,
we anyways need to provide this section from our side.

The patch fixes the issue.

llvm-svn: 343667

5 years ago[clang-query] Add comment token handling
Stephen Kelly [Wed, 3 Oct 2018 08:21:54 +0000 (08:21 +0000)]
[clang-query] Add comment token handling

Summary:
It is possible to pass a file of commands to clang-query using the
command line option -f or --preload.  Make it possible to write comments
in such files.

Reviewers: aaron.ballman

Reviewed By: aaron.ballman

Subscribers: mgorny, cfe-commits

Differential Revision: https://reviews.llvm.org/D52752

llvm-svn: 343666

5 years agoAllow comments with '#' in dynamic AST Matchers
Stephen Kelly [Wed, 3 Oct 2018 07:56:43 +0000 (07:56 +0000)]
Allow comments with '#' in dynamic AST Matchers

Summary: This is necessary for clang-query to be able to handle comments.

Reviewers: aaron.ballman

Reviewed By: aaron.ballman

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D52751

llvm-svn: 343665

5 years ago[clang-query] Add single-letter 'q' alias for 'quit'
Stephen Kelly [Wed, 3 Oct 2018 07:52:44 +0000 (07:52 +0000)]
[clang-query] Add single-letter 'q' alias for 'quit'

Reviewers: aaron.ballman, pcc

Reviewed By: aaron.ballman

Subscribers: Szelethus, cfe-commits

Differential Revision: https://reviews.llvm.org/D52746

llvm-svn: 343664

5 years agoImprove static analysis of cold basic blocks
Aditya Kumar [Wed, 3 Oct 2018 06:21:05 +0000 (06:21 +0000)]
Improve static analysis of cold basic blocks

Differential Revision: https://reviews.llvm.org/D52704

Reviewers: sebpop, tejohnson, brzycki, SirishP
Reviewed By: sebpop

llvm-svn: 343663

5 years agoAdd support for new pass manager
Aditya Kumar [Wed, 3 Oct 2018 05:55:20 +0000 (05:55 +0000)]
Add support for new pass manager

Modified the testcases to use both pass managers
Use single commandline flag for both pass managers.

Differential Revision: https://reviews.llvm.org/D52708
Reviewers: sebpop, tejohnson, brzycki, SirishP
Reviewed By: tejohnson, brzycki

llvm-svn: 343662

5 years agoFix compilation warning by removing unused variable [NFC]
Mikael Holmen [Wed, 3 Oct 2018 05:41:14 +0000 (05:41 +0000)]
Fix compilation warning by removing unused variable [NFC]

clang complained with

../tools/clang/tools/extra/clangd/FS.cpp:19:12: error: unused variable 'Err' [-Werror,-Wunused-variable]
  if (auto Err = FS.makeAbsolute(PathStore))
           ^
1 error generated.

llvm-svn: 343661

5 years ago[Frontend] Delete -print-decl-contexts
Fangrui Song [Wed, 3 Oct 2018 03:50:44 +0000 (03:50 +0000)]
[Frontend] Delete -print-decl-contexts

Summary: Its job is covered by -ast-dump. The option is rarely used and lacks many AST nodes which will lead to llvm_unreachable() crash.

Reviewers: rsmith, arphaman

Reviewed By: rsmith

Subscribers: jfb, cfe-commits

Differential Revision: https://reviews.llvm.org/D52529

llvm-svn: 343660

5 years ago[AMDGPU] Rename pass "isel" to "amdgpu-isel"
Fangrui Song [Wed, 3 Oct 2018 03:38:22 +0000 (03:38 +0000)]
[AMDGPU] Rename pass "isel" to "amdgpu-isel"

Summary: The AMDGPU target specific pass "isel" is a misleading name.

Reviewers: tstellar, echristo, javed.absar, arsenm

Reviewed By: arsenm

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D52759

llvm-svn: 343659

5 years ago[globalisel] Fix one more missing Verifier pass from gisel-commandline-option.ll
Daniel Sanders [Wed, 3 Oct 2018 02:52:54 +0000 (02:52 +0000)]
[globalisel] Fix one more missing Verifier pass from gisel-commandline-option.ll

llvm-svn: 343658

5 years agoAMDGPU: Always run AMDGPUAlwaysInline
Matt Arsenault [Wed, 3 Oct 2018 02:47:25 +0000 (02:47 +0000)]
AMDGPU: Always run AMDGPUAlwaysInline

Even if calls are enabled, it still needs to be run
for forcing inline of functions that use LDS.

llvm-svn: 343657

5 years agoAdd atomicrmw operation to error messages
Matt Arsenault [Wed, 3 Oct 2018 02:37:15 +0000 (02:37 +0000)]
Add atomicrmw operation to error messages

llvm-svn: 343656

5 years agoAdd the missing new files from r343654
Daniel Sanders [Wed, 3 Oct 2018 02:21:30 +0000 (02:21 +0000)]
Add the missing new files from r343654

llvm-svn: 343655

5 years agoRe-commit: [globalisel] Add a combiner helpers for extending loads and use them in...
Daniel Sanders [Wed, 3 Oct 2018 02:12:17 +0000 (02:12 +0000)]
Re-commit: [globalisel] Add a combiner helpers for extending loads and use them in a pre-legalize combiner for AArch64

Summary: Depends on D45541

Reviewers: ab, aditya_nandakumar, bogner, rtereshin, volkan, rovka, javed.absar, aemerson

Subscribers: aemerson, rengolin, mgorny, javed.absar, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D45543

The previous commit failed portions of the test-suite on GreenDragon due to
duplicate COPY instructions and iterator invalidation. Both issues have now
been fixed. To assist with this, a helper (cloneVirtualRegister) has been added
to MachineRegisterInfo that can be used to get another register that has the same
type and class/bank as an existing one.

llvm-svn: 343654

5 years agoOpenCL: Mark printf format string argument
Matt Arsenault [Wed, 3 Oct 2018 02:01:19 +0000 (02:01 +0000)]
OpenCL: Mark printf format string argument

Fixes not warning on format string errors.

llvm-svn: 343653

5 years ago[CMake][Fuchsia] Use libc++ ABIv2 for Fuchsia toolchain
Petr Hosek [Wed, 3 Oct 2018 01:27:00 +0000 (01:27 +0000)]
[CMake][Fuchsia] Use libc++ ABIv2 for Fuchsia toolchain

We don't need to provide stable ABI and hence we can use the v2.

Differential Revision: https://reviews.llvm.org/D52660

llvm-svn: 343652

5 years agoMark two tests, which require too much available VM, as "UNSUPPORTED: ios".
Kuba Mracek [Wed, 3 Oct 2018 00:30:03 +0000 (00:30 +0000)]
Mark two tests, which require too much available VM, as "UNSUPPORTED: ios".

llvm-svn: 343650

5 years ago[WebAssembly] any_true and all_true intrinsics and instructions
Thomas Lively [Wed, 3 Oct 2018 00:19:39 +0000 (00:19 +0000)]
[WebAssembly] any_true and all_true intrinsics and instructions

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52755

llvm-svn: 343649

5 years ago[AMDGPU] Assert in getOpSize() there are no sub-dword subregs
Stanislav Mekhanoshin [Wed, 3 Oct 2018 00:00:41 +0000 (00:00 +0000)]
[AMDGPU] Assert in getOpSize() there are no sub-dword subregs

Differential Revision: https://reviews.llvm.org/D52769

llvm-svn: 343648

5 years agoIR: Move AtomicRMW string names into class
Matt Arsenault [Tue, 2 Oct 2018 23:44:11 +0000 (23:44 +0000)]
IR: Move AtomicRMW string names into class

This will be used to improve error messages in a future commit.

llvm-svn: 343647

5 years ago[InstCombine] add icmp+logic tests with commuted ops; NFC
Sanjay Patel [Tue, 2 Oct 2018 22:53:37 +0000 (22:53 +0000)]
[InstCombine] add icmp+logic tests with commuted ops; NFC

The transform in question is located in foldICmpAndConstConst(),
but as shown here, it doesn't work if operands are commuted.

llvm-svn: 343646

5 years ago[analyzer] [tests] Hotfix: missing space
George Karpenkov [Tue, 2 Oct 2018 22:31:44 +0000 (22:31 +0000)]
[analyzer] [tests] Hotfix: missing space

llvm-svn: 343643

5 years agoRelax dbg-declare-inalloca.ll test more
Reid Kleckner [Tue, 2 Oct 2018 22:28:10 +0000 (22:28 +0000)]
Relax dbg-declare-inalloca.ll test more

We don't need to match the precise type index number here. It's not
important. The type name is what matters to make this test useful.

llvm-svn: 343642