Simon Glass [Thu, 2 Oct 2014 01:57:21 +0000 (19:57 -0600)]
dm: core: Allow a list of devices to be declared in one step
The U_BOOT_DEVICE macro allows the declaration of a single U-Boot device.
Add an equivalent macro to declare an array of devices, for convenience.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 2 Oct 2014 01:57:20 +0000 (19:57 -0600)]
dm: linker_lists: Add a way to declare multiple objects
The existing ll_entry_declare() permits a single element of the list to
be added to a linker list. Sometimes we want to add several objects at
once. To avoid lots of messy declarations, add a macro to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 14 Oct 2014 05:42:16 +0000 (23:42 -0600)]
dm: exynos: cros_ec: Move cros_ec_spi to driver model
Adjust this driver to use driver model and move smdk5420 boards over to
use it.
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 14 Oct 2014 05:42:15 +0000 (23:42 -0600)]
dm: sandbox: cros_ec: Move sandbox cros_ec to driver module
Adjust the sandbox cros_ec emulation driver to work with driver model, and
switch over to driver model for sandbox cros_ec.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:14 +0000 (23:42 -0600)]
dm: cros_ec: Add support for driver model
Add support for driver model if enabled. This involves minimal changes
to the code, mostly just plumbing around the edges.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:13 +0000 (23:42 -0600)]
dm: tegra: spi: Convert to driver model
This converts the Tegra SPI drivers to use driver model. This is tested
on:
- Tegra20 - trimslice
- Tegra30 - beaver
- Tegra124 - dalmore
(not tested on Tegra124)
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 14 Oct 2014 05:42:12 +0000 (23:42 -0600)]
dm: tegra: dts: Add aliases for spi on tegra30 boards
All boards with a SPI interface have a suitable spi alias except the tegra30
boards. Add these missing aliases.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:11 +0000 (23:42 -0600)]
dm: sf: Add tests for SPI flash
Add a simple test for SPI that uses SPI flash. It operates by creating a
SPI flash file and using the 'sf test' command to test that all
operations work correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:10 +0000 (23:42 -0600)]
dm: spi: Add tests
These tests use SPI flash (and the sandbox emulation) to operate.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:09 +0000 (23:42 -0600)]
dm: exynos: config: Use driver model for SPI flash
Use driver model for exynos5 board SPI flash.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:08 +0000 (23:42 -0600)]
dm: sf: sandbox: Convert SPI flash driver to driver model
Convert sandbox's spi flash emulation driver to use driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:07 +0000 (23:42 -0600)]
dm: Convert spi_flash_probe() and 'sf probe' to use driver model
We want the SPI flash probing feature to operate as a standard driver.
Add a driver for the basic probing feature used by most boards. This
will be activated by device_probe() as with any other driver.
The 'sf probe' command currently keeps track of the SPI slave that it
last used. This doesn't work with driver model, since some other driver
or system may have probed the device and have access to it too. On the
other hand, if we try to probe a device twice the second probe is a nop
with driver model.
Fix this by searching for the matching device, removing it, and then
probing it again. This should work as expected regardless of other device
activity.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:06 +0000 (23:42 -0600)]
dm: sf: Add a uclass for SPI flash
Add a driver model uclass for SPI flash which supports the common
operations (read, write, erase). Since we must keep support for the
non-dm interface, some modification of the spi_flash header is required.
CONFIG_DM_SPI_FLASH is used to enable driver model for SPI flash.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:05 +0000 (23:42 -0600)]
spi: Use error return value in sf_ops
Adjust spi_flash_probe_slave() to return an error value instead of a
pointer so we get the correct error return.
Have the caller allocate memory for spi_flash to simplify error handling,
and also so that driver model can use its existing allocated memory.
Add a spi.h include in the sf_params file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:04 +0000 (23:42 -0600)]
sf: Tidy up public and private header files
Since spi_flash.h is supposed to be the public API for SPI flash, move
private things to sf_internal.h. Also tidy up a few comment nits.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:03 +0000 (23:42 -0600)]
exynos: universal_c210: Move to driver model soft_spi
Adjust this board to use the driver model soft_spi implementation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:02 +0000 (23:42 -0600)]
dm: spi: Add documentation on how to convert over SPI drivers
This README is intended to help maintainers move their SPI drivers over to
driver model. It works through the required steps with an example.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:01 +0000 (23:42 -0600)]
dm: exynos: Convert SPI to driver model
Move the exynos SPI driver over to driver model. This removes quite a bit
of boilerplate from the driver, although it adds some for driver model.
A few device tree additions are needed to make the SPI flash available.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:00 +0000 (23:42 -0600)]
dm: spi: Add soft_spi implementation
Add a new implementation of soft_spi that uses device tree to specify the
GPIOs. This will replace soft_spi_legacy for boards which use driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:59 +0000 (23:41 -0600)]
dm: spi: Remove SPI_INIT feature
This feature provides for init of a single SPI port for the soft SPI
feature. It is not really compatible with driver model since it assumes a
single SPI port. Also, inserting SPI init into the driver by means of
a #define is not very nice.
This feature is not used by any active boards, so let's remove it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:58 +0000 (23:41 -0600)]
dm: spi: Rename soft_spi.c to soft_spi_legacy.c
Reserve the 'normal' name for use by driver model, and rename the old
driver so that it is clear that it is for 'legacy' drivers only.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:57 +0000 (23:41 -0600)]
dm: sandbox: spi: Move to driver model
Adjust the sandbox SPI driver to support driver model and move sandbox over
to driver model for SPI.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:56 +0000 (23:41 -0600)]
dm: spi: Adjust cmd_spi to work with driver model
Driver model uses a different way to find the SPI bus and slave from the
numbered devices given on the command line. Adjust the code to suit.
We use a generic SPI device, and attach it to the SPI bus before performing
the transaction.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:55 +0000 (23:41 -0600)]
dm: Add spi.h header to a few files
Some files are using SPI functions but not explitly including the SPI
header file. Fix this, since driver model needs it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:54 +0000 (23:41 -0600)]
dm: Remove spi_init() from board_r.c when using driver model
Driver model does its own init, so we don't need this.
There is still a call in board_f.c but it is only enabled by CONFIG_HARD_SPI.
It is easy enough to disable that option when converting boards which use
it to driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:53 +0000 (23:41 -0600)]
dm: sandbox: Add a SPI emulation uclass
U-Boot includes a SPI emulation driver already but it is not explicit, and
is hidden in the SPI flash code.
Conceptually with sandbox's SPI implementation we have a layer which
creates SPI bus transitions and a layer which interprets them, currently
only for SPI flash. The latter is actually an emulation, and it should be
possible to add more than one emulation - not just SPI flash.
Add a SPI emulation uclass so that other emulations can be plugged in to
support different types of emulated devices on difference buses/chip
selects.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:52 +0000 (23:41 -0600)]
dm: spi: Add a uclass for SPI
Add a uclass which provides access to SPI buses and includes operations
required by SPI.
For a time driver model will need to co-exist with the legacy SPI interface
so some parts of the header file are changed depending on which is in use.
The exports are adjusted also since some functions are not available with
driver model.
Boards must define CONFIG_DM_SPI to use driver model for SPI.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
(Discussed some follow-up comments which will address in future add-ons)
Simon Glass [Tue, 14 Oct 2014 05:41:51 +0000 (23:41 -0600)]
dm: core: Add a clarifying comment on struct udevice's seq member
The sequence number is unique within the uclass, so state this clearly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:50 +0000 (23:41 -0600)]
dm: core: Allow parents to pass data to children during probe
Buses sometimes want to pass data to their children when they are probed.
For example, a SPI bus may want to tell the slave device about the chip
select it is connected to.
Add a new function to permit the parent data to be supplied to the child.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:49 +0000 (23:41 -0600)]
dm: core: Add functions for iterating through device children
Buses need to iterate through their children in some situations. Add a few
functions to make this easy.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:48 +0000 (23:41 -0600)]
sandbox: dts: Add a SPI device and cros_ec device
Add a SPI device which can be used for testing SPI flash features in
sandbox.
Also add a cros_ec device since with driver model the Chrome OS EC
emulation will not otherwise be available.
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 14 Sep 2014 22:36:17 +0000 (16:36 -0600)]
dm: exynos: Move serial to driver model
Change the Exynos serial driver to work with driver model and switch over
all relevant boards to use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 14 Sep 2014 22:36:16 +0000 (16:36 -0600)]
dm: exynos: Mark exynos5 console as pre-reloc
We will need the console before relocation, so mark it that way.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:40 +0000 (19:48 -0600)]
dm: exynos: gpio: Convert to driver model
Convert the exynos GPIO driver to driver model. This implements the generic
GPIO interface but not the extra Exynos-specific functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:39 +0000 (19:48 -0600)]
dm: exynos: Make sure that GPIOs are requested
With driver model GPIOs must be requested before use. Make sure this is
done correctly.
(Note that the soft SPI part of universal is omitted, since this driver
is about to be replaced with a driver-model-aware version)
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:38 +0000 (19:48 -0600)]
dm: exynos: Tidy up GPIO defines
The defines at the top of the GPIO driver use single-character names for
parameters which are not very descriptive.
Improve these to use descriptive parameter names.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:37 +0000 (19:48 -0600)]
dm: exynos: Tidy up GPIO headers
The wrong header is being included, thus requiring the code to re-declare
the generic GPIO interface in each GPIO header.
Fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:36 +0000 (19:48 -0600)]
dm: exynos: Move s5p_goni to generic board
The generic board deadline is approaching, and we need this feature to
enable driver model. Enable CONFIG_SYS_GENERIC_BOARD for s5p_goni.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:35 +0000 (19:48 -0600)]
dm: exynos: Move smdkc100 to generic board
The generic board deadline is approaching, and we need this feature to
enable driver model. Enable CONFIG_SYS_GENERIC_BOARD for smdkc100.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:34 +0000 (19:48 -0600)]
dm: exynos: Add pinctrl settings for s5p_goni
These describe the GPIOs in enough detail for U-Boot's GPIO driver to
operate.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:33 +0000 (19:48 -0600)]
dm: exynos: Add pinctrl settings for smdkc100
These describe the GPIOs in enough detail for U-Boot's GPIO driver to
operate.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:32 +0000 (19:48 -0600)]
dm: exynos: dts: Adjust device tree files for U-Boot
The pinctrl bindings used by Linux are an incomplete description of the
hardware. It is possible in most cases to determine the register address
of each, but not in all cases. By adding an additional property we can
fix this, and avoid adding a table to U-Boot for every single Exynos
SOC.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:31 +0000 (19:48 -0600)]
dm: exynos: dts: Remove unused pinctrl information to save space
We don't include the pinctrl functions for U-Boot as they use up quite
a bit of space and are not used.
We could instead perhaps eliminate this material with fdtgrep, but so far
this tool has not made it to upstream.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:30 +0000 (19:48 -0600)]
dm: exynos: Bring in pinctrl dts files from Linux kernel
Bring in required device tree files for pinctrl from Linux v3.14. These
are initially unchanged and have a number of pieces not needed by U-Boot.
Note that exynos5420 is renamed to exynos54xx here since we want to
support exynos5422 also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:29 +0000 (19:48 -0600)]
dm: exynos: dts: Convert /include/ to #include
We should be consistent about this. The kernel has moved to #include
which breaks error reporting to some extent but does allow us to include
binding files.
Signed-off-by: Simon Glass <sjg@chromium.org>
Robert Baldyga [Mon, 6 Oct 2014 12:33:11 +0000 (14:33 +0200)]
arm: goni: add i2c_init_board()
Add proper initialization of GPIO pins used by software i2c.
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Tue, 7 Oct 2014 05:51:31 +0000 (14:51 +0900)]
dm: add of_match_ptr() macro
The driver model supports two ways for passing device parameters;
Device Tree and platform_data (board file).
Each driver should generally support both of them because some
popular IPs are used on various platforms.
Assume the following scenario:
- The driver Foo is used on SoC Bar and SoC Baz
- The SoC Bar uses Device Tree control (CONFIG_OF_CONTROL=y)
- The SoC Baz does not support Device Tree; uses a board file
In this situation, the device driver Foo should work with/without
the device tree control. The driver should have .of_match and
.ofdata_to_platdata members for SoC Bar, while they are meaningless
for SoC Baz; therefore those device-tree control code should go
inside #ifdef CONFIG_OF_CONTROL.
The driver code will be like this:
#ifdef CONFIG_OF_CONTROL
static const struct udevice_id foo_of_match = {
{ .compatible = "foo_driver" },
{},
}
static int foo_ofdata_to_platdata(struct udevice *dev)
{
...
}
#endif
U_BOOT_DRIVER(foo_driver) = {
...
.of_match = of_match_ptr(foo_of_match),
.ofdata_to_platdata = of_match_ptr(foo_ofdata_to_platdata),
...
}
This idea has been borrowed from Linux.
(In Linux, this macro is defined in include/linux/of.h)
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Tue, 7 Oct 2014 05:49:38 +0000 (14:49 +0900)]
dm: fix include guard
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Tue, 7 Oct 2014 05:49:13 +0000 (14:49 +0900)]
dm: include <linker_lists.h> from platdata.h and uclass.h
The header files include/dm/platdata.h and include/dm/uclass.h
use ll_entry_declare(); therefore they depend on
include/linker_lists.h.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Tue, 7 Oct 2014 05:48:22 +0000 (14:48 +0900)]
linker_lists: include <linux/compiler.h>
The header file include/linker_lists.h uses __aligned();
therefore it depends on include/linux/compiler.h
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Sun, 28 Sep 2014 13:52:27 +0000 (22:52 +0900)]
dm: simplify the loop in lists_driver_lookup_name()
if (strncmp(name, entry->name, len))
continue;
/* Full match */
if (len == strlen(entry->name))
return entry;
is equivalent to:
if (!strcmp(name, entry->name))
return entry;
The latter is simpler.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Masahiro Yamada [Sun, 28 Sep 2014 13:52:25 +0000 (22:52 +0900)]
dm: do not check the existence of uclass operation
The function uclass_add() checks uc_drv->ops as follows:
if (uc_drv->ops) {
dm_warn("No ops for uclass id %d\n", id);
return -EINVAL;
}
It seems odd because it warns "No ops" when uc_drv->ops has
non-NULL pointer. (Looks opposite.)
Anyway, most of UCLASS_DRIVER entries have no .ops member.
This check makes no sense.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Sun, 28 Sep 2014 13:52:24 +0000 (22:52 +0900)]
dm: fix comments
The struct udevice stands for a device, not a driver.
The driver_info.name is a driver's name, which is referenced
to bind devices.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Marcel Ziswiler [Fri, 10 Oct 2014 22:34:04 +0000 (00:34 +0200)]
tegra: apalis_t30: master revamp
Update Apalis T30 as per the following commits
c369139234c03b1494394d12cd27009f47aa6606
tegra: dts: Add serial port details
461be2f96e4b87e5065208c6659a47dd0ad9e9f8
kconfig: remove redundant "string" type in arch and board Kconfigs
f1ef2b62339526df3b921bcfefd174ce76d4c624
kconfig: move CONFIG_DEFAULT_DEVICE_TREE to kconfig
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Marcel Ziswiler [Fri, 10 Oct 2014 22:10:40 +0000 (00:10 +0200)]
tegra: dts: colibri_t30 add serial port details
Add missing chosen stdout-path device tree node. This got missed by
commit
c369139234c03b1494394d12cd27009f47aa6606
tegra: dts: Add serial port details
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Marcel Ziswiler [Fri, 10 Oct 2014 22:04:07 +0000 (00:04 +0200)]
tegra: colibri_t30: clean-up spurious new line
Clean-up a spurious new line which got introduced resp. left behind by
commit
f1ef2b62339526df3b921bcfefd174ce76d4c624
kconfig: move CONFIG_DEFAULT_DEVICE_TREE to kconfig
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Marcel Ziswiler [Fri, 10 Oct 2014 21:32:32 +0000 (23:32 +0200)]
ARM: tegra: Use mem size from MC in combination with get_ram_size()
On popular request this now completes the Warren's work started for
TK1:
aeb3fcb35956461077804720b8a252d50758d7e0
ARM: tegra: Use mem size from MC rather than ODMDATA
In addition to the move of using the Tegra memory controller (MC)
register rather than ODMDATA for T20, T30 and T114 as well it further
uses the generic get_ram_size() function (see "common/memsize.c")
<supposed to be used in each and every U-Boot port>TM. Added benefit is
that it should <catch 99% of hardware related (i. e. reliably
reproducible) memory errors> as well.
Thoroughly tested on the various Toradex line of Tegra modules
available which unfortunately does not include T114 and T124 (yet at
least) plus on the Jetson TK1.
Based-on-work-by: Stephen Warren <swarren@nvidia.com>
Based-on-work-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Marcel Ziswiler [Fri, 10 Oct 2014 15:45:17 +0000 (17:45 +0200)]
tegra: clean-up useless define
Wondering what exactly that one should bring (;-p). Looks like a remnant of the last commit
783e6a72b8278d59854ced41a4696c9a14abbb0b
kconfig: move CONFIG_OF_* to Kconfig
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Marcel Ziswiler [Fri, 10 Oct 2014 15:31:41 +0000 (17:31 +0200)]
gpio: header file comment spelling fixes
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Marcel Ziswiler [Fri, 10 Oct 2014 15:04:49 +0000 (17:04 +0200)]
tegra: colibri_t30: asix usb ethernet reset regression
Fix ASIX USB to Ethernet reset which due to the new driver model Tegra
GPIO driver changes now requires a label string to be provided
otherwise the reservation and subsequent direction/value calls will
fail.
This fixes a regression introduced by commit:
2fccd2d96badcdf6165658a99771a4c475586279
tegra: Convert tegra GPIO driver to use driver model
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Marcel Ziswiler [Fri, 10 Oct 2014 14:56:50 +0000 (16:56 +0200)]
tegra: gpio: fix null label regression
Fix Tegra GPIO driver to not crash resp. misbehave upon requesting
GPIOs with an empty aka NULL label. As the driver uses exclusively the
label to check for reservation status actually supplying one is
mandatory!
This fixes a regression introduced by commit:
2fccd2d96badcdf6165658a99771a4c475586279
tegra: Convert tegra GPIO driver to use driver model
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Marcel Ziswiler [Fri, 3 Oct 2014 23:48:53 +0000 (01:48 +0200)]
mmc: Tegra: Fix timeout issue seen on certain eMMC parts
During rigorous testing of our latest update infrastructure I came
across quite consistent timeouts on certain eMMC parts (e.g. Hynix
H26M21001ECR) when writing big (e.g. in excess of 400 MB) file system
images:
MMC write: dev # 0, block # 40960, count 944128 ...
mmc_send_cmd_bounced: MMC Timeout
Interrupt status 0x00000001
Interrupt status enable 0xdfff003b
Interrupt signal enable 0xdfff0002
Present status 0x01870106
mmc write failed
Comparing the various data sheets I came across the following timeout
specification:
Secure Erase/TRIM Timeout=300ms*2*10=6000ms
Unfortunately empirical testing still failed albeit much more rarely.
Increasing the timeout to 8000ms made it finally disappear entirely.
This patch allows us writing various eMMC parts without seeing any
further issues.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Marcel Ziswiler [Tue, 26 Aug 2014 09:49:46 +0000 (11:49 +0200)]
arm: tegra: use architecture specific memcpy
Use architecture specific memcpy to speed up things.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Marcel Ziswiler [Fri, 5 Sep 2014 08:18:38 +0000 (10:18 +0200)]
arm: tegra: initial support for apalis t30
This patch adds board support for the Toradex Apalis T30 a computer on
module which can be used on different carrier boards.
For the sake of ease of use we do not distinguish between different
carrier boards for now as the base module features are deemed
sufficient enough for regular booting.
The following functionality is working so far:
- eMMC boot and environment storage
- Gigabit Ethernet (once Thierry's PCIe as well as my E1000 resp. i210
fixes hit mainline)
- MMC/SD cards (both 8-bit as well as 4-bit slot)
- USB client/host (dual role port as client e.g. for DFU/UMS, other two
ports as host)
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Fri, 22 Aug 2014 21:04:08 +0000 (15:04 -0600)]
ARM: tegra: add PCIe-related pins to the Jetson TK1 pinmux tables
This pinmux tables currently omit any configuration for PCIe clk_req,
wake, and rst pins, which in turn causes intermittent failures in
U-Boot's PCIe support. Import an updated version of the pinmux tables
which rectifies this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Bin Meng [Thu, 16 Oct 2014 14:58:35 +0000 (22:58 +0800)]
x86: Fix GDT limit in start16.S
GDT limit should be one less than an integral multiple of eight.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 16 Oct 2014 14:58:20 +0000 (22:58 +0800)]
x86: Fix rom version build with CONFIG_X86_RESET_VECTOR
When building U-Boot with CONFIG_X86_RESET_VECTOR, the linking
process misses the resetvec.o and start16.o so it cannot generate
the rom version of U-Boot. The arch/x86/cpu/Makefile is updated to
pull them into the final linking process.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 20 Oct 2014 03:11:24 +0000 (21:11 -0600)]
x86: Support loading kernel setup from a FIT
Add a new setup@ section to the FIT which can be used to provide a setup
binary for booting Linux on x86. This makes it possible to boot x86 from
a FIT.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 20 Oct 2014 03:11:23 +0000 (21:11 -0600)]
doc: Tidy up and update part of the FIT documentation
This uses cfg instead of conf, and img instead of image. Fix these and
update in a few other places.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 20 Oct 2014 03:11:22 +0000 (21:11 -0600)]
sandbox: bootm: Don't fail the architecture check
Since sandbox is used for testing, it should be able to 'boot' an image
from any archhitecture. This allows us to test an image by loading it in
sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 20 Oct 2014 03:11:21 +0000 (21:11 -0600)]
x86: Allow cmdline setup in setup_zimage() to be optional
If we are passing this using the device tree then we may not want to
set this up here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 20 Oct 2014 03:11:20 +0000 (21:11 -0600)]
x86: Rewrite bootm.c to make it similar to ARM
The x86 bootm code is quite special, and geared to zimage. Adjust it
to support device tree and make it more like the ARM code, with
separate bootm stages and functions for each stage.
Create a function announce_and_cleanup() to handle printing the
"Starting kernel ..." message and put it in bootm so it is in one
place and can be used by any loading code. Also move the
board_final_cleanup() function into bootm.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 20 Oct 2014 03:11:19 +0000 (21:11 -0600)]
x86: Enable LMB and RAMDISK_HIGH by default
These options are used by the image code. To allow us to use the generic
code more easily, define these for x86.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Mon, 20 Oct 2014 22:17:26 +0000 (18:17 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Ruchika Gupta [Tue, 7 Oct 2014 10:18:47 +0000 (15:48 +0530)]
ls102x: Add support for secure boot and enable blob command
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Tue, 7 Oct 2014 10:18:46 +0000 (15:48 +0530)]
mpc85xx: configs - Enable blob command in freescale platforms
Enable blob commands for platforms having SEC 4.0 or greater
for secure boot scenarios
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Tue, 7 Oct 2014 10:16:20 +0000 (15:46 +0530)]
crypto/fsl: Add command for encapsulating/decapsulating blobs
Freescale's SEC block has built-in Blob Protocol which provides
a method for protecting user-defined data across system power
cycles. SEC block protects data in a data structure called a Blob,
which provides both confidentiality and integrity protection.
Encapsulating data as a blob
Each time that the Blob Protocol is used to protect data, a
different randomly generated key is used to encrypt the data.
This random key is itself encrypted using a key which is derived
from SoC's non volatile secret key and a 16 bit Key identifier.
The resulting encrypted key along with encrypted data is called a blob.
The non volatile secure key is available for use only during secure boot.
During decapsulation, the reverse process is performed to get back
the original data.
Commands added
--------------
blob enc - encapsulating data as a cryptgraphic blob
blob dec - decapsulating cryptgraphic blob to get the data
Commands Syntax
---------------
blob enc src dst len km
Encapsulate and create blob of data $len bytes long
at address $src and store the result at address $dst.
$km is the 16 byte key modifier is also required for
generation/use as key for cryptographic operation. Key
modifier should be 16 byte long.
blob dec src dst len km
Decapsulate the blob of data at address $src and
store result of $len byte at addr $dst.
$km is the 16 byte key modifier is also required for
generation/use as key for cryptographic operation. Key
modifier should be 16 byte long.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Mon, 29 Sep 2014 06:05:33 +0000 (11:35 +0530)]
powerpc/mpc85xx: SECURE BOOT - Bypass PAMU in case of secure boot
By default, PAMU's (IOMMU) are enabled in case of secure boot.
Disable/bypass them once the control reaches the bootloader.
For non-secure boot, PAMU's are already bypassed in the default
SoC configuration.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Wed, 15 Oct 2014 06:09:06 +0000 (11:39 +0530)]
ls102x: configs - Add hash command in freescale LS1 platforms
Hardware accelerated support for SHA-1 and SHA-256 has been added.
Hash command enabled along with hardware accelerated support for
SHA-1 and SHA-256 for platforms which have CAAM block.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Wed, 15 Oct 2014 06:05:31 +0000 (11:35 +0530)]
mpc85xx: configs - Add hash command in freescale platforms
Enable CAAM in platforms supporting the hardware block.
Hash command enabled along with hardware accelerated support for
SHA-1 and SHA-256 for platforms which have CAAM block.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Wed, 15 Oct 2014 06:05:30 +0000 (11:35 +0530)]
fsl_sec: Add hardware accelerated SHA256 and SHA1
SHA-256 and SHA-1 accelerated using SEC hardware in Freescale SoC's
The driver for SEC (CAAM) IP is based on linux drivers/crypto/caam.
The platforms needto add the MACRO CONFIG_FSL_CAAM inorder to
enable initialization of this hardware IP.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Tue, 9 Sep 2014 06:20:31 +0000 (11:50 +0530)]
fsl_sec : Change accessor function to take care of endianness
SEC registers can be of type Little Endian or big Endian depending upon
Freescale SoC. Here SoC defines the register type of SEC IP.
So update acessor functions with common SEC acessor functions to take care
both type of endianness.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Tue, 9 Sep 2014 06:20:30 +0000 (11:50 +0530)]
fsl_sec : Move SEC CCSR definition to common include
Freescale SEC controller has been used for mpc8xxx. It will be used
for ARM-based SoC as well. This patch moves the CCSR defintion of
SEC to common include
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Mon, 29 Sep 2014 05:44:35 +0000 (11:14 +0530)]
powerpc/P1010RDB:Update RESET_VECTOR_ADDRESS for 768KB u-boot size
U-boot binary size has been increased from 512KB to 768KB.
So update CONFIG_RESET_VECTOR_ADDRESS to reflect the same for
P1010 SPI Flash Secure boot target.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
[York Sun: Modified subject to P1010RDB]
Reviewed-by: York Sun <yorksun@freescale.com>
Jeroen Hofstee [Tue, 14 Oct 2014 18:37:15 +0000 (20:37 +0200)]
video: ipu_disp: remove pixclk fixup
The ipu display insists on having a lower_margin smaller
then 2. If this is not the case it will attempt to force
it and adjust the pixclk accordingly. This multiplies pixclk
in Hz with the width and height, since this is typically
a * 10^7 * b * 10^2 * c * 10^2 this will overflow the
uint_32 and make things even worse. Since this is a
bootloader and the adjustment is neglectible, just force
it to two and warn about it.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Jeroen Hofstee [Tue, 14 Oct 2014 18:37:14 +0000 (20:37 +0200)]
video: ipu: fix debug and comment
- fix debug pixel clk display and add unit
- fix some comments
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Simon Glass [Wed, 15 Oct 2014 10:53:04 +0000 (04:53 -0600)]
lcd: Fix build error with CONFIG_LCD_BMP_RLE8
Add a block to avoid a build error with the variable declaration.
Enable the option on sandbox to prevent an error being introduced in
future.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 14 Oct 2014 08:47:15 +0000 (04:47 -0400)]
Prepare v2014.10
Signed-off-by: Tom Rini <trini@ti.com>
Hans de Goede [Mon, 13 Oct 2014 12:51:40 +0000 (14:51 +0200)]
sunxi: axp152: dcdc3 scale is 50mV / step not 25mV / step
Currently uboot wrongly uses 25mV / step for dcdc3, this is a copy and paste
error introduced when adding the axp152_mvolt_to_target during review of the
axp152.c driver. This results in u-boot setting Vddr to 2.3V instead of 1.5V.
This commit fixes this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Tom Rini [Mon, 13 Oct 2014 12:38:55 +0000 (08:38 -0400)]
Makefile: drop "tools-only" from no-dot-config-targets
With the introduction of CONFIG_LOCALVERSION support we cannot build
tools without having a config file (as we won't know our PLAIN_VERSION
until then).
Reported-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Sat, 11 Oct 2014 00:59:28 +0000 (20:59 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-arm
Albert ARIBAUD [Fri, 10 Oct 2014 23:20:55 +0000 (01:20 +0200)]
Merge branch 'u-boot-socfpga/topic/arm/socfpga-
20141010' into 'u-boot-arm/master'
Albert ARIBAUD [Fri, 10 Oct 2014 23:20:30 +0000 (01:20 +0200)]
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Marek Vasut [Thu, 9 Oct 2014 23:50:23 +0000 (01:50 +0200)]
arm: socfpga: Use EMAC1 on SoCDK
The SoCDK uses EMAC1, not EMAC0. This patch fixes the issue.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Pavel Machek [Thu, 9 Oct 2014 23:50:22 +0000 (01:50 +0200)]
arm: socfpga: add MAINTAINERS entry
Add MAINTAINERS entry.
Signed-off-by: Pavel Machek <pavel@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Jeroen Hofstee [Tue, 7 Oct 2014 20:42:27 +0000 (22:42 +0200)]
tools: compiler.h: Fix build on FreeBSD
Commit 832472 "tools: socfpga: Add socfpga preloader signing
to mkimage" added tools/socfpga.c which relies on htole32,
le32toh and friends. While compiler.h includes these protypes
for linux from endian.h, it doesn't do so for FreeBSD. Hence
include <sys/endian.h> for FreeBSD.
Cc: Marek Vasut <marex@denx.de>
CC: Tom Rini <trini@ti.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Heiko Schocher [Wed, 1 Oct 2014 05:26:06 +0000 (07:26 +0200)]
arm, at91: add generic board support for the taurus and corvus board
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Bo Shen [Wed, 24 Sep 2014 07:35:53 +0000 (15:35 +0800)]
ARM: atmel: switch at91sam9263ek to generic board
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Andreas Bießmann [Thu, 18 Sep 2014 21:46:49 +0000 (23:46 +0200)]
sama5d3xek: run PHY's config
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Bo Shen <voice.shen@atmel.com>
Andreas Bießmann [Thu, 18 Sep 2014 21:46:48 +0000 (23:46 +0200)]
macb: simplify gmac initialisation
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Bo Shen <voice.shen@atmel.com>