platform/kernel/linux-starfive.git
6 years agodrm/amd/display: Make it more clear when info frames affect DP or HDMI
Krunoslav Kovac [Wed, 30 May 2018 14:57:32 +0000 (10:57 -0400)]
drm/amd/display: Make it more clear when info frames affect DP or HDMI

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Drop duplicate dc_stream_set_static_screen_events definition
Krunoslav Kovac [Wed, 30 May 2018 14:56:32 +0000 (10:56 -0400)]
drm/amd/display: Drop duplicate dc_stream_set_static_screen_events definition

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Add use_dynamic_meta flag to stream_state
Krunoslav Kovac [Thu, 17 May 2018 18:50:12 +0000 (14:50 -0400)]
drm/amd/display: Add use_dynamic_meta flag to stream_state

Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Move i2c and aux structs into dc_ddc_types.h
Harry Wentland [Wed, 9 May 2018 15:35:21 +0000 (11:35 -0400)]
drm/amd/display: Move i2c and aux structs into dc_ddc_types.h

We'd like to use some of them in dc_link_ddc and amdgpu_dm and should
have them available in dc_ddc_types.h.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Stream encoder update
Eric Bernstein [Tue, 22 May 2018 19:16:33 +0000 (15:16 -0400)]
drm/amd/display: Stream encoder update

Update stream encoder based on feedback from HW team.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Write TEST_EDID_CHECKSUM_WRITE for EDID tests
Mikita Lipski [Thu, 17 May 2018 19:44:20 +0000 (15:44 -0400)]
drm/amd/display: Write TEST_EDID_CHECKSUM_WRITE for EDID tests

Extract edid's checksum and send it back for verification if EDID_TEST
is requested.

Also added a flag for EDID checksum write in TEST_RESPONSE structure,
and simple spelling fix.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Drop to fail-safe mode if edid is bad
Mikita Lipski [Tue, 22 May 2018 19:55:43 +0000 (15:55 -0400)]
drm/amd/display: Drop to fail-safe mode if edid is bad

Provide the connector with a single fail-safe mode of 640x480 for CTS
tests instead of providing a list of possible base modes.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Update function level documentation for GPUVM.
Andrey Grodzovsky [Wed, 13 Jun 2018 20:01:38 +0000 (16:01 -0400)]
drm/amdgpu: Update function level documentation for GPUVM.

Add documentation for missed parameters.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Restore :internal: for amdgpu_vm.c documentation
Michel Dänzer [Thu, 14 Jun 2018 09:59:20 +0000 (11:59 +0200)]
drm/amdgpu: Restore :internal: for amdgpu_vm.c documentation

This was accidentally dropped by the "drm/amdgpu: update documentation
for amdgpu_irq.c v3" change, resulting in the GPUVM documentation body
being included twice in the generated documentation.

Trivial.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Get real power source to initizlize ac_power
Rex Zhu [Mon, 4 Jun 2018 10:26:18 +0000 (18:26 +0800)]
drm/amdgpu: Get real power source to initizlize ac_power

driver need to know the real power source to do some power
related configuration when initialize.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Implement update_smc_table for CI.
Rex Zhu [Mon, 4 Jun 2018 10:12:31 +0000 (18:12 +0800)]
drm/amd/pp: Implement update_smc_table for CI.

driver need to update uvd/vce smc table before enable
uvd/vce dpm.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Use real power source in powerplay instand of hardcode
Rex Zhu [Mon, 4 Jun 2018 08:39:38 +0000 (16:39 +0800)]
drm/amdgpu: Use real power source in powerplay instand of hardcode

1. move ac_power to struct pm from dpm, so can be shared with powerplay
2. remove power_source in powerplay, use adev->pm.ac_power instand.
3. update ac_power before dispatch power task.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Remove SAMU support in powerplay
Rex Zhu [Mon, 4 Jun 2018 05:33:14 +0000 (13:33 +0800)]
drm/amd/pp: Remove SAMU support in powerplay

As the SAMU ip was not supported in linux,
so delete the SAMU support in powerplay on
asics Bonarire/Hawwii/Tonga/Fiji/Polaris/vegam.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/doc: Add amdgpu hwmon/power documentation (v2)
Alex Deucher [Fri, 1 Jun 2018 17:28:14 +0000 (12:28 -0500)]
drm/doc: Add amdgpu hwmon/power documentation (v2)

Document the hwmon and power control interfaces exposed
by the amdgpu driver.

v2: use section rather than chapter for now

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Consolidate visible vs. real vram check v2.
Andrey Grodzovsky [Tue, 12 Jun 2018 18:28:20 +0000 (14:28 -0400)]
drm/amdgpu: Consolidate visible vs. real vram check v2.

Move all instnaces of this check into a function in amdgpu_gmc.h
Rename the original function to a more proper name.

v2:
Add more places to cleanup.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: update documentation for amdgpu_irq.c v3
Slava Abramov [Thu, 7 Jun 2018 21:27:07 +0000 (17:27 -0400)]
drm/amdgpu: update documentation for amdgpu_irq.c v3

Add/update function level documentation and add reference to amdgpu_irq.c
in amdgpu.rst

v2:
Added DOC comment
Added more explanations for amdgpu_hotplug_work_func
Properly formatted unused parameters
Properly formatted return values
Fixed usage of acronyms
More consistent styling

v3:
Removed duplicate "not"
Using '&' to refer to functions and types

Signed-off-by: Slava Abramov <slava.abramov@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Update function level documentation for GPUVM v3
Andrey Grodzovsky [Mon, 11 Jun 2018 15:11:24 +0000 (11:11 -0400)]
drm/amdgpu: Update function level documentation for GPUVM v3

Add/update function level documentation and add reference to amdgpu_vm.c
in amdgpu.rst

v2:
Fix reference in rst file.
Fix compilation warnings.
Add space between function names and params list where
it's missing.

v3:
Fix some funtion comments.
Add formatted documentation to structs.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix typo in amdgpu_mn.c comments
Slava Abramov [Wed, 13 Jun 2018 14:50:31 +0000 (10:50 -0400)]
drm/amdgpu: fix typo in amdgpu_mn.c comments

In doc comments for struct amdgpu_mn: destrution -> destruction

Signed-off-by: Slava Abramov <slava.abramov@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix documentation of amdgpu_mn.c v2
Christian König [Tue, 5 Jun 2018 09:47:43 +0000 (11:47 +0200)]
drm/amdgpu: fix documentation of amdgpu_mn.c v2

And wire it up as well.

v2: improve the wording, fix label mismatch

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: rename rmn to amn in the MMU notifier code (v2)
Christian König [Wed, 13 Jun 2018 19:55:20 +0000 (14:55 -0500)]
drm/amdgpu: rename rmn to amn in the MMU notifier code (v2)

Just a copy&paste leftover from radeon.

v2: rebase (Alex)

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Add BRACKET_LAYOUT_ENUMs to ObjectID.h
Harry Wentland [Thu, 7 Jun 2018 19:45:08 +0000 (15:45 -0400)]
drm/amdgpu: Add BRACKET_LAYOUT_ENUMs to ObjectID.h

DC has an upcoming change that requires these to read the board layout.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: remove unused parameter for va update
Junwei Zhang [Tue, 12 Jun 2018 05:57:45 +0000 (13:57 +0800)]
drm/amdgpu: remove unused parameter for va update

Don't need validation list any more

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: David Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Add plumbing for handling SQ EDC/ECC interrupts v2.
David Panariti [Tue, 22 May 2018 18:25:49 +0000 (14:25 -0400)]
drm/amdgpu: Add plumbing for handling SQ EDC/ECC interrupts v2.

SQ can generate interrupts and installs the ISR to
handle the SQ interrupts.

Add parsing SQ data in interrupt handler.

v2:
Remove CZ only limitation.
Rebase.

Signed-off-by: David Panariti <David.Panariti@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Add interrupt SQ source struct to amdgpu_gfx struct v2.
David Panariti [Tue, 22 May 2018 18:09:06 +0000 (14:09 -0400)]
drm/amdgpu: Add interrupt SQ source struct to amdgpu_gfx struct v2.

SQ can generate interrupts on EDC/ECC errors and this struct controls
how the interrupt is handled.  The guts are filled in in the
gf_v<major>_<minor>.c files.

v2:
Rebase.

Signed-off-by: David Panariti <David.Panariti@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Added ISR for CP ECC/EDC interrupt v2.
David Panariti [Tue, 15 May 2018 15:45:11 +0000 (11:45 -0400)]
drm/amdgpu: Added ISR for CP ECC/EDC interrupt v2.

ISR will DRM_ERROR ECC error message.

v2:
Remove CZ only limitation.
Rebase.

Signed-off-by: David Panariti <David.Panariti@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: change gfx8 ib test to use WB
Shirish S [Fri, 8 Jun 2018 04:45:42 +0000 (10:15 +0530)]
drm/amdgpu: change gfx8 ib test to use WB

This patch is extends the usage of WB in
gfx8's ib test which was originally
implemented in the below upstream patch
"ed9324a drm/amdgpu: change gfx9 ib test to use WB"

For reference below are the reasons for switching
to WB:

1)Because when doing IB test we don't want to involve KIQ health
status affect, and since SCRATCH register access is go through
KIQ that way GFX IB test would failed due to KIQ fail.

2)acccessing SCRATCH register cost much more time than WB method
because SCRATCH register access runs through KIQ which at least could
begin after GPU world switch back to current Guest VF

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Correct the ndw of bo update mapping.
Emily Deng [Fri, 8 Jun 2018 08:36:22 +0000 (16:36 +0800)]
drm/amdgpu: Correct the ndw of bo update mapping.

For buffer object that has shadow buffer, need twice commands.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add AMDGPU_HW_IP_VCN_JPEG to queue mgr
Boyuan Zhang [Tue, 1 May 2018 18:59:12 +0000 (14:59 -0400)]
drm/amdgpu: add AMDGPU_HW_IP_VCN_JPEG to queue mgr

Add AMDGPU_HW_IP_VCN_JPEG to queue mgr

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add AMDGPU_HW_IP_VCN_JPEG to info query
Boyuan Zhang [Tue, 1 May 2018 18:58:25 +0000 (14:58 -0400)]
drm/amdgpu: add AMDGPU_HW_IP_VCN_JPEG to info query

Add AMDGPU_HW_IP_VCN_JPEG to info query

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agouapi/drm: add AMDGPU_HW_IP_VCN_JPEG for jpeg CS
Boyuan Zhang [Tue, 1 May 2018 18:47:31 +0000 (14:47 -0400)]
uapi/drm: add AMDGPU_HW_IP_VCN_JPEG for jpeg CS

Add AMDGPU_HW_IP_VCN_JPEG define for jpeg CS

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: enable vcn jpeg ib test
Boyuan Zhang [Tue, 1 May 2018 18:40:24 +0000 (14:40 -0400)]
drm/amdgpu: enable vcn jpeg ib test

Enable vcn jpeg ib ring test in amdgpu_ib.c

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add vcn jpeg ib test
Boyuan Zhang [Wed, 30 May 2018 19:56:43 +0000 (15:56 -0400)]
drm/amdgpu: add vcn jpeg ib test

Add an ib test for vcn jpeg.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add vcn jpeg ring test
Boyuan Zhang [Wed, 30 May 2018 19:49:51 +0000 (15:49 -0400)]
drm/amdgpu: add vcn jpeg ring test

Add a ring test for vcn jpeg.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add vcn jpeg sw finish
Boyuan Zhang [Wed, 30 May 2018 19:32:16 +0000 (15:32 -0400)]
drm/amdgpu: add vcn jpeg sw finish

Add software finish for vcn jpeg ring.

v2: remove unnecessary scheduler entity.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add patch to jpeg ring
Boyuan Zhang [Wed, 30 May 2018 19:19:52 +0000 (15:19 -0400)]
drm/amdgpu: add patch to jpeg ring

Add patch commands to jepg ring by calling set patch ring function.

v2: remove modifications on max_dw, buf_mask and ptr_mask, since we are
now using extra_dw for jpeg ring.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: define and add extra dword for jpeg ring
Boyuan Zhang [Fri, 1 Jun 2018 16:30:17 +0000 (12:30 -0400)]
drm/amdgpu: define and add extra dword for jpeg ring

Define extra dword for jpeg ring. Jpeg ring will allocate extra dword to store
the patch commands for fixing the known issue.

v2: dropping extra_dw for rings other than jpeg.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: implement patch for fixing a known bug
Boyuan Zhang [Wed, 30 May 2018 18:57:16 +0000 (14:57 -0400)]
drm/amdgpu: implement patch for fixing a known bug

Implement a patch to maunally reset read pointer

v2: using ring assignment instead of amdgpu_ring_write. adding comments
for each steps in the patch function.
v3: fixing a typo bug.
v4: fixing a bug in v3.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: initialize vcn jpeg ring
Boyuan Zhang [Wed, 30 May 2018 18:47:39 +0000 (14:47 -0400)]
drm/amdgpu: initialize vcn jpeg ring

Add implementations for vcn jpeg ring initialization

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add vcn jpeg irq support
Boyuan Zhang [Wed, 30 May 2018 18:42:33 +0000 (14:42 -0400)]
drm/amdgpu: add vcn jpeg irq support

Add vcn jpeg irq support.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: set jpeg ring functions
Boyuan Zhang [Wed, 30 May 2018 18:23:33 +0000 (14:23 -0400)]
drm/amdgpu: set jpeg ring functions

Set all vcn jpeg ring function pointers.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: implement jpeg ring functions
Boyuan Zhang [Wed, 30 May 2018 18:39:07 +0000 (14:39 -0400)]
drm/amdgpu: implement jpeg ring functions

Implement all ring functions needed for jpeg ring

v2: remove unnecessary mem read function.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add more jpeg register offset headers
Boyuan Zhang [Mon, 30 Apr 2018 20:55:39 +0000 (16:55 -0400)]
drm/amdgpu: add more jpeg register offset headers

Add more jpeg registers defines that are needed for jpeg ring functions

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add jpeg packet defines to soc15d.h
Boyuan Zhang [Mon, 30 Apr 2018 20:51:33 +0000 (16:51 -0400)]
drm/amdgpu: add jpeg packet defines to soc15d.h

Add new packet for vcn jpeg, including condition checks, types and packet

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add vcn jpeg ring
Boyuan Zhang [Wed, 30 May 2018 18:13:33 +0000 (14:13 -0400)]
drm/amdgpu: add vcn jpeg ring

Add jpeg to amdgpu_vcn

v2: remove unnecessary scheduler entity

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: define vcn jpeg ring
Boyuan Zhang [Mon, 30 Apr 2018 20:35:34 +0000 (16:35 -0400)]
drm/amdgpu: define vcn jpeg ring

Add AMDGPU_RING_TYPE_VCN_JPEG ring define

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: move amdgpu_ctx_mgr_entity_fini to f_ops flush hook (V4)
Andrey Grodzovsky [Wed, 30 May 2018 19:28:52 +0000 (15:28 -0400)]
drm/amdgpu: move amdgpu_ctx_mgr_entity_fini to f_ops flush hook (V4)

With this we can now terminate jobs enqueue into SW queue the moment
the task is being killed instead of waiting for last user of
drm file to release it.

Also stop checking for kref_read(&ctx->refcount) == 1 when
calling drm_sched_entity_do_release since other task
might still hold a reference to this entity but we don't
care since KILL means terminate job submission regardless
of what other tasks are doing.

v2:
Use returned remaining timeout as parameter for the next call.
Rebase.

v3:
Switch to working with jiffies.
Streamline remainder TO usage.
Rebase.

v4:
Rebase.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/scheduler: Avoid using wait_event_killable for dying process (V4)
Andrey Grodzovsky [Wed, 30 May 2018 19:11:01 +0000 (15:11 -0400)]
drm/scheduler: Avoid using wait_event_killable for dying process (V4)

Dying process might be blocked from receiving any more signals
so avoid using it.

Also retire enity->fini_status and just check the SW queue,
if it's not empty do the fallback cleanup.

Also handle entity->last_scheduled == NULL use case which
happens when HW ring is already hangged whem a  new entity
tried to enqeue jobs.

v2:
Return the remaining timeout and use that as parameter for the next call.
This way when we need to cleanup multiple queues we don't wait for the
entire TO period for each queue but rather in total.
Styling comments.
Rebase.

v3:
Update types from unsigned to long.
Work with jiffies instead of ms.
Return 0 when TO expires.
Rebase.

v4:
Remove unnecessary timeout calculation.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Hook up amdgpu_object.c documentation
Michel Dänzer [Fri, 1 Jun 2018 10:30:44 +0000 (12:30 +0200)]
drm/amdgpu: Hook up amdgpu_object.c documentation

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Fix-ups for amdgpu_object.c documentation
Michel Dänzer [Fri, 1 Jun 2018 10:29:45 +0000 (12:29 +0200)]
drm/amdgpu: Fix-ups for amdgpu_object.c documentation

* Fix format of return value descriptions
* Document all parameters of amdgpu_bo_free_kernel
* Document amdgpu_bo_get_preferred_pin_domain

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Hook up documentation about memory domains
Michel Dänzer [Fri, 1 Jun 2018 10:10:02 +0000 (12:10 +0200)]
drm/amdgpu: Hook up documentation about memory domains

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: avoid sleep while executing atombios table (V2)
Shirish S [Tue, 29 May 2018 03:53:53 +0000 (09:23 +0530)]
drm/amdgpu: avoid sleep while executing atombios table (V2)

This patch replaces kzalloc's flag from GFP_KERNEL to
GFP_ATOMIC to avoid sleeping in atomic context.

Below is the stack trace:

BUG: sleeping function called from invalid context at mm/slab.h:***
in_atomic(): 1, irqs_disabled(): 0, pid: 1137, name: DrmThread
CPU: 1 PID: 1137 Comm: DrmThread Tainted: G        W       4.14.43 #10
Call Trace:
 dump_stack+0x4d/0x63
 ___might_sleep+0x11f/0x12e
 __kmalloc+0x76/0x126
 amdgpu_atom_execute_table_locked+0xfc/0x285
 amdgpu_atom_execute_table+0x5d/0x72
 transmitter_control_v1_5+0xef/0x11a
 hwss_edp_backlight_control+0x132/0x151
 dce110_disable_stream+0x133/0x16e
 core_link_disable_stream+0x1c5/0x23b
 dce110_reset_hw_ctx_wrap+0xb4/0x1aa
 dce110_apply_ctx_to_hw+0x4e/0x6da
 ? generic_reg_get+0x1f/0x33
 dc_commit_state+0x33f/0x3d2
 amdgpu_dm_atomic_commit_tail+0x2cf/0x5d2
 ? wait_for_common+0x5b/0x69
 commit_tail+0x42/0x64
 drm_atomic_helper_commit+0xdc/0xf9
 drm_atomic_helper_set_config+0x5c/0x76
 __drm_mode_set_config_internal+0x64/0x105
 drm_mode_setcrtc+0x474/0x56f
 ? drm_mode_getcrtc+0x155/0x155
 drm_ioctl_kernel+0x6c/0xa8
 drm_ioctl+0x267/0x353
 ? drm_mode_getcrtc+0x155/0x155
 amdgpu_drm_ioctl+0x4f/0x7f
 vfs_ioctl+0x21/0x2f
 do_vfs_ioctl+0x4c4/0x4e7
 ? security_file_ioctl+0x3b/0x4f
 SyS_ioctl+0x57/0x79
 do_syscall_64+0x64/0x72
 entry_SYSCALL_64_after_hwframe+0x3d/0xa2

V2: Added stack trace in commit message.

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Add documentation for PRIME related code
Michel Dänzer [Tue, 29 May 2018 16:33:41 +0000 (18:33 +0200)]
drm/amdgpu: Add documentation for PRIME related code

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/doc: Add initial amdgpu driver documentation
Michel Dänzer [Tue, 29 May 2018 16:39:04 +0000 (18:39 +0200)]
drm/doc: Add initial amdgpu driver documentation

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/doc: Add a label for the PRIME Buffer Sharing chapter
Michel Dänzer [Wed, 30 May 2018 11:00:46 +0000 (13:00 +0200)]
drm/doc: Add a label for the PRIME Buffer Sharing chapter

So that it can be referenced from e.g. DOC comments.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/pp: switch the default dpm implementation for CI
Alex Deucher [Thu, 31 May 2018 17:46:08 +0000 (12:46 -0500)]
drm/amdgpu/pp: switch the default dpm implementation for CI

Switch hawaii and bonaire to use powerplay rather than the old
dpm implementation.  Powerplay supports more features and is
better maintained.  Ultimately, we can drop the older dpm
implementation like we did for other older asics.

Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Rex Zhu <rezhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/display: enable CONFIG_DRM_AMD_DC_DCN1_0 by default
Alex Deucher [Thu, 31 May 2018 14:28:47 +0000 (09:28 -0500)]
drm/amdgpu/display: enable CONFIG_DRM_AMD_DC_DCN1_0 by default

It's required for displays on Raven.  The DCN bandwidth calcs use
floating point, but DCN is APU only and it already depends on
X86.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/display: drop DRM_AMD_DC_FBC kconfig option
Alex Deucher [Thu, 31 May 2018 14:09:59 +0000 (09:09 -0500)]
drm/amdgpu/display: drop DRM_AMD_DC_FBC kconfig option

Just enable it always.  This was leftover from feature
bring up.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add kernel doc for memory domains.
Samuel Li [Thu, 24 May 2018 18:32:49 +0000 (14:32 -0400)]
drm/amdgpu: add kernel doc for memory domains.

Document the GEM domains exposed to userspace.

Suggested-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Samuel Li <Samuel.Li@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add kernel doc for amdgpu_object.c
Samuel Li [Thu, 17 May 2018 21:58:45 +0000 (17:58 -0400)]
drm/amdgpu: add kernel doc for amdgpu_object.c

Document the amdgpu buffer object API.

v2: Add a DOC section and some more clarification.
v3: Add some clarification and fix a spelling.

Suggested-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Samuel Li <Samuel.Li@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: dal 3.1.47
Tony Cheng [Tue, 8 May 2018 16:25:02 +0000 (12:25 -0400)]
drm/amd/display: dal 3.1.47

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: add dentist frequency to resource pool
Dmytro Laktyushkin [Wed, 16 May 2018 12:51:11 +0000 (08:51 -0400)]
drm/amd/display: add dentist frequency to resource pool

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: DP YCbCr 4:2:0 support
Eric Bernstein [Mon, 14 May 2018 21:01:00 +0000 (17:01 -0400)]
drm/amd/display: DP YCbCr 4:2:0 support

Update MSA MISC1 bit 6 programming to handle YCbCr 4:2:0
and BT2020 cases.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Prefix TIMING_STANDARD entries with DC_
Reza Amini [Wed, 9 May 2018 19:41:47 +0000 (15:41 -0400)]
drm/amd/display: Prefix TIMING_STANDARD entries with DC_

Signed-off-by: Reza Amini <Reza.Amini@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: dal 3.1.46
Tony Cheng [Tue, 8 May 2018 16:24:40 +0000 (12:24 -0400)]
drm/amd/display: dal 3.1.46

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Added documentation for some DC interface functions
Yasir Al Shekerchi [Fri, 4 May 2018 20:53:03 +0000 (16:53 -0400)]
drm/amd/display: Added documentation for some DC interface functions

Signed-off-by: Yasir Al Shekerchi <YasirAl.Shekerchi@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: HLG support
Vitaly Prosyak [Thu, 10 May 2018 17:37:35 +0000 (12:37 -0500)]
drm/amd/display: HLG support

Low level calculation methods.

Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Refactor audio programming
Anthony Koo [Thu, 10 May 2018 18:21:47 +0000 (14:21 -0400)]
drm/amd/display: Refactor audio programming

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Dynamic HDR metadata mem buffer
Krunoslav Kovac [Tue, 8 May 2018 20:03:58 +0000 (16:03 -0400)]
drm/amd/display: Dynamic HDR metadata mem buffer

Basic framework:
- caps for reporting dynamic HDR metadata support
- allocation of frame buffer memory and storage

Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Optimize DP_SINK_STATUS_ESI range read on HPD
Nikola Cornij [Wed, 9 May 2018 21:07:36 +0000 (17:07 -0400)]
drm/amd/display: Optimize DP_SINK_STATUS_ESI range read on HPD

DP_SINK_STATUS_ESI range data is not continual, but rather than
getting it in two AUX reads, it's quicker to read more bytes in a
AUX read and then memcpy the required fields (it's only 8 more
bytes to read).

Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Default log masks should include all connectivity events
Aric Cyr [Wed, 9 May 2018 18:36:50 +0000 (14:36 -0400)]
drm/amd/display: Default log masks should include all connectivity events

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Fix indentation in dcn10 resource constructor
Hersen Wu [Tue, 8 May 2018 20:35:09 +0000 (16:35 -0400)]
drm/amd/display: Fix indentation in dcn10 resource constructor

Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: add DPCD read for Sink ieee OUI
Anthony Koo [Tue, 8 May 2018 21:08:57 +0000 (17:08 -0400)]
drm/amd/display: add DPCD read for Sink ieee OUI

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Add function to get optc active size
Eric Bernstein [Tue, 8 May 2018 20:20:52 +0000 (16:20 -0400)]
drm/amd/display: Add function to get optc active size

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: AUX will exit when HPD LOW detected
Hersen Wu [Mon, 23 Apr 2018 23:21:45 +0000 (19:21 -0400)]
drm/amd/display: AUX will exit when HPD LOW detected

This change shorten wait time when HPD LOW. With HPD LOW, without this
change, AUX routine delay is 450us. With this change, it is 42us.

Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Prefix event prints with ==Event==
Anthony Koo [Tue, 8 May 2018 15:24:05 +0000 (11:24 -0400)]
drm/amd/display: Prefix event prints with ==Event==

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: dal 3.1.45
Tony Cheng [Mon, 16 Apr 2018 17:31:05 +0000 (13:31 -0400)]
drm/amd/display: dal 3.1.45

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: upgrade scaler math
Dmytro Laktyushkin [Thu, 3 May 2018 17:42:43 +0000 (13:42 -0400)]
drm/amd/display: upgrade scaler math

This change will allow the viewport overlap to apply to rotated/
mirrored surfaces. Viewport overlap results in extra pixels being
added to viewport allowing the first few pixels to be scaled as
if there is no cut-off(mpo or pipe split) and allows us to get matching
crc's between scaled split and unsplit outputs of the same thing.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Clean up submit_channel_request
Charlene Liu [Thu, 3 May 2018 21:51:07 +0000 (17:51 -0400)]
drm/amd/display: Clean up submit_channel_request

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Vitaly Prosyak <Vitaly.Prosyak@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: pass pipe_ctx straight to blank_pixel_data
Eric Bernstein [Tue, 1 May 2018 19:21:42 +0000 (15:21 -0400)]
drm/amd/display: pass pipe_ctx straight to blank_pixel_data

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/doc: add a chapter for gpu scheduler
Nayan Deshmukh [Fri, 25 May 2018 04:45:48 +0000 (10:15 +0530)]
drm/doc: add a chapter for gpu scheduler

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/scheduler: add documentation
Nayan Deshmukh [Tue, 29 May 2018 05:53:07 +0000 (11:23 +0530)]
drm/scheduler: add documentation

convert existing raw comments into kernel-doc format as well
as add new documentation

v2: reword the overview

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Daniel Vetter <daniel@ffwll.ch>
6 years agodrm/amd/display: fix type of variable
Gustavo A. R. Silva [Fri, 15 Jun 2018 13:32:28 +0000 (08:32 -0500)]
drm/amd/display: fix type of variable

Currently, the maximum value that *counter* can reach is 255, and
code at line 150: while (counter < 1000) { implies a bigger value
could be expected.

Fix this by changing the type of variable *counter* from uint8_t
to uint16_t.

Addresses-Coverity-ID: 1470030 ("Operands don't affect result")
Fixes: 2b6199a1d1b7 ("drm/amd/display: replace msleep with udelay in fbc path")
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Fix uvd firmware version information for vega20 (v2)
Alex Deucher [Thu, 14 Jun 2018 15:24:06 +0000 (10:24 -0500)]
drm/amdgpu: Fix uvd firmware version information for vega20 (v2)

The uvd version information was not set correctly for vega20.
Rearrange the logic to set it correctly and fix the warnings
as a result.

v2: fix version formatting for userspace based on feedback from Leo

Fixes: 96ca7f298f (drm/amdgpu/vg20:support new UVD FW version naming convention)
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/vg20:support new UVD FW version naming convention
James Zhu [Wed, 6 Jun 2018 18:38:14 +0000 (14:38 -0400)]
drm/amdgpu/vg20:support new UVD FW version naming convention

Vega20 UVD Firmware has a new version naming convention:
  [31, 30] for encode interface major
  [29, 24] for encode interface minor
  [15, 8] for decode interface minor
  [7, 0] for hardware family id

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Make sure clock_voltage_limit_table on dc is valid
Rex Zhu [Wed, 13 Jun 2018 10:53:49 +0000 (18:53 +0800)]
drm/amd/pp: Make sure clock_voltage_limit_table on dc is valid

if vbios not set the max clock voltage limit table for DC mode,
Set the table as sama as the table for AC mode.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Add S3 support for OD feature
Rex Zhu [Wed, 13 Jun 2018 10:26:38 +0000 (18:26 +0800)]
drm/amd/pp: Add S3 support for OD feature

make custom values survive when S3 sleep transitions.
so not reset the od table if it is not null.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: allocate shared fence slot in VA IOCTL
Christian König [Mon, 11 Jun 2018 13:10:02 +0000 (15:10 +0200)]
drm/amdgpu: allocate shared fence slot in VA IOCTL

Per VM BOs share the reservation object with the PD and so need to
reserve a shared fence slot for the update.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoMerge branch 'drm-next-4.18' of git://people.freedesktop.org/~agd5f/linux into drm...
Dave Airlie [Fri, 15 Jun 2018 01:32:23 +0000 (11:32 +1000)]
Merge branch 'drm-next-4.18' of git://people.freedesktop.org/~agd5f/linux into drm-next

Fixes for 4.18. Highlights:
- Fixes for gfxoff on Raven
- Remove an ATPX quirk now that the root cause is fixed
- Runtime PM fixes
- Vega20 register header update
- Wattman fixes
- Misc bug fixes

Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180614141428.2909-1-alexander.deucher@amd.com
6 years agodrm/amd/powerplay: Set higher SCLK&MCLK frequency than dpm7 in OD (v2)
Kenneth Feng [Tue, 12 Jun 2018 07:07:37 +0000 (15:07 +0800)]
drm/amd/powerplay: Set higher SCLK&MCLK frequency than dpm7 in OD (v2)

Fix the issue that SCLK&MCLK can't be set higher than dpm7 when
OD is enabled in SMU7.

v2: fix warning (Alex)

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Acked-by: Rex Zhu<rezhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: remove uncessary extra gfxoff control call
Evan Quan [Tue, 12 Jun 2018 09:01:23 +0000 (17:01 +0800)]
drm/amd/powerplay: remove uncessary extra gfxoff control call

Gfxoff is already enabled in amdgpu_device_ip_set_powergating_state.
So, no need to enable it again in pp_late_init.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix parsing indirect register list v2
Evan Quan [Tue, 29 May 2018 08:31:05 +0000 (16:31 +0800)]
drm/amdgpu: fix parsing indirect register list v2

WARN_ON possible buffer overflow and avoid unnecessary dereference.

v2: change BUG_ON to WARN_ON

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/include: Update df 3.6 mask and shift definition
Shaoyun Liu [Tue, 12 Jun 2018 17:35:44 +0000 (13:35 -0400)]
drm/amd/include: Update df 3.6 mask and shift definition

The register field hsas been changed in df 3.6, update to correct setting

Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Fix OD feature enable failed on Vega10 workstation cards
Rex Zhu [Tue, 12 Jun 2018 06:26:00 +0000 (14:26 +0800)]
drm/amd/pp: Fix OD feature enable failed on Vega10 workstation cards

As hw required, soc clock must large than mclk, So we set max soc
clock to OD Max Memory clk.
But on workstation, vbios do not support OD feature, the OD max memory
clock is equal to 0. In this case, driver can support underclocking.
and set od max memory clock to the value in highest memory dpm level.
So the od max memory clock should be less than highest soc clock.
and driver should not change the soc clock.

caused by commit ca57b9b0a156
("drm/amd/pp: Allow underclocking when od table is empty in vbios")

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Fix stale buffer object (bo) use
Pratik Vishwakarma [Thu, 7 Jun 2018 06:18:40 +0000 (11:48 +0530)]
drm/amd/display: Fix stale buffer object (bo) use

Fixes stale buffer object (bo) usage for cursor plane

Cursor plane's bo operations are handled in DC code.
Currently, atomic_commit() does not handle bo operations
for cursor plane, as a result the bo assigned for cursor
plane in dm_plane_helper_prepare_fb() is not coherent
with the updates to the same made in dc code.This mismatch
leads to "bo" corruption and hence crashes during S3 entry.

This patch cleans up the code which was added as a hack
for 4.9 version only.

Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: initialize result to before or'ing in data
Colin Ian King [Wed, 6 Jun 2018 12:18:31 +0000 (13:18 +0100)]
drm/amd/pp: initialize result to before or'ing in data

The current use of result is or'ing in values and checking for
a non-zero result, however, result is not initialized to zero
so it potentially contains garbage to start with. Fix this by
initializing it to the first return from the call to
vega10_program_didt_config_registers.

Detected by cppcheck:
"(error) Uninitialized variable: result"

Fixes: 9b7b8154cdb8 ("drm/amd/powerplay: added didt support for vega10")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Acked-by: Huang Rui <ray.huang@amd.com>
[Fix the subject as Colin's comment]
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
6 years agodrm/amd/powerplay: fix wrong clock adjust sequence
Evan Quan [Wed, 6 Jun 2018 03:54:45 +0000 (11:54 +0800)]
drm/amd/powerplay: fix wrong clock adjust sequence

The clocks should be adjusted after display configuration changed.
Otherwise, the socclk and memclk may be forced on an unnecessary higher
level.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Grab/put runtime PM references in atomic_commit_tail()
Lyude Paul [Mon, 4 Jun 2018 19:35:03 +0000 (15:35 -0400)]
drm/amdgpu: Grab/put runtime PM references in atomic_commit_tail()

So, unfortunately I recently made the discovery that in the upstream
kernel, the only reason that amdgpu is not currently suffering from
issues with runtime PM putting the GPU into suspend while it's driving
displays is due to the fact that on most prime systems, we have sound
devices associated with the GPU that hold their own runtime PM ref for
the GPU.

What this means however, is that in the event that there isn't any kind
of sound device active (which can easily be reproduced by building a
kernel with sound drivers disabled), the GPU will fall asleep even when
there's displays active. This appears to be in part due to the fact that
amdgpu has not actually ever relied on it's rpm_idle() function to be
the only thing keeping it running, and normally grabs it's own power
references whenever there are displays active (as can be seen with the
original pre-DC codepath in amdgpu_display_crtc_set_config() in
amdgpu_display.c). This means it's very likely that this bug was
introduced during the switch over the DC.

So to fix this, we start grabbing runtime PM references every time we
enable a previously disabled CRTC in atomic_commit_tail(). This appears
to be the correct solution, as it matches up with what i915 does in
i915/intel_runtime_pm.c.

The one sideaffect of this is that we ignore the variable that the
pre-DC code used to use for tracking when it needed runtime PM refs,
adev->have_disp_power_ref. This is mainly because there's no way for a
driver to tell whether or not all of it's CRTCs are enabled or disabled
when we've begun committing an atomic state, as there may be CRTC
commits happening in parallel that aren't contained within the atomic
state being committed. So, it's safer to just get/put a reference for
each CRTC being enabled or disabled in the new atomic state.

Signed-off-by: Lyude Paul <lyude@redhat.com>
Acked-by: Christian König <christian.koenig@amd.com>.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
6 years agodrm/amd/powerplay: fix missed hwmgr check warning before call gfx_off_control handler
Huang Rui [Fri, 18 May 2018 02:39:16 +0000 (10:39 +0800)]
drm/amd/powerplay: fix missed hwmgr check warning before call gfx_off_control handler

Patch 9667849bbb8d: "drm/amd/powerplay: add control gfxoff enabling in late
init" from Mar 13, 2018, leads to the following static checker warning:

drivers/gpu/drm/amd/amdgpu/../powerplay/amd_powerplay.c:194
pp_late_init()
error: we previously assumed 'hwmgr' could be null (see line 185)

drivers/gpu/drm/amd/amdgpu/../powerplay/amd_powerplay.c

This patch fixes the warning to add hwmgr checking.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix CG enabling hang with gfxoff enabled
Huang Rui [Fri, 1 Jun 2018 06:41:04 +0000 (14:41 +0800)]
drm/amdgpu: fix CG enabling hang with gfxoff enabled

After defer the execution of clockgating enabling, at that time, gfx already
enter into "off" state. Howerver, clockgating enabling will use MMIO to access
the gfx registers, then get the gfx hung.

So here we should move the gfx powergating and gfxoff enabling behavior at the
end of initialization behind clockgating.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Cc: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix clear_all and replace handling in the VM (v2)
Junwei Zhang [Tue, 5 Jun 2018 09:31:51 +0000 (17:31 +0800)]
drm/amdgpu: fix clear_all and replace handling in the VM (v2)

v2: assign bo_va as well

We need to put the lose ends on the invalid list because it is possible
that we need to split up huge pages for them.

Cc: stable@vger.kernel.org
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> (v2)
Reviewed-by: David Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>