Leonard Chan [Tue, 24 May 2022 18:29:44 +0000 (11:29 -0700)]
Revert "[compiler-rt][scudo] Add missing preprocessor token" and "[compiler-rt][scudo] Simplify TBI checks"
This reverts commit
676eaa2ca967ca6ad4a84d31d6f0ebabdcf3e44b
and
f6038cdca03115da22b9e6ada5c25de4df5f42d2 since builders are still
broken.
Leonard Chan [Tue, 24 May 2022 18:11:31 +0000 (11:11 -0700)]
[compiler-rt][scudo] Add missing preprocessor token
This should fix build errors seen on bots like
https://lab.llvm.org/buildbot/#/builders/57/builds/18263.
Sotiris Apostolakis [Tue, 24 May 2022 03:04:20 +0000 (23:04 -0400)]
Recommit "[SelectOpti][5/5] Optimize select-to-branch transformation"
Use container::size_type directly to avoid type mismatch causing build failures in Windows.
Original commit message:
This patch optimizes the transformation of selects to a branch when the heuristics deemed it profitable.
It aggressively sinks eligible instructions to the newly created true/false blocks to prevent their
execution on the common path and interleaves dependence slices to maximize ILP.
Depends on D120232
Reviewed By: davidxl
Differential Revision: https://reviews.llvm.org/D120233
Peter Klausler [Thu, 19 May 2022 00:48:34 +0000 (17:48 -0700)]
[flang] Fix crash in semantics after PDT instantiation
The code in semantics that reinitializes symbol table pointers in
the parse tree of a parameterized derived type prior to a new
instantiation of the type was processing the symbols of the
derived type instantiation scope in arbitrary address order,
which could fail if a reference to a type parameter inherited from
an ancestor type was processed prior to the parent component sequence.
Fix by instantiating components of PDT instantiations in declaration
order.
Differential Revision: https://reviews.llvm.org/D126147
V Donaldson [Tue, 24 May 2022 17:06:24 +0000 (10:06 -0700)]
[flang] Alternate entry points with unused arguments
A dummy argument in an entry point of a subprogram with multiple
entry points need not be defined in other entry points. It is only
legal to reference such an argument when calling an entry point that
does have a definition. An entry point without such a definition
needs a local "substitute" definition sufficient to generate code.
It is nonconformant to reference such a definition at runtime.
Most such definitions and associated code will be deleted as dead
code at compile time. However, that is not always possible, as in
the following code. This code is conformant if all calls to entry
point ss set m=3, and all calls to entry point ee set n=3.
subroutine ss(a, b, m, d, k) ! no x, y, n
integer :: a(m), b(a(m)), m, d(k)
integer :: x(n), y(x(n)), n
integer :: k
1 print*, m, k
print*, a
print*, b
print*, d
if (m == 3) return
entry ee(x, y, n, d, k) ! no a, b, m
print*, n, k
print*, x
print*, y
print*, d
if (n /= 3) goto 1
end
integer :: xx(3), yy(5), zz(3)
xx = 5
yy = 7
zz = 9
call ss(xx, yy, 3, zz, 3)
call ss(xx, yy, 3, zz, 3)
end
Lowering currently generates fir::UndefOp's for all unused arguments.
This is usually ok, but cases such as the one here incorrectly access
unused UndefOp arguments for m and n from an entry point that doesn't
have a proper definition.
The problem is addressed by creating a more complete definition of an
unused argument in most cases. This is implemented in large part by
moving the definition of an unused argument from mapDummiesAndResults
to mapSymbolAttributes. The code in mapSymbolAttributes then chooses
one of three code generation options, depending on information
available there.
This patch deals with dummy procedures in alternate entries, and adds
a TODO for procedure pointers (the PFTBuilder is modified to analyze
procedure pointer symbol so that they are not silently ignored, and
instead hits proper TODOs).
BoxAnalyzer is also changed because assumed-sized arrays were wrongfully
categorized as constant shape arrays. This had no impact, except when
there were unused entry points.
Co-authored-by: jeanPerier <jperier@nvidia.com>
Differential Revision: https://reviews.llvm.org/D125867
Stanislav Mekhanoshin [Tue, 24 May 2022 17:47:18 +0000 (10:47 -0700)]
[AMDGPU] Disable newly added gfx90a global isel image tests. NFC.
This fixed build failure with expensive checks after D126009.
The change has added new run lines for Global ISel which has
uncovered a pre-existing problem: it does not select a correct
flavor of these image instructions.
Leonard Chan [Tue, 24 May 2022 17:51:42 +0000 (10:51 -0700)]
[compiler-rt][scudo] Simplify TBI checks
Differential Revision: https://reviews.llvm.org/D111080
Saleem Abdulrasool [Fri, 20 May 2022 20:35:28 +0000 (20:35 +0000)]
Sema: adjust assertion to account for deduced types
Previous changes for the BTF attributes introduced a new sub-tree
visitation. That uncovered that when accessing the typespec location we
would assert that the type specification is either a type declaration or
`typename`. However, `typename` was explicitly permitted. This change
predates the introduction of newer deduced type representations such as
`__underlying_type` from C++ and the addition of the GNU `__typeof__`
expression.
Thanks to aaron.ballman for the valuable discussion and pointer to
`isTypeRep`.
Differential Revision: https://reviews.llvm.org/D126093
Reviewed By: aaron.ballman, yonghong-song
Joseph Huber [Tue, 24 May 2022 17:43:52 +0000 (13:43 -0400)]
[OpenMP] Fix file arguments for embedding bitcode in the linker wrapper
Summary:
The linker wrapper supports embedding bitcode images instead of linked
device images to facilitate JIT in the device runtime. However, we were
incorrectly passing in the file twice when this option was set. This
patch makes sure we only use the intermediate result of the LTO pass and
don't add the final output to the full job.
In the future we will want to add both of these andle handle that
accoridngly to allow the runtime to either use the AoT compiled version
or JIT compile the bitcode version if availible.
Mike Rice [Tue, 17 May 2022 17:11:00 +0000 (10:11 -0700)]
[OpenMP] Add parsing/sema support for omp_all_memory reserved locator
Adds support for the reserved locator 'omp_all_memory' for use
in depend clauses with 'out' or 'inout' dependence-types.
Differential Revision: https://reviews.llvm.org/D125828
Peter Klausler [Wed, 18 May 2022 20:40:33 +0000 (13:40 -0700)]
[flang][runtime] Handle BACKSPACE after reading past EOF
An external READ(END=) that hits the end of the file must
also note the virtual position of the endfile record that
has just been discovered, so that a later BACKSPACE statement
won't end up at the wrong record.
Differential Revision: https://reviews.llvm.org/D126146
Leonard Chan [Tue, 24 May 2022 17:22:46 +0000 (10:22 -0700)]
[compiler-rt][lsan] Update CanBeAHeapPointer for AArch64
While attempting to get the 64-bit lsan allocator working for Fuchsia, I
noticed this function would incorrectly return false for pointers returned
by the 64-bit allocator. On AArch64, this function attempts to get the VMA
size dynamically by counting the number of leading zeros from the function
frame address. This will fail if the frame address is significantly below an
allocated pointer (that is, the frame address has more leading zeros than an
allocated pointer). This is possible on Fuchsia and linux (when not called
from the initial thread stack).
It seems the intended use of this function is to speed up pointer scanning by
filtering out addresses that user code might not be able to access. Other
platforms this check is done on seem to hardcode the VMA size/shift, so it
seems appropriate to do this for aarch64 as well. This implies pointers on
aarch64 where the VMA size is <64 will pass through, but bad pointers will
still be caught by subsequent scan checks.
This patch also renames the function to something more fitting of what it's
trying to do.
Differential Revision: https://reviews.llvm.org/D123814
Nathan Ridge [Tue, 24 May 2022 06:12:53 +0000 (02:12 -0400)]
[clangd] Handle '--' in QueryDriverDatabase
Fixes https://github.com/clangd/clangd/issues/1100,
a regression from D116721.
Differential Revision: https://reviews.llvm.org/D126274
Paul Robinson [Tue, 24 May 2022 17:03:20 +0000 (10:03 -0700)]
Reland "[PS5] Verify defaults to -fno-stack-size-section"
This reverts commit
efebb27b745a0d677ad2ea9aefff242c12aef29c.
Fixes typos (accidentally omitted %s from some RUN lines).
Stanislav Mekhanoshin [Wed, 18 May 2022 19:22:38 +0000 (12:22 -0700)]
[AMDGPU] Enforce alignment of image vaddr on gfx90a
Even though single address image instructions only use a single VGPR
HW accesses 4 or 5 which creates alignment requirement.
Fixes: SWDEV-316648
Differential Revision: https://reviews.llvm.org/D126009
Alex Lorenz [Thu, 19 May 2022 23:09:36 +0000 (16:09 -0700)]
[libclang] add supporting for indexing/visiting C++ concepts
This commit builds upon recently added indexing support for C++ concepts
from https://reviews.llvm.org/D124441 by extending libclang to
support indexing and visiting concepts, constraints and requires
expressions as well.
Differential Revision: https://reviews.llvm.org/D126031
Paul Robinson [Tue, 24 May 2022 16:59:57 +0000 (09:59 -0700)]
Revert "[PS5] Verify defaults to -fno-stack-size-section"
This reverts commit
28432b0f655641df7f9d079cf69ba235038d6340.
Caused some unexpected buildbot failures.
Chris Bieneman [Tue, 24 May 2022 16:51:00 +0000 (11:51 -0500)]
NFC. Clang-formatting.
Since the rest of the DirectX backend is pretty well clang-format
clean, this file should be too.
Peter Klausler [Wed, 18 May 2022 20:23:39 +0000 (13:23 -0700)]
[flang][runtime] INQUIRE(UNIT=666,NUMBER=n) must set n=666
Whether a unit number in an inquire-by-unit statement is valid or not,
it should be the value to which the NUMBER= variable is set, not -1.
-1 should be returned to NUMBER= only for an inquire-by-file statement
when the FILE= is not connected to any unit.
Differential Revision: https://reviews.llvm.org/D126145
Paul Robinson [Tue, 24 May 2022 16:47:22 +0000 (09:47 -0700)]
[PS5] Verify defaults to -fno-stack-size-section
Craig Topper [Tue, 24 May 2022 16:41:04 +0000 (09:41 -0700)]
Recommit "[RISCV] Use selectShiftMaskXLen ComplexPattern for isel of rotates."
This reverts commit
dfe513ae1bb6e788ead93b850d80d77d54cf29d3.
Tests have been changed to avoid the type legalization bug being
fixed in D126036.
Original commit message:
This will remove masks on the shift amount. We usually get this with
SimplifyDemandedBits in DAGCombine, but that's restricted to cases
where the AND has a single use. selectShiftMaskXLen does not have
that restriction.
Craig Topper [Tue, 24 May 2022 16:41:00 +0000 (09:41 -0700)]
[RISCV] Add test cases showing failure to remove mask on rotate amounts.
This is similar to tests I added in
e2f410feeab27a8bb2c015fc02bb8527702e401f that had to be reverted.
I've modified them to avoid the bug that is being fixed by D126036.
Nico Weber [Tue, 24 May 2022 15:42:34 +0000 (11:42 -0400)]
[gn build] Reformat all build files
Ran:
git ls-files '*.gn' '*.gni' | xargs llvm/utils/gn/gn.py format
Peter Klausler [Thu, 19 May 2022 16:55:29 +0000 (09:55 -0700)]
[flang] Extension: Accept Hollerith actual arguments as if they were BOZ
When a Hollerith (or short character) literal is presented as an actual
argument that corresponds to a dummy argument for which a BOZ literal
would be acceptable, treat the Hollerith as if it had been a BOZ
literal in the same way -- and with the same code -- as f18 already
does for the similar extension in DATA statements.
Differential Revision: https://reviews.llvm.org/D126144
Cyndy Ishida [Tue, 24 May 2022 13:24:02 +0000 (06:24 -0700)]
[Clang] Avoid misleading 'conflicting types' diagnostic with no-prototype decls.
Clang has recently started diagnosing prototype redeclaration errors like [rG385e7df33046](https://reviews.llvm.org/rG385e7df33046d7292612ee1e3ac00a59d8bc0441)
This flagged legitimate issues in a codebase but was confusing to resolve because it actually conflicted with a function declaration from a system header and not from the one emitted with "note: ".
This patch updates the error handling to use the canonical declaration's source location instead to avoid misleading errors like the one described.
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D126258
Nico Weber [Tue, 24 May 2022 15:40:40 +0000 (11:40 -0400)]
[gn build] (semi-automatically) port
0360b9f1599b
Louis Dionne [Tue, 24 May 2022 15:31:31 +0000 (11:31 -0400)]
[libc++][NFC] Whitespace refactoring of string.cpp for consistency and legibility
Louis Dionne [Tue, 24 May 2022 15:22:43 +0000 (11:22 -0400)]
[libc++][NFC] Move definitions around in string.cpp to reduce _LIBCPP_HAS_NO_WIDE_CHARACTERS blocks
Mogball [Tue, 24 May 2022 15:03:12 +0000 (15:03 +0000)]
[mlir] Rename mlir::SmallVector -> llvm::SmallVector
Logan Chien [Wed, 18 May 2022 20:59:08 +0000 (13:59 -0700)]
[mlir] Breakdown diagnostic string literals
This commit breaks down diagnostic string literals so that the attribute
name and enumurator names can be shared with the stringify utility
function and the "expected ", " to be one of ", and ", " can be shared
between different enum-related diagnostic.
Differential Revision: https://reviews.llvm.org/D125938
Peter Klausler [Thu, 12 May 2022 00:08:21 +0000 (17:08 -0700)]
[flang][runtime] Clean up asynchronous I/O APIs
Now that the requirements and implementation of asynchronous I/O are
better understood, adjust their I/O runtime APIs. In particular:
1) Remove the BeginAsynchronousOutput/Input APIs; they're not needed,
since any data transfer statement might have ASYNCHRONOUS= and
(if ASYNCHRONOUS='YES') ID= control list specifiers that need to
at least be checked.
2) Add implementations for BeginWait(All) to check for the error
case of a bad unit number and nonzero ID=.
3) Rearrange and comment SetAsynchronous so that it's clear that
it can be called for READ/WRITE as well as for OPEN.
The implementation remains completely synchronous, but should be conforming.
Where opportunities make sense for true asynchronous implementations of
some big block transfers without SIZE= in the future, we'll need to add
a GetAsynchronousId API to capture ID= on a READ or WRITE; add sourceFile
and sourceLine arguments to BeginWait(All) for good error reporting;
track pending operations in unit.h; and add code to force synchronization
to non-asynchronous I/O operations.
Lowering should call SetAsynchronous when ASYNCHRONOUS= appears as
a control list specifier. It should also set ID=x variables to 0
until such time as we support asynchronous operations, if ever.
This patch only removes the removed APIs from lowering.
Differential Revision: https://reviews.llvm.org/D126143
Serge Pavlov [Tue, 24 May 2022 11:30:13 +0000 (18:30 +0700)]
Fix behavior of is_fp_class on empty class set
The second argument to is_fp_class specifies the set of floating-point
class to test against. It can be zero, in this case the intrinsic is
expected to return zero value.
Differential Revision: https://reviews.llvm.org/D112025
Simon Pilgrim [Tue, 24 May 2022 14:44:44 +0000 (15:44 +0100)]
[DAG] Unroll vectorized FPOW instructions before widening that will scalarize to libcalls anyway
Followup to D125988 - FPOW is similar to FREM and will most likely scalarize to libcalls, so unroll before widening to prevent use making additional libcalls with UNDEF args.
Hans Wennborg [Tue, 24 May 2022 13:47:41 +0000 (15:47 +0200)]
[libcxx] Add sort.bench.cpp to libcxx/benchmarks/CMakeLists.txt
It was forgotten in D124740.
Differential revision: https://reviews.llvm.org/D126297
Sam Parker [Tue, 24 May 2022 14:33:21 +0000 (15:33 +0100)]
[TypePromotion] Avoid unnecessary trunc zext pairs
Any zext 'sink' should already have an operand that is in the legal
value, so avoid using a trunc and just use the trunc operand instead.
Differential Revision: https://reviews.llvm.org/D118905
Thomas Raoux [Tue, 24 May 2022 14:16:00 +0000 (14:16 +0000)]
[mlir][vector] Add new lowering mode to vector.contractionOp
Add lowering for cases where the reduction dimension is fully unrolled.
It is common to unroll the reduction dimension, therefore we would want
to lower the contractions to an elementwise vector op in this case.
Differential Revision: https://reviews.llvm.org/D126120
Simon Pilgrim [Tue, 24 May 2022 14:17:59 +0000 (15:17 +0100)]
[CostModel][X86] getScalarizationOverhead - improve extraction costs for > 128-bit vectors
We were using the default getScalarizationOverhead expansion for extraction costs, which adds up all the individual element extraction costs.
This is fine for 128-bit vectors, but for 256/512-bit vectors each element extraction also has to account for extracting the upper 128-bit subvector extraction before it can handle the element. For scalarization costs we only need to extract each demanded subvector once.
Differential Revision: https://reviews.llvm.org/D125527
Ivan Kosarev [Tue, 24 May 2022 14:12:45 +0000 (15:12 +0100)]
[AMDGPU][MC][GFX11] Support base+soffset+offset SMEM loads.
Reviewed By: dp
Differential Revision: https://reviews.llvm.org/D126207
Nikita Popov [Tue, 24 May 2022 14:08:21 +0000 (16:08 +0200)]
[InstCombine] Strip bitcasts in GEP diff fold
Bitcasts were stripped in one case, but not the other. Of course,
this no longer really matters with opaque pointers, but as I went
through the trouble of tracking this down, we may as well remove
one typed vs opaque pointer optimization discrepancy.
Nikita Popov [Tue, 24 May 2022 14:09:26 +0000 (16:09 +0200)]
[InstCombine] Add test for GEP difference with bitcasts (NFC)
Louis Dionne [Tue, 24 May 2022 13:58:04 +0000 (09:58 -0400)]
[libc++] Rename the generic-singlethreaded CI job to generic-no-threads for consistency
Nikita Popov [Tue, 24 May 2022 13:48:28 +0000 (15:48 +0200)]
[InstCombine] Use IRBuilder in freeze pushing transform (PR55619)
Use IRBuilder so that the newly created freeze instructions
automatically gets inserted back into the IC worklist.
The changed worklist processing order leads to some cosmetic
differences in tests.
Fixes https://github.com/llvm/llvm-project/issues/55619.
Nikita Popov [Tue, 24 May 2022 13:17:19 +0000 (15:17 +0200)]
[InstCombine] Add tests for freeze of load with metadata (NFC)
Sam McCall [Wed, 18 May 2022 17:24:07 +0000 (19:24 +0200)]
[pseudo] (trivial) bracket-matching
Error-tolerant bracket matching enables our error-tolerant parsing strategies.
The implementation here is *not* yet error tolerant: this patch sets up the APIs
and plumbing, and describes the planned approach.
Differential Revision: https://reviews.llvm.org/D125911
Joseph Huber [Mon, 23 May 2022 21:51:30 +0000 (17:51 -0400)]
[OpenMP] Add `-Xoffload-linker` to forward input to the device linker
We use the clang-linker-wrapper to perform device linking of embedded
offloading object files. This is done by generating those jobs inside of
the linker-wrapper itself. This patch adds an argument in Clang and the
linker-wrapper that allows users to forward input to the device linking
phase. This can either be done for every device linker, or for a
specific target triple. We use the `-Xoffload-linker <arg>` and the
`-Xoffload-linker-<triple> <arg>` syntax to accomplish this.
Reviewed By: markdewing, tra
Differential Revision: https://reviews.llvm.org/D126226
Alexey Bataev [Tue, 24 May 2022 13:01:17 +0000 (06:01 -0700)]
[SLP][NFC]Make isFirstInsertElement a weak strict ordering comparator.
To be used correctly in a sort-like function, isFirstInsertElement
function must follow weak strict ordering rule, i.e.
isFirstInsertElement(IE1, IE1) should return false.
Nabeel Omer [Tue, 24 May 2022 12:30:47 +0000 (13:30 +0100)]
[x86][DAG] Unroll vectorized FREMs that will become libcalls
Currently, two element vectors produced as the result of a binary op are
widened to four element vectors on x86 by
DAGTypeLegalizer::WidenVecRes_BinaryCanTrap. If the op still isn't legal
after widening it is unrolled into 4 scalar ops in SelectionDAG before
being converted into a libcall. This way we end up with 4 libcalls (two of
them on known undef elements) instead of the original two libcalls.
This patch modifies DAGTypeLegalizer::WidenVectorResult to ensure that if
it is known that a binary op will be tunred into a libcall, it is unrolled
instead of being widened. This prevents the creation of the extra scalar
instructions on known undef elements and (eventually) libacalls with known
undef parameters which would otherwise be created when the op gets expanded
post widening.
Differential Revision: https://reviews.llvm.org/D125988
Sylvestre Ledru [Tue, 24 May 2022 12:17:49 +0000 (14:17 +0200)]
Revert "[TableGen] Remove code beads"
It is breaking the build with:
/build/llvm-toolchain-snapshot-15~++
20220524114008+
96323c9f4c10/llvm/lib/Target/M68k/MCTargetDesc/M68kMCCodeEmitter.cpp:478:10: fatal error: 'M68kGenMCCodeBeads.inc' file not found
^~~~~~~~~~~~~~~~~~~~~~~~
1 error generated.
Remove the #include causes:
error: undefined reference to 'llvm::M68k::getMCInstrBeads(unsigned int)'
This reverts commit
f50be3d21808ae113c40a68a9ac6581f203d92d2.
Ivan Kosarev [Tue, 24 May 2022 11:32:48 +0000 (12:32 +0100)]
[Clang][CodeGen] Fix the cmse-clear-return.c test.
Caught with D125604.
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D126191
Kristof Beyls [Tue, 24 May 2022 11:46:08 +0000 (13:46 +0200)]
Minutes for security group sync-ups have moved to Discourse.
Simon Pilgrim [Tue, 24 May 2022 10:55:36 +0000 (11:55 +0100)]
[X86] scalar_widen_div.ll - remove non-generated CHECKs
These were left over from when we converted to the update_llc_test_checks script and were just matching some asm/cfi directives - we have CHECK-LABEL to do this properly now.
Anastasia Stulova [Tue, 24 May 2022 10:26:43 +0000 (11:26 +0100)]
[OpenCL] Make -cl-ext a driver option.
For generic targets such as SPIR-V clang sets all OpenCL
extensions/features as supported by default. However
concrete targets are unlikely to support all extensions
features, which creates a problem when such generic SPIR-V
binary is compiled for a specific target later on.
To allow compile time diagnostics for unsupported features
this flag is now being exposed in the clang driver.
Differential Revision: https://reviews.llvm.org/D125243
Max Kazantsev [Tue, 24 May 2022 10:22:16 +0000 (17:22 +0700)]
Fix comment in test. NFC
Max Kazantsev [Tue, 24 May 2022 10:17:05 +0000 (17:17 +0700)]
[Test] Add LICM test for PR55672 showing problem with freeze instruction
Luo, Yuanke [Tue, 24 May 2022 08:46:27 +0000 (16:46 +0800)]
[X86][AMX] Reduce the compiling time for non-amx code.
Differential Revision: https://reviews.llvm.org/D126280
Simon Pilgrim [Tue, 24 May 2022 09:45:12 +0000 (10:45 +0100)]
[X86] Add test showing failure to expand <2 x float> fpow without widening to <4 x float>
Similar to D125988 (and I have a pending follow up patch to handle fpow).
Sheng [Tue, 24 May 2022 02:53:48 +0000 (10:53 +0800)]
[TableGen] Remove code beads
Code beads is useless since the only user, M68k, has moved on to
a new encoding/decoding infrastructure.
Kito Cheng [Fri, 20 May 2022 08:24:37 +0000 (16:24 +0800)]
[RISCV][NFC] Change interface of RVVIntrinsic::getSuffixStr
This NFC patch is splited from D111617.
Using llvm::ArrayRef rather than llvm::SmallVector, ArrayRef is more generic
interface that could accept both llvm::ArrayRef and llvm::SmallVector.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D125893
Nikita Popov [Tue, 24 May 2022 08:45:29 +0000 (10:45 +0200)]
[InstCombine] Support logical and in masked icmp fold
Most of the folds implemented in this function work fine with
logical operations. We only need to be careful for the cases that
work on non-constant masks, where the RHS operand shouldn't be
poison.
This is a conservative implementation that bails out of illegal
transforms, but we could also change these to insert freeze instead.
Nikita Popov [Tue, 24 May 2022 09:10:36 +0000 (11:10 +0200)]
[InstCombine] Add tests for masked icmps with bitwise+logical and (NFC)
Nikita Popov [Tue, 24 May 2022 08:56:16 +0000 (10:56 +0200)]
[InstCombine] Use m_APInt() in asymmetric masked icmp fold
This is mostly intended as code cleanup, but it does also add
support for splat vectors to this fold.
Nikita Popov [Tue, 24 May 2022 08:49:08 +0000 (10:49 +0200)]
[InstCombine] Add splat vector test for asymmetric masked icmp fold
(NFC)
LLVM GN Syncbot [Tue, 24 May 2022 08:37:12 +0000 (08:37 +0000)]
[gn build] Port
1d1a191edcfa
Nikolas Klauser [Tue, 24 May 2022 08:32:50 +0000 (10:32 +0200)]
[libc++] Implement ranges::reverse
Reviewed By: var-const, #libc
Spies: libcxx-commits, mgorny
Differential Revision: https://reviews.llvm.org/D125752
Laramie Leavitt [Tue, 24 May 2022 08:27:37 +0000 (10:27 +0200)]
[libc++] Replace modulus operations in std::seed_seq::generate with conditional checks.
Abseil benchmarks suggest that the conditional checks result in faster code (4-5x)
as they are compiled into conditional move instructions (cmov on x86).
Reviewed By: #libc, philnik, Mordante
Spies: pengfei, Mordante, philnik, libcxx-commits
Differential Revision: https://reviews.llvm.org/D125329
Fraser Cormack [Tue, 24 May 2022 08:16:18 +0000 (09:16 +0100)]
[LegalizeTypes][NFC] Fix node name in assertion message
This was probably copy/pasted from the MSCATTER widening.
Aaron Jacobs [Tue, 24 May 2022 08:21:05 +0000 (10:21 +0200)]
[libc++] type_traits: use __is_core_convertible in __invokable_r.
This fixes incorrect handling of non-moveable types, adding tests for this case.
See [issue 55346](https://github.com/llvm/llvm-project/issues/55346).
The current implementation is based on is_convertible, which is
[defined](https://timsong-cpp.github.io/cppwp/n4659/meta.rel#5) in terms of
validity of the following function:
```
To test() {
return declval<From>();
}
```
But this doesn't work if To and From are both some non-moveable type, which the
[definition](https://timsong-cpp.github.io/cppwp/n4659/conv#3) of implicit
conversions says should work due to guaranteed copy elision:
```
To to = E; // E has type From
```
It is this latter definition that is used in the
[definition](https://timsong-cpp.github.io/cppwp/n4659/function.objects#func.require-2)
of INVOKE<R>. Make __invokable_r use __is_core_convertible, which
captures the ability to use guaranteed copy elision, making the
definition correct for non-moveable types.
Fixes llvm/llvm-project#55346.
Reviewed By: #libc, philnik, EricWF
Spies: EricWF, jloser, ldionne, philnik, libcxx-commits
Differential Revision: https://reviews.llvm.org/D125300
Nikita Popov [Tue, 24 May 2022 08:07:00 +0000 (10:07 +0200)]
[InstCombine] Handle logical and/or in recursive and/or of icmps fold
The and/or of icmps fold is also applied in reassociated form.
However, this currently only happens for bitwise and of bitwise
and, but not for bitwise and of logical and (or other combinations,
but this is the one being addressed here).
We can do this for bitwise+logical combinations as well, but need
to be a bit careful about which of the resulting ands are logical:
https://alive2.llvm.org/ce/z/WYSjGh
https://alive2.llvm.org/ce/z/guxYnz
https://alive2.llvm.org/ce/z/S5SYxY
https://alive2.llvm.org/ce/z/2rAWeW
Nikita Popov [Tue, 24 May 2022 08:04:24 +0000 (10:04 +0200)]
[InstCombine] Use different icmp pattern in test (NFC)
Use an and/or of icmp pattern that produces different code
depending on whether it is part of a logical or bitwise and/or.
Markus Lavin [Tue, 24 May 2022 07:42:07 +0000 (09:42 +0200)]
llvm-reduce: improve basic-blocks removal pass
When the single branch target of a block has been removed try updating
it to target a block that is kept (by scanning forward in the sequence)
instead of replacing the branch with a return instruction. Doing so
reduces the risk of breaking loop structures meaning that when the loop
is 'interesting' these reductions should have more blocks eliminated.
Differential Revision: https://reviews.llvm.org/D125766
Nikita Popov [Wed, 18 May 2022 15:09:36 +0000 (17:09 +0200)]
[LoopUnroll] Freeze tripcount rather than condition
This is a followup to D125754. We introduce two branches, one
before the unrolled loop and one before the epilogue (and similar
for the prologue case). The previous patch only froze the
condition on the first branch.
Rather than independently freezing the second condition, this patch
instead freezes TripCount and bases BECount on it. These are the
two quantities involved in the conditions, and this ensures that
both work on a consistent, non-poisonous trip count.
Differential Revision: https://reviews.llvm.org/D125896
Lian Wang [Tue, 24 May 2022 07:12:31 +0000 (07:12 +0000)]
[LegalizeTypes][VP] Fix OpNo in WidenVecOp_VP_SCATTER
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D126276
Fraser Cormack [Thu, 19 May 2022 13:47:40 +0000 (14:47 +0100)]
[RISCV] Ensure the entire stack is aligned to the RVV stack alignment
This patch fixes another bug in the RVV frame lowering. While some frame
objects with non-default stack IDs (such scalable-vector alloca
instructions) are considered in the target-independent max alignment
calculations, others (for example, during calling-convention lowering)
are not. This means we'd occasionally align the base of the stack to
only 16 bytes, with no way to ensure that the RVV section contained
within that is aligned to anything higher.
Reviewed By: StephenFan
Differential Revision: https://reviews.llvm.org/D125973
Fraser Cormack [Mon, 16 May 2022 09:57:32 +0000 (10:57 +0100)]
[RISCV] Fix RVV stack frame alignment bugs
This patch addresses several alignment issues in the stack frame when
RVV objects are taken into account.
One bug is that the RVV stack was never guaranteed to keep the alignment
of the stack *as a whole*. We must maintain a 16-byte aligned stack at
all times, especially when calling other functions. With the standard V
extension, this is conveniently happening since VLEN is at least 128 and
always 16-byte aligned. However, we support Zvl64b which does not
guarantee this. To fix this, the RVV stack size is rounded up to be
aligned to 16 bytes. This in practice generally makes us allocate a
stack sized at least 2*VLEN in size, and a multiple of 2.
|------------------------------| -- <-- FP
| 8-byte callee-save | | |
|------------------------------| | |
| one VLENB-sized RVV object | | |
|------------------------------| | |
| 8-byte local variable | | |
|------------------------------| -- <-- SP (must be aligned to 16)
In the example above, with Zvl64b we are decrementing SP by 12 bytes
which does not leave SP correctly aligned. We therefore introduce an
extra VLENB-sized amount used for alignment. This would therefore ensure
the total stack size was 16 bytes (48 for Zvl128b, 80 for Zvl256b, etc):
|------------------------------| -- <-- FP
| 8-byte callee-save | | |
|------------------------------| | |
| one VLENB-sized padding obj | | |
| one VLENB-sized RVV object | | |
|------------------------------| | |
| 8-byte local variable | | |
|------------------------------| -- <-- SP
A new RVV invariant has been introduced in this patch, which is that the
base of the RVV stack itself is now always aligned to 16 bytes, not 8 as
before. This keeps us more in line with the scalar stack and should be
easier to reason about. The calculation of the RVV padding has thus
changed to be the amount required to align the scalar local variable
section to the RVV section's alignment. This amount is further rounded
up when setting up the initial stack to keep everything aligned:
|------------------------------| -- <-- FP
| 8-byte callee-save |
|------------------------------|
| |
| RVV objects |
| (aligned to at least 16) |
| |
|------------------------------|
| RVV padding of 8 bytes |
|------------------------------|
| 8-byte local variable |
|------------------------------| -- <-- SP
In the example above, it's clear that we need 8 bytes of padding to keep
the RVV section aligned to 16 when using SP. But to keep SP *itself*
aligned to 16 we can't decrement the initial stack pointer by 24 - we
have to round up to 32.
With the RVV section correctly aligned, the second bug fixed by
this patch is that RVV objects themselves are now correctly aligned. We
were previously only guaranteeing an alignment of 8 bytes, even if they
required a higher alignment. This is relatively simple and in practice
we see more rounding up of VLEN amounts to account for alignment in
between objects:
|------------------------------|
| RVV object (aligned to 16) |
|------------------------------|
| no padding necessary |
|------------------------------|
| 2*VLENB RVV object (align 16)|
|------------------------------|
| VLENB alignment padding |
|------------------------------|
| RVV object (align 32) |
|------------------------------|
| 3*VLENB alignment padding |
|------------------------------|
| VLENB RVV object (align 32) |
|------------------------------| -- <-- base of RVV section
Note that a lot of the regressions in codegen owing to the new alignment
rules are correct but actually only strictly necessary for Zvl64b (and
Zvl32b but that's not really supported). I plan a follow-up patch to
take the known VLEN into account when padding for alignment.
Reviewed By: StephenFan
Differential Revision: https://reviews.llvm.org/D125787
LLVM GN Syncbot [Tue, 24 May 2022 05:44:48 +0000 (05:44 +0000)]
[gn build] Port
496156ac57da
Luo, Yuanke [Tue, 3 May 2022 10:57:25 +0000 (18:57 +0800)]
[X86][AMX] Multiple configure for AMX register.
The previous solution depends on variable name to record the shape
information. However it is not reliable, because in release build
compiler would not set the variable name. It can be accomplished with an
additional option `fno-discard-value-names`, but it is not acceptable
for users.
This patch is to preconfigure the tile register with machine
instruction. It follow the same way what sigle configure does. In the
future we can fall back to multiple configure when single configure
fails due to the shape dependency issue.
The algorithm to configure the tile register is simple in the patch. We
may improve it in the future. It configure tile register based on basic
block. Compiler would spill the tile register if it live out the basic
block. After the configure there should be no spill across tile
confgiure in the register alloction. Just like fast register allocation
the algorithm walk the instruction in reverse order. When the shape
dependency doesn't meet, it insert ldtilecfg after the last instruction
that define the shape.
In post configuration compiler also walk the basic block to collect the
physical tile register number and generate instruction to fill the stack
slot for the correponding shape information.
TODO: There is some following work in D125602. The risk is modifying the
fast RA may cause regression as fast RA is usded for different targets.
We may create an independent RA for tile register.
Differential Revision: https://reviews.llvm.org/D125075
Chen Zheng [Tue, 19 Apr 2022 07:40:17 +0000 (03:40 -0400)]
[MachineSink] replace MachineLoop with MachineCycle
MachineCycle can handle irreducible loop. Natural loop
analysis (MachineLoop) can not return correct loop depth if
the loop is irreducible loop. And MachineSink is sensitive
to the loop depth, see MachineSinking::isProfitableToSinkTo().
This patch tries to use MachineCycle so that we can handle
irreducible loop better.
Reviewed By: sameerds, MatzeB
Differential Revision: https://reviews.llvm.org/D123995
Shraiysh Vaishay [Tue, 24 May 2022 04:23:33 +0000 (09:53 +0530)]
[OpenMP][IRBuilder] `omp task` support
This patch adds basic support for `omp task` to the OpenMPIRBuilder.
The outlined function after code extraction is called from a wrapper function with appropriate arguments. This wrapper function is passed to the runtime calls for task allocation.
This approach is different from the Clang approach - clang directly emits the runtime call to the outlined function. The outlining utility (OutlineInfo) simply outlines the code and generates a function call to the outlined function. After the function has been generated by the outlining utility, there is no easy way to alter the function arguments without meddling with the outlining itself. Hence the wrapper function approach is taken.
Reviewed By: Meinersbur
Differential Revision: https://reviews.llvm.org/D71989
Peter Klausler [Tue, 17 May 2022 01:10:27 +0000 (18:10 -0700)]
[flang] Allow more forward references to ENTRY names
Forward references to ENTRY names to pass them as actual procedure arguments
don't work in all cases, exposing some basic ordering problems in
name resolution for these symbols. Refactor; create all the
necessary procedure symbols, and either function result or host association
symbols (for subroutines), at the time that the subprogrma scope is
created, so that the names exist in the scope as text "before"
the ENTRY is processed in name resolution. Some processing
remains in PostEntryStmt() so that we can check that an ENTRY with
an explicit distinct RESULT doesn't also have declarations for the
ENTRY name.
Differential Revision: https://reviews.llvm.org/D126142
Sotiris Apostolakis [Tue, 24 May 2022 04:02:00 +0000 (00:02 -0400)]
Revert "[SelectOpti][5/5] Optimize select-to-branch transformation"
This reverts commit
a111fb960108df910a864500f3b98d75d37f083c.
Sotiris Apostolakis [Tue, 24 May 2022 03:04:20 +0000 (23:04 -0400)]
[SelectOpti][5/5] Optimize select-to-branch transformation
This patch optimizes the transformation of selects to a branch when the heuristics deemed it profitable.
It aggressively sinks eligible instructions to the newly created true/false blocks to prevent their
execution on the common path and interleaves dependence slices to maximize ILP.
Depends on D120232
Reviewed By: davidxl
Differential Revision: https://reviews.llvm.org/D120233
Brad Smith [Tue, 24 May 2022 03:26:14 +0000 (23:26 -0400)]
[Hexagon] Fix test on OpenBSD
The test specifies a CPU arch but not a particular OS. So if run on
OpenBSD it acts as if it's an OpenBSD/hexagon system. OpenBSD uses
__guard_local instead of __stack_chk_guard so the test will fail. So
specify an OS other than OpenBSD fixes the test.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D126265
Hyoun Kyu Cho [Tue, 24 May 2022 03:04:40 +0000 (03:04 +0000)]
Exposes interface to free up caching data structure in DWARFDebugLine and DWARFUnit for memory management
This is minimum changes extracted from https://reviews.llvm.org/D78950. The old patch tried to add LRU eviction of caching data structure. Due to multiple layers of interfaces that users could be using, it was not clear where to put the functionality. While we work out on where to put that functionality, it'll be great to add this minimum interface change so that the user could implement their own memory management. More specifically:
* Add a clearLineTable method for DWARFDebugLine which erases the given offset from the LineTableMap.
* DWARFDebugContext adds the clearLineTableForUnit method that leverages clearLineTable to remove the object corresponding to a given compile unit, for memory management purposes. When it is referred to again, the line table object will be repopulated.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D90006
usama hameed [Mon, 23 May 2022 23:05:15 +0000 (16:05 -0700)]
updated canResolveToExpr to accept both statements and expressions. Removed unnecessary code
usama hameed [Mon, 23 May 2022 21:52:14 +0000 (14:52 -0700)]
bugfix in InfiniteLoopCheck to not print warnings for unevaluated loops
Added a separate check for unevaluated statements. Updated InfiniteLoopCheck to use new check
Differential Revision: https://reviews.llvm.org/D126246
usama hameed [Thu, 19 May 2022 23:51:34 +0000 (16:51 -0700)]
bugfix in InfiniteLoopCheck to not print warnings for unevaluated loops
Differential Revision: https://reviews.llvm.org/D126034
Wolfgang Pieb [Tue, 24 May 2022 00:08:01 +0000 (17:08 -0700)]
[NFC][Metadata] Define move constructor and move assignment operator for MDOperand.
This is a preparatory patch for the MDNode resize functionality.
Reviewed By: dexonsmith
Differential Revision: https://reviews.llvm.org/D125994
Sotiris Apostolakis [Tue, 24 May 2022 02:05:41 +0000 (22:05 -0400)]
[SelectOpti][4/5] Loop Heuristics
This patch adds the loop-level heuristics for determining whether branches are more profitable than conditional moves.
These heuristics apply to only inner-most loops.
Depends on D120231
Reviewed By: davidxl
Differential Revision: https://reviews.llvm.org/D120232
Sotiris Apostolakis [Mon, 23 May 2022 20:26:09 +0000 (16:26 -0400)]
[SelectOpti][3/5] Base Heuristics
This patch adds the base heuristics for determining whether branches are more profitable than conditional moves.
Base heuristics apply to all code apart from inner-most loops.
Depends on D122259
Reviewed By: davidxl
Differential Revision: https://reviews.llvm.org/D120231
Vy Nguyen [Tue, 24 May 2022 00:59:18 +0000 (07:59 +0700)]
[lld-macho][nfc] Run clang-format on lld/MachO/*.{h,cpp}
- fixed inconsistent indents and spaces
- prevent extraneous formatting changes in other patches
Differential Revision: https://reviews.llvm.org/D126262
Peter Klausler [Wed, 11 May 2022 21:32:59 +0000 (14:32 -0700)]
[flang] Ignore BIND(C) binding name conflicts of inner procedures
The binding names of inner procedures with BIND(C) are not exposed
to the loader and should be ignored for potential conflict errors.
Differential Revision: https://reviews.llvm.org/D126141
Peter Klausler [Wed, 11 May 2022 21:13:50 +0000 (14:13 -0700)]
[flang] Allow global scope names that clash with intrinsic modules
Intrinsic module names are not in the user's namespace, so they
are free to declare global names that conflict with intrinsic
modules.
Differential Revision: https://reviews.llvm.org/D126140
Xeonacid [Tue, 24 May 2022 00:58:23 +0000 (02:58 +0200)]
[RISCV] Make old JIT ExecutionEngine tests unsupported
Make old JIT ExecutionEngine tests unsupported for RISCV, like many other architectures included.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D126188
Peter Klausler [Wed, 11 May 2022 20:15:59 +0000 (13:15 -0700)]
[flang] Fix character length calculation for Unicode component
The character length value in the derived type component information table
entry is already in units of characters, not bytes, so don't divide by the
per-character byte size.
Differential Revision: https://reviews.llvm.org/D126139
Sam Clegg [Fri, 20 May 2022 21:39:33 +0000 (14:39 -0700)]
[lld][WebAssembly] Allow use of statically allocated TLS region.
It turns out we were already allocating static address space for TLS
data along with the non-TLS static data, but this space was going
unused/ignored.
With this change, we include the TLS segment in `__wasm_init_memory`
(which does the work of loading the passive segments into memory when a
module is first loaded). We also set the `__tls_base` global to point
to the start of this segment.
This means that the runtime can use this static copy of the TLS data for
the first/primary thread if it chooses, rather than doing a runtime
allocation prior to calling `__wasm_init_tls`.
Practically speaking, this will allow emscripten to avoid dynamic
allocation of TLS region on the main thread.
Differential Revision: https://reviews.llvm.org/D126107
Hendrik Greving [Fri, 13 May 2022 17:53:13 +0000 (10:53 -0700)]
[BasicBlockUtils] Do not move loop metadata if outer loop header.
Fixes a bug preventing moving the loop's metadata to an outer loop's header,
which happens if the loop's exit is also the header of an outer loop.
Adjusts test for above.
Fixes #55416.
Differential Revision: https://reviews.llvm.org/D125574
Hendrik Greving [Mon, 16 May 2022 14:34:04 +0000 (07:34 -0700)]
[BasicBlockUtils] Add corner case test for loop metadata.
Adds a test to expose #55416.
Differential Revision: https://reviews.llvm.org/D125696
Mehdi Amini [Mon, 16 May 2022 10:33:00 +0000 (10:33 +0000)]
Apply clang-tidy fixes for modernize-use-bool-literals in Parser.cpp (NFC)
Mehdi Amini [Mon, 16 May 2022 10:24:43 +0000 (10:24 +0000)]
Apply clang-tidy fixes for modernize-use-override in SparseTensorUtils.cpp (NFC)
Mehdi Amini [Mon, 16 May 2022 10:09:28 +0000 (10:09 +0000)]
Apply clang-tidy fixes for performance-unnecessary-value-param in Utils.cpp (NFC)