zink: improve samplerview update flagging

we shouldn't actually need to use the hash value here now that the
surfaces and bufferviews have been deduplicated

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10849>

zink: abstract descriptor functionality and make descriptor structs private

the first step to adding modular descriptor managers is to isolate the existing one
so that it can be easily swapped out

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10849>

zink: replace has_descriptors program member with a util function

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10849>

zink: pass descriptor type to set layout create()

this will be useful in the future

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10849>

zink: unify pipeline layout creation and move to descriptor_program_init

the descriptor layouts are the last component needed to create the pipeline
layout, so it makes sense to streamline setup by having the pipeline layout
created from a single place for both types of pipelines

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10849>

zink: make a public util function for allocating descriptor sets

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10849>

zink: make descriptor_layout_get a public util function

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10849>

zink: rename ptr_add_usage -> batch_ptr_add_usage

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10849>

egl/android: check front rendering support for cros gralloc

Enable EGL_KHR_mutable_render_buffer when below conditions are met:
1. Driver part implementation of this extension is available
2. Loader part implementation of this extension is available
3. ClientAPIs must be OpenGL ES bits (ES, ES2 or ES3)
4. Gralloc is cros gralloc and it supports front render usage query

(4) is optional as long as another gralloc supports similar query.

Upon window surface creation, if the surface type has mutable render
buffer, then append the cached front rendering usage to the existing
usage and properly set to the ANativeWindow.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10685>

gallium/dri: implement EGL_KHR_mutable_render_buffer

Tested with low-lantency stylus apps with this extension enabled, no
regression on the cts.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10685>

gallium/st: add a back buffer fallback for front rendering

Unlike front buffer used by big GL API for front rendering,
EGL_KHR_mutable_render_buffer together with ES redirects GL_BACK to the
front buffer.

This patch adds a fallback to use back buffer and ensures no behavior
change for unrelated frontends.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10685>

intel/isl: Fix HiZ+CCS comment about ambiguates

Note that CCS isn't ambiguated during a HiZ ambiguate. Dumping the CCS
surface after a HiZ ambiguate shows that the CCS is unchanged.

Fixes: 98dc7f56b7d ("intel/isl: Add a separate ISL_AUX_USAGE_HIZ_CCS_WT")
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9112>

anv,iris: Port the D16 workaround stalls to BLORP

Commit cd40110420b added stalls before register writes that occur when
drivers emit depth stencil packets. However, it only did so for
non-BLORP draw calls. Since those packets are sometimes emitted during
BLORP calls, add stalls there too.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4574
Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10939>

intel: Limit the D16 workarounds to Gfx12.0

The workarounds introduced in cd40110420b are no longer needed on
Gfx12.5.

Suggested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10939>

ci: add VKD3D-Proton testsuite job for radv's Navy Flounder

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10870>

ci: add VKD3D-Proton testsuite runner

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10870>

ci: include VKD3D-Proton tests into the VK test container

Instead of installing the distribution package, build and install
locally, including the tests.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10870>

ci: add radv's trace job for Navy Flounder

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10870>

ci: uprev DXVK to 1.8.1

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10870>

ci: uprev apitrace to 10.0

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10870>

ci: remove radv's trace job for Polaris10

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10870>

ci: update radv's trace job tag for Raven

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10870>

util/u_thread: fix u_thread_setname for long names

"WSI swapchain queue", set by vulkan/wsi/x11, is longer than 15
characters.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10935>

radeonsi: remove DFSM after we discovered how bad it is

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

radeonsi: disable DFSM on gfx9 by default because it decreases performance a lot

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

radeonsi: implement threaded context callbacks for resource busy checking

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

radeonsi: generate buffer_id_unique for u_threaded_context

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

radeonsi: allow changing the NGG subgroup size to 256 but don't change it yet

Currently, 128 seems to have the best performance.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

radeonsi: rewrite the prefix sum computation for shader culling

Instead of storing the vertex mask per wave into LDS and then computing
the prefix sum, store 8-bit bitcounts (vertex counts) of the vertex masks
into LDS. This allows us to compute the sum using v_sad_u8, which computes
a sum of 4 i8vec4 components in one instruction.

Each i8vec4 of vertex counts is loaded in parallel threads (one dword
per thread) instead of all being loaded in thread 0, and readlane copies
them to SGPRs instead of readfirstlane.

LDS is no longer initialized before culling. Instead, the counts for
inactive waves are masked with AND later.

Incorrect old comments are also fixed.

This change removes 80 bytes from the code size, and it allows increasing
the workgroup size from 128 to 256. (which is the main motivation for this)

Now changing the workgroup size with wave64 has no effect on the code size.
Switching to wave32 with 8 waves even generates slightly smaller code than
wave64 with 4 waves.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

radeonsi: add missing threaded_resource_deinit calls in fail paths

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

radeonsi: add a gfx10 hw bug workaround with the barrier before gs_alloc_req

Fixes: 8845a23698c - amd: add NAVI10 PCI IDs

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

radeonsi: remove 8 bytes from si_resource, turn other 4 bytes into padding

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

radeonsi: change si_resource::alignment to alignment_log2 for better packing

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

radeonsi: improve generated culling code by adding optimization barriers

This removes a lot of instructions and 16 bytes from the code size.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

radeonsi: re-enable fast launch with indexed tri strips because it doesn't hang

I don't know which change fixed this, but I can't reproduce the hang anymore.

Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

radeonsi: remove a twice duplicated workaround for VERT_GRP_SIZE

This enables better lane occupancy.

Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

radeonsi: fix the fast launch vert/prim thread counts if they are trimmed

This fixes the case when the counts were out of sync because one of them
was decreased.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

radeonsi: don't use GS fast launch with small instances

Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

radeonsi: don't disable L2 caching for staging textures

Uncached access can be slow if the box is not aligned nicely.
Also, caching in L2 might enable bigger PCIe bursts.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

radeonsi: always use the L2 LRU cache policy for faster clears and copies

Waves and CP DMA can finish sooner if L2 doesn't do any evictions, which
is hard to predict.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

radeonsi: fix a coherency issue when VS memory stores are not visible in PS

If a shader has no param exports (no varyings), the pixel shader can start
after the VS position is written before the vertex shader finishes.
The fix is to wait for the memory stores before the position export.

The code needs to be restructured. First prepare param exports to get
nr_param_exports, then emit position exports with the wait, and then
emit param exports.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

radeonsi: add a gfx10 bug workaround for NOT_EOP

Fixes: cc24ec8c077 - radeonsi: set NOT_EOP for back-to-back draws on gfx10+

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

radeonsi: handle PIPE_CAP_MAX_VERTEX_BUFFERS

no change in behavior because the value is the same as the default

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

radeonsi: remove unused SI_IMAGE_ACCESS_AS_BUFFER

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

winsys/amdgpu: don't hold a mutex while accessing is_shared

It adds overhead to amdgpu_bo_wait and I'm not sure whether the mutex
is even needed.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

ac/llvm: don't draw the primitive for the dummy export workaround for Navi1x

for conservative rasterization

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

ac/llvm: set range metadata on mbcnt and deduplicate get_thread_id

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

ac/llvm: allow ac_build_optimization_barrier with SGPRs, pointers, and metadata

sgpr=true prevents moving the value to a VGPR.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

ac/llvm: expose set_range_metadata to more users

I sometimes use it for experiments. It will be used later.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

ac/llvm: set target features per function instead of per target machine

This is a cleanup that allows the removal of the wave32 target machine and
the wave32 pass manager.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

ac/gpu_info: set has_zero_index_buffer_bug for Navi12 too

Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

amd: fix incorrect addrlib comment for HTILE equations

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

amd/registers: regenerate json files without 32-bit register fields

Only a few of those were used in drivers.

Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

amd/registers: don't generate 32-bit register fields

This removes confusing register types due to deduplication, such as:
   "name": "SQ_WAVE_TTMP10",
   "type_ref": "SPI_SHADER_USER_DATA_PS_0"

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>

radv: remove an useless TODO for dynamic line width

We can't do anything it seems.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10881>

radv: ignore dynamic blend constants if blend isn't enabled

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10881>

aco: Don't eliminate exec write when it's used by a copy later.

Fixes: bc130497472cb4ec4ec60695ed99b169d6681118
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10920>

panfrost: Add message preload to pan_shader_info

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10967>

panfrost: Add Message Preload descriptor XML

New to v7, allows executing up to +LD_VAR_IMM or +VAR_TEX instructions
before starting the shader.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10967>

panfrost/ci: Run jobs with PAN_MESA_DEBUG=sync

This way if there's a fault, the pipeline won't accidentally pass
and let bugs slip into main. This seems to have occurred on both T720
and G72, leading to flakes on both. I want flakeless CI, so this is a
step in eliminating flakes before they hit the tree.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10938>

panfrost/ci: Remove reference to dated flag

This was removed ages ago, nobody updated it.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10938>

panfrost/ci: Disable terrain trace

It's reliably faulting in CI but not locally, and I can't figure out
what the difference could possibly be. Regardless I can't fix the fault
otherwise, and faultless CI matters more than losing a single trace
(from an app I manually test anyway).

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10938>

panfrost: Increase tiler_heap max allocation to 64MB

We previously allocated only 16MB, but this isn't always enough. Now
that we have growable (heap) on recent kernels, there's not much reason
to try to shrink this allocation.

Fixes OUT_OF_MEMORY fault on furmark trace.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10938>

panfrost: Remove minimal mode

Superseded by abort-on-fault. It didn't work correctly in the presence
of MMU faults anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10938>

panfrost: Abort on faults in SYNC mode

This allows failing fast (optionally still tracing, if set with
PAN_MESA_DEBUG=trace) when a GPU fault is introduced. This is better
behaviour for both use cases:

1. When debugging a known fault, setting this mode together with trace
   will stop the driver as soon as a buggy command stream is submitted,
   and the offending stream will be the last trace file.

2. When running test suites (particularly in CI), setting this mode
   will detect faults and crash, causing the pipeline to fail fast as
   opposed to incorrectly marking the run green if the test happens to
   pass despite the faults and slow downs.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10938>

panfrost: Lower max inputs again

Due to Midgard ABI silliness. We could fix this properly but I'm not
aware of any app that needs more than 16, so let's just revert to the
behaviour matching the DDK.

Fixes: fdbf8c96fe2 ("panfrost: Use natural shader limits")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10938>

etnaviv: flush used render buffers on context flush when neccessary

Some resources like backbuffers are explicitly flushed by the frontend
at the appropriate time, others however won't get flushed explicitly.
Remember those resources when they get emitted as a render buffer and
flush them on a context flush to make their content visible to other
entities sharing the buffer.

We still keep the optimized path for most resources where the frontend
promises to do the flushing for us and only enable implicit flushing
when a buffer handle is exported/imported without the
PIPE_HANDLE_USAGE_EXPLICIT_FLUSH flag set.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7603>

etnaviv: remove double assigment of surface->texture

surf->base.texture is already assigned earlier via a proper
pipe_resource_reference call. Remove the superfluous assignement.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7603>

frontend/dri: add EXPLICIT_FLUSH hint in dri2_resource_get_param

dri2_resource_get_param() is called from two different places right now.
Only one of them adds the EXPLICIT_FLUSH hint to the handle usage, which
may disable the optimizations provided by this hint without a reason.

Make sure to always add this hint when appropriate.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7603>

intel/perf: rename metric descriptions

There is an effort to drop the "Gen" prefix from much of our codebase.
This just applies this to the metrics.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10930>

intel/perf: update Gen9/11 programming for AsyncCompute

Adding a register, similar to what was done for RenderBasic.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10930>

intel/perf: add EHL availability condition to HDCAndSF counters

The availability of those counters depends on the topology.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10930>

intel/perf: update Gen11 RenderBasic programming

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10930>

intel/perf: update Gen11 RenderBasic programming

Simple order change.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10930>

intel/perf: update gen9/11 TestOa configs

Programming an additional FLEX register.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10930>

v3dv: expose VK_KHR_maintenance2

We don't do anything for input attachment aspects read by a subpass
since it doesn't have performance implications for us.

We also ignore the the new depth stencil layouts because they don't
have practical implications for our implementation.

We also ignore the new usage info for views since we are not currently
making decisions about views based on their usage.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10951>

v3dv: allow creating uncompressed views from compressed images and vice versa

Relevant CTS tests (requires VK_KHR_maintenance2):
dEQP-VK.image.texel_view_compatible.*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10951>

v3dv: fix texture_size()

The uniform data for the texture size as produced by the compiler
contains the texture index directly and is not packed with
v3d_unit_data_create, so using v3d_unit_data_get_unit is not
correct.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10951>

v3dv: implement VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_POINT_CLIPPING_PROPERTIES

Relevant CTS test (requires VK_KHR_maintenance2);
dEQP-VK.clipping.clip_volume.clipped.large_points

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10951>

zink: simplify emit_load_const

This is the combination of two simplifications I spotted while
researching some other issue:

1. We can use nir_const_value_as_uint to save some conditionals
2. We can unify the vector and scalar code-paths to reduce some
   duplicated logic.

While we're at it, switch to using NIR_MAX_VEC_COMPONENTS rather than a
dynamic array size on the stack, because that tends to generate better
code.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10956>

ci/piglit: Use wget instead of ci-fairy to check a file exists

ci-fairy minio ls will try to list files in the path given, which for
trace buckets is generally forbidden. We don't really need to do any
listing in this case, so use wget instead to check that the reference
image doesn't exist yet.

Previous to this patch, trace jobs would re-upload all reference images
to minio every time because they wouldn't be able to verify that the
reference image was already there. Jobs would often take up to 4 minutes
needlessly re-uploading these files.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10953>

radv: fix AHB leak upon exportable allocation

A successful AHardwareBuffer_allocate itself will increase a refcount on
the newly allocated AHB. For the import case, the implementation must
acquire a reference on the AHB. So if we layer the exportable allocation
on top of AHB allocation and AHB import, we must release an AHB
reference to avoid leak.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10940>

anv: fix AHB leak upon exportable allocation

A successful AHardwareBuffer_allocate itself will increase a refcount on
the newly allocated AHB. For the import case, the implementation must
acquire a reference on the AHB. So if we layer the exportable allocation
on top of AHB allocation and AHB import, we must release an AHB
reference to avoid leak.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10940>

pan/mdg: Try scheduling load/store ops in pairs

If there are an even number of load/store ops to be scheduled, and
only one load/store op is available for scheduling, try using another
instruction type.

Helps bundle count at the cost of register pressure.

total instructions in shared programs: 333405 -> 333599 (0.06%)
instructions in affected programs: 27576 -> 27770 (0.70%)
helped: 43
HURT: 69
helped stats (abs) min: 1 max: 61 x̄: 5.49 x̃: 1
helped stats (rel) min: 0.18% max: 11.71% x̄: 2.27% x̃: 1.75%
HURT stats (abs)   min: 1 max: 95 x̄: 6.23 x̃: 2
HURT stats (rel)   min: 0.06% max: 32.42% x̄: 2.59% x̃: 1.53%
95% mean confidence interval for instructions value: -0.93 4.40
95% mean confidence interval for instructions %-change: -0.09% 1.53%
Inconclusive result (value mean confidence interval includes 0).

total bundles in shared programs: 155785 -> 152371 (-2.19%)
bundles in affected programs: 83689 -> 80275 (-4.08%)
helped: 2538
HURT: 110
helped stats (abs) min: 1 max: 59 x̄: 1.53 x̃: 1
helped stats (rel) min: 0.14% max: 22.52% x̄: 8.71% x̃: 7.69%
HURT stats (abs)   min: 1 max: 92 x̄: 4.32 x̃: 1
HURT stats (rel)   min: 0.21% max: 55.76% x̄: 4.61% x̃: 2.86%
95% mean confidence interval for bundles value: -1.41 -1.17
95% mean confidence interval for bundles %-change: -8.37% -7.94%
Bundles are helped.

total quadwords in shared programs: 264143 -> 260520 (-1.37%)
quadwords in affected programs: 141705 -> 138082 (-2.56%)
helped: 2560
HURT: 96
helped stats (abs) min: 1 max: 15 x̄: 1.49 x̃: 1
helped stats (rel) min: 0.06% max: 14.29% x̄: 5.62% x̃: 5.00%
HURT stats (abs)   min: 1 max: 11 x̄: 2.02 x̃: 2
HURT stats (rel)   min: 0.12% max: 6.20% x̄: 1.94% x̃: 1.47%
95% mean confidence interval for quadwords value: -1.42 -1.31
95% mean confidence interval for quadwords %-change: -5.50% -5.20%
Quadwords are helped.

total registers in shared programs: 21709 -> 22156 (2.06%)
registers in affected programs: 2684 -> 3131 (16.65%)
helped: 55
HURT: 470
helped stats (abs) min: 1 max: 2 x̄: 1.05 x̃: 1
helped stats (rel) min: 6.67% max: 40.00% x̄: 15.37% x̃: 14.29%
HURT stats (abs)   min: 1 max: 4 x̄: 1.07 x̃: 1
HURT stats (rel)   min: 6.67% max: 100.00% x̄: 31.63% x̃: 25.00%
95% mean confidence interval for registers value: 0.79 0.91
95% mean confidence interval for registers %-change: 24.69% 28.72%
Registers are HURT.

total threads in shared programs: 24450 -> 24360 (-0.37%)
threads in affected programs: 234 -> 144 (-38.46%)
helped: 12
HURT: 63
helped stats (abs) min: 1 max: 2 x̄: 1.50 x̃: 1
helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%
HURT stats (abs)   min: 1 max: 2 x̄: 1.71 x̃: 2
HURT stats (rel)   min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00%
95% mean confidence interval for threads value: -1.49 -0.91
95% mean confidence interval for threads %-change: -38.74% -13.26%
Threads are [HURT].

total loops in shared programs: 286 -> 286 (0.00%)
loops in affected programs: 0 -> 0
helped: 0
HURT: 0

total spills in shared programs: 521 -> 593 (13.82%)
spills in affected programs: 260 -> 332 (27.69%)
helped: 8
HURT: 9

total fills in shared programs: 1598 -> 1659 (3.82%)
fills in affected programs: 839 -> 900 (7.27%)
helped: 9

HURT: 10
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5745>

panfrost: Only link varyings once in good conditions

If the varying descriptors will always be the same for a given shader
variant (certainly true if none of separable shaders, transform
feedback, or point sprites are used), we only need to link once. Now
that pan_pool supports both owned and unowned modes, we have the
flexibility to reuse the code path for both allocation strategies.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10954>

panfrost: fix GL_EXT_multisampled_render_to_texture regression

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Fixes: ff3eada7eb4 ("panfrost: Use the generic preload and FB helpers in the gallium driver")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10962>

amd: add Beige Goby support

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10878>

amd: add Yellow Carp support

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10878>

radeonsi: simplify the NGG culling vertex count heuristic

This removes another chip-specific switch.
It enables a lower threshold on Navi1x, which should be fine.

Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10878>

mesa/st: Fix iris regression with clip distances.

In general gallium shaders are all SSO and it's up to the driver to handle
lining up varying storage between stages at draw time.  However, there's a
NIR option "unify_interfaces" that iris uses which applies to non-SSO (as
indicated by nir->info.separate_shader) shaders and makes the inputs_read
and outputs_written match up at GLSL-to-NIR link time, and then iris then
avoids any lowering passes that would add new varyings.

By introducing info gathering after variant creation (because all I knew
was "gallium is always SSO"), I broke the unify_interfaces link-time setup
on iris.  Just skip that when the unify_interfaces flag is set, and add
some asserts to catch anyone trying to mix unify_interfaces with known
varying-adjusting lowering passes.

Closes: #4450
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10876>

ci/freedreno: Add glx-copy-sub-buffer to flakes on a530 and a630.

A630 just had one sample count marked, but when piglit's been shuffled,
samples=4 and non-msaa have showed up too.  Looks like from our history
a530 is flaky on it too.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10933>

ci/freedreno: Also mark waitformsc as flaky.

glx@glx_arb_sync_control@glxgetmscrateoml is the only non-flaky (so far)
arb_sync_control test on a630.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10933>

ci/freedreno: Mark a630 glx-visuals-depth/stencil as piglit flakes.

These seem to be present from the beginning of piglit runs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10933>

ci/freedreno: Consolidate ssbo.fragment_binding_array flake annotation.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10933>

ci/freedreno: Drop VK flake annotations not seen in the last ~year.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10933>

ci/freedreno: Add a link explaining get_display_plane_capabilities

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10933>

ci/freedreno: Drop a630 flake annotation from the go-fast changes.

The async fix seems to have fixed it, haven't seen this one since May 3rd.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10933>

ci/freedreno: Clear stale validation failure flake annotation.

Haven't seen it in my current set of IRC logs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10933>

ci/freedreno: Clear compswap flake annotation.

These flakes disappeared around 2020-08 and the only sign since then has
been some flakes on versions of the ir3 RA rewrite.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10933>

gbm: list to stderr all the missing extension

This way people have a fighting chance of figuring out what's wrong.

v2: add gbm: prefix to the warning (Simon Ser)

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10732>