review.tizen.org Git - platform/upstream/mesa.git/log

radeon/vcn: Add FW header flag to enable VP9 header parsing

set flags to enable VP9 uncompressed header parsing in FW and extract
quantization and loop filter parameters.

Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12703>

zink: fix PIPE_SHADER_CAP_FP16_DERIVATIVES handling

this requires 16bit io, not just alus

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12634>

zink: handle bo struct types that are just a runtime array

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12634>

zink: handle 8/16bit ssbo storage

this is a bit gross, but basically just add an array of extra spvids
so that each bitsize can have its own variables to keep the types in sync

glsl can't do this, but (future) internal mesa shaders can

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12634>

zink: implement nir_op_pack_half_2x16_split

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12634>

zink: lower 32_2x16_split pack/unpack instructions

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12634>

zink: hook up 8/16bit storage exts

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12634>

zink: add 8bit alu handling

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12634>

zink: fix PIPE_CAP_DRAW_PARAMETERS export

before 1.2, assume this is available if the extension is there, otherwise
require the feature

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12710>

zink: always emit sample id 0 for non-msaa texel pointers in ntv

in practice this shouldn't matter since the sample id must always be zero,
but it's still a spec violation

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12710>

zink: move drawid_broken to unhashed pipeline state

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12660>

zink: move point sprite rasterizer bits to unhashed pipeline state

avoid reading values that aren't part of the pipeline state

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12660>

zink: add pipeline state flag for determining if output type is points

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12660>

zink: move sample part of fs key to renderpass

this is more accurate

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12660>

zink: remove tcs shader keys

these never did anything and need a rework to become useful, assuming
I even find a case where such a thing would be needed

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12660>

zink: hash blend state pointers on creation

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12660>

turnip: re-emit vertex params after they are invalidated

Constants could be invalidated via HLSQ_INVALIDATE_CMD which is
emitted when new pipeline is bound and in CmdClearAttachments.
Also they become invalid after secondary cmd execution.

Fixes geometry flickering in Genshin Impact
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5313
Fixes: 815a85dd7c44f4be4cbf5b351836c921a7a923fd "turnip: do not re-emit same vs params"
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12684>

freedreno/registers: add a6xx media formats

Define hardware formats which correspond to media formats.

DPU/CAMSS/VENUS/CDSP can consume/produce buffers in these formats with UBWC

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12740>

i915g: Reject non-unrolled loops or non-flattend IFs at link time.

i915 has no support for control flow, so we need to link-fail shaders that
fail to unrooll loops. This is valid for GLES2, and non-conformant but
the best we can do for GL2.

Note that we still have some dEQP failures where loops that should be
unrollable and thus are required to be supported don't get unrolled
(#4979).

Closes: #4978
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12218>

mesa/st: Add an optional GLSL link fail msg to finalize_nir.

GLES2 drivers are allowed to reject some GLSL constructs, like dynamic
loop bounds (which neither i915g nor vc4 can fully support), but gallium
hasn't had any way to trigger a link failure. Add a return msg to the
finalize_nir hook, which is called at the end of GLSL linking, and use
that. This means that some other callers of finalize need to do something
with the msg, and we (for now) just throw it away.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12218>

i915g: Add finalize_nir.

This allows mesa/st to do some more optimization of state variables, but
more importantly it will be what we use to do GLSL link-time errors for
loops.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12218>

i915g: Expose PIPE_CAP_TGSI_TEXCOORD.

We want to be able to use finalize_nir, but doing so requires this flag to
be set because not having it is incompatible with being able to finalize
twice (since the texcoord workaround varyings shift happens at variant
time rather than link time).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12218>

i915g: Simplify the process of texcoord mapping to TGSI semantics.

Custom index-as-semantic defines and extra bool flags at state update time
are unnecessary if we just store the semantics and index that each
texcoord should be.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12218>

mesa/st: Add an assertion for finalize_nir versus PIPE_CAP_TEXCOORD.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12218>

cso: Revert using FS sampler count for other stages at context unbind.

You shouldn't be asking drivers without VS texturing to unbind VS
textures, which was breaking i915g.

Fixes: 802e43a6b587 ("gallium/cso: add unbind mask for cso restore")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12218>

nir/lower_amul: Fix usage of nir_foreach_src()

nir_foreach_src() bails after cb returns false for any src. Which isn't
the behavior we were looking for. Move progress flag to state struct
instead, so we don't skip visiting some sources.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12732>

nir/lower_amul: Handle load/store_global

These need more than 24b.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12732>

aco/ra: don't use ds_write_b8_d16_hi/ds_write_b16_d16_hi on GFX8

GFX8 doesn't support these opcodes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: c75138ed640 ("aco/ra: refactor subdword definition info")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12721>

broadcom/compiler: check instruction belongs to current block

Check in the ldunif optimization if the current instruction belongs to
current block.

These avoids again searching the instruction when current block is not
correctly set, as it happened in
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12339 and in
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12221.

v2:
- Remove extra blank line (Iago)

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12358>

broadcom/compiler: don't enable early fragment tests if shader writes Z

We had an optimization to auto-enable early fragment tests when a shader
didn't have side effects, but of course, we cannot do that this if the
shader writes Z, as in that case the fragment tests need to use the
value written from the shader.

Also, if the shader enables early fragment tests, then any shader Z
writes should be ignored.

Fixes:
dEQP-VK.spirv_assembly.instruction.graphics.early_fragment.*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12736>

v3dv: honor VkPhysicalDeviceFeatures2 in pNext chain of VkDeviceCreateInfo

Fixes:
dEQP-VK.robustness.buffer_access.through_pointers.*.reads.*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12718>

nv50/ir: Add DeadCodeElim constructor.

Fix defect reported by Coverity Scan.

Uninitialized scalar field (UNINIT_CTOR)
member_not_init_in_gen_ctor: The compiler-generated constructor
for this class does not initialize deadCount.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12697>

freedreno: use OUT_WFI for emit_marker

This is only used pre-a5xx, where we want OUT_WFI. Tested on FD420.

Fixes: 8651cfbbf0 (freedreno: emit_marker() cleanup)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12734>

clover: Don't remove sampler/image uniforms

Otherwise we fool nir_shader_gather_info() into telling us there are no
samplers/images.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12733>

ci/windows: Build spirv-to-dxil

Reviewed-by: Enrico Galli <enrico.galli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12728>

spirv2dxil: Fix build after spirv_to_dxil signature change

Fixes: ada05759 ("spirv_to_dxil: Convert out parameters to a single object")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5322
Reviewed-by: Enrico Galli <enrico.galli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12728>

util/fossilize_db: Don't corrupt keys during entry read.

We change the hash that is still used to set entry->key.

Fixes: d2d642cc014 "util/fossilize_db: Only allocate entries after full read."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12725>

osmesa: Add a unit test for resizing buffers.

This should cover both the former use-after-free of the old pixel buffer
when moving the context to a new pixel buffer, and also successful moving
to a different-sized pixel buffer.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12685>

gallium/osmesa: fix buffer resizing

Generate a new buffer if OSMesaMakeCurrent is called with a new size
Fix a use-after-free error when the old buffer is destroyed

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5276
Fixes: 26c6f6cfbb6 ("gallium/osmesa: Remove the broken buffer-reuse scheme.")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12685>

tgsi_to_nir: force int type for LAYER output

this otherwise gets confused as a vec4 most of the time

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12709>

freedreno/ir3: Use LDIB for coherent image loads on a5xx.

If the coherent flag is present, then we need to not have an incoherent
cache between us and previous stores to the image that were also decorated
as coherent. isam apparently (unsurprisingly) goes through a texture
cache. Use ldib instead, so that we don't get the wrong result.

We would need a similar fix for a4xx, but that uses ldgb and I don't
have hardware to test on.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12704>

freedreno/ir3: Add encode/decode support for a5xx's LDIB.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12704>

freedreno/ir3: Refactor a3xx ibo/ssbo load/store instruction XML.

There are fields common to both loads and stores, but not resinfo. Move
them to a common bitset to reduce duplication.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12704>

freedreno/ir3: Clarify what's going on in a4xx SSBO atomics.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12704>

freedreno/ir3: Don't use isam for coherent image loads on a6xx.

If the coherent flag is present, then we need to not have an incoherent
cache between us and previous stores to the image that were also decorated
as coherent. isam apparently (unsurprisingly) goes through a texture
cache. Use ldib instead, so that we don't get the wrong result.

We need a similar fix for pre-a6xx, but we don't have
emit_intrinsic_load_image for those (yet).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12704>

ci/freedreno: Fix xfail update for arb_draw_indirect.

I saw UnexpectedPass in my patch, and removed the Crash, but it was
actually Crash -> Fail that had happened.

Fixes: 83e9a7fbcf53 ("freedreno/ir3: Align driver param upload size/offset for indirect uploads.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12704>

ci/v3dv: generalize the buffer_access.through_pointers flakes.

I saw an unrelated marge pipeline fail on
dEQP-VK.robustness.buffer_access.through_pointers.graphics.reads.fragment.4B_out_of_memory_with_vec4_f32,
and it sure looks like all of these are flaky.

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12681>

spirv_to_dxil: Add support for non-zero vertex and instance indices

Since DXIL does not have a way to get the base/first vertex and base
instance as well as using a zero-based vertex index, these values need
to be passed in via a constant buffer.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12707>

spirv_to_dxil: Add support for nir_intrinsic_load_num_workgroups

Since DXIL does not have a way to get the number of workgroups used
during dispatch with a system-value, these numbers need to be passed in
via a constant buffer.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12707>

nir: Add CAN_REORDER to load_ubo_dxil

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12707>

spirv_to_dxil: Convert out parameters to a single object

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12707>

aco/optimize_postRA: Use iterators instead of operator[] of std::array.

Also add a few more assertions to make sure the registers are
within the bounds of the array.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Reviewed-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12682>

aco: Skip code paths to emit copies when there are no copies.

Found while running with libstdc++ debug mode.
Fixes the following:

Error: attempt to advance a dereferenceable (start-of-sequence)
iterator -1 steps, which falls outside its valid range.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12682>

aco: Use Builder reference in emit_copies_block.

Found while running with libstdc++ debug mode.
Fixes the following:

Error: attempt to copy-construct an iterator from a singular iterator.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12682>

turnip: consider shader's immediates size for sub-stream allocation

Otherwise we could exceed pre-allocated space.

Fixes:
dEQP-VK.spirv_assembly.instruction.compute.opphi.wide

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8841>

zink: add a piglit ci job for lazy descriptors

this fills out lavapipe's descriptor coverage in ci

Acked-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12708>

lavapipe: unbreak push descriptor templates

the stride/offset calculation on this was all wrong, so just unroll the
template before enqueuing to present a uniform stream of descriptors
without trying to copy potentially megabytes of data

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12708>

radv: expose VK_KHR_shader_integer_dot_product

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>

aco/ra: allow v1b operands with 16-bit instructions

Instruction selection can create these.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: ec1bbfa6088 ("aco/ra: refactor subdword operand stride")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>

aco: implement udot_4x8/sdot_4x8/udot_2x16/sdot_2x16 opcodes

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>

aco: implement nir_op_pack_32_4x8

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>

radv,aco: implement iadd_sat

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>

radv: refactor handling of nir_options

Make it easier to change them depending on chip_class and family.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>

ac/llvm: implement udot_4x8/sdot_4x8/udot_2x16/sdot_2x16 opcodes

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>

ac/llvm,radv: implement uadd_sat/iadd_sat

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>

ac/llvm: implement nir_op_pack_32_4x8

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>

ac/gpu_info: add has_accelerated_dot_product

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>

spirv: use sdot_2x16 and udot_2x16 opcodes

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>

nir: add sdot_2x16 and udot_2x16 opcodes

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>

nir: separate lower_add_sat

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>

aco/spill: add temporary operands of exec phis to next_use_distances_end

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: dfb10e4f4b7 ("aco/spill: don't count phis as variable access")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12702>

aco: don't coalesce constant copies into non-power-of-two sizes

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12702>

vulkan/wsi/x11: fix shm allocation control flow issue

shmget returns -1 on error. alloc_shm assigns it to an unsigned variable
and then checks whether it's < 0, which will never be true.

Found by Coverity.
CID: 1490891

Fixes: 1f55f9a97a5 ("vulkan/wsi/sw: add support for using host_ptr for shm pixmaps.")
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12696>

radv/llvm: rework VS input loads and implement the callback

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12693>

draw/tess: Fix unused-function warning with draw-use-llvm=disabled.

../src/gallium/auxiliary/draw/draw_tess.c:37:1: warning: unused function 'draw_tes_get_input_index' [-Wunused-function]
draw_tes_get_input_index(int semantic, int index,
^

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12663>

v3d: Enable PIPE_CAP_PRIMITIVE_RESTART

We disabled PIPE_CAP_PRIMITIVE_RESTART on ffc4d82438d98 ("v3d: Disable
PIPE_CAP_PRIMITIVE_RESTART") because the HW can only support
PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX subset.

But the introduction of PIPE_CAP_EMULATE_NONFIXED_PRIMITIVE_RESTART
allows us to support these nonfixed primitive restarts so we can now
re-enable NV_primitive_restart for OpenGL extensions.

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12669>

vc4: remove primconvert

We are losing the optimization of converting a single quad to
a triangle fan reusing the same four vertex in the buffer.

Maybe this optimization can be ported to primconvert, QUADS are
always converted to TRIANGLES with primconvert. And i965, crocus
and svga have similar optimizations.

V3D doesn't implement this optimization and according to when it was
introduced on 230e646a4013 ("broadcom/vc4: Decompose single QUADs to
a TRIANGLE_FAN."):

"No significant difference in the minetest replay, but it should reduce
  overhead by not requiring that we write quad indices to index buffers
  that we repeatedly re-upload (and making the draw packet smaller, as
  well)."

v2: Commit log includes more detail about the removed optimization.
    (Alejandro Piñeiro)

Reference: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5277
Suggested-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12669>

vc4: export supported prim types by vc4

This is now handled by gallium.

v2: Fix incorrect indentation (Alejandro Piñeiro)

Reference: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5277
Suggested-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12669>

v3d: remove primconvert

Reference: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5277
Suggested-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12669>

v3d: export supported prim types by v3d

This is now handled by gallium.

Reference: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5277
Suggested-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12669>

vulkan: Copy pNext structures when enqueuing commands

There is enough information in vk.xml to figure how to copy the chain of
extensions, so use it.

Otherwise, the caller might have released the structs after recording
the command but before it executes.

Closes #5314.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reported-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12701>

Revert "lavapipe: unbreak imageless framebuffer"

This reverts commit c679dbe09cf104ac916fb604fe73528fc87d8e75.

No need to override the generated cmd enqueing function, we can use the
information in vk.xml to do the right thing with pNext arguments.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12701>

glsl: use bool literals instead of integers

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12674>

nouveau: use bool literals instead of integers

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12678>

nouveau: fix forward declaration of struct

Mismatching class/struct is disliked by MSVC.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12698>

radv: optimize VRS when no depth stencil attachment is bound

This is allowed by the Vulkan spec and we have to handle this situation
internally. We used to create and bind a 4096x4096 image to copy the
VRS rates but this wasted too much VRAM (~33MiB). Now, the driver only
allocates a HTILE buffer (~1MiB) and bind it to the framebuffer.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12243>

radv: pass the HTILE buffer to radv_copy_vrs_htile()

Will be used to use a global HTILE buffer without an image.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12243>

radv: optimize copying VRS rates to the global HTILE buffer

By skipping the read operation which is unnecessary.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12243>

radv: allow to conditionally read HTILE value when copying VRS rates

When a subpass is bound without a VRS attachment, the driver has to
create one internally and the copy can be a write only operation.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12243>

aco: preserve subdword RC when lowering p_insert/p_extract

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12640>

aco/print_ir: always print SDWA dst & src selections

This way, it becomes more apparent how SDWA behaves.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12640>

aco: remove explicit dst_preserve flag

Instead, we can rely on the fact that subdword definitions
must preserve the unused bits while dword definitions either
pad or sign-extend.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12640>

aco: rewrite SDWA selector

This commit introduces a new struct SubdwordSel
in order to ease and clean up the usage of SDWA
selections. This includes removing the distinction
between register-allocated and fixed SDWA selections.
Instead, SDWA selections can now also access the high
bits of subdword variables. Alignment and sizes are
validated accordingly. Size, offset and sign_extend
can be evaluated via helper methods.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12640>

aco: fix p_insert lowering with 16bit sources

The previous lowering only wrote a single byte.

Fixes: 2f94353735b5ddfe2a72499e7bf6c7bbc80b9a00 ('aco: add p_extract/p_insert')
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12640>

venus: suggest the proper sampler ycbcr model conversion based on format

Cc: 21.2.3 mesa-stable
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12694>

radv: remove NGG streamout support in LLVM

It has never really been used due to various issues with GDS in the
past and it will be lowered in NIR at some point.

The driver support is still there because it can likely be re-used.
This implementation can also be used as a reference point.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12695>

zink: use imageless framebuffers

this feature lets zink avoid the screen-based framebuffer cache with locks
in favor of a context-based one that doesn't need any complicated wizardry
to work since it doesn't need to track refcounts for attachments or work
across contexts since the surface info gets passed in when the renderpass
is begun

also expand the dummy surface to an array for use with multisampling and simplify
surface refs there for non-imageless case

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12661>