platform/upstream/llvm.git
4 years ago[OpenMP] Adopt std::set in HostDataToTargetMap
Ye Luo [Wed, 24 Jun 2020 16:18:00 +0000 (12:18 -0400)]
[OpenMP] Adopt std::set in HostDataToTargetMap

Summary:
lookupMapping took significant time due to linear complexity searching.
This is bad for offloading from multiple host threads because lookupMapping is protected by mutex.
Use std::set for logarithmic complexity searching.

Before my change.
libomptarget inclusive time 16.7 sec, exclusive time 8.6 sec.
After the change
libomptarget inclusive time 7.3 sec, exclusive time 0.4 sec.

Most of the overhead of libomptarget (exclusive time) is gone.

Reviewers: jdoerfert, grokos

Reviewed By: grokos

Subscribers: tianshilei1992, yaxunl, guansong, sstefan1

Tags: #openmp

Differential Revision: https://reviews.llvm.org/D82264

4 years ago[SemaObjC] Fix a crash on invalid when 'auto' is used in a @property
Erik Pilkington [Wed, 24 Jun 2020 16:11:39 +0000 (12:11 -0400)]
[SemaObjC] Fix a crash on invalid when 'auto' is used in a @property

rdar://48506879

4 years agoGlobalISel: Add unit tests for some utils functions
Matt Arsenault [Sat, 6 Jun 2020 23:37:43 +0000 (19:37 -0400)]
GlobalISel: Add unit tests for some utils functions

The test constants were originally constexpr, but this apparently
crashes old versions of gcc.

4 years ago[SLP] Precommit short load / wide math test for AArch64.
Florian Hahn [Tue, 23 Jun 2020 22:07:16 +0000 (23:07 +0100)]
[SLP] Precommit short load / wide math test for AArch64.

This pattern is key to eliminate a 10% performance regression in
SPEC2006.

4 years agoDisable flaky lldb-vscode tests on aarch64
Walter Erquinigo [Wed, 24 Jun 2020 15:54:13 +0000 (08:54 -0700)]
Disable flaky lldb-vscode tests on aarch64

Summary:
These two tests are flaky only on this arch for some reason. They are testing important features and are not flaky on x86_64, so I'll investigate this arm issue separatedly.

Some flaky runs:
http://lab.llvm.org:8011/builders/lldb-aarch64-ubuntu/builds/5517/steps/test/logs/stdio
http://lab.llvm.org:8011/builders/lldb-aarch64-ubuntu/builds/5527/steps/test/logs/stdio

Diff that created those tests:
https://reviews.llvm.org/D81978

4 years ago[AMDGPU] Make sure to fix implicit operands on insertBranch
dstuttar [Tue, 23 Jun 2020 16:47:58 +0000 (17:47 +0100)]
[AMDGPU] Make sure to fix implicit operands on insertBranch

Summary:
Without fixImplicitOperands we may end up creating default implicit operands
that are the wrong wave size

Includes simple test that provokes insertBranch in the correct way to expose the
issue being fixed.

Change-Id: I92bdcdee9fcb7b4d91529b84e76a48ac8218483e

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82459

4 years agoAMDGPU/GlobalISel: Legalize 64-bit G_SDIV/G_SREM
Matt Arsenault [Wed, 17 Jun 2020 01:38:29 +0000 (21:38 -0400)]
AMDGPU/GlobalISel: Legalize 64-bit G_SDIV/G_SREM

Now all the divisions should be complete, although we should fix
emitting the entire common part for div/rem when you use both.

4 years agoAMDGPU/GlobalISel: Invert parameter for div/rem lowering function
Matt Arsenault [Wed, 24 Jun 2020 15:12:02 +0000 (11:12 -0400)]
AMDGPU/GlobalISel: Invert parameter for div/rem lowering function

4 years ago[clangd] Disable printing of Value for tag-types on hover
Kadir Cetinkaya [Mon, 22 Jun 2020 19:53:47 +0000 (21:53 +0200)]
[clangd] Disable printing of Value for tag-types on hover

Summary: This is both confusing and crashy.

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D82326

4 years ago[Hexagon] Reducing minimum alignment requirement
Ikhlas Ajbar [Mon, 22 Jun 2020 21:03:22 +0000 (16:03 -0500)]
[Hexagon] Reducing minimum alignment requirement

This patch reduces minimum alignment requirement to 1 byte for arguments
passed by value on stack.

4 years ago[ELF] -r: don't parse @ (symbol versioning) for .symver inline asm in bitcode
Fangrui Song [Wed, 24 Jun 2020 15:22:17 +0000 (08:22 -0700)]
[ELF] -r: don't parse @ (symbol versioning) for .symver inline asm in bitcode

Fixes PR46420
Similar to D43307 for non-LTO.

Module-level inline assembly can use .symver to create a symbol with `@` in the name.
For relocatable output, @ should be retained in the symbol name. `@ver` should
not be parsed and dropped.

Reviewed By: grimar, psmith

Differential Revision: https://reviews.llvm.org/D82433

4 years agoRevert "[AMDGPU] Enable compare operations to be selected by divergence"
Matt Arsenault [Wed, 24 Jun 2020 14:27:23 +0000 (10:27 -0400)]
Revert "[AMDGPU] Enable compare operations to be selected by divergence"

This reverts commit 521ac0b5cea02f629d035f807460affbb65ae7ad.

Reported to break thousands of piglit tests.

4 years ago[NewPM] Add SimpleLoopUnswitchPass to PassRegistry.def
Arthur Eubanks [Tue, 23 Jun 2020 23:11:59 +0000 (16:11 -0700)]
[NewPM] Add SimpleLoopUnswitchPass to PassRegistry.def

Summary:
Seems to just be missing from PassRegistry.def.

Makes the number of check-llvm failures under new PM go from 2619 to 2581.

Reviewers: hans, ychen, asbirlea, leonardchan

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82422

4 years ago[NewPM] Handle -simplifycfg in opt
Arthur Eubanks [Tue, 23 Jun 2020 23:11:59 +0000 (16:11 -0700)]
[NewPM] Handle -simplifycfg in opt

Summary:
-simplifycfg is the legacy pass name for SimplifyCFGPass.

There is already -simplify-cfg in FUNCTION_PASS_WITH_PARAMS which
handles options for SimplifyCFGPass. Maybe that should be renamed to
-simplifycfg as well?

This reduces the number of check-llvm failures under NewPM from 2619 to 2392.

Reviewers: hans, leonardchan, asbirlea, ychen

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82421

4 years ago[llvm] Release-mode ML InlineAdvisor
Mircea Trofin [Tue, 9 Jun 2020 21:50:50 +0000 (14:50 -0700)]
[llvm] Release-mode ML InlineAdvisor

Summary:
This implementation uses a pre-trained model which is statically
compiled into a native function.

RFC: http://lists.llvm.org/pipermail/llvm-dev/2020-April/140763.html

Reviewers: davidxl, jdoerfert, dblaikie

Subscribers: mgorny, eraman, hiraditya, arphaman, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81515

4 years ago[llvm] Added support for stand-alone cmake object libraries.
Mircea Trofin [Tue, 9 Jun 2020 19:44:07 +0000 (12:44 -0700)]
[llvm] Added support for stand-alone cmake object libraries.

Summary:
Currently, add_llvm_library would create an OBJECT library alongside
of a STATIC / SHARED library, but losing the link interface (its
elements would become dependencies instead). To support scenarios
where linking an object library also brings in its usage
requirements, this patch adds support for 'stand-alone' OBJECT
libraries - i.e. without an accompanying SHARED/STATIC library, and
maintaining the link interface defined by the user.

This is useful for cases where, for example, we want to build a part
of a component separately. Using a STATIC target would incur the risk
that symbols not referenced in the consumer would be dropped (which may
be undesirable).

The current application is the ML part of Analysis. It should be part
of the Analysis component, so it may reference other analyses; and (in
upcoming changes) it has dependencies on optional libraries.

Reviewers: karies, davidxl, beanz, phosek, smeenai

Subscribers: mgorny, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81447

4 years ago[VectorCombine] give invalid index value a name; NFC
Sanjay Patel [Wed, 24 Jun 2020 14:11:18 +0000 (10:11 -0400)]
[VectorCombine] give invalid index value a name; NFC

4 years ago[VectorCombine] add tests for extract + cmp + binop; NFC
Sanjay Patel [Tue, 23 Jun 2020 16:12:54 +0000 (12:12 -0400)]
[VectorCombine] add tests for extract + cmp + binop; NFC

4 years agoWebAssembly: Don't store MachineFunction in MachineFunctionInfo
Matt Arsenault [Thu, 18 Jun 2020 14:32:32 +0000 (10:32 -0400)]
WebAssembly: Don't store MachineFunction in MachineFunctionInfo

Soon it will be disallowed to depend on MachineFunction state in the
constructor. This was only being used to get the MachineRegisterInfo
for an assert, which I'm not sure is necessarily worth it. I would
think any missing defs would be caught by the verifier later instead.

4 years agoCloning.h - reduce AliasAnalysis.h include to forward declarations. NFC.
Simon Pilgrim [Wed, 24 Jun 2020 14:12:11 +0000 (15:12 +0100)]
Cloning.h - reduce AliasAnalysis.h include to forward declarations. NFC.

Fix implicit include dependencies in source files.

4 years ago[AST][RecoveryExpr] Add error-bit TemplateArgument
Haojian Wu [Wed, 24 Jun 2020 14:14:34 +0000 (16:14 +0200)]
[AST][RecoveryExpr] Add error-bit TemplateArgument

Summary: We are missing the error-bit somehow if the error-bit is propagated
through the code path: "error type/expr" -> "template argument" ->
"template specialization type", which will lead to crashes.

Reviewers: sammccall

Reviewed By: sammccall

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D82102

4 years ago[lldb] Refactor Scalar::TruncOrExtendTo
Pavel Labath [Wed, 24 Jun 2020 13:26:42 +0000 (15:26 +0200)]
[lldb] Refactor Scalar::TruncOrExtendTo

The "type" argument to the function is mostly useless -- the only
interesting aspect of it is signedness. Pass signedness directly and
compute the value of bits and signedness fields -- that's exactly
what the single caller of this function does.

4 years ago[AMDGPU] Avoid redundant mode register writes
Tim Corringham [Fri, 19 Jun 2020 17:23:56 +0000 (18:23 +0100)]
[AMDGPU] Avoid redundant mode register writes

Summary:
The SIModeRegister pass attempts to generate the minimal number of
writes to the mode register. However it was failing to correctly
deal with some loops, resulting in some redundant setreg instructions
being inserted.

This change amends the pass to avoid generating these redundant
instructions.

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82215

4 years ago[DSE,MSSA] Add missing -enable-dse-memoryssa flag to test.
Florian Hahn [Wed, 24 Jun 2020 13:02:09 +0000 (14:02 +0100)]
[DSE,MSSA] Add missing -enable-dse-memoryssa flag to test.

4 years ago[llvm-readobj] - Don't crash when a broken GNU hash table is dumped with --hash-symbols.
Georgii Rymar [Wed, 24 Jun 2020 10:23:04 +0000 (13:23 +0300)]
[llvm-readobj] - Don't crash when a broken GNU hash table is dumped with --hash-symbols.

Start using the `checkGNUHashTable` helper which was recently introduced to report
a proper warning when a GNU hash table goes past the end of the file.

Differential revision: https://reviews.llvm.org/D82449

4 years agoLoads.h - reduce AliasAnalysis.h include to forward declarations. NFC.
Simon Pilgrim [Wed, 24 Jun 2020 12:17:44 +0000 (13:17 +0100)]
Loads.h - reduce AliasAnalysis.h include to forward declarations. NFC.

Fix implicit include dependencies in source files.

4 years ago[LLD][PowerPC] Add support for R_PPC64_GOT_PCREL34
Stefan Pintilie [Wed, 24 Jun 2020 12:40:35 +0000 (07:40 -0500)]
[LLD][PowerPC] Add support for R_PPC64_GOT_PCREL34

Add support for the 34bit relocation R_PPC64_GOT_PCREL34 for
PC Relative in LLD.

Reviewers: sfertile, MaskRay

Differential Revision: https://reviews.llvm.org/D81948

4 years ago[DSE] Eliminate stores at the end of the function.
Florian Hahn [Wed, 24 Jun 2020 08:56:35 +0000 (09:56 +0100)]
[DSE] Eliminate stores at the end of the function.

This patch add support for eliminating MemoryDefs that do not have any
aliasing users, which indicates that there are no reads/writes to the
memory location until the end of the function.

To eliminate such defs, we have to ensure that the underlying object is
not visible in the caller and does not escape via returning. We need a
separate check for that, as InvisibleToCaller does not consider returns.

Reviewers: dmgreen, rnk, efriedma, bryant, asbirlea, Tyker, george.burgess.iv

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D72631

4 years ago[OpenMPOpt] ICV macro definitions
sstefan1 [Fri, 19 Jun 2020 14:51:35 +0000 (16:51 +0200)]
[OpenMPOpt] ICV macro definitions

Summary:
This defines some basic information about ICVs in `OMPKinds.def`.
We also emit remarks with initial values for each function (which are default for now)
as a way to test this.

Reviewers: jdoerfert, JonChesterfield, hamax97, jhuber6

Subscribers: yaxunl, hiraditya, guansong, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82193

4 years ago[OpenMP] NFC: Create OpenMP release notes file
Joachim Protze [Wed, 24 Jun 2020 11:42:00 +0000 (13:42 +0200)]
[OpenMP] NFC: Create OpenMP release notes file

4 years agoObjCARC.h - remove unnecessary includes. NFC.
Simon Pilgrim [Wed, 24 Jun 2020 11:22:07 +0000 (12:22 +0100)]
ObjCARC.h - remove unnecessary includes. NFC.

Add implicit InstIterator.h dependency in ObjCARCContract.cpp

4 years agoStackLifetime.h - remove unused AliasAnalysis.h include. NFC.
Simon Pilgrim [Wed, 24 Jun 2020 10:48:17 +0000 (11:48 +0100)]
StackLifetime.h - remove unused AliasAnalysis.h include. NFC.

4 years agoDon't install clang-import-test
Alex Richardson [Tue, 23 Jun 2020 16:31:47 +0000 (17:31 +0100)]
Don't install clang-import-test

I have been trying to reduce the installed size of our CHERI toolchain and
noticed that this tool was being installed even with -DLLVM_INSTALL_TOOLCHAIN_ONLY=ON.
This appears to be a test binary that should not be installed.

Reviewed By: v.g.vassilev
Differential Revision: https://reviews.llvm.org/D82169

4 years ago[clang-format] restore indent in conditionals when AlignOperands is DontAlign
Krasimir Georgiev [Wed, 24 Jun 2020 10:55:05 +0000 (12:55 +0200)]
[clang-format] restore indent in conditionals when AlignOperands is DontAlign

Summary:
After D50078, we're experiencing unexpected un-indent using a style combining `AlignOperands: DontAlign` with `BreakBeforeTernaryOperators: false`, such as Google's JavaScript style:
```
% bin/clang-format -style=google ~/test.js
aaaaaaaaaaa = bbbbbbbb ? cccccccccccccccccc() :
dddddddddd             ? eeeeeeeeeeeeee :
                         fffff;
```
The issue lies with the interaction of `AlignOperands: DontAlign` and the edited code section in ContinuationIndenter.cpp, which de-dents the intent by `Style.ContinuationIndentWidth`. From [[ https://github.com/llvm/llvm-project/blob/ac3e5c4d93fbe7fb2db3c745c721aff41cc1b851/clang/include/clang/Format/Format.h#L170 | the documentation ]] of AlignOperands: DontAlign:
> The wrapped lines are indented `ContinuationIndentWidth` spaces from the start of the line.
So the de-dent effectively erases the necessary `ContinuationIndentWidth` in that case.

This patch restores the `AlignOperands: DontAlign` behavior, producing:
```
% bin/clang-format -style=google ~/test.js
aaaaaaaaaaa = bbbbbbbb ? cccccccccccccccccc() :
    dddddddddd         ? eeeeeeeeeeeeee :
                         fffff;
```

Reviewers: sammccall

Reviewed By: sammccall

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D82199

4 years ago[llvm-readelf] - Don't crash when e_shstrndx==SHN_XINDEX, but there is no section...
Georgii Rymar [Tue, 23 Jun 2020 12:55:17 +0000 (15:55 +0300)]
[llvm-readelf] - Don't crash when e_shstrndx==SHN_XINDEX, but there is no section header.

Currently we crash when trying to print --sections and the SHN_XINDEX escape value
is used for the e_shstrndx field, but there is no section header at index 0 to
read the value from.

Differential revision: https://reviews.llvm.org/D82374

4 years ago[libclang] Extend clang_Cursor_Evaluate().
Christian Kandeler [Wed, 24 Jun 2020 10:56:45 +0000 (11:56 +0100)]
[libclang] Extend clang_Cursor_Evaluate().

Let this function (try to) evaluate expressions, in addition to
declarations and compound statements.

Patch by Christian Kandeler <christian.kandeler@qt.io>

Reviewers: nik, akyrtzi, arphaman, jkorous

Reviewed By: jkorous

Differential Revision: https://reviews.llvm.org/D80279

4 years ago[AArch64][SVE2] Add bfloat16 support to whilerw/whilewr intrinsics
Cullen Rhodes [Fri, 19 Jun 2020 10:50:38 +0000 (10:50 +0000)]
[AArch64][SVE2] Add bfloat16 support to whilerw/whilewr intrinsics

Reviewed By: fpetrogalli

Differential Revision: https://reviews.llvm.org/D82399

4 years ago[AArch64][SVE] Add bfloat16 support to svlen intrinsic
Cullen Rhodes [Fri, 19 Jun 2020 09:37:14 +0000 (09:37 +0000)]
[AArch64][SVE] Add bfloat16 support to svlen intrinsic

Reviewed By: fpetrogalli

Differential Revision: https://reviews.llvm.org/D82186

4 years ago[AArch64][SVE] Add bfloat16 support to perm and select intrinsics
Cullen Rhodes [Thu, 18 Jun 2020 17:25:18 +0000 (17:25 +0000)]
[AArch64][SVE] Add bfloat16 support to perm and select intrinsics

Summary:
Added for following intrinsics:

  * zip1, zip2, zip1q, zip2q
  * trn1, trn2, trn1q, trn2q
  * uzp1, uzp2, uzp1q, uzp2q
  * splice
  * rev
  * sel

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D82182

4 years ago[AArch64][SVE] Add bfloat16 support to load intrinsics
Kerry McLaughlin [Wed, 24 Jun 2020 08:47:49 +0000 (09:47 +0100)]
[AArch64][SVE] Add bfloat16 support to load intrinsics

Summary:
Bfloat16 support added for the following intrinsics:
 - LD1
 - LD1RQ
 - LDNT1
 - LDNF1
 - LDFF1

Reviewers: sdesmalen, c-rhodes, efriedma, stuij, fpetrogalli, david-arm

Reviewed By: fpetrogalli

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, danielkiss, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D82298

4 years ago[ARM] Improve diagnostics message when Neon is unsupported
Victor Campos [Mon, 15 Jun 2020 14:54:15 +0000 (15:54 +0100)]
[ARM] Improve diagnostics message when Neon is unsupported

Summary:
Whenever Neon is not supported, a generic message is printed:

  error: "NEON support not enabled"

Followed by a series of other error messages that are not useful once
the first one is printed.

This patch gives a more precise message in the case where Neon is
unsupported because an invalid float ABI was specified: the soft float
ABI.

  error: "NEON intrinsics not available with the soft-float ABI. Please
  use -mfloat-abi=softfp or -mfloat-abi=hard"

This message is the same one that GCC gives, so it is also making their
diagnostics more compatible with each other.

Also, by rearranging preprocessor directives, these "unsupported" error
messages are now the only ones printed out, which is also GCC's
behaviour.

Differential Revision: https://reviews.llvm.org/D81847

4 years ago[lldb] fix typo in docs: withing -> within
Konrad Kleine [Wed, 24 Jun 2020 09:17:36 +0000 (05:17 -0400)]
[lldb] fix typo in docs: withing -> within

4 years ago[DSE,MSSA] Precommit small test changes for D72631.
Florian Hahn [Wed, 24 Jun 2020 09:16:26 +0000 (10:16 +0100)]
[DSE,MSSA] Precommit small test changes for D72631.

4 years ago[AMDGPU] Enable compare operations to be selected by divergence
alex-t [Fri, 19 Jun 2020 14:51:54 +0000 (17:51 +0300)]
[AMDGPU] Enable compare operations to be selected by divergence

Summary: Details: This patch enables SETCC to be selected to S_CMP_* if uniform and V_CMP_* if divergent.

Reviewers: rampitec, arsenm

Reviewed By: rampitec

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82194

4 years ago[ARM][BFloat] Legalize bf16 type even without fullfp16.
Simon Tatham [Tue, 23 Jun 2020 16:29:40 +0000 (17:29 +0100)]
[ARM][BFloat] Legalize bf16 type even without fullfp16.

Summary:
This change permits scalar bfloats to be loaded, stored, moved and
used as function call arguments and return values, whenever the bf16
feature is supported by the subtarget.

Previously that was only supported in the presence of the fullfp16
feature, because the code generation strategy depended on instructions
from that extension. This change adds alternative code generation
strategies so that those operations can be done even without fullfp16.

The strategy for loads and stores is to replace VLDRH/VSTRH with
integer LDRH/STRH plus a move between register classes. I've written
isel patterns for those, conditional on //not// having the fullfp16
feature (so that in the fullfp16 case, the existing patterns will
still be used).

For function arguments and returns, instead of writing isel patterns
to match `VMOVhr` and `VMOVrh`, I've avoided generating those SDNodes
in the first place, by factoring out the code that constructs them
into helper functions `MoveToHPR` and `MoveFromHPR` which have a
fallback for non-fullfp16 subtargets.

The current output code is not especially pretty: in the new test file
you can see unnecessary store/load pairs implementing no-op bitcasts,
and lots of pointless moves back and forth between FP registers and
GPRs. But it at least works, which is an improvement on the previous
situation.

Reviewers: dmgreen, SjoerdMeijer, stuij, chill, miyuki, labrinea

Reviewed By: dmgreen, labrinea

Subscribers: labrinea, kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82372

4 years ago[AST][RecoveryExpr] Populate error-bit from Type to Expr.
Haojian Wu [Wed, 24 Jun 2020 08:19:36 +0000 (10:19 +0200)]
[AST][RecoveryExpr] Populate error-bit from Type to Expr.

Summary: Looks like this is a fallout when we introduce the error-bit in Type.

Reviewers: sammccall

Reviewed By: sammccall

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D82099

4 years ago[gn build] Port 96d4ccf00c8
LLVM GN Syncbot [Wed, 24 Jun 2020 08:17:48 +0000 (08:17 +0000)]
[gn build] Port 96d4ccf00c8

4 years ago[AST][RecoveryExpr] Fix a crash: don't attach error-type base specifiers.
Haojian Wu [Wed, 24 Jun 2020 08:02:06 +0000 (10:02 +0200)]
[AST][RecoveryExpr] Fix a crash: don't attach error-type base specifiers.

Summary:
otherwise we'll run into code path which expects a good base specifiers,
and lead to crashes.

The crash only occurs in template instantiations (in non-template case,
the bad base specifiers are dropped during parsing.)

crash stacktrace:

```
clang: llvm-project/clang/lib/Sema/SemaInit.cpp:7864: clang::ExprResult clang::InitializationSequence::Perform(clang::Sema &, const clang::InitializedEntity &, const clang::InitializationKind &, clang::MultiExprArg, clang::QualType *): Assertion `Kind.getKind() == InitializationKind::IK_Copy || Kind.isExplicitCast() || Kind.getKind() == InitializationKind::IK_DirectList' failed.
PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash backtrace, preprocessed source, and associated run script.
Stack dump:
```

Reviewers: sammccall

Reviewed By: sammccall

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D82086

4 years ago[VE] Clang toolchain for VE
Kazushi (Jam) Marukawa [Wed, 24 Jun 2020 08:11:59 +0000 (10:11 +0200)]
[VE] Clang toolchain for VE

Summary:
This patch enables compilation of C code for the VE target with Clang.

Differential Revision: https://reviews.llvm.org/D79411

4 years ago[libc] Enable copysignl, frexpl, logbl and modfl on aarch64.
Siva Chandra [Wed, 24 Jun 2020 07:16:23 +0000 (00:16 -0700)]
[libc] Enable copysignl, frexpl, logbl and modfl on aarch64.

4 years ago[X86] Speculatively fix to X86AvoidStoreForwardingBlocks not deference a machine...
Craig Topper [Wed, 24 Jun 2020 07:10:36 +0000 (00:10 -0700)]
[X86] Speculatively fix to X86AvoidStoreForwardingBlocks not deference a machine mem operand if there isn't one present.

Eric Christopher informed me that FastISel memcpy handling creates
load/store instructions without mem operands. We should fix that,
but I doubt that's the only case of missed mem operands so seems
better to be defensive here.

I don't have a test case yet, but I'll try to add one if i get a
test from Eric.

4 years ago[libc][Obvious] Remove a debug #include of iostream.
Siva Chandra Reddy [Wed, 24 Jun 2020 07:01:03 +0000 (00:01 -0700)]
[libc][Obvious] Remove a debug #include of iostream.

4 years ago[libc] Add long double flavors of the floating point manipulation functions.
Siva Chandra Reddy [Fri, 19 Jun 2020 20:08:10 +0000 (13:08 -0700)]
[libc] Add long double flavors of the floating point manipulation functions.

Specifically: copysignl, frexpl, logbl and modfl have been added.

Reviewers: asteinhauser

Differential Revision: https://reviews.llvm.org/D82357

4 years ago[X86] Add mayLoad/mayStore flags to some X87 instructions that don't have isel patter...
Craig Topper [Wed, 24 Jun 2020 06:40:01 +0000 (23:40 -0700)]
[X86] Add mayLoad/mayStore flags to some X87 instructions that don't have isel patterns to infer them from.

Should remove part of the differences in D81833 due to some
some of these getting isel patterns.

4 years ago[lldb/Test] Temporarily disable TestSimulatorPlatform.py
Jonas Devlieghere [Wed, 24 Jun 2020 05:40:26 +0000 (22:40 -0700)]
[lldb/Test] Temporarily disable TestSimulatorPlatform.py

4 years agotest fix: add missing system-darwin REQUIRES
Alex Lorenz [Wed, 24 Jun 2020 04:17:55 +0000 (21:17 -0700)]
test fix: add missing system-darwin REQUIRES

The test should only run with a Darwin driver only.

4 years ago[clang][driver] set macOS as the target OS for -arch arm64 when clang
Alex Lorenz [Wed, 24 Jun 2020 04:05:11 +0000 (21:05 -0700)]
[clang][driver] set macOS as the target OS for -arch arm64 when clang
is running on an Apple Silicon mac

This change allows users to use `-arch arm64` to build for mac when
running it on Apple Silicon mac without explicit `-target` option.

Differential Revision: https://reviews.llvm.org/D82428

4 years ago[cmake] configure the host triple on an Apple Silicon machine correctly
Alex Lorenz [Wed, 24 Jun 2020 04:01:26 +0000 (21:01 -0700)]
[cmake] configure the host triple on an Apple Silicon machine correctly

The cmake build of LLVM now uses the appropriate arm64 arch for the
host triple when building llvm-project on an Apple Silicon mac.

Differential Revision: https://reviews.llvm.org/D82428

4 years ago[NFC][MLIR] Undo anonymous namespace change from https://reviews.llvm.org/D82417
Rahul Joshi [Wed, 24 Jun 2020 03:21:42 +0000 (20:21 -0700)]
[NFC][MLIR] Undo anonymous namespace change from https://reviews.llvm.org/D82417

Undo as it does not conform to LLVM coding style
(https://llvm.org/docs/CodingStandards.html#anonymous-namespaces)

4 years agoAdd option to symbolize inline frames for InternalSymbolizer
Vitaly Buka [Wed, 24 Jun 2020 02:26:03 +0000 (19:26 -0700)]
Add option to symbolize inline frames for InternalSymbolizer

Summary:
Currently, there is no way to let the `InternalSymbolizer` implemented
functions know if inline frames should be symbolized. This patch updates
the function `__sanitizer_symbolize_code` to include a parameter for
this ASAN option and toggle between LLVM symbolization functions when
appropriate.

Fixes the following two failing tests when internal symbolization is
enabled:
```
SanitizerCommon-*-x86_64-Linux :: print-stack-trace.cpp
SanitizerCommon-*-x86_64-Linux :: symbolize_pc_inline.cpp
```

Reviewers: vitalybuka, kcc, filcab

Reviewed By: vitalybuka

Subscribers: #sanitizers

Tags: #sanitizers

Differential Revision: https://reviews.llvm.org/D79280

4 years ago[BitcodeReader] Fix DelayedShuffle handling for ConstantExpr shuffles.
Eli Friedman [Wed, 20 May 2020 22:08:36 +0000 (15:08 -0700)]
[BitcodeReader] Fix DelayedShuffle handling for ConstantExpr shuffles.

The indexing was messed up, so the result was completely broken.

Shuffle constant exprs are rare in practice; without vscale types,
constant folding generally elminates them. So sort of hard to trip over.

Fixes regression from D72467.

Differential Revision: https://reviews.llvm.org/D80330

4 years ago[PowerPC] Add support for vector bool __int128 for Power10
Ahsan Saghir [Mon, 15 Jun 2020 01:37:29 +0000 (20:37 -0500)]
[PowerPC] Add support for vector bool __int128 for Power10

Summary:
This patch adds support for `vector bool __int128` type for Power10.

Reviewers: #powerpc, hfinkel, lei, stefanp, amyk

Reviewed By: #powerpc, lei, amyk

Subscribers: lei, amyk, wuzish, nemanjai, shchenz, cfe-commits

Tags: #llvm, #powerpc, #clang

Differential Revision: https://reviews.llvm.org/D81816

4 years ago[AArch64][GlobalISel] Improve codegen for some constant vectors by using constant...
Amara Emerson [Mon, 22 Jun 2020 23:25:49 +0000 (16:25 -0700)]
[AArch64][GlobalISel] Improve codegen for some constant vectors by using constant pool loads.

There's more smarts in AArch64ISelLowering that we don't have yet, but this
change incrementally improves some of the more common patterns. I think future
iterations will want to use some combination of PostLegalizerCombiner and the
selector to catch the other cases.

Differential Revision: https://reviews.llvm.org/D82340

4 years agoRemove GlobalValue::getAlignment().
Eli Friedman [Tue, 19 May 2020 03:38:13 +0000 (20:38 -0700)]
Remove GlobalValue::getAlignment().

This function is deceptive at best: it doesn't return what you'd expect.
If you have an arbitrary GlobalValue and you want to determine the
alignment of that pointer, Value::getPointerAlignment() returns the
correct value.  If you want the actual declared alignment of a function
or variable, GlobalObject::getAlignment() returns that.

This patch switches all the users of GlobalValue::getAlignment to an
appropriate alternative.

Differential Revision: https://reviews.llvm.org/D80368

4 years ago[SimplifyCFG] Drop debug loc in SpeculativelyExecuteBB
Vedant Kumar [Tue, 23 Jun 2020 22:53:09 +0000 (15:53 -0700)]
[SimplifyCFG] Drop debug loc in SpeculativelyExecuteBB

Summary:
According to HowToUpdateDebugInfo.rst:

```
Preserving the debug locations of speculated instructions can make
it seem like a condition is true when it's not (or vice versa), which
leads to a confusing single-stepping experience
```

This patch follows the recommendation to drop debug locations on
speculated instructions.

Reviewers: aprantl, davide

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82420

4 years agoAMDGPU/GlobalISel: Fix fixed ABI special VGPR function arguments
Matt Arsenault [Wed, 24 Jun 2020 01:06:11 +0000 (21:06 -0400)]
AMDGPU/GlobalISel: Fix fixed ABI special VGPR function arguments

I forgot to copy the new fixed function ABI into GlobalISel, so this
was mismatched with the DAG compiled calling function. This was
allocating part of the argument list to v31, which was supposed to be
reserved for the workitem IDs.

4 years ago[WebAssebmly] Fully disable 'protected' visibility
Sam Clegg [Tue, 23 Jun 2020 03:30:40 +0000 (20:30 -0700)]
[WebAssebmly] Fully disable 'protected' visibility

Emscripten doesn't use protected visibility either.

Differential Revision: https://reviews.llvm.org/D82346

4 years ago[MLIR] [NFC] Add new line and empty line before printing modified loop
Rahul Joshi [Wed, 24 Jun 2020 00:23:35 +0000 (17:23 -0700)]
[MLIR] [NFC] Add new line and empty line before printing modified loop
             to make the debug output readable.

Differential Revision: https://reviews.llvm.org/D82417

4 years ago[clang codegen] Fix alignment of "Address" for incomplete array pointer.
Eli Friedman [Tue, 28 Apr 2020 23:04:26 +0000 (16:04 -0700)]
[clang codegen] Fix alignment of "Address" for incomplete array pointer.

The code was assuming all incomplete types don't have meaningful
alignment, but incomplete arrays do have meaningful alignment.

Fixes https://bugs.llvm.org/show_bug.cgi?id=45710

Differential Revision: https://reviews.llvm.org/D79052

4 years agoDR458: Search template parameter scopes in the right order.
Richard Smith [Tue, 16 Jun 2020 23:55:56 +0000 (16:55 -0700)]
DR458: Search template parameter scopes in the right order.

C++ unqualified name lookup searches template parameter scopes
immediately after finishing searching the entity the parameters belong
to. (Eg, for a class template, you search the template parameter scope
after looking in that class template and its base classes and before
looking in the scope containing the class template.) This is complicated
by the fact that scope lookup within a template parameter scope looks in
a different sequence of places prior to reaching the end of the
declarator-id in the template declaration.

We used to approximate the proper lookup rule with a hack in the scope /
decl context walk inside name lookup. Now we instead compute the lookup
parent for each template parameter scope.

In order to get this right, we now make sure to enter a distinct Scope
for each template parameter scope, and make sure to re-enter the
enclosing class scopes properly when handling delay-parsed regions
within a class.

4 years ago[NFC] Remove outdated comment in llvm-symbolizer test case.
Amy Huang [Wed, 24 Jun 2020 00:10:34 +0000 (17:10 -0700)]
[NFC] Remove outdated comment in llvm-symbolizer test case.

4 years ago[AArch64][SVE] Add legalization support for i32/i64 vector srem/urem
Eli Friedman [Mon, 8 Jun 2020 23:34:15 +0000 (16:34 -0700)]
[AArch64][SVE] Add legalization support for i32/i64 vector srem/urem

Implement them on top of sdiv/udiv, similar to what we do for integer
types.

Potential future work: implementing i8/i16 srem/urem, optimizations for
constant divisors, optimizing the mul+sub to mls.

Differential Revision: https://reviews.llvm.org/D81511

4 years ago[IR] Prefer scalar type for struct indexes in GEP constant expressions.
Eli Friedman [Wed, 17 Jun 2020 23:35:35 +0000 (16:35 -0700)]
[IR] Prefer scalar type for struct indexes in GEP constant expressions.

This has two advantages: one, it's simpler, and two, it doesn't require
heroic pattern matching with scalable vectors.

Also includes a small fix to DataLayout to allow the scalable vector
testcase to work correctly.

Differential Revision: https://reviews.llvm.org/D82061

4 years ago[lld][ELF][AArch64] Handle R_AARCH64_PLT32 relocation
Leonard Chan [Tue, 23 Jun 2020 23:10:07 +0000 (16:10 -0700)]
[lld][ELF][AArch64] Handle R_AARCH64_PLT32 relocation

This is the followup to D77647 which implements handling for the new
R_AARCH64_PLT32 relocation type in lld. This relocation would benefit the
PIC-friendly vtables feature described in D72959.

Differential Revision: https://reviews.llvm.org/D81184

4 years ago[ELF] Add -z start-stop-visibility= to set __start_/__stop_ symbol visibility
Petr Hosek [Wed, 17 Jun 2020 21:10:02 +0000 (14:10 -0700)]
[ELF] Add -z start-stop-visibility= to set __start_/__stop_ symbol visibility

This matches the equivalent flag implemented in GNU linkers, see
https://sourceware.org/pipermail/binutils/2020-June/111685.html for
the associated discussion.

Differential Revision: https://reviews.llvm.org/D55682

4 years ago[AMDGPU] Update AMD GPU processor information
Tony [Fri, 19 Jun 2020 19:01:37 +0000 (15:01 -0400)]
[AMDGPU] Update AMD GPU processor information

Summary:
- Add product names for some processors.
- Correct XNACK support for a processor.

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82348

4 years agoMove late-parsed class member attribute handling adjacent to all the
Richard Smith [Wed, 17 Jun 2020 23:02:06 +0000 (16:02 -0700)]
Move late-parsed class member attribute handling adjacent to all the
other late-parsed class component handling.

No functionality change intended.

4 years ago[WebAssembly] Fix for use of uninitialized member in WasmObjectWriter.cpp
Sam Clegg [Tue, 23 Jun 2020 21:59:18 +0000 (14:59 -0700)]
[WebAssembly] Fix for use of uninitialized member in WasmObjectWriter.cpp

Currently, section indices may be passed uninitialized by value if
writing the section fails. Removes section indices form class
initialization and returns them from the write{Code,Data}Section
function calls instead.

Patch by Gui Andrade!

Differential Revision: https://reviews.llvm.org/D81702

4 years ago[mlir] [integration-test] Let target check-mlir imply target check-mlir-integration too
aartbik [Tue, 23 Jun 2020 22:22:37 +0000 (15:22 -0700)]
[mlir] [integration-test] Let target check-mlir imply target check-mlir-integration too

Note that this does not mean that check-mlir will run check-mlir-integration
tests for all configurations. You still need to do a set up with the flag
MLIR_INCLUDE_INTEGRATION_TESTS set to ON in order to activate the integration test.

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D82413

4 years agoRemove clang::Codegen::EHPadEndScope as unused
David Blaikie [Tue, 23 Jun 2020 22:09:40 +0000 (15:09 -0700)]
Remove clang::Codegen::EHPadEndScope as unused

Unused since r255423 / D15140 /  4e52d6f811a2269e946c19e77245148bd9221f99

Found indirectly by assessing -debug-info-kind=constructors and
observing the EHPadEndScope type was never emitted because the
constructor is never called. (all credit to Amy Huang for identifying
this issue)

4 years ago[clang][driver] allow macOS 11 OS version in the driver
Alex Lorenz [Tue, 23 Jun 2020 21:42:32 +0000 (14:42 -0700)]
[clang][driver] allow macOS 11 OS version in the driver

4 years ago[lldb] Fix the modules build
Jonas Devlieghere [Tue, 23 Jun 2020 22:13:14 +0000 (15:13 -0700)]
[lldb] Fix the modules build

Fixes error: invalid operands to binary expression ('llvm::StringRef'
and 'const char [6]')

4 years ago[RISCV][NFC] Add tests for folds of ADDIs into load/stores
Luís Marques [Tue, 23 Jun 2020 20:21:12 +0000 (21:21 +0100)]
[RISCV][NFC] Add tests for folds of ADDIs into load/stores

This patch adds tests for folds of ADDIs into load/stores, focusing on
load/stores with nonzero offsets. When the offset is nonzero we currently
don't do the fold. A follow-up patch will improve on that.

Differential Revision: https://reviews.llvm.org/D79689

4 years ago[flang] add RTBuilder.h
Eric Schweitz [Tue, 23 Jun 2020 15:15:09 +0000 (08:15 -0700)]
[flang] add RTBuilder.h

This is a set of type building models that is specific to the lowering
process. It provides the mechanism of mapping C(++) header file interfaces
to the MLIR+FIR type system.

It also provides some macros to build a constexpr evaluated table to
runtime functions. This code is used to build the interface tables to
various runtime support libraries.

Differential revision: https://reviews.llvm.org/D82387

4 years ago[ARM] Mark more integer instructions as not having side effects.
David Green [Tue, 23 Jun 2020 21:24:58 +0000 (22:24 +0100)]
[ARM] Mark more integer instructions as not having side effects.

LDRD and STRD along with UBFX and SBFX are selected from DAGToDAG
transforms, so do not have tblgen patterns. They don't get marked as
having side effects so cannot be scheduled as efficiently as you would
like.

This specifically marks then as not having side effects.

Differential Revision: https://reviews.llvm.org/D82358

4 years agoWhen performing a substitution into a dependent alias template, mark the
Richard Smith [Wed, 17 Jun 2020 21:49:03 +0000 (14:49 -0700)]
When performing a substitution into a dependent alias template, mark the
outer levels as retained rather than omitting their arguments.

This better reflects what's going on (we're performing a substitution
while still inside a template), and in theory is more correct, but I've
not found a testcase where it matters in practice (largely because we
don't allow alias templates to be declared inside a function).

Fixed AST dumping of SubstNonTypeTemplateParm[Pack]Expr to demonstrate
that we're properly substituting through dependent alias templates. (We
can't deduce properly through these yet, but we can at least produce the
right input to template argument deduction.)

No functionality change intended.

4 years ago[mlir] [VectorOps] Improve vector.create_mask lowering
aartbik [Tue, 23 Jun 2020 21:33:38 +0000 (14:33 -0700)]
[mlir] [VectorOps] Improve vector.create_mask lowering

Use vector compares for the 1-D case. This approach scales much better
than generating insertion operations, and exposes SIMD directly to backend.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D82402

4 years ago[SVE] Remove calls to VectorType::getNumElements from AsmParser
Christopher Tetreault [Tue, 23 Jun 2020 20:28:55 +0000 (13:28 -0700)]
[SVE] Remove calls to VectorType::getNumElements from AsmParser

Reviewers: efriedma, RKSimon, c-rhodes, fpetrogalli

Reviewed By: fpetrogalli

Subscribers: tschuett, hiraditya, rkruppe, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82208

4 years ago[ARM] Cortex-M4 integer instructions scheduler info test. NFC
David Green [Tue, 23 Jun 2020 21:03:30 +0000 (22:03 +0100)]
[ARM] Cortex-M4 integer instructions scheduler info test. NFC

Most useful at the moment for showing where unpredicatable instructions are.

4 years ago[ASan][MSan] Remove EmptyAsm and set the CallInst to nomerge to avoid from merging.
Zequan Wu [Mon, 22 Jun 2020 18:43:52 +0000 (11:43 -0700)]
[ASan][MSan] Remove EmptyAsm and set the CallInst to nomerge to avoid from merging.

Summary: `nomerge` attribute was added at D78659. So, we can remove the EmptyAsm workaround in ASan the MSan and use this attribute.

Reviewers: vitalybuka

Reviewed By: vitalybuka

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82322

4 years ago[lldb/Lua] Fix typo: s/stdout/stderr/
Jonas Devlieghere [Tue, 23 Jun 2020 21:17:08 +0000 (14:17 -0700)]
[lldb/Lua] Fix typo: s/stdout/stderr/

This wasn't caught by the existing test, but will be covered by the
extended test that's part of D82412.

4 years agotest/msan/sigwait: Don't silently ignore assertion failures
Gui Andrade [Tue, 23 Jun 2020 21:10:31 +0000 (14:10 -0700)]
test/msan/sigwait: Don't silently ignore assertion failures

Summary: As the parent process would return 0 independent of whether the child succeeded, assertions in the child would be ignored.

Reviewers: eugenis

Reviewed By: eugenis

Subscribers: #sanitizers

Tags: #sanitizers

Differential Revision: https://reviews.llvm.org/D82400

4 years agoPreserve GlobalsAA analysis result in InjectTLIMappings
Ryan Santhiraraja [Tue, 23 Jun 2020 21:04:36 +0000 (22:04 +0100)]
Preserve GlobalsAA analysis result in InjectTLIMappings

InjectTLIMappings fails to preserve the analysis result of GlobalsAA. Not preserving the analysis might affect benchmark performance. This change fixes this issue.

Patch by: Ryan Santhiraraja <rsanthir@quicinc.com>

Reviewers: fpetrogalli, joerg, fhahn

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D82343

4 years agoAdd missing string conversions to fix a compile error in Local.h
Adrian Prantl [Tue, 23 Jun 2020 20:36:06 +0000 (13:36 -0700)]
Add missing string conversions to fix a compile error in Local.h

4 years agofix test failure for clang/test/CodeGen/builtin-expect-with-probability.cpp
Zhi Zhuang [Tue, 23 Jun 2020 20:30:23 +0000 (13:30 -0700)]
fix test failure for clang/test/CodeGen/builtin-expect-with-probability.cpp

Fix test case added by D79830
Rewrite the test case, which did similar thing as builtin-expect.c
does(test generated llvm intrinsic instead of test branch weights).
Currently pass by "-disable-llvm-passes" option.

Differential Revision: https://reviews.llvm.org/D82403

4 years ago[IR] Remove MSVC warning workaround (NFC)
Nikita Popov [Tue, 23 Jun 2020 20:25:04 +0000 (22:25 +0200)]
[IR] Remove MSVC warning workaround (NFC)

While LLVM does fold this to x+1, GCC does not. As this is hot
code, let's try to avoid that.

According to
https://developercommunity.visualstudio.com/content/problem/211134/unsigned-integer-overflows-in-constexpr-functionsa.html
this spurious warning in MSVC has been fixed in Visual Studio 2019
Version 16.4. Let's see if there are any build bots running old
MSVC versions with warnings treated as errors...

4 years ago[SVE] Remove calls to VectorType::getNumElements from Bitcode
Christopher Tetreault [Tue, 23 Jun 2020 19:47:37 +0000 (12:47 -0700)]
[SVE] Remove calls to VectorType::getNumElements from Bitcode

Reviewers: efriedma, evgeny777, tejohnson, david-arm, kmclaughlin

Reviewed By: david-arm

Subscribers: tschuett, hiraditya, rkruppe, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82209

4 years ago[IR] Remove unnecessary uint64_t casts (NFC)
Nikita Popov [Tue, 23 Jun 2020 20:18:56 +0000 (22:18 +0200)]
[IR] Remove unnecessary uint64_t casts (NFC)

As pointed out by foad, it's not necessary to work on uint64_t
here. The values used here fit uint8_t.

4 years ago[libc][Obvious] Fix few typos in tests.
Siva Chandra Reddy [Tue, 23 Jun 2020 20:11:07 +0000 (13:11 -0700)]
[libc][Obvious] Fix few typos in tests.

4 years ago[DSE,MSSA] Treat `store 0` after calloc as noop stores.
Florian Hahn [Tue, 23 Jun 2020 18:26:31 +0000 (19:26 +0100)]
[DSE,MSSA] Treat `store 0` after calloc as noop stores.

This patch extends storeIsNoop to also detect stores of 0 to an calloced
object. This basically ports the logic from legacy DSE to the MemorySSA
backed version.

It triggers in a few cases on MultiSource, SPEC2000, SPEC2006 with -O3
LTO:

Same hash: 218 (filtered out)
Remaining: 19
Metric: dse.NumNoopStores

Program                                        base   patch2 diff
 test-suite...CFP2000/177.mesa/177.mesa.test     1.00  15.00 1400.0%
 test-suite...6/482.sphinx3/482.sphinx3.test     1.00  14.00 1300.0%
 test-suite...lications/ClamAV/clamscan.test     2.00  28.00 1300.0%
 test-suite...CFP2006/433.milc/433.milc.test     1.00   8.00 700.0%
 test-suite...pplications/oggenc/oggenc.test     2.00   9.00 350.0%
 test-suite.../CINT2000/176.gcc/176.gcc.test     6.00   6.00  0.0%
 test-suite.../CINT2006/403.gcc/403.gcc.test    NaN   137.00  nan%
 test-suite...libquantum/462.libquantum.test    NaN     3.00  nan%
 test-suite...6/464.h264ref/464.h264ref.test    NaN     7.00  nan%
 test-suite...decode/alacconvert-decode.test    NaN     2.00  nan%
 test-suite...encode/alacconvert-encode.test    NaN     2.00  nan%
 test-suite...ications/JM/ldecod/ldecod.test    NaN     9.00  nan%
 test-suite...ications/JM/lencod/lencod.test    NaN    39.00  nan%
 test-suite.../Applications/lemon/lemon.test    NaN     2.00  nan%
 test-suite...pplications/treecc/treecc.test    NaN     4.00  nan%
 test-suite...hmarks/McCat/08-main/main.test    NaN     4.00  nan%
 test-suite...nsumer-lame/consumer-lame.test    NaN     3.00  nan%
 test-suite.../Prolangs-C/bison/mybison.test    NaN     1.00  nan%
 test-suite...arks/mafft/pairlocalalign.test    NaN    30.00  nan%

Reviewers: efriedma, zoecarver, asbirlea

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D82204