Jonas Devlieghere [Mon, 3 Sep 2018 12:12:17 +0000 (12:12 +0000)]
[DebugInfo] Have the verifier accept missing linkage names.
According to the standard, for the .debug_names (the "dwarf accelerator
tables"):
> If a subprogram or inlined subroutine is included, and has a
> DW_AT_linkage_name attribute, there will be an additional index entry
> for the linkage name.
For Swift we generate DW_structure_types with a linkage name and the
verifier was incorrectly rejecting this. This patch fixes that by only
considering the linkage name in those particular cases. The test is the
"reduced" debug info of the failing swift test on swift.org.
Differential revision: https://reviews.llvm.org/D51420
llvm-svn: 341311
Martin Storsjo [Mon, 3 Sep 2018 11:59:23 +0000 (11:59 +0000)]
[AArch64] Simplify code in LowerGlobalAddress. NFCI.
When initial support for dllimport was added for aarch64 in
SVN r316555, ClassifyGlobalReference didn't set the MO_DLLIMPORT
flag - that was only completed in SVN r323810. Reuse the return
value from ClassifyGlobalReference for this purpose as well.
llvm-svn: 341310
Alexey Sotkin [Mon, 3 Sep 2018 11:43:22 +0000 (11:43 +0000)]
[OpenCL] Traverse vector types for ocl extensions support
Summary:
Given the following kernel:
__kernel void foo() {
double d;
double4 dd;
}
and cl_khr_fp64 is disabled, the compilation would fail due to
the presence of 'double d', but when removed, it passes.
The expectation is that extended vector types of unsupported types
will also be unsupported.
The patch adds the check for this scenario.
Patch by: Ofir Cohen
Reviewers: bader, Anastasia, AlexeySotkin, yaxunl
Reviewed By: Anastasia
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D51296
llvm-svn: 341309
Daniel Cederman [Mon, 3 Sep 2018 10:38:12 +0000 (10:38 +0000)]
[Sparc] allow tls_add/tls_call syntax in assembler parser
Summary: Removing unneeded isCodeGenOnly from tls-specific
instructions - TLS_ADD/TLS_LD/TLS_LDX/TLS_CALL.
Author: fedor.sergeev
Reviewers: jyknight, fedor.sergeev
Reviewed By: jyknight
Subscribers: dcederman, brad, llvm-commits
Differential Revision: https://reviews.llvm.org/D36463
llvm-svn: 341308
Dan Liew [Mon, 3 Sep 2018 10:33:32 +0000 (10:33 +0000)]
[asan] Clean up some confusing code in
`test/asan/TestCases/Darwin/segv_read_write.c`
* The `fd` arg passed to `mmap()` should be `-1`. It is not defined
what passing `0` does on Darwin.
* The comment about the shadow memory doesn't make any sense to me,
so I'm removing it.
Differential Revision: https://reviews.llvm.org/D44579
llvm-svn: 341307
Dan Liew [Mon, 3 Sep 2018 10:30:10 +0000 (10:30 +0000)]
[UBSan] Add CMake and lit support for configuring and running UBSan
tests for ios, watchos, tvos, and their simulator counterparts.
This commit does not make the tests actually pass. This will be handled
in later commits.
rdar://problem/
41126835
Differential Revision: https://reviews.llvm.org/D51270
llvm-svn: 341306
Sander de Smalen [Mon, 3 Sep 2018 10:23:34 +0000 (10:23 +0000)]
Fix issue introduced by r341301 that broke buildbot.
A condition in isSpillInstruction() updates a small vector rather
than the 'FI' by-ref parameter, which was used in a subsequent
call to 'isSpillSlotObjectIndex()'. This patch fixes the condition
to check the FIs in the vector instead.
llvm-svn: 341305
Eric Liu [Mon, 3 Sep 2018 10:18:21 +0000 (10:18 +0000)]
[clangd] Support multiple #include headers in one symbol.
Summary:
Currently, a symbol can have only one #include header attached, which
might not work well if the symbol can be imported via different #includes depending
on where it's used. This patch stores multiple #include headers (with # references)
for each symbol, so that CodeCompletion can decide which include to insert.
In this patch, code completion simply picks the most popular include as the default inserted header. We also return all possible includes and their edits in the `CodeCompletion` results.
Reviewers: sammccall
Reviewed By: sammccall
Subscribers: mgrang, ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Differential Revision: https://reviews.llvm.org/D51291
llvm-svn: 341304
Simon Pilgrim [Mon, 3 Sep 2018 10:17:25 +0000 (10:17 +0000)]
Remove unnecessary semicolon to silence -Wpedantic warning. NFCI.
llvm-svn: 341303
Carlos Alberto Enciso [Mon, 3 Sep 2018 09:41:43 +0000 (09:41 +0000)]
Test commit.
Revert change done in r341297. NFC.
Differential Revision: https://reviews.llvm.org/D51583
llvm-svn: 341302
Sander de Smalen [Mon, 3 Sep 2018 09:15:58 +0000 (09:15 +0000)]
Extend hasStoreToStackSlot with list of FI accesses.
For instructions that spill/fill to and from multiple frame-indices
in a single instruction, hasStoreToStackSlot and hasLoadFromStackSlot
should return an array of accesses, rather than just the first encounter
of such an access.
This better describes FI accesses for AArch64 (paired) LDP/STP
instructions.
Reviewers: t.p.northover, gberry, thegameg, rengolin, javed.absar, MatzeB
Reviewed By: MatzeB
Differential Revision: https://reviews.llvm.org/D51537
llvm-svn: 341301
Dan Liew [Mon, 3 Sep 2018 08:40:19 +0000 (08:40 +0000)]
Give a better error message when trying to run the iossim tests and `SANITIZER_IOSSIM_TEST_DEVICE_IDENTIFIER` is not set in the environment.
Summary: Give a better error message when trying to run the iossim tests and `SANITIZER_IOSSIM_TEST_DEVICE_IDENTIFIER` is not set in the environment.
Reviewers: kubamracek, george.karpenkov
Subscribers: #sanitizers, llvm-commits
Differential Revision: https://reviews.llvm.org/D51272
llvm-svn: 341300
Dan Liew [Mon, 3 Sep 2018 08:37:42 +0000 (08:37 +0000)]
[UBSan] Propagate `UBSAN_OPTIONS` environment variable when running ios simulator tests.
rdar://problem/
41126835
Reviewers: kubamracek, vsk, george.karpenkov
Subscribers: #sanitizers, llvm-commits
Differential Revision: https://reviews.llvm.org/D51273
llvm-svn: 341299
Dan Liew [Mon, 3 Sep 2018 08:33:24 +0000 (08:33 +0000)]
[UBSan] Add missing `%run` prefixes to Pointer tests.
Summary: rdar://problem/
41126835
Reviewers: vsk, kubamracek
Subscribers: #sanitizers, llvm-commits
Differential Revision: https://reviews.llvm.org/D51271
llvm-svn: 341298
Carlos Alberto Enciso [Mon, 3 Sep 2018 08:26:37 +0000 (08:26 +0000)]
Test commit - adding a new line.
llvm-svn: 341297
Aleksandr Urakov [Mon, 3 Sep 2018 07:16:06 +0000 (07:16 +0000)]
[DWARF] Fix dwarf5-index-is-used.cpp
Summary:
`dwarf5-index-is-used.cpp` have been failing after rL340206, because `clang`
have stopped to emit pubnames by default after that change. Current patch adds
`-gpubnames` option to the `clang` command line in the test to emit pubnames.
Reviewers: labath, dblaikie
Reviewed By: labath
Subscribers: clayborg, probinson, teemperor, lldb-commits, aprantl, JDevlieghere, abidh, stella.stamenova
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D51208
llvm-svn: 341296
Kristina Brooks [Mon, 3 Sep 2018 03:48:39 +0000 (03:48 +0000)]
[MC] - ConstantPools.cpp: Style consistency, remove redundant braces. NFC.
Remove braces around two, single statement "if" blocks in line with rest
of the file and the general LLVM code style. NFC, testing commit access.
llvm-svn: 341294
QingShan Zhang [Mon, 3 Sep 2018 03:14:29 +0000 (03:14 +0000)]
[PowerPC] Add Itineraries of IIC_IntRotateDI for P7/P8
When doing some instruction scheduling work, we noticed some missing itineraries.
Before we switch to machine scheduler, those missing itineraries might not have impact to actually scheduling,
because we can still get same latency due to default values.
With machine scheduler, however, itineraries will have impact to scheduling.
eg: NumMicroOps will default to be 0 if there is NO itineraries for specific instruction class.
And most of the instruction class with itineraries will have NumMicroOps default to 1.
This will has impact on the count of RetiredMOps, affects the Pending/Available Queue,
then causing different scheduling or suboptimal scheduling further.
Patch by jsji (Jinsong Ji)
Differential Revision: https://reviews.llvm.org/D51506
llvm-svn: 341293
Sanjay Patel [Sun, 2 Sep 2018 19:31:45 +0000 (19:31 +0000)]
[InstCombine] allow not+sub fold for arbitrary vector constants
The fold was implemented for the general case but use-limitation,
but the later constant version which didn't check uses was only
matching splat constants.
llvm-svn: 341292
Sanjay Patel [Sun, 2 Sep 2018 19:18:13 +0000 (19:18 +0000)]
[InstCombine] move/add tests for not+sub; NFC
llvm-svn: 341291
Hsiangkai Wang [Sun, 2 Sep 2018 16:35:42 +0000 (16:35 +0000)]
Revert "[DebugInfo] Fix bug in LiveDebugVariables."
This reverts commit
8f548ff2a1819e1bc051e8218584f1a3d2cf178a.
buildbot failure in LLVM on clang-ppc64be-linux
http://lab.llvm.org:8011/builders/clang-ppc64le-linux/builds/19765
llvm-svn: 341290
Hsiangkai Wang [Sun, 2 Sep 2018 15:57:22 +0000 (15:57 +0000)]
[DebugInfo] Fix bug in LiveDebugVariables.
In lib/CodeGen/LiveDebugVariables.cpp, it uses std::prev(MBBI) to
get DebugValue's SlotIndex. However, the previous instruction may be
also a debug instruction. It could not use a debug instruction to query
SlotIndex in mi2iMap.
Scan all debug instructions and use the first debug instruction to query
SlotIndex for following debug instructions. Only handle DBG_VALUE in
handleDebugValue().
Differential Revision: https://reviews.llvm.org/D50621
llvm-svn: 341289
Sanjay Patel [Sun, 2 Sep 2018 14:22:54 +0000 (14:22 +0000)]
[Reassociate] swap binop operands to increase factoring potential
If we have a pair of binops feeding another pair of binops, rearrange the operands so
the matching pair are together because that allows easy factorization folds to happen
in instcombine:
((X << S) & Y) & (Z << S) --> ((X << S) & (Z << S)) & Y (reassociation)
--> ((X & Z) << S) & Y (factorize shift from 'and' ops optimization)
This is part of solving PR37098:
https://bugs.llvm.org/show_bug.cgi?id=37098
Note that there's an instcombine version of this patch attached there, but we're trying
to make instcombine have less responsibility to improve compile-time efficiency.
For reasons I still don't completely understand, reassociate does this kind of transform
sometimes, but misses everything in my motivating cases.
This patch on its own is gluing an independent cleanup chunk to the end of the existing
RewriteExprTree() loop. We can build on it and do something stronger to better order the
full expression tree like D40049. That might be an alternative to the proposal to add a
separate reassociation pass like D41574.
Differential Revision: https://reviews.llvm.org/D45842
llvm-svn: 341288
Roman Lebedev [Sun, 2 Sep 2018 13:56:22 +0000 (13:56 +0000)]
[DAGCombine] optimizeSetCCOfSignedTruncationCheck(): handle inverted pattern
Summary:
A follow-up for D49266 / rL337166 + D49497 / rL338044.
This is still the same pattern to check for the [lack of]
signed truncation, but in this case the constants and the predicate
are negated.
https://rise4fun.com/Alive/BDV
https://rise4fun.com/Alive/n7Z
Reviewers: spatel, craig.topper, RKSimon, javed.absar, efriedma, dmgreen
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D51532
llvm-svn: 341287
David Carlier [Sun, 2 Sep 2018 10:52:43 +0000 (10:52 +0000)]
Fix buildbot test
llvm-svn: 341286
David Carlier [Sun, 2 Sep 2018 09:08:50 +0000 (09:08 +0000)]
[Sanitizer] openbsd build fix
sysctl has a different signature under OpenBSD
Reviewers: krytarowski
Reviewed By: krytarowski
Differential Revision: https://reviews.llvm.org/D51572
llvm-svn: 341285
Jonas Toth [Sun, 2 Sep 2018 09:04:51 +0000 (09:04 +0000)]
Fix Bug 38713: clang-format mishandles a short block after "default:" in a switch statement
Summary:
See https://bugs.llvm.org/show_bug.cgi?id=38713
Patch by Owen Pan!
Reviewers: djasper, klimek, sammccall
Reviewed By: sammccall
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D51294
llvm-svn: 341284
Lang Hames [Sun, 2 Sep 2018 01:29:29 +0000 (01:29 +0000)]
clang-format r341282.
llvm-svn: 341283
Lang Hames [Sun, 2 Sep 2018 01:28:26 +0000 (01:28 +0000)]
[ORC] Tidy up JITSymbolFlags to remove the need for some explicit static_casts.
Removes the implicit conversion to the underlying type for
JITSymbolFlags::FlagNames and replaces it with some bitwise and comparison
operators.
llvm-svn: 341282
Matt Davis [Sat, 1 Sep 2018 18:32:33 +0000 (18:32 +0000)]
[llvm-mca] Fix typo in debug output. NFC.
llvm-svn: 341281
Sanjay Patel [Sat, 1 Sep 2018 15:08:59 +0000 (15:08 +0000)]
[InstCombine] simplify code for 'or' fold
This is no-outwardly-visible-change intended, so no test.
But the code is smaller and more efficient. The check for
a 'not' op is intended to avoid the expensive value tracking
call when it should not be necessary, and it might prevent
infinite looping when we resurrect:
rL300977
llvm-svn: 341280
Dylan McKay [Sat, 1 Sep 2018 12:23:00 +0000 (12:23 +0000)]
[AVR] Redefine the 'LSL' instruction as an alias of 'ADD'
The 'LSL Rd' instruction is equivalent to 'ADD Rd, Rd'.
llvm-svn: 341278
Dylan McKay [Sat, 1 Sep 2018 12:22:54 +0000 (12:22 +0000)]
[AVR] Redefine the 'SBR' instruction as an alias
This fixes a TableGen warning about duplicate bit patterns.
SBR
===
This is an alias of 'ORI Rd, K'.
llvm-svn: 341277
Dylan McKay [Sat, 1 Sep 2018 12:22:50 +0000 (12:22 +0000)]
[AVR] Define the TST instruction as an alias of AND
The 'tst Rd' instruction is equivalent to 'and Rd, Rd'.
llvm-svn: 341276
Dylan McKay [Sat, 1 Sep 2018 12:22:07 +0000 (12:22 +0000)]
[AVR] Define the ROL instruction as an alias of ADC
The 'rol Rd' instruction is equivalent to 'adc Rd'.
This caused compile warnings from tablegen because of conflicting bits
shared between each instruction.
llvm-svn: 341275
Pavel Labath [Sat, 1 Sep 2018 12:15:46 +0000 (12:15 +0000)]
Ignore unicode decode errors in test suite's encoded_file class
These happen in a couple of tests when lldb tries to pretty print a
const char * variable in the inferior which points to garbage. Instead,
we have the python replace the invalid sequences with the unicode
replacement character.
llvm-svn: 341274
Fangrui Song [Sat, 1 Sep 2018 07:47:03 +0000 (07:47 +0000)]
[clangd] Fix many typos. NFC
llvm-svn: 341273
Tom Stellard [Sat, 1 Sep 2018 02:41:19 +0000 (02:41 +0000)]
AMDGPU/GlobalISel: Define instruction mapping for G_SELECT
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, llvm-commits, t-tye
Differential Revision: https://reviews.llvm.org/D49737
llvm-svn: 341271
Sanjin Sijaric [Sat, 1 Sep 2018 00:33:43 +0000 (00:33 +0000)]
Make HasWinCFI a plain bool instead of Optional<bool>
Summary:
Reid suggested making HasWinCFI a plain bool defaulting to false in D50288.
It's needed in order to add HasWinCFI to MIRPrinter. Otherwise, we'll get the
assertion:
HasWinCFI.hasValue() && "HasWinCFI not set yet!"'
Also, a few ARM64 Windows test cases will fail with the same assert if the ARM64
MCLayer part of EH work (D50166) goes in before the frame lowering part that
sets HasWinCFI (D50288 as of now).
Reviewers: rnk, mstorsjo, hans, javed.absar
Reviewed By: rnk
Subscribers: kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D51560
llvm-svn: 341270
Zhaoshi Zheng [Sat, 1 Sep 2018 00:04:56 +0000 (00:04 +0000)]
[Constant Hoisting] Hoisting Constant GEP Expressions
Leverage existing logic in constant hoisting pass to transform constant GEP
expressions sharing the same base global variable. Multi-dimensional GEPs are
rewritten into single-dimensional GEPs.
Differential Revision: https://reviews.llvm.org/D51396
llvm-svn: 341269
Frederic Riss [Fri, 31 Aug 2018 23:03:28 +0000 (23:03 +0000)]
File completion bugfix
If you tried to complete somwthing like ~/., lldb would come up with a lot
of non-existent filenames by concatenating every exisitng file in the directory
with an initial '.'.
This was due to a workaround for an llvm::fs::path::filename behavior that
was not applied selectively enough.
llvm-svn: 341268
Jessica Paquette [Fri, 31 Aug 2018 22:43:41 +0000 (22:43 +0000)]
Fix typo in size remarks for module passes
ModuleCount = InstrCount was incorrect. It should have been
InstrCount = ModuleCount. This was making it emit an extra, incorrect remark
for Print Module IR.
The test didn't catch this, because it didn't ensure that the only remark
output was from the desired pass. So, it was possible to have an extra remark
come through and not fail. Updated the test so that we ensure that the last
remark that's output comes from the desired pass. This is done by ensuring
that whatever is being read after the last remark is YAML output rather than
some incorrect garbage.
llvm-svn: 341267
Stanislav Mekhanoshin [Fri, 31 Aug 2018 22:43:36 +0000 (22:43 +0000)]
[AMDGPU] Split v32i32 loads
Differential Revision: https://reviews.llvm.org/D51555
llvm-svn: 341266
Craig Topper [Fri, 31 Aug 2018 22:29:56 +0000 (22:29 +0000)]
[X86] Add ktest intrinsics to match gcc and icc.
These aren't documented in the Intel Intrinsics Guide, but are supported by gcc and icc.
Includes these intrinsics:
_ktestc_mask8_u8, _ktestz_mask8_u8, _ktest_mask8_u8
_ktestc_mask16_u8, _ktestz_mask16_u8, _ktest_mask16_u8
_ktestc_mask32_u8, _ktestz_mask32_u8, _ktest_mask32_u8
_ktestc_mask64_u8, _ktestz_mask64_u8, _ktest_mask64_u8
llvm-svn: 341265
Krzysztof Parzyszek [Fri, 31 Aug 2018 22:10:04 +0000 (22:10 +0000)]
[Hexagon] Don't access non-existent instructions
llvm-svn: 341264
Matthias Braun [Fri, 31 Aug 2018 21:47:01 +0000 (21:47 +0000)]
Revamp test-suite documentation
- Remove duplication: Both TestingGuide and TestSuiteMakefileGuide
would give a similar overview over the test-suite.
- Present cmake/lit as the default/normal way of running the test-suite:
- Move information about the cmake/lit testsuite into the new
TestSuiteGuide.rst file. Mark the remaining information in
TestSuiteMakefilesGuide.rst as deprecated.
- General simplification and shorting of language.
- Remove paragraphs about tests known to fail as everything should pass
nowadays.
- Remove paragraph about zlib requirement; it's not required anymore
since we copied a zlib source snapshot into the test-suite.
- Remove paragraph about comparison with "native compiler". Correctness is
always checked against reference outputs nowadays.
- Change cmake/lit quickstart section to recommend `pip` for installing
lit and use `CMAKE_C_COMPILER` and a cache file in the example as that
is what most people will end up doing anyway. Also a section about
compare.py to quickstart.
- Document `Bitcode` and `MicroBenchmarks` directories.
- Add section with commonly used cmake configuration options.
- Add section about showing and comparing result files via compare.py.
- Add section about using external benchmark suites.
- Add section about using custom benchmark suites.
- Add section about profile guided optimization.
- Add section about cross-compilation and running on external devices.
Differential Revision: https://reviews.llvm.org/D51465
llvm-svn: 341260
Craig Topper [Fri, 31 Aug 2018 21:31:53 +0000 (21:31 +0000)]
[X86] Add intrinsics for KTEST instructions.
These intrinsics use the same implementation as PTEST intrinsics, but use vXi1 vectors.
New clang builtins will be accompanying them shortly.
llvm-svn: 341259
Heejin Ahn [Fri, 31 Aug 2018 20:57:00 +0000 (20:57 +0000)]
[WebAssembly] clang-format (NFC)
Summary: This patch runs clang-format on all wasm-only files.
Subscribers: dschuff, sbc100, jgravelle-google, sunfish, jfb, cfe-commits
Differential Revision: https://reviews.llvm.org/D51448
llvm-svn: 341254
Jessica Paquette [Fri, 31 Aug 2018 20:54:37 +0000 (20:54 +0000)]
[NFC] Optionally pass a function to emitInstrCountChangedRemark
In basic block, loop, and function passes, we already have a function that
we can use to emit optimization remarks. We can use that instead of searching
the module for the first suitable function (that is, one that contains at
least one basic block.)
llvm-svn: 341253
Jessica Paquette [Fri, 31 Aug 2018 20:51:54 +0000 (20:51 +0000)]
[NFC] Check if P is a pass manager on entry to emitInstrCountChangedRemark
There's no point in finding a function to use for remark output when we're
not going to emit anything.
llvm-svn: 341252
Craig Topper [Fri, 31 Aug 2018 20:41:06 +0000 (20:41 +0000)]
[X86] Add k-mask conversion and load/store instrinsics to match gcc and icc.
This adds:
_cvtmask8_u32, _cvtmask16_u32, _cvtmask32_u32, _cvtmask64_u64
_cvtu32_mask8, _cvtu32_mask16, _cvtu32_mask32, _cvtu64_mask64
_load_mask8, _load_mask16, _load_mask32, _load_mask64
_store_mask8, _store_mask16, _store_mask32, _store_mask64
These are currently missing from the Intel Intrinsics Guide webpage.
llvm-svn: 341251
Jessica Paquette [Fri, 31 Aug 2018 20:20:57 +0000 (20:20 +0000)]
[NFC] Pass the instruction delta to emitInstrCountChangedRemark
Instead of counting the size of the entire module every time we run a pass,
pass along a delta instead and use that to emit the remark.
This means we only have to use (on average) smaller IR units to calculate
instruction counts. E.g, in a BB pass, we only need to look at the delta of
the BB instead of the delta of the entire module.
6/6
(This improved compile time for size remarks on sqlite3 + O2 significantly)
llvm-svn: 341250
Jessica Paquette [Fri, 31 Aug 2018 20:20:56 +0000 (20:20 +0000)]
[NFC] Pre-calculate SCC IR counts in size remarks.
Same vein as the previous commits. Pre-calculate the size of
the module and use that to decide if we're going to emit a
remark.
This one comes with a FIXME and TODO. First off, CallGraphSCC
and CallGraphNode don't have a getInstructionCount function. So,
for now, we do the same thing as in a module pass.
Second off, we're not really saving anything here yet, because
as before, I need to change emitInstrCountChangedRemark to take
in a delta. Keeping the patches small though, so that's coming up
next.
5/6
llvm-svn: 341249
Jessica Paquette [Fri, 31 Aug 2018 20:20:55 +0000 (20:20 +0000)]
[NFC] Pre-calculate module IR counts in size remarks.
Same as the previous NFC commits in the same vein.
This one introduces a TODO. I'm going to change emitInstrCountChangedRemark
so that it takes in a delta. Since the delta isn't necessary yet, it's not
there. For now, this means that we're calculating the size of the module
twice.
Just done separately to keep the patches small.
4/6
llvm-svn: 341248
Jessica Paquette [Fri, 31 Aug 2018 20:20:54 +0000 (20:20 +0000)]
[NFC] Pre-calculate loop IR counts in size remarks.
Another commit reducing compile time in size remarks.
Cache the size of the module and loop, and update values based
off of deltas instead. Avoid recalculating the size of the
whole module whenever possible.
3/6
llvm-svn: 341247
Jessica Paquette [Fri, 31 Aug 2018 20:20:53 +0000 (20:20 +0000)]
[NFC] Pre-calculate basic block IR counts in size remarks.
Size remarks are slow due to lots of recalculation of the module.
This is similar to the previous commit. Cache the size of the module and
update counts in basic block passes based off a less-expensive delta.
2/6
llvm-svn: 341246
Jessica Paquette [Fri, 31 Aug 2018 20:19:41 +0000 (20:19 +0000)]
[NFC] Pre-calculate function IR counts in size remarks.
Size remarks are slow due to lots of recalculation of the module.
Pre-calculate the module size and initial function size for a remark. Use
deltas calculated using the less-expensive function IR count to update the
module counts for Function passes.
1/6
llvm-svn: 341245
Tom Stellard [Fri, 31 Aug 2018 20:15:31 +0000 (20:15 +0000)]
lit: Use sys.executable for executing builtin commands
Summary:
The python executable may not exist on all systems so use sys.executable
instead.
Reviewers: ddunbar, stella.stamenova
Subscribers: delcypher, llvm-commits
Differential Revision: https://reviews.llvm.org/D51511
llvm-svn: 341244
Dean Michael Berris [Fri, 31 Aug 2018 20:02:55 +0000 (20:02 +0000)]
[XRay] Update RecordInitializer for PIDRecord
Since we changed the storage for the PID in PIDRecord instances, we need
to also update the way we load the data from a DataExtractor through the
RecordInitializer.
llvm-svn: 341243
Haojian Wu [Fri, 31 Aug 2018 19:53:37 +0000 (19:53 +0000)]
[clangd] Implement findOccurrences interface in dynamic index.
Summary:
Implement the interface in
- FileIndex
- MemIndex
- MergeIndex
Depends on https://reviews.llvm.org/D50385.
Reviewers: sammccall, ilya-biryukov
Reviewed By: sammccall
Subscribers: mgrang, ilya-biryukov, ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Differential Revision: https://reviews.llvm.org/D51279
llvm-svn: 341242
Dean Michael Berris [Fri, 31 Aug 2018 19:32:46 +0000 (19:32 +0000)]
[XRay] Use correct type for PID records
Previously we've been reading and writing the wrong types which only
worked in little endian implementations. This time we're writing the
same typed values the runtime is using, and reading them appropriately
as well.
llvm-svn: 341241
Tim Northover [Fri, 31 Aug 2018 19:24:37 +0000 (19:24 +0000)]
Tests: fix tests encoding specific hash values for 32-bit systems.
I changed the seed slightly, but forgot to run the tests on a 32-bit system, so
tests which hard-code a specific hash value started breaking.
llvm-svn: 341240
Dean Michael Berris [Fri, 31 Aug 2018 19:11:19 +0000 (19:11 +0000)]
[XRay] Use correct type for thread ID parsing
Previously we were reading only a uint16_t when we really needed to read
an int32_t from the log.
llvm-svn: 341239
Sid Manning [Fri, 31 Aug 2018 19:08:23 +0000 (19:08 +0000)]
[Hexagon] Add support for getRegisterByName.
Support required to build the Hexagon Linux kernel.
Differential Revision: https://reviews.llvm.org/D51363
llvm-svn: 341238
Dean Michael Berris [Fri, 31 Aug 2018 18:56:42 +0000 (18:56 +0000)]
[XRay] Improve test matching granularity (NFC)
Simplify matchers for unittest to better isolate which differences there
are that we're finding in failures.
llvm-svn: 341237
Dean Michael Berris [Fri, 31 Aug 2018 18:36:58 +0000 (18:36 +0000)]
[XRay] Change function record reader to be endian-aware
This change allows us to let the compiler do the right thing for when
handling big-endian and little-endian records for FDR mode function
records.
Previously, we assumed that the encoding was little-endian that reading
the first byte to look for the function id and function record types was
ordered in a little-endian manner. This change allows us to better
handle function records where the first four bytes may actually be
encoded in big-endian thus giving us the wrong bytes where we're seeking
the function information from.
This is a follow-up to D51210 and D51289.
llvm-svn: 341236
Pavel Labath [Fri, 31 Aug 2018 18:25:01 +0000 (18:25 +0000)]
Avoid using short identifiers in some tests
This applies the same workaround as r321271 to other tests. The root
problem is that lldb finds an internal symbol with the same name in the
debug info of system libraries, and then fails to disambiguate between
the two.
llvm-svn: 341235
Craig Topper [Fri, 31 Aug 2018 18:22:52 +0000 (18:22 +0000)]
[X86] Add kshift intrinsics to match gcc and icc.
This adds the following intrinsics:
_kshiftli_mask8
_kshiftli_mask16
_kshiftli_mask32
_kshiftli_mask64
_kshiftri_mask8
_kshiftri_mask16
_kshiftri_mask32
_kshiftri_mask64
llvm-svn: 341234
Frederic Riss [Fri, 31 Aug 2018 18:14:53 +0000 (18:14 +0000)]
Fix a comment to use the correct variable name.
llvm-svn: 341233
Charles Davis [Fri, 31 Aug 2018 18:11:48 +0000 (18:11 +0000)]
Export public functions implemented in assembly on Windows.
Summary:
By default, symbols aren't visible outside of the module that defines
them. To make them visible, they must be exported. The easiest way to do
that is to embed an `-export:symname` directive into the object file.
Reviewers: mstorsjo, rnk
Subscribers: christof, cfe-commits
Differential Revision: https://reviews.llvm.org/D51508
llvm-svn: 341232
Sterling Augustine [Fri, 31 Aug 2018 17:59:03 +0000 (17:59 +0000)]
Refactor Addlibgcc to make the when and what logic more straightfoward.
Add Android tests.
llvm-svn: 341231
Dean Michael Berris [Fri, 31 Aug 2018 17:49:59 +0000 (17:49 +0000)]
[XRay] Fix FunctionRecord serialization
This change makes the writer implementation more consistent with the way
fields are written down to avoid assumptions on bitfield order and
padding. We also fix an inconsistency between the type returned by the
`delta()` accessor to match the data member it's returning.
This is a follow-up to D51289 and D51210.
llvm-svn: 341230
Evgeniy Stepanov [Fri, 31 Aug 2018 17:49:49 +0000 (17:49 +0000)]
[hwasan] Fix new[] with zero size.
Fixes "allocator is out of memory trying to allocate 0x0 bytes" by
always allocating at least one byte.
llvm-svn: 341229
Alexandre Ganea [Fri, 31 Aug 2018 17:41:58 +0000 (17:41 +0000)]
[DebugInfo] Common behavior for error types
Following D50807, and heading towards D50664, this intermediary change does the following:
1. Upgrade all custom Error types in llvm/trunk/lib/DebugInfo/ to use the new StringError behavior (D50807).
2. Implement std::is_error_code_enum and make_error_code() for DebugInfo error enumerations.
3. Rename GenericError -> PDBError (the file will be renamed in a subsequent commit)
4. Update custom error messages to follow the same formatting: (\w\s*)+\.
5. Keep generic "file not found" (ENOENT) errors as they are in PDB code. Previously, there used to be a custom enumeration for that purpose.
6. Remove a few extraneous LF in log() implementations. Printing LF is a responsability at a higher level, not at the error level.
Differential Revision: https://reviews.llvm.org/D51499
llvm-svn: 341228
Craig Topper [Fri, 31 Aug 2018 17:17:21 +0000 (17:17 +0000)]
[X86] Add support for turning vXi1 shuffles into KSHIFTL/KSHIFTR.
This patch recognizes shuffles that shift elements and fill with zeros. I've copied and modified the shift matching code we use for normal vector registers to do this. I'm not sure if there's a good way to share more of this code without making the existing function more complex than it already is.
This will be used to enable kshift intrinsics in clang.
Differential Revision: https://reviews.llvm.org/D51401
llvm-svn: 341227
Dean Michael Berris [Fri, 31 Aug 2018 17:06:28 +0000 (17:06 +0000)]
[XRay] Make Trace loading endian-aware
This change makes the XRay Trace loading functions first use a
little-endian data extractor, then on failures try a big-endian data
extractor. Without this change, the trace loading facility will not work
with data written from a big-endian machine.
Follow-up to D51210 and D51289.
llvm-svn: 341226
Dean Michael Berris [Fri, 31 Aug 2018 16:08:38 +0000 (16:08 +0000)]
[XRay] Make the FDRTraceWriter Endian-aware
Before this patch, the FDRTraceWriter would not take endianness into
account when writing data into the output stream.
This is a follow-up to D51289 and D51210.
llvm-svn: 341223
Andrea Di Biagio [Fri, 31 Aug 2018 16:05:48 +0000 (16:05 +0000)]
[X86][BtVer2] Remove wrong ReadAdvance from AVX vbroadcast(ss|sd|f128) instructions.
The presence of a ReadAdvance for input operand #0 is problematic
because it changes the input latency of the register used as the base address
for the folded load.
A broadcast cannot start executing if the load address hasn't been computed yet.
In the llvm-mca example, the VBROADCASTSS is dependent on the address generated
by the LEAQ. That means, it cannot start until LEAQ reaches the write-back
stage. If we apply ReadAdvance, then we wrongly assume that the load can start 3
cycles in advance.
Differential Revision: https://reviews.llvm.org/D51534
llvm-svn: 341222
Simon Atanasyan [Fri, 31 Aug 2018 15:57:17 +0000 (15:57 +0000)]
[mips] Fix `mtc1` and `mfc1` definitions for microMIPS R6
The `mtc1` and `mfc1` definitions in the MipsInstrFPU.td have MMRel,
but do not have StdMMR6Rel tags. When these instructions are emitted
for microMIPS R6 targets, `Mips::MipsR62MicroMipsR6` nor
`Mips::Std2MicroMipsR6` cannot find correct op-codes and as a result the
backend uses mips32 variant of the instructions encoding.
The patch fixes this problem by adding the StdMMR6Rel tag and check
instructions encoding in the test case.
Differential revision: https://reviews.llvm.org/D51482
llvm-svn: 341221
Matt Arsenault [Fri, 31 Aug 2018 15:39:52 +0000 (15:39 +0000)]
AMDGPU: Restrict extract_vector_elt combine to loads
The intention is to enable the extract_vector_elt load combine,
and doing this for other operations interferes with more
useful optimizations on vectors.
Handle any type of load since in principle we should do the
same combine for the various load intrinsics.
llvm-svn: 341219
Matt Arsenault [Fri, 31 Aug 2018 15:05:06 +0000 (15:05 +0000)]
AMDGPU: Actually commit re-run of update_llc_test_checks
llvm-svn: 341218
Martin Storsjo [Fri, 31 Aug 2018 14:56:55 +0000 (14:56 +0000)]
Fix existing code for SEH on ARM to compile correctly
Even though SEH for ARM is incomplete, make what code already exists
at least compile correctly.
The _LIBUNWIND_CURSOR_SIZE wasn't correct.
ARM (and AArch64) have a DISPATCHER_CONTEXT field named TargetPc
instead of TargetIp.
For the libunwind.h UNW_* constants, there is no UNW_ARM_PC, only
UNW_ARM_IP.
Don't use 'r' as loop variable when 'r' already is a Registers_arm
member.
Differential Revision: https://reviews.llvm.org/D51530
llvm-svn: 341217
Jonas Devlieghere [Fri, 31 Aug 2018 14:54:01 +0000 (14:54 +0000)]
[Wasm] Add missing EOF checks for floats
Adds the same checks we already do for ints to floats.
Fixes: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=8698
llvm-svn: 341216
Matt Arsenault [Fri, 31 Aug 2018 14:34:53 +0000 (14:34 +0000)]
SLPVectorizer: Fix assert with different sized address spaces
llvm-svn: 341215
Matt Arsenault [Fri, 31 Aug 2018 14:34:22 +0000 (14:34 +0000)]
AMDGPU: Fix broken generated check lines
This was incorrectly using the same check prefix for multiple lines
llvm-svn: 341214
Andrea Di Biagio [Fri, 31 Aug 2018 14:12:13 +0000 (14:12 +0000)]
[X86] Add llvm-mca tests that show how operand latency is wrongly computed for SSE sqrtss/sd and rcpss.
According to the timeline view, sqrtss/sd/rcpss start executing before the load
address for the memory operand is available.
This problem is caused by the presence of a ReadAfterLd (a ReadAdvance). Those
unary operations should not specify a ReadAdvance at all.
llvm-svn: 341213
Alexey Bataev [Fri, 31 Aug 2018 13:56:14 +0000 (13:56 +0000)]
[DEBUGINFO] Add support for emission of the debug directives only.
Summary:
Added option -gline-directives-only to support emission of the debug directives
only. It behaves very similar to -gline-tables-only, except that it sets
llvm debug info emission kind to
llvm::DICompileUnit::DebugDirectivesOnly.
Reviewers: echristo
Subscribers: aprantl, fedor.sergeev, JDevlieghere, cfe-commits
Differential Revision: https://reviews.llvm.org/D51177
llvm-svn: 341212
Sam McCall [Fri, 31 Aug 2018 13:55:01 +0000 (13:55 +0000)]
[clangd] Flatten out Symbol::Details. It was ill-conceived, sorry.
Reviewers: ioeric
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Differential Revision: https://reviews.llvm.org/D51504
llvm-svn: 341211
Charles Davis [Fri, 31 Aug 2018 13:41:05 +0000 (13:41 +0000)]
[AddressSpace] Use the macro to set hidden visibility on LocalAddressSpace.
Summary:
That attribute has no effect on Windows anyway--classes are hidden by
default.
Reviewers: mstorsjo, rnk
Subscribers: christof, cfe-commits
Differential Revision: https://reviews.llvm.org/D51509
llvm-svn: 341210
Francis Visoiu Mistrih [Fri, 31 Aug 2018 13:10:54 +0000 (13:10 +0000)]
[llvm-objdump] Keep the memory buffer from the dSYM alive when using -g -dsym
When using -g and -dsym, llvm-objdump opens the dsym file and keeps the
MachOObjectFile alive, while the memory buffer that the MachOObjectFile
was based on gets destroyed.
Differential Revision: https://reviews.llvm.org/D51365
llvm-svn: 341209
Haojian Wu [Fri, 31 Aug 2018 12:54:13 +0000 (12:54 +0000)]
[clangd] Collect symbol occurrences in SymbolCollector.
SymbolCollector will be used for two cases:
- collect Symbol type only, used for indexing preamble AST.
- collect Symbol and SymbolOccurrences, used for indexing main AST.
For finding local references from the AST, we will implement it in other ways.
llvm-svn: 341208
Ben Dunbobbin [Fri, 31 Aug 2018 12:09:21 +0000 (12:09 +0000)]
[LLD] Add test missed from r341206. NFC.
llvm-svn: 341207
Ben Dunbobbin [Fri, 31 Aug 2018 11:51:51 +0000 (11:51 +0000)]
[LLD] Check too large offsets into merge sections earlier
This patch moves the checking for too large offsets into merge sections
earlier.
Without this change the large offset generated in the added test-case
will cause an assert (as it happens to be a value reserved as a
"tombstone" in the DenseMap implementation) when OffsetMap is queried in
getSectionPiece().
To simplify the code and avoid future mistakes I have refactored so that
there is only one function that looks up offsets in the OffsetMap.
Differential Revision: https://reviews.llvm.org/D51180
llvm-svn: 341206
Dean Michael Berris [Fri, 31 Aug 2018 11:41:08 +0000 (11:41 +0000)]
[XRay] Remove array for Metadata Record Types
This simplifies the implementation of the metadata lookup by using
scoped enums, rather than using enum classes. This way we can get the
number-name mapping without having to resort to comments.
Follow-up to D51289.
llvm-svn: 341205
Alexander Ivchenko [Fri, 31 Aug 2018 11:26:51 +0000 (11:26 +0000)]
[GlobalISel][X86] Add the support for G_FPTRUNC
Differential Revision: https://reviews.llvm.org/D49855
llvm-svn: 341202
Alexander Ivchenko [Fri, 31 Aug 2018 11:16:58 +0000 (11:16 +0000)]
[GlobalISel][X86_64] Support for G_FPTOSI
Differential Revision: https://reviews.llvm.org/D49183
llvm-svn: 341200
Alexander Ivchenko [Fri, 31 Aug 2018 11:05:13 +0000 (11:05 +0000)]
[GlobalIsel][X86] Support for llvm.trap intrinsic
Differential Revision: https://reviews.llvm.org/D49180
llvm-svn: 341199
Alexander Ivchenko [Fri, 31 Aug 2018 10:39:54 +0000 (10:39 +0000)]
[NFC] Fix unused variable warning in X86RegisterBankInfo.cpp
llvm-svn: 341198
Andrea Di Biagio [Fri, 31 Aug 2018 10:39:33 +0000 (10:39 +0000)]
[X86][BtVer2] Add an llvm-mca test that shows how the read latency of AVX broadcastss on ymm registers is incorrectly set.
llvm-svn: 341197
Dean Michael Berris [Fri, 31 Aug 2018 10:03:52 +0000 (10:03 +0000)]
[XRay] Attempt to fix failure on Windows
Original version of the code relied on implementation-defined order of bitfields.
Follow-up on D51210.
llvm-svn: 341194