Simon Glass [Sat, 18 Dec 2021 18:27:29 +0000 (11:27 -0700)]
timer: Add a migration message
Some boards still use the old timer mechanism. Set a deadline for them to
update to driver model. Point to some examples as well.
This needs a bit of a strange rule to avoid an error on some boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Thomas Huth [Sat, 13 Nov 2021 17:13:50 +0000 (18:13 +0100)]
LynxOS is no longer supported
LynxOS needed the do_bootm_lynxkdi() function that got removed in
7e713067ee ("Remove LYNX KDI remainders") - and that function needed
a lynxkdi_boot() function, where the last implementation had been
removed in
98f705c9ce ("powerpc: remove 4xx support") already. Looks
like this OS is definitely not supported anymore, so remove it from
the corresponding lists.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Simon Glass [Wed, 12 Jan 2022 20:10:36 +0000 (13:10 -0700)]
binman: Write fake blobs to the output directory
At present binman writes fake blobs to the current directory. This is not
very helpful, since the files serve no useful purpose once binman has
finished. They clutter up the source directory and affect future runs,
since the files in the current directory are often used in preference to
those in the board directory.
To avoid these problems, write them to the output directory instead.
Move the file-creation code to the Entry base class, so it can be used by
any entry type that needs it. This is required since some entry types,
such as Entry_blob_ext_list, are not subclasses of Entry_blob.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 12 Jan 2022 20:10:35 +0000 (13:10 -0700)]
binman: Renumber the fake blob dts
Use a unique number instead of the current 203, which is used by 203_fip
as well. Reformat the code to avoid a long line.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Wed, 12 Jan 2022 00:14:29 +0000 (19:14 -0500)]
CI, Dockerfile: Update to latest "focal" tag
Bring us to the focal-
20220105 tag and rebuild our images on top of
this.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 12 Jan 2022 00:14:28 +0000 (19:14 -0500)]
ci: azure: Update to use stages
Follow what we do in GitLab CI where we break the jobs up in to stages
such that if earlier and often quicker sanity tests fail we don't run
everything else.
Signed-off-by: Tom Rini <trini@konsulko.com>
Adam Ford [Wed, 22 Dec 2021 16:40:27 +0000 (10:40 -0600)]
Makefile: Add more files to clean list
When building for i.mx8m boards with binman, a few more additional
files are created which should be removed when running 'make clean'
Signed-off-by: Adam Ford <aford173@gmail.com>
Tom Rini [Thu, 13 Jan 2022 01:49:39 +0000 (20:49 -0500)]
Merge branch '2022-01-12-pci-updates'
- PCI code clean up and bug fixes from Pali
Pali Rohár [Fri, 26 Nov 2021 10:42:52 +0000 (11:42 +0100)]
pci: sh7751: Fix access to config space via PCI_CONF1_ADDRESS() macro
sh7751 platform uses standard format of Config Address for PCI
Configuration Mechanism #1.
Commit
72c2f4acd76f ("pci: sh7751: Convert to DM and DT probing") which did
conversion of PCI sh7751 driver to DM, broke access to config space as that
commit somehow swapped device and function bits in config address.
Fix all these issues by using new U-Boot macro PCI_CONF1_ADDRESS() which
calculates Config Address correctly.
Also remove nonsense function sh7751_pci_addr_valid() which was introduced
in commit
72c2f4acd76f ("pci: sh7751: Convert to DM and DT probing")
probably due to workarounded issues with mixing/swapping device and
function bits of config address which probably resulted in non-working
access to some devices. With correct composing of config address there
should not be such issue anymore.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes:
72c2f4acd76f ("pci: sh7751: Convert to DM and DT probing")
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Fri, 26 Nov 2021 10:42:51 +0000 (11:42 +0100)]
m68k: mcf5445x: pci: Use PCI_CONF1_ADDRESS() macro
mcf5445x platform uses standard format of Config Address for PCI
Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Fri, 26 Nov 2021 10:42:50 +0000 (11:42 +0100)]
x86: pci: Use PCI_CONF1_ADDRESS() macro
x86 platform uses standard format of Config Address for PCI Configuration
Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Fri, 26 Nov 2021 10:42:49 +0000 (11:42 +0100)]
pci: sh7780: Use PCI_CONF1_ADDRESS() macro
PCI sh7780 driver uses standard format of Config Address for PCI
Configuration Mechanism #1.
So use new U-Boot macro PCI_CONF1_ADDRESS().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Fri, 26 Nov 2021 10:42:48 +0000 (11:42 +0100)]
pci: mediatek: Use PCI_CONF1_EXT_ADDRESS() macro
PCI mediatek driver uses extended format of Config Address for PCI
Configuration Mechanism #1 but with cleared Enable bit.
So use new U-Boot macro PCI_CONF1_EXT_ADDRESS() with clearing
PCI_CONF1_ENABLE bit and remove old custom driver address macros.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Fri, 26 Nov 2021 10:42:47 +0000 (11:42 +0100)]
pci: fsl: Use PCI_CONF1_EXT_ADDRESS() macro
PCI fsl driver uses extended format of Config Address for PCI
Configuration Mechanism #1.
So use new U-Boot macro PCI_CONF1_EXT_ADDRESS().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Fri, 26 Nov 2021 10:42:46 +0000 (11:42 +0100)]
pci: tegra: Use PCI_CONF1_EXT_ADDRESS() macro
PCI tegra driver uses extended format of Config Address for PCI
Configuration Mechanism #1 but with cleared Enable bit.
So use new U-Boot macro PCI_CONF1_EXT_ADDRESS() with clearing
PCI_CONF1_ENABLE bit and remove old custom driver address function.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Fri, 26 Nov 2021 10:42:45 +0000 (11:42 +0100)]
pci: mvebu: Use PCI_CONF1_EXT_ADDRESS() macro
PCI mvebu driver uses extended format of Config Address for PCI
Configuration Mechanism #1.
So use new U-Boot macro PCI_CONF1_EXT_ADDRESS() and remove old custom
driver address macros.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Fri, 26 Nov 2021 10:42:44 +0000 (11:42 +0100)]
pci: msc01: Use PCI_CONF1_ADDRESS() macro
PCI msc01 driver uses standard format of Config Address for PCI
Configuration Mechanism #1 but with cleared Enable bit.
So use new U-Boot macro PCI_CONF1_ADDRESS() with clearing PCI_CONF1_ENABLE
bit and remove old custom driver address macros.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Fri, 26 Nov 2021 10:42:43 +0000 (11:42 +0100)]
pci: mpc85xx: Use PCI_CONF1_EXT_ADDRESS() macro
PCI mpc85xx driver uses extended format of Config Address for PCI
Configuration Mechanism #1.
So use new U-Boot macro PCI_CONF1_EXT_ADDRESS().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Fri, 26 Nov 2021 10:42:42 +0000 (11:42 +0100)]
pci: gt64120: Use PCI_CONF1_ADDRESS() macro
PCI gt64120 driver uses standard format of Config Address for PCI
Configuration Mechanism #1.
So use new U-Boot macro PCI_CONF1_ADDRESS() and remove old custom driver
address macros.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Fri, 26 Nov 2021 10:42:41 +0000 (11:42 +0100)]
pci: Add standard PCI Config Address macros
Lot of PCI and PCIe controllers are using standard Config Address for PCI
Configuration Mechanism #1 or its extended version.
So add PCI_CONF1_ADDRESS() and PCI_CONF1_EXT_ADDRESS() macros into U-Boot's
pci.h header file which can be suitable for most PCI and PCIe controller
drivers. Drivers do not have to invent their own macros and can use these
new U-Boot macros.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Thu, 25 Nov 2021 10:34:37 +0000 (11:34 +0100)]
pci: When disabling pref MEM set all base bits
It is common to set all base address bits to one and all limit address bits
to zero for disabling address forwarding. Forwarding is disabled when base
address is higher than limit address, so this change should not have any
effect.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 25 Nov 2021 10:32:43 +0000 (11:32 +0100)]
pci: Disable I/O forwarding during autoconfiguration if unsupported
If U-Boot does not have any I/O resource for assignment then disable I/O
forwarding in PCI bridge autoconfiguration code. Default initial state of
PCI bridge IO registers is unspecified, therefore they can be in enabled if
U-Boot does not touch them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 25 Nov 2021 10:30:58 +0000 (11:30 +0100)]
pci: Fix register for determining type of IO base address
Function dm_pciauto_prescan_setup_bridge() configures base address
registers, therefore it should read type of IO from base address registers
(and not from limit address registers).
Note that base and limit address registers should have same type, so this
change is just usage correction and has no functional change on correctly
working hardware.
Fixes:
8e85f36a8fab ("pci: Fix configuring io/memory base and limit registers of PCI bridges")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 24 Nov 2021 17:00:33 +0000 (18:00 +0100)]
pci: pci_octeontx: Use PCIE_ECAM_OFFSET() macro
Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 24 Nov 2021 17:00:32 +0000 (18:00 +0100)]
pci: pcie_iproc: Use PCIE_ECAM_OFFSET() macro
Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Wed, 24 Nov 2021 17:00:31 +0000 (18:00 +0100)]
pci: pcie-brcmstb: Use PCIE_ECAM_OFFSET() macro
Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
Pali Rohár [Wed, 24 Nov 2021 17:00:30 +0000 (18:00 +0100)]
vexpress64: Remove unused macro XR3PCI_ECAM_OFFSET
Macro XR3PCI_ECAM_OFFSET is unused and in case it would be needed in future
it can be replaced by standard PCIE_ECAM_OFFSET macro from pci.h file.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tom Rini [Wed, 12 Jan 2022 03:21:15 +0000 (22:21 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-mmc
Heinrich Schuchardt [Sat, 18 Dec 2021 09:53:48 +0000 (10:53 +0100)]
mmc: unconditionally define mmc_deinit()
We want to replace '#ifdef' by 'if (IS_ENABLED(CONFIG_...))' in our code.
Therefore functions should be defined unconditionally even if they are not
implemented.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
John Keeping [Tue, 7 Dec 2021 16:09:35 +0000 (16:09 +0000)]
mmc: dwmmc: return a proper error code when busy
When failing to send a command because the hardware is busy, return
EBUSY to indicate the cause instead of just -1.
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Sean Anderson [Tue, 23 Nov 2021 20:03:47 +0000 (15:03 -0500)]
mmc: fsl_esdhc_imx: set sysctl register for clock initialization
[ fsl_esdhc commit
263ddfc3454ead3a988adef39b962479adce2b28 ]
The initial clock setting should be through sysctl register only,
while the mmc_set_clock() will call mmc_set_ios() introduce other
configurations like bus width, mode, and so on.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Sean Anderson [Tue, 23 Nov 2021 20:03:46 +0000 (15:03 -0500)]
mmc: fsl_esdhc_imx: Replace more #ifdefs by if
This builds on the previous patch by converting yet more preprocessor
macros to C ifs. This is split off so that the changes adapted from
Micheal's patch may be clearly distinguished from the ones I have
authored myself.
MMC_SUPPORTS_TUNING should really get a Kconfig conversion. And DM_GPIO
needs some -ENOSYS stubs when it isn't defined.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Sean Anderson [Tue, 23 Nov 2021 20:03:45 +0000 (15:03 -0500)]
mmc: fsl_esdhc_imx: replace most #ifdefs by IS_ENABLED()
[ fsl_esdhc commit
52faec31827ec1a1837977e29c067424426634c5 ]
Make the code cleaner and drop the old-style #ifdef constructs where it is
possible.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Sean Anderson [Tue, 23 Nov 2021 20:03:44 +0000 (15:03 -0500)]
mmc: fsl_esdhc_imx: simplify esdhc_setup_data()
[ fsl_esdhc commit
7e48a028a42c111ba38a90b86e5f57dace980fa0 ]
First, we need the waterlevel setting for PIO mode only. Secondy, both DMA
setup code is identical for both directions, except for the data pointer.
Thus, unify them.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Sean Anderson [Tue, 23 Nov 2021 20:03:43 +0000 (15:03 -0500)]
mmc: fsl_esdhc_imx: use dma-mapping API
[ fsl_esdhc commit
b1ba1460a445bcc67972a617625d0349e4f22b31 ]
Use the dma_{map,unmap}_single() calls. These will take care of the
flushing and invalidation of caches.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Sean Anderson [Tue, 23 Nov 2021 20:03:42 +0000 (15:03 -0500)]
mmc: fsl_esdhc_imx: simplify 64bit check for SDMA transfers
[ fsl_esdhc commit
da86e8cfcb03ed5c1d8e0718bc8bc8583e60ced8 ]
SDMA can only do DMA with 32 bit addresses. This is true for all
architectures (just doesn't apply to 32 bit ones). Simplify the code and
remove unnecessary CONFIG_FSL_LAYERSCAPE.
Also make the error message more concise.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Sean Anderson [Tue, 23 Nov 2021 20:03:41 +0000 (15:03 -0500)]
mmc: fsl_esdhc_imx: fix mmc->clock with actual clock
[ fsl_esdhc commit
30f6444d024a74ee48aa6969c1531aecd3c59deb ]
Fix mmc->clock with actual clock which is divided by the
controller, and record it with priv->clock.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Sean Anderson [Tue, 23 Nov 2021 20:03:40 +0000 (15:03 -0500)]
mmc: fsl_esdhc_imx: drop redundant code for non-removable feature
[ fsl_esdhc commit commit
08197cb8dff7cd097ab07a325093043c39d19bbd ]
Drop redundant code for non-removable feature. "non-removable" property
has been read in mmc_of_parse().
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
[ set MMC_CAP_NONREMOVABLE in plat->cfg.host_caps ]
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Sean Anderson [Tue, 23 Nov 2021 20:03:39 +0000 (15:03 -0500)]
mmc: fsl_esdhc_imx: clean up bus width configuration code
[ fsl_esdhc commit
07bae1de382723b94244096953b05225572728cd ]
This patch is to clean up bus width setting code.
- For DM_MMC, remove getting "bus-width" from device tree.
This has been done in mmc_of_parse().
- For non-DM_MMC, move bus width configuration from fsl_esdhc_init()
to fsl_esdhc_initialize() which is non-DM_MMC specific.
And fix up bus width configuration to support only 1-bit, 4-bit,
or 8-bit. Keep using 8-bit if it's not set because many platforms
use driver without providing max bus width.
- Remove bus_width member from fsl_esdhc_priv structure.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
[ converted if statement to switch ]
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Sean Anderson [Tue, 23 Nov 2021 20:03:38 +0000 (15:03 -0500)]
mmc: fsl_esdhc_imx: fix voltage validation
[ fsl_esdhc commit
5b05fc0310cd933acf76ee661577c6b07a95e684 ]
Voltage validation should be done by CMD8. Current comparison between
mmc_cfg voltages and host voltage capabilities is meaningless.
So drop current comparison and let voltage validation is through CMD8.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Sean Anderson [Tue, 23 Nov 2021 20:03:37 +0000 (15:03 -0500)]
mmc: fsl_esdhc_imx: remove redundant DM_MMC checking
[ fsl_esdhc commit
2913926f3b3dec282f8773e3c02377c9600d8267 ]
Remove redundant DM_MMC checking which is already in DM_MMC conditional
compile block.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Sean Anderson [Tue, 11 Jan 2022 23:18:52 +0000 (08:18 +0900)]
mmc: fsl_esdhc_imx: make BLK as hard requirement of DM_MMC
U-boot prefers DM_MMC + BLK for MMC. Now eSDHC driver has already
support it, so let's force to use it.
- Drop non-BLK support for DM_MMC introduced by below patch.
66fa035 mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled
- Support only DM_MMC + BLK (assuming BLK is always enabled for DM_MMC).
- Use DM_MMC instead of BLK for conditional compile.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tom Rini [Mon, 10 Jan 2022 19:01:57 +0000 (14:01 -0500)]
Merge branch 'next'
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 10 Jan 2022 18:46:34 +0000 (13:46 -0500)]
Prepare v2022.01
Signed-off-by: Tom Rini <trini@konsulko.com>
Heinrich Schuchardt [Sun, 9 Jan 2022 17:51:27 +0000 (18:51 +0100)]
.mailmap: add Atish Patra, Anup Patel
Both have left Western Digital.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Sun, 9 Jan 2022 14:39:40 +0000 (15:39 +0100)]
lib/rsa: avoid -Wdiscarded-qualifiers
The return type of EVP_PKEY_get0_RSA() is const struct rsa_st *.
Our code drops the const qualifier leading to
In file included from tools/lib/rsa/rsa-sign.c:1:
./tools/../lib/rsa/rsa-sign.c: In function ‘rsa_add_verify_data’:
./tools/../lib/rsa/rsa-sign.c:631:13: warning:
assignment discards ‘const’ qualifier from pointer target type
[-Wdiscarded-qualifiers]
631 | rsa = EVP_PKEY_get0_RSA(pkey);
| ^
Add a type conversion.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tom Rini [Sun, 9 Jan 2022 12:56:31 +0000 (07:56 -0500)]
Merge tag 'u-boot-amlogic-
20220107' of https://source.denx.de/u-boot/custodians/u-boot-amlogic into next
- disable CONFIG_NET_RANDOM_ETHADDR when unnecessary on amlogic based configs
- meson64_android: add board specific env settings, in order to support VIM3/L for android
- add changes to support VIM3/L android boot by using meson64_android.h config
Tom Rini [Sun, 9 Jan 2022 01:26:19 +0000 (20:26 -0500)]
Merge branch '2022-01-08-further-important-updates'
- Further udoo_neo fixes, nitrogen6x mmc pinctrl fix
- dwc2_udc_otg fix
- Make imx8mq be consistent with yesterdays imx8 fixes
Patrick Wildt [Sat, 8 Jan 2022 15:34:17 +0000 (16:34 +0100)]
imx8mq: Generate a single bootable flash.bin again
All i.MX8MQ boards have been converted to binman, which makes it
necessary to flash both flash.bin and u-boot.itb to get a bootable
system. Prior to the conversion, only flash.bin was needed.
Such new requirement breaks existing distro mechanisms to generate the
final binary because the extra u-boot.itb is now required.
Generate a final flash.bin that can be used again as a single bootable
binary to keep the original behavior.
After this change the SPL binary is called spl.bin, which is a more
descriptive name for its purpose, and can still be used standalone (for
example, for secure boot purposes).
Also update imx8mq_evk.rst to remove the u-boot.itb copy step.
This is a cherry-pick of
028abfd9b157 ("imx8mm-evk: Generate a single
bootable flash.bin again") adjusted to apply to i.MX8MQ.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Gary Bisson [Wed, 5 Jan 2022 13:17:53 +0000 (14:17 +0100)]
nitrogen6x: add missing pinctrl to fix mmc
Since commit
f7ac30b042d, the pin muxing for mmc was removed from the
board file to be managed by DM_MMC which requires PINCTRL to work. It
made the change for sabrelite but nitrogen configs were forgotten.
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
Gary Bisson [Thu, 6 Jan 2022 15:02:08 +0000 (16:02 +0100)]
usb: gadget: dwc2_udc_otg: set ep's desc during enable/disable
Fastboot support has been broken on platforms using dwc2 controller
since the gadget gets its max packet size from it.
This patch is the equivalent of
723fd5668ff which fixed the same issue
but for the chipidea controller.
Fixes:
27c9141b111 ("usb: gadget: fastboot: use correct max packet size")
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Fabio Estevam [Sat, 18 Dec 2021 21:10:25 +0000 (18:10 -0300)]
udoo: Select CMD_DM
CMD_DM is useful for showing the whole DM tree.
Enable it via "imply CMD_DM".
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Fabio Estevam [Sat, 18 Dec 2021 21:10:24 +0000 (18:10 -0300)]
udoo: Increase CONFIG_ENV_OFFSET
Increase CONFIG_ENV_OFFSET to avoid the environment region to
overlap with U-Boot proper.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Fabio Estevam [Sat, 18 Dec 2021 21:10:23 +0000 (18:10 -0300)]
udoo: Adjust the SD card device numbering
After the conversion to DM the SD card shows up as 'mmc 2'
device.
Adjust the 'mmcdev' and the distro command 'func' accordingly.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Fabio Estevam [Sat, 18 Dec 2021 21:10:22 +0000 (18:10 -0300)]
udoo: Call gpio_request()
Calling gpio_request() prior to its usage is now mandatory.
This fixes the following GPIO errors:
U-Boot SPL 2022.01-rc3-00067-g7a5be871c0ec (Dec 18 2021 - 17:45:07 -0300)
Trying to boot from MMC1
U-Boot 2022.01-rc3-00067-g7a5be871c0ec (Dec 18 2021 - 17:45:07 -0300)
CPU: Freescale i.MX6Q rev1.2 at 792 MHz
Reset cause: WDOG
Model: Udoo i.MX6 Quad Board
Board: Udoo Quad
DRAM: 1 GiB
MMC: FSL_SDHC: 2
Loading Environment from MMC... OK
In: serial
Out: serial
Err: serial
gpio@20a0000: set_dir_flags: error: gpio GPIO2_31 not reserved
gpio@20a4000: set_dir_flags: error: gpio GPIO3_23 not reserved
gpio@20b0000: set_dir_flags: error: gpio GPIO6_24 not reserved
gpio@20b0000: set_dir_flags: error: gpio GPIO6_25 not reserved
gpio@20b0000: set_dir_flags: error: gpio GPIO6_27 not reserved
gpio@20b0000: set_dir_flags: error: gpio GPIO6_28 not reserved
gpio@20b0000: set_dir_flags: error: gpio GPIO6_29 not reserved
gpio@20a4000: set_value: error: gpio GPIO3_23 not reserved
Net: Could not get PHY for FEC0: addr -2
No ethernet found.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Fabio Estevam [Sat, 18 Dec 2021 21:10:21 +0000 (18:10 -0300)]
ARM: dts: imx6qdl-udoo: Properly describe the SD card detect
GPIO7_IO00 is used as SD card detect.
Properly describe this in the devicetree.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Fabio Estevam [Sat, 18 Dec 2021 21:10:20 +0000 (18:10 -0300)]
udoo_spl: Initialize the eSDHC controller in SPL
Currently, imx6q udoo board fails to boot like this:
U-Boot SPL 2022.01-rc3-00061-g95ca715adad3 (Dec 18 2021 - 18:04:40 -0300)
Trying to boot from MMC1
The reason is that the eSDHC controller is not initialized in SPL.
Initialize the eSDHC controller in SPL via C code as DM is not
used in SPL.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tom Rini [Sat, 8 Jan 2022 00:11:58 +0000 (19:11 -0500)]
Merge branch '2022-01-07-imx8-and-buildman-updates'
- A large number of updates for i.MX8 platforms. We update buildman /
binman to be able to fake binaries if needed, for CI, and tell the user
the binary won't work. Update platforms to build again with these
changes.
Adam Ford [Fri, 7 Jan 2022 21:16:12 +0000 (15:16 -0600)]
imx: imx8mm: imx8mm-kontron-n801x-s: Fix binman error
The binman node is part of the imx8mm-u-boot.dtsi file which
is duplicated in imx8mm-kontron-n801x-s-u-boot.dtsi and causes
a build error. Remove the duplicate.
Fixes:
3cbb31f0e848 ("arm64: dts: imx8mm: use common binman configuration")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Adam Ford [Fri, 7 Jan 2022 21:16:11 +0000 (15:16 -0600)]
board: phytec: imx8mm-phycore: Remove duplicate binman node
The binman node is part of the imx8mm-u-boot.dtsi file which
is duplicated in phycore-imx8mm-u-boot.dtsi and causes a build
error. Remove the duplicate.
Fixes:
3cbb31f0e848 ("arm64: dts: imx8mm: use common binman configuration")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Tim Harvey [Fri, 7 Jan 2022 20:41:35 +0000 (12:41 -0800)]
imx8mm_venice: switch to use binman to pack images
Use binman to pack images.
Note that imx8mm_venice supports several boards via multiple DTB's thus
in the fit node we must use:
- fit,fdt-list = "of-list"
- fdt-SEQ
- config-SEQ
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Marcel Ziswiler [Fri, 22 Oct 2021 23:15:16 +0000 (01:15 +0200)]
arm64: dts: imx8mm-u-boot.dtsi: improve odd blob-ext naming
Rather than using odd implicit blob-ext naming, explicitly specify the
type to be of blob-ext and therefore also simplify the node naming.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Marcel Ziswiler [Fri, 22 Oct 2021 23:15:15 +0000 (01:15 +0200)]
arm64: dts: imx8mm-u-boot.dtsi: explicitly add spl filename
Explicitly add SPL aka u-boot-spl.bin filename.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Marcel Ziswiler [Fri, 22 Oct 2021 23:15:14 +0000 (01:15 +0200)]
arm64: dts: imx8mm-u-boot.dtsi: alphabetically re-order properties
Alphabetically re-order properties.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Marcel Ziswiler [Fri, 22 Oct 2021 23:15:13 +0000 (01:15 +0200)]
arm64: dts: imx8mm: use common binman configuration
With the move to using binman to generate SPL aka u-boot-spl-ddr.bin and
U-Boot proper aka u-boot.itb every board now covers such configuration
in its own U-Boot specific device tree include. Move the comon part of
that configuration to the common imx8mm-u-boot.dtsi include file.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Marcel Ziswiler [Fri, 22 Oct 2021 23:15:12 +0000 (01:15 +0200)]
arm64: dts: imx8mm-cl-iot-gate-u-boot.dtsi: use common imx8mm-u-boot.dtsi
Use common imx8mm-u-boot.dtsi.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Marcel Ziswiler [Fri, 22 Oct 2021 23:15:11 +0000 (01:15 +0200)]
arm64: dts: imx8mm-cl-iot-gate-u-boot.dtsi: alphabetically re-order
Alphabetically re-order nodes and properties.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Marcel Ziswiler [Fri, 22 Oct 2021 23:15:10 +0000 (01:15 +0200)]
imx8mm-cl-iot-gate: fix imximage intermediate binary naming
This fixes the following build time issue:
...
BINMAN all
binman: Error 1 running 'mkimage -d ./mkimage.spl.mkimage -n
spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000
./mkimage-out.spl.mkimage': mkimage.flash.mkimage: Can't open: No such
file or directory
make: *** [Makefile:1094: all] Error 1
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Fri, 22 Oct 2021 02:42:20 +0000 (10:42 +0800)]
doc: imx8mq_evk: update doc after using binman
Update doc after using binman to pack images
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Fri, 22 Oct 2021 02:42:19 +0000 (10:42 +0800)]
imx: imx8mq use common imximage.cfg
After all these board switch to binman, we could use common imximage.cfg
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
Peng Fan [Fri, 22 Oct 2021 02:42:18 +0000 (10:42 +0800)]
imx: pico-imx8mq: switch to use binman
Switch to use binman to pack images
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
Peng Fan [Fri, 22 Oct 2021 02:42:17 +0000 (10:42 +0800)]
imx: imx8mq_phanbell: switch to binman
Switch to binman to pack images
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
Peng Fan [Fri, 22 Oct 2021 02:42:16 +0000 (10:42 +0800)]
imx: imx8mq_evk: switch to binman
Switch to use binman to pack images
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Adam Ford [Fri, 7 Jan 2022 20:39:04 +0000 (14:39 -0600)]
imx8mn_beacon_2g: Switch to binman
The standard 1GB Nano was converted to binman, but the 2G version
was neglected. Convert it to binman as well.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Fri, 10 Sep 2021 20:19:22 +0000 (15:19 -0500)]
imx8mn_beacon: Fix booting hang and switch to binman
Somewhere along the line, the board stopped being able to boot.
Rather than just fixing the issue, let's fix the issue and migrate
to binman to eliminate a warning when using custom imx tools for
generating the binary.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Adam Ford [Fri, 22 Oct 2021 21:43:40 +0000 (23:43 +0200)]
imx8mm_beacon: Switch to binman for generating image
To eliminate a warning when using custom imx tools for generating
a binary, use binman to generate flash.bin.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heiko Thiery [Thu, 6 Jan 2022 10:49:41 +0000 (11:49 +0100)]
binman: add support for creating dummy files for external blobs
While converting to binman for an imx8mq board, it has been found that
building in the u-boot CI fails. This is because an imx8mq requires an
external binary (signed_hdmi_imx8m.bin). If this file cannot be found
mkimage fails.
To be able to build this board in the u-boot CI a binman option
(--fake-ext-blobs) is introduced that can be switched on via the u-boot
makefile option BINMAN_FAKE_EXT_BLOBS. With that the needed dummy files are
created.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 7 Jan 2022 17:00:26 +0000 (12:00 -0500)]
Merge branch '2022-01-04-platform-updates' into next
- Assorted updates for vexpress64, apple m1, iot2050 and stemmy
platforms.
Tom Rini [Fri, 7 Jan 2022 14:30:59 +0000 (09:30 -0500)]
Merge branch '2022-01-06-assorted-important-fixes'
- Revert a clk change, to enable some platforms to work again
- Updates to the udoo NEO family of boards to work correctly
- Fix SiFive Unleashes/Unmatched boards booting
- Update rockchip maintainer entry
Marek Vasut [Sat, 1 Jan 2022 18:51:39 +0000 (19:51 +0100)]
Revert "clk: Detect failure to set defaults"
This reverts commit
92f1e9a4b31c0bf0f4f61ab823a6a88657323646.
The aforementioned patch causes massive breakage on all platforms which
have 'assigned-clock' DT property in their DT which references any clock
that are not supported by the platform clock driver. That can easily
happen either in SPL, or because the clock driver is reduced. Currently
it seems all iMX8M are affected and fail to boot altogether.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@oss.nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fabio Estevam [Mon, 3 Jan 2022 15:15:12 +0000 (12:15 -0300)]
udoo: neo: Do not print the Model information
By default the Model information from DT is printed:
CPU: Freescale i.MX6SX rev1.2 996 MHz (running at 792 MHz)
CPU: Extended Commercial temperature grade (-20C to 105C) at 63C
Reset cause: POR
Model: UDOO Neo Basic
Board: UDOO Neo FULL
I2C: ready
As the udoo basic DT is used, such output may be confusing.
Improve it by only printing the Board model instead, which is
read from the board identification GPIOs.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Tommaso Merciai <tomm.merciai@gmail.com>
Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Fabio Estevam [Mon, 3 Jan 2022 15:15:11 +0000 (12:15 -0300)]
udoo: neo: Fix the board model printing
Currently, the board model is not printed correctly:
Board: UDOO Neo UNDEFINED
Read the model type in SPL and store it the internal OCRAM, so that
U-Boot proper can retrieve it correctly.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Peter Robinson [Tue, 21 Dec 2021 12:32:49 +0000 (12:32 +0000)]
udoo_neo: Enable support for USB and storage
Enable support for USB and USB storage on the UDOO Neo.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Peter Robinson [Tue, 21 Dec 2021 12:32:48 +0000 (12:32 +0000)]
udoo_neo: Fix ethernet
The ethernet has a RMII not RGMII, also needs DM_MDIO and finally
initialise it later in the process as it's not needed that early on
and not everything is ready so it locks up the device.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Peter Robinson [Tue, 21 Dec 2021 12:32:47 +0000 (12:32 +0000)]
udoo_neo: Fixes for booting from the mSD card
This fixes booting from the mSD card from both SPL and when
using it for the OS booting. It also cleans up a few mmc
booting bits that are no longer needed.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Peter Robinson [Tue, 21 Dec 2021 12:32:46 +0000 (12:32 +0000)]
udoo_neo: Call gpio_request()
Calling gpio_request() prior to its usage is now mandatory.
This fixes the following GPIO errors:
gpio@20a8000: set_dir_flags: error: gpio GPIO4_16 not reserved
gpio@20a8000: set_dir_flags: error: gpio GPIO4_13 not reserved
gpio@20a8000: set_dir_flags: error: gpio GPIO4_0 not reserved
gpio@20a8000: get_value: error: gpio GPIO4_13 not reserved
gpio@20a8000: get_value: error: gpio GPIO4_0 not reserved
gpio@20a0000: set_dir_flags: error: gpio GPIO2_1 not reserved
gpio@20a0000: set_value: error: gpio GPIO2_1 not reserved
Fixes:
191840ae99 ("ARM: imx: udoo_neo: Enable OF_CONTROL and DM gpio/pin control")
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Bin Meng [Wed, 5 Jan 2022 01:07:57 +0000 (09:07 +0800)]
riscv: sifive: Fix OF_BOARD boot failure
When using QEMU to have a quick test of booting U-Boot S-mode payload
directly without the needs of preparing the SPI flash or SD card images
for SiFive Unleashed board, as per the instructions [1], it currently
does not boot any more.
This was caused by the OF_PRIOR_STAGE removal, as gd->fdt_blob no longer
points to a valid DTB. OF_BOARD is supposed to replace OF_PRIOR_STAGE,
hence we need to add the OF_BOARD logic in board_fdt_blob_setup().
[1] https://qemu.readthedocs.io/en/latest/system/riscv/sifive_u.html#running-u-boot
Fixes:
2e8d2f88439d ("riscv: Remove OF_PRIOR_STAGE from RISC-V boards")
Fixes:
d6f8ab30a2af ("treewide: Remove OF_PRIOR_STAGE")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Quentin Schulz [Mon, 3 Jan 2022 12:04:18 +0000 (13:04 +0100)]
rockchip: puma/lion: update MAINTAINERS file
Philipp does not work at Theobroma Systems anymore so let's swap
Philipp's address with mine.
Cc: Philipp Tomsich <philipp.tomsich@vrull.eu>
Cc: Quentin Schulz <foss+u-boot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Mattijs Korpershoek [Mon, 22 Nov 2021 15:22:07 +0000 (16:22 +0100)]
configs: khadas-vim3{l}_android_ab: enable A/B support
meson64_android.h also relies on CMD_AB_SELECT so enable that as well.
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20211122152207.219023-5-mkorpershoek@baylibre.com
Mattijs Korpershoek [Mon, 22 Nov 2021 15:22:06 +0000 (16:22 +0100)]
configs: prepare khadas-vim3{l}_ab_android for AOSP support
In AOSP, both VIM3 and VIM3L have 2 bootloader flavors,
depending on A/B enablement.
For example, for vim3l, the naming is:
- u-boot_kvim3l_noab.bin : legacy support
- u-boot_kvim3l_ab.bin : A/B support
Prepare a defconfig to support u-boot_kvim3_ab.bin and
u-boot_kvim3l_ab.bin.
This is identical to khadas-vim3{l}_ab_android but will be updated in
the next commit.
Also update partitioning tables for A/B support.
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20211122152207.219023-4-mkorpershoek@baylibre.com
Mattijs Korpershoek [Mon, 22 Nov 2021 15:22:05 +0000 (16:22 +0100)]
configs: add khadas-vim3{l}_android for AOSP support
The Khadas VIM3 and VIM3L board are well supported in AOSP[1].
However, there is no mainline U-Boot support for it.
The U-Boot used in AOSP is based on a vendor tree [2]
Add all the necessary bits to flash and boot Android for both Khadas
VIM3 and VIM3L boards.
For Android instructions, refer to [1]
[1] https://source.android.com/setup/build/devices#vim3_and_vim3l_boards
[2] https://gitlab.com/baylibre/amlogic/atv/u-boot
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20211122152207.219023-3-mkorpershoek@baylibre.com
Mattijs Korpershoek [Mon, 22 Nov 2021 15:22:04 +0000 (16:22 +0100)]
configs: meson64_android: add board specific env settings
This allows us to define extra board variables, such as "board" and
"board_name".
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20211122152207.219023-2-mkorpershoek@baylibre.com
Neil Armstrong [Mon, 22 Nov 2021 11:07:10 +0000 (12:07 +0100)]
configs: amlogic: Disable CONFIG_NET_RANDOM_ETHADDR when unnecessary
On Meson GXL, GXM, AXG, G12A, G12B & SM1 SoCs, we can generate an unique
MAC address if none valid found in the eFuses storage.
Only the GXBB based boards doesn't have a fallback way to generate an
unique MAC address, so we rely on CONFIG_NET_RANDOM_ETHADDR to have
a valid one.
An exception is the Radxa Zero board who doesn't have Ethernet on board
so depends on an (or multiple) eventual USB adapters, so leaving the
CONFIG_NET_RANDOM_ETHADDR configs seems safer.
Suggested-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Vyacheslav Bocharov <adeep@lexina.in>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20211122110710.1038893-1-narmstrong@baylibre.com
Tom Rini [Wed, 5 Jan 2022 18:08:45 +0000 (13:08 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- kwbimage: Fix checksum calculation for v1 images (Pierre)
Pierre Bourdon [Sat, 25 Dec 2021 19:50:19 +0000 (20:50 +0100)]
tools: kwbimage: Fix checksum calculation for v1 images
Recent changes caused fields in the image main header to be modified
after the header checksum had already been computed. Move the checksum
computation to once again be the last operation performed on the header.
Fixes:
2b0980c24027 ("tools: kwbimage: Fill the real header size into the main header")
Signed-off-by: Pierre Bourdon <delroth@gmail.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Jan Kiszka [Mon, 15 Nov 2021 17:28:54 +0000 (18:28 +0100)]
configs: iot2050: Drop unused CONFIG_OF_LIST from defconfig
DTBs are explicitly listed in the image source file for this board, and
this list already became outdated.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Mark Kettenis [Sun, 14 Nov 2021 12:09:54 +0000 (13:09 +0100)]
arm: apple: Remove CONFIG_SYS_SDRAM_BASE
The memory layout is taken from the device tree passed to us by
m1n1, so there is no need to define this.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Peter Hoyes [Thu, 11 Nov 2021 09:26:03 +0000 (09:26 +0000)]
vexpress64: Enable VIRTIO_NET network driver
The SMSC driver is using the old driver model.
Init the virtio system in vexpress64.c so that the network device is
discovered.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Peter Hoyes [Thu, 11 Nov 2021 09:26:02 +0000 (09:26 +0000)]
vexpress64: Enable OF_CONTROL and OF_BOARD for VExpress64
Capture x0 in lowlevel_init.S as potential fdt address. Modify
board_fdt_blob_setup to use fdt address from either vexpress_aemv8.h
or lowlevel_init.S.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Peter Hoyes [Thu, 11 Nov 2021 09:26:01 +0000 (09:26 +0000)]
vexpress64: Clean up BASE_FVP boot configuration
Move env var address values to #defines so they can be reused elsewhere.
Rename env var names to those recommended in the README and modify
addresses to allow more space for the kernel.
Fix issue where fdt is called with invalid arguments when booting
without a ramdisk.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>