Tobias Grosser [Tue, 11 Aug 2015 11:31:18 +0000 (11:31 +0000)]
Update isl to isl-0.15-117-ge42acfe
Besides other changes this version of isl contains a fundamental fix to memory
corruption issues we have seen with imath-32 backed isl_ints.
This update also contains a fix that ensures that the schedule-tree based
version of isl's dependence analysis takes the domain of the schedule into
account.
llvm-svn: 244585
Marina Yatsina [Tue, 11 Aug 2015 11:28:10 +0000 (11:28 +0000)]
[X86] Fix REPE, REPZ, REPNZ for intel syntax
REPE, REPZ, REPNZ, REPNE should have mnemonics for Intel syntax as well.
Currently using these instructions causes compilation errors for Intel syntax.
Differential Revision: http://reviews.llvm.org/D11794
llvm-svn: 244584
Daniel Jasper [Tue, 11 Aug 2015 11:02:09 +0000 (11:02 +0000)]
Revert "[CUDA] Add implicit __attribute__((used)) to all __global__ functions."
This is breaking internal test. I'll provide a reproduction.
llvm-svn: 244583
Marina Yatsina [Tue, 11 Aug 2015 10:43:04 +0000 (10:43 +0000)]
[X86] Fix imul alias for intel syntax
The "imul reg, imm" alias is not defined for intel syntax.
In intel syntax there is no w/l/q suffix for the imul instruction.
Differential Revision: http://reviews.llvm.org/D11887
llvm-svn: 244582
James Molloy [Tue, 11 Aug 2015 09:13:05 +0000 (09:13 +0000)]
Add new ISD nodes: ISD::FMINNAN and ISD::FMAXNAN
The intention of these is to be a corollary to ISD::FMINNUM/FMAXNUM,
differing only on how NaNs are treated. FMINNUM returns the non-NaN
input (when given one NaN and one non-NaN), FMINNAN returns the NaN
input instead.
This patch includes support for scalarizing, widening and splitting
vectors, but not expansion or softening. The reason is that these
should never be needed - FMINNAN nodes are only going to be created
in one place (SDAGBuilder::visitSelect) and there we'll check if the
node is legal or custom. I could preemptively add expand and soften
code, but I'm fairly opposed to adding code I can't test. It's bad
enough I can't create tests with this patch, but at least this code
will be exercised by the ARM and AArch64 backends fairly shortly.
llvm-svn: 244581
James Molloy [Tue, 11 Aug 2015 09:12:57 +0000 (09:12 +0000)]
Add support for floating-point minnum and maxnum
The select pattern recognition in ValueTracking (as used by InstCombine
and SelectionDAGBuilder) only knew about integer patterns. This teaches
it about minimum and maximum operations.
matchSelectPattern() has been extended to return a struct containing the
existing Flavor and a new enum defining the pattern's behavior when
given one NaN operand.
C minnum() is defined to return the non-NaN operand in this case, but
the idiomatic C "a < b ? a : b" would return the NaN operand.
ARM and AArch64 at least have different instructions for these different cases.
llvm-svn: 244580
Vasileios Kalintiris [Tue, 11 Aug 2015 08:56:25 +0000 (08:56 +0000)]
[mips] Remap move as or.
Summary:
This patch remaps the assembly idiom 'move' to 'or' instead of 'daddu' or
'addu'. The use of addu/daddu instead of or as move was highlighted as a
performance issue during the analysis of a recent 64bit design. Originally
move was encoded as 'or' by binutils but was changed for the r10k cpu family
due to their pipeline which had 2 arithmetic units and a single logical unit,
and so could issue multiple (d)addu based moves at the same time but only 1
logical move.
This patch preserves the disassembly behaviour so that disassembling a old style
(d)addu move still appears as move, but assembling move always gives an or
Patch by Simon Dardis.
Reviewers: vkalintiris
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D11796
llvm-svn: 244579
Michael Kuperstein [Tue, 11 Aug 2015 08:48:48 +0000 (08:48 +0000)]
[X86] When optimizing for minsize, use POP for small post-call stack clean-up
When optimizing for size, replace "addl $4, %esp" and "addl $8, %esp"
following a call by one or two pops, respectively. We don't try to do it in
general, but only when the stack adjustment immediately follows a call - which
is the most common case.
That allows taking a short-cut when trying to find a free register to pop into,
instead of a full-blown liveness check. If the adjustment immediately follows a
call, then every register the call clobbers but doesn't define should be dead at
that point, and can be used.
Differential Revision: http://reviews.llvm.org/D11749
llvm-svn: 244578
Michael Kuperstein [Tue, 11 Aug 2015 08:19:43 +0000 (08:19 +0000)]
Allow PeepholeOptimizer to fold a few more cases
The condition for clearing the folding candidate list was clamped together
with the "uninteresting instruction" condition. This is too conservative,
e.g. we don't need to clear the list when encountering an IMPLICIT_DEF.
Differential Revision: http://reviews.llvm.org/D11591
llvm-svn: 244577
Tobias Grosser [Tue, 11 Aug 2015 08:13:15 +0000 (08:13 +0000)]
BlockGenerator: Do not store 'store' statements in BBMap
A store statement has no return value and can consequently not be referenced
from another statement.
llvm-svn: 244576
Michael Kuperstein [Tue, 11 Aug 2015 08:06:44 +0000 (08:06 +0000)]
[GMR] Be a bit smarter about which globals don't alias when doing recursive lookups
Should hopefully fix the remainder of PR24288.
Differential Revision: http://reviews.llvm.org/D11900
llvm-svn: 244575
Lang Hames [Tue, 11 Aug 2015 06:27:53 +0000 (06:27 +0000)]
[RuntimeDyld][AArch64] Add explicit addends before calling relocationValueRef.
relocationValueRef uses the addend, so it has to be set before the call.
llvm-svn: 244574
Ilia K [Tue, 11 Aug 2015 06:07:14 +0000 (06:07 +0000)]
Add size field to library load event (MI)
Summary:
(This revision supersedes the abandon: http://reviews.llvm.org/D9716)
Size field is used to let the debugger attribute an address to a specific library when symbols are not available.
For example:
OpenGLESApp4.app!Cube_draw() Line 74 C
OpenGLESApp4.app!-[GameViewController glkView:drawInRect:](GameViewController * self, SEL _cmd, GLKView * view, CGRect rect) Line 89 C++
GLKit!<redacted>
QuartzCore!<redacted>
QuartzCore!<redacted>
QuartzCore!<redacted>
QuartzCore!<redacted>
QuartzCore!<redacted>
UIKit!<redacted>
UIKit!<redacted>
UIKit!<redacted>
UIKit!<redacted>
FrontBoardServices!<redacted>
CoreFoundation!<redacted>
Patch from paulmay@microsoft.com
Reviewers: ChuckR, abidh, ki.stfu
Subscribers: greggm, lldb-commits
Differential Revision: http://reviews.llvm.org/D11574
llvm-svn: 244573
Yaron Keren [Tue, 11 Aug 2015 06:05:27 +0000 (06:05 +0000)]
Enable five passing dsymutil tests on Windows.
These tests pass with Windows 7 x64 + MSYS2. I'll see if the bots like
them as well and disable the failing ones.
llvm-svn: 244572
Nick Lewycky [Tue, 11 Aug 2015 05:57:10 +0000 (05:57 +0000)]
Fix unused variable 'X' in release builds.
llvm-svn: 244571
JF Bastien [Tue, 11 Aug 2015 04:52:24 +0000 (04:52 +0000)]
WebAssembly: NFC fix release build break, unused variable.
Summary: Caused by D11914, pointed out by blaikie.
Subscribers: llvm-commits, jfb, dblaikie
Differential Revision: http://reviews.llvm.org/D11929
llvm-svn: 244570
Michael Wong [Tue, 11 Aug 2015 04:52:01 +0000 (04:52 +0000)]
This patch fixes the assert in emitting captured code in the target data construct.
This is on behalf of Kelvin Li.
http://reviews.llvm.org/D11475
llvm-svn: 244569
Filipe Cabecinhas [Tue, 11 Aug 2015 04:19:28 +0000 (04:19 +0000)]
Propagate SourceLocations through to get a Loc on float_cast_overflow
Summary:
float_cast_overflow is the only UBSan check without a source location attached.
This patch propagates SourceLocations where necessary to get them to the
EmitCheck() call.
Reviewers: rsmith, ABataev, rjmccall
Subscribers: cfe-commits
Differential Revision: http://reviews.llvm.org/D11757
llvm-svn: 244568
Filipe Cabecinhas [Tue, 11 Aug 2015 04:19:24 +0000 (04:19 +0000)]
[compiler-rt] Add SourceLocations for float_cast_overflow data.
Summary:
Compiler-rt part of http://reviews.llvm.org/D11757
I ended up making UBSan work with both the old version and the new
version of the float_cast_overflow data (instead of just erroring with
the previous version). The old version will try to symbolize its caller.
Now we compile the float_cast_overflow tests without -g, and make sure
we have the source file+line+column.
If you think I'm trying too hard to make sure we can still use both
versions, let me know.
Reviewers: samsonov, rsmith
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D11793
llvm-svn: 244567
Kostya Serebryany [Tue, 11 Aug 2015 04:16:37 +0000 (04:16 +0000)]
[libFuzzer] fix docs build
llvm-svn: 244566
Rui Ueyama [Tue, 11 Aug 2015 03:44:51 +0000 (03:44 +0000)]
COFF: Update README.
It's no longer "new" because the old COFF linker has been removed.
Update the introduction accordingly.
llvm-svn: 244565
David Majnemer [Tue, 11 Aug 2015 03:03:28 +0000 (03:03 +0000)]
[MSVC Compat] Implement __is_destructible, __is_nothrow_destructible
Our implementations of these type trait intrinsics simply mapped them to
__has_trivial_destructor. Instead, flesh these intrinsics out with a
full implementation which matches the standard's description.
llvm-svn: 244564
David Majnemer [Tue, 11 Aug 2015 02:48:30 +0000 (02:48 +0000)]
[IR] Verify EH pad predecessors
Make sure that an EH pad's predecessors are using their unwind edge to
transfer control to the EH pad.
llvm-svn: 244563
JF Bastien [Tue, 11 Aug 2015 02:45:15 +0000 (02:45 +0000)]
WebAssembly: add basic floating-point tests
Summary: I somehow forgot to add these when I added the basic floating-point opcodes. Also remove ceil/floor/trunc/nearestint for now, and add them only when properly tested.
Subscribers: llvm-commits, sunfish, jfb
Differential Revision: http://reviews.llvm.org/D11927
llvm-svn: 244562
Tyler Nowicki [Tue, 11 Aug 2015 01:54:48 +0000 (01:54 +0000)]
Make the analysis reporting test with x86 to fix the hexagon build.
llvm-svn: 244561
Kostya Serebryany [Tue, 11 Aug 2015 01:53:45 +0000 (01:53 +0000)]
[libFuzzer] add the list of trophies to the docs. It is incomplete, additions are welcome :)
llvm-svn: 244560
Kostya Serebryany [Tue, 11 Aug 2015 01:44:42 +0000 (01:44 +0000)]
[libFuzzer] add -only_ascii flag
llvm-svn: 244559
David Majnemer [Tue, 11 Aug 2015 01:15:26 +0000 (01:15 +0000)]
[WinEHPrepare] Add rudimentary support for the new EH instructions
This adds somewhat basic preparation functionality including:
- Formation of funclets via coloring basic blocks.
- Cloning of polychromatic blocks to ensure that funclets have unique
program counters.
- Demotion of values used between different funclets.
- Some amount of cleanup once we have removed predecessors from basic
blocks.
- Verification that we are left with a CFG that makes some amount of
sense.
N.B. Arguments and numbering still need to be done.
Differential Revision: http://reviews.llvm.org/D11750
llvm-svn: 244558
Cameron Esfahani [Tue, 11 Aug 2015 01:15:07 +0000 (01:15 +0000)]
Explicitly clear the MI operand list when getInstruction() is called. Call MI.clear() within MCD::OPC_Decode case and inside of translateInstruction() for the X86 target. Remove now unnecessary MI.clear() from ARMDisassembler.
Summary: Explicitly clear the MI operand list when getInstruction() is called.
Reviewers: hfinkel, t.p.northover, hvarga, kparzysz, jyknight, qcolombet, uweigand
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D11665
llvm-svn: 244557
Tyler Nowicki [Tue, 11 Aug 2015 01:10:08 +0000 (01:10 +0000)]
Print vectorization analysis when loop hint is specified.
This patche and a related llvm patch solve the problem of having to explicitly enable analysis when specifying a loop hint pragma to get the diagnostics. Passing AlwasyPrint as the pass name (see below) causes the front-end to print the diagnostic if the user has specified '-Rpass-analysis' without an '=<target-pass>’. Users of loop hints can pass that compiler option without having to specify the pass and they will get diagnostics for only those loops with loop hints.
llvm-svn: 244556
Tyler Nowicki [Tue, 11 Aug 2015 01:09:15 +0000 (01:09 +0000)]
Print vectorization analysis when loop hint is specified.
This patch and a relatec clang patch solve the problem of having to explicitly enable analysis when specifying a loop hint pragma to get the diagnostics. Passing AlwasyPrint as the pass name (see below) causes the front-end to print the diagnostic if the user has specified '-Rpass-analysis' without an '=<target-pass>’. Users of loop hints can pass that compiler option without having to specify the pass and they will get diagnostics for only those loops with loop hints.
llvm-svn: 244555
Nick Lewycky [Tue, 11 Aug 2015 01:05:16 +0000 (01:05 +0000)]
Update the syntax for load instruction in this example.
llvm-svn: 244554
Tyler Nowicki [Tue, 11 Aug 2015 00:52:54 +0000 (00:52 +0000)]
Moved LoopVectorizeHints and related functions before LoopVectorizationLegality and LoopVectorizationCostModel.
llvm-svn: 244552
JF Bastien [Tue, 11 Aug 2015 00:49:20 +0000 (00:49 +0000)]
WebAssembly: simply assert on SNaN and NaNs with payloads
Summary: convertToHexString doesn't represent them correctly at this point in time. This is a follow-up to sunfish's suggestion in D11914.
Subscribers: llvm-commits, sunfish, jfb
Differential Revision: http://reviews.llvm.org/D11925
llvm-svn: 244551
Tyler Nowicki [Tue, 11 Aug 2015 00:35:44 +0000 (00:35 +0000)]
Simplify processLoop() by moving loop hint verification into Hints::allowVectorization().
llvm-svn: 244550
Reid Kleckner [Tue, 11 Aug 2015 00:33:07 +0000 (00:33 +0000)]
[cmake] Hoist check for LLD sources up into root CMakeLists.txt
We will use this for ASan on Windows soon. When the ELF port of LLD
matures, we can add other sanitizer integration tests to make sure they
work with LLD.
llvm-svn: 244549
Alex Lorenz [Tue, 11 Aug 2015 00:32:49 +0000 (00:32 +0000)]
MIR Serialization: Serialize UsedPhysRegMask from the machine register info.
This commit serializes the UsedPhysRegMask register mask from the machine
register information class. The mask is serialized as an inverted
'calleeSavedRegisters' mask to keep the output minimal.
This commit also allows the MIR parser to infer this mask from the register
mask operands if the machine function doesn't specify it.
Reviewers: Duncan P. N. Exon Smith
llvm-svn: 244548
Richard Smith [Tue, 11 Aug 2015 00:32:42 +0000 (00:32 +0000)]
[modules] Don't suggest deleting the module cache on an error if there is no module cache for this build.
llvm-svn: 244547
Reid Kleckner [Tue, 11 Aug 2015 00:30:22 +0000 (00:30 +0000)]
[sanitizers] Use portable file read/write wrappers on process pipes
This fixes a minor error checking bug around calling
internal_read/write, and makes the code more portable for D11791.
llvm-svn: 244546
Sanjay Patel [Tue, 11 Aug 2015 00:26:05 +0000 (00:26 +0000)]
use range-based for loops; NFCI
llvm-svn: 244545
Kostya Serebryany [Tue, 11 Aug 2015 00:24:39 +0000 (00:24 +0000)]
[libFuzzer] don't crash if the condition in a switch has unusual type (e.g. i72)
llvm-svn: 244544
Sanjoy Das [Tue, 11 Aug 2015 00:20:24 +0000 (00:20 +0000)]
Address post-commit review from r243378.
This checks that bork_directive occurs exactly twice in the test output.
llvm-svn: 244543
Derek Schuff [Tue, 11 Aug 2015 00:19:54 +0000 (00:19 +0000)]
add comment
llvm-svn: 244542
Derek Schuff [Tue, 11 Aug 2015 00:19:53 +0000 (00:19 +0000)]
Add NaCl to long double/fp128 mangling test
Summary:
NaCl is a platform where long double is the same as double.
Its mangling is spelled with "long double" but its ABI lowering is the same
as double.
Reviewers: rnk, chh
Subscribers: jfb, cfe-commits, dschuff
Differential Revision: http://reviews.llvm.org/D11922
llvm-svn: 244541
Adam Nemet [Tue, 11 Aug 2015 00:09:37 +0000 (00:09 +0000)]
[LAA] Change name from addRuntimeCheck to addRuntimeChecks, NFC
This was requested by Hal in D11205.
llvm-svn: 244540
Richard Smith [Tue, 11 Aug 2015 00:05:21 +0000 (00:05 +0000)]
[modules] Properly diagnose errors in module files for which we have no
corresponding include location (those specified on the command line).
llvm-svn: 244538
Richard Smith [Tue, 11 Aug 2015 00:03:28 +0000 (00:03 +0000)]
Fix some tabs.
llvm-svn: 244537
Alex Lorenz [Mon, 10 Aug 2015 23:50:41 +0000 (23:50 +0000)]
MIR Parser: Report an error when a stack object is redefined.
llvm-svn: 244536
Joerg Sonnenberger [Mon, 10 Aug 2015 23:47:22 +0000 (23:47 +0000)]
Add lduw and lwua aliases for SPARCv9.
llvm-svn: 244535
Alex Lorenz [Mon, 10 Aug 2015 23:45:02 +0000 (23:45 +0000)]
MIR Parser: Report an error when a fixed stack object is redefined.
llvm-svn: 244534
Reid Kleckner [Mon, 10 Aug 2015 23:40:27 +0000 (23:40 +0000)]
[Windows] Implement FileExists, ReadFromFile, and FindPathToBinary
Summary: These are needed to talk to llvm-symbolizer on Windows.
Reviewers: samsonov
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D11920
llvm-svn: 244533
Joerg Sonnenberger [Mon, 10 Aug 2015 23:33:17 +0000 (23:33 +0000)]
Load/store for float registers from/to alternate space.
llvm-svn: 244532
Sanjay Patel [Mon, 10 Aug 2015 23:29:41 +0000 (23:29 +0000)]
use range-based for loop; NFCI
llvm-svn: 244531
Richard Smith [Mon, 10 Aug 2015 23:26:54 +0000 (23:26 +0000)]
Remove some dead code.
llvm-svn: 244530
Alex Lorenz [Mon, 10 Aug 2015 23:24:42 +0000 (23:24 +0000)]
MIR Serialization: Serialize the liveout register mask machine operands.
llvm-svn: 244529
Sanjay Patel [Mon, 10 Aug 2015 23:07:26 +0000 (23:07 +0000)]
fix minsize detection: minsize attribute implies optimizing for size
llvm-svn: 244528
Adam Nemet [Mon, 10 Aug 2015 23:05:31 +0000 (23:05 +0000)]
[LoopVer] Remove unused pointer partition argument, NFC.
llvm-svn: 244527
Tyler Nowicki [Mon, 10 Aug 2015 23:05:16 +0000 (23:05 +0000)]
Append options for vectorization when pointer checking threshold is exceeded.
Following one of the appended options will allow the loop to be vectorized. We do not include a command line option for modifying the pointer checking threshold because there is no clang-level interface for this currently.
llvm-svn: 244526
Rui Ueyama [Mon, 10 Aug 2015 23:02:57 +0000 (23:02 +0000)]
Move file-local classes to an anonymous namespace. NFC.
llvm-svn: 244525
Derek Schuff [Mon, 10 Aug 2015 23:02:37 +0000 (23:02 +0000)]
Add NaCl (a target where long double = double) to long double ABI test
A test was recently (r244468) added to cover long double calling convention
codegen, distinguishing between Android and GNU conventions (where long doubles
are fp128 and x86_fp80, respectively). Native Client is a target where long
doubles are the same as doubles. This change augments the test to cover
that case.
Also rename the test to test/codeGen/X86_64-longdouble.c
Differential Revision: http://reviews.llvm.org/D11921
llvm-svn: 244524
Tyler Nowicki [Mon, 10 Aug 2015 23:01:55 +0000 (23:01 +0000)]
Extend late diagnostics to include late test for runtime pointer checks.
This patch moves checking the threshold of runtime pointer checks to the vectorization requirements (late diagnostics) and emits a diagnostic that infroms the user the loop would be vectorized if not for exceeding the pointer-check threshold. Clang will also append the options that can be used to allow vectorization.
llvm-svn: 244523
Reid Kleckner [Mon, 10 Aug 2015 22:43:04 +0000 (22:43 +0000)]
[Windows] Relax test case patterns to allow parameter lists
llvm-symbolizer will print parameter types. Split out from D11791.
NFC
llvm-svn: 244522
Naomi Musgrave [Mon, 10 Aug 2015 22:39:09 +0000 (22:39 +0000)]
test case for poisoning trivial members
Summary:
A virtual base class and derived class should only poison their
respective members upon destruction. In particular, trivial members should
be poisoned directly, non-trivial members should be poisoned by their
respective destructors, and references to non-trivial members should be
poisoned.
Reviewers: eugenis, kcc
Differential Revision: http://reviews.llvm.org/D11912
Test case avoids casting to access members
Run configurations to reflect expected runtime failure on assertions.
Simplified access to internal members.
Updated internal member structure of base.
Revised assert in main to verify successful poisoning after dtor.
Verify address of pointer is poisoned.
Fixed assert err.
Cleaned up test by removing extraneous prints, asserts.
llvm-svn: 244521
JF Bastien [Mon, 10 Aug 2015 22:36:48 +0000 (22:36 +0000)]
WebAssembly: print immediates
Summary:
For now output using C99's hexadecimal floating-point representation.
This patch also cleans up how machine operands are printed: instead of special-casing per type of machine instruction, the code now handles operands generically.
Reviewers: sunfish
Subscribers: llvm-commits, jfb
Differential Revision: http://reviews.llvm.org/D11914
llvm-svn: 244520
Joerg Sonnenberger [Mon, 10 Aug 2015 22:32:25 +0000 (22:32 +0000)]
Add support for the signx instrution alias of SPARCv9.
llvm-svn: 244519
Cong Hou [Mon, 10 Aug 2015 22:27:10 +0000 (22:27 +0000)]
NFC. Fix some format issues in lib/CodeGen/MachineBasicBlock.cpp.
llvm-svn: 244518
Tyler Nowicki [Mon, 10 Aug 2015 22:17:40 +0000 (22:17 +0000)]
Make frontend floating-point commutivity test X86 specific to avoid cost-model related problems on arm-thumb and hexagon.
llvm-svn: 244517
Justin Bogner [Mon, 10 Aug 2015 21:58:27 +0000 (21:58 +0000)]
cmake: Make CMAKE_BUILD_TYPE check case-insensitive
Juergen pointed out that this variable is treated in a case
insensitive way.
llvm-svn: 244516
Nick Lewycky [Mon, 10 Aug 2015 21:54:08 +0000 (21:54 +0000)]
If a variable template is inside a context with template arguments that is being instantiated, and that instantiation fails, fail our instantiation instead of crashing. Errors have already been emitted.
llvm-svn: 244515
Oleksiy Vyalov [Mon, 10 Aug 2015 21:49:50 +0000 (21:49 +0000)]
Revert r244308 since it's introducing test regressions on Linux:
- TestLldbGdbServer.py both clang & gcc, i386 and x86_64
- TestConstVariables.py gcc, i386 and x86_64
- 112 failures clang, i386
llvm-svn: 244514
Alex Lorenz [Mon, 10 Aug 2015 21:47:36 +0000 (21:47 +0000)]
MachineVerifier: Handle the optional def operand in a PATCHPOINT instruction.
The PATCHPOINT instructions have a single optional defined register operand,
but the machine verifier can't verify the optional defined register operands.
This commit makes sure that the machine verifier won't report an error when a
PATCHPOINT instruction doesn't have its optional defined register operand.
This change will allow us to enable the machine verifier for the code
generation tests for the patchpoint intrinsics.
Reviewers: Juergen Ributzka
llvm-svn: 244513
Reid Kleckner [Mon, 10 Aug 2015 21:47:11 +0000 (21:47 +0000)]
[llvm-symbolizer] Remove underscores and other C mangling on Windows
Summary:
This makes it so that reports symbolized after the fact with
llvm-symbolizer are more similar to the ones we generate at runtime with
in-process dbghelp.
Reviewers: samsonov
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D11785
llvm-svn: 244512
Rafael Espindola [Mon, 10 Aug 2015 21:30:13 +0000 (21:30 +0000)]
Update for llvm api change.
llvm-svn: 244511
Rafael Espindola [Mon, 10 Aug 2015 21:29:35 +0000 (21:29 +0000)]
Don't iterate over all sections in the ELFFile constructor.
With this we finally have an ELFFile that is O(1) to construct. This is helpful
for programs like lld which have to do their own section walk.
llvm-svn: 244510
Sanjay Patel [Mon, 10 Aug 2015 21:28:16 +0000 (21:28 +0000)]
remove function names from comments; NFC
llvm-svn: 244509
Alex Lorenz [Mon, 10 Aug 2015 21:27:03 +0000 (21:27 +0000)]
StackMap: FastISel: Add an appropriate number of immediate operands to the
frame setup instruction.
This commit ensures that the stack map lowering code in FastISel adds an
appropriate number of immediate operands to the frame setup instruction.
The previous code added just one immediate operand, which was fine for a target
like AArch64, but on X86 the ADJCALLSTACKDOWN64 instruction needs two explicit
operands. This caused the machine verifier to report an error when the old code
added just one.
Reviewers: Juergen Ributzka
Differential Revision: http://reviews.llvm.org/D11853
llvm-svn: 244508
Rafael Espindola [Mon, 10 Aug 2015 21:25:44 +0000 (21:25 +0000)]
Rename improperly named variable. NFC.
llvm-svn: 244507
Tyler Nowicki [Mon, 10 Aug 2015 21:18:01 +0000 (21:18 +0000)]
Remove non-ascii characters.
llvm-svn: 244506
Tyler Nowicki [Mon, 10 Aug 2015 21:14:38 +0000 (21:14 +0000)]
Make fp vectorization test X86 specified to avoid cost-model related problems on arm-thumb and hexagon.
llvm-svn: 244505
Rafael Espindola [Mon, 10 Aug 2015 21:00:15 +0000 (21:00 +0000)]
Add a test showing that objdump (and so ObjectFIle) can handle shndx.
It was already passing, we were just not testing the code.
llvm-svn: 244504
JF Bastien [Mon, 10 Aug 2015 20:59:36 +0000 (20:59 +0000)]
x86: Emit LAHF/SAHF instead of PUSHF/POPF
NaCl's sandbox doesn't allow PUSHF/POPF out of security concerns (priviledged emulators have forgotten to mask system bits in the past, and EFLAGS's DF bit is a constant source of hilarity). Commit r220529 fixed PR20376 by saving cmpxchg's flags result using EFLAGS, this commit now generated LAHF/SAHF instead, for all of x86 (not just NaCl) because it leads to an overall performance gain over PUSHF/POPF.
As with the previous patch this code generation is pretty bad because it occurs very later, after register allocation, and in many cases it rematerializes flags which were already available (e.g. already in a register through SETE). Fortunately it's somewhat rare that this code needs to fire.
I did [[ https://github.com/jfbastien/benchmark-x86-flags | a bit of benchmarking ]], the results on an Intel Haswell E5-2690 CPU at 2.9GHz are:
| Time per call (ms) | Runtime (ms) | Benchmark |
| 0.
000012514 | 6257 | sete.i386 |
| 0.
000012810 | 6405 | sete.i386-fast |
| 0.
000010456 | 5228 | sete.x86-64 |
| 0.
000010496 | 5248 | sete.x86-64-fast |
| 0.
000012906 | 6453 | lahf-sahf.i386 |
| 0.
000013236 | 6618 | lahf-sahf.i386-fast |
| 0.
000010580 | 5290 | lahf-sahf.x86-64 |
| 0.
000010304 | 5152 | lahf-sahf.x86-64-fast |
| 0.
000028056 | 14028 | pushf-popf.i386 |
| 0.
000027160 | 13580 | pushf-popf.i386-fast |
| 0.
000023810 | 11905 | pushf-popf.x86-64 |
| 0.
000026468 | 13234 | pushf-popf.x86-64-fast |
Clearly `PUSHF`/`POPF` are suboptimal. It doesn't really seems to be worth teaching LLVM about individual flags, at least not for this purpose.
Reviewers: rnk, jvoung, t.p.northover
Subscribers: llvm-commits
Differential revision: http://reviews.llvm.org/D6629
llvm-svn: 244503
Chih-Hung Hsieh [Mon, 10 Aug 2015 20:58:54 +0000 (20:58 +0000)]
Fix test case to work with -Asserts builds.
When clang is built with -DLLVM_ENABLE_ASSERTIONS=Off,
it does not create names for IR values.
Differential Revision: http://reviews.llvm.org/D11437
llvm-svn: 244502
Artem Belevich [Mon, 10 Aug 2015 20:57:02 +0000 (20:57 +0000)]
[CUDA] Add implicit __attribute__((used)) to all __global__ functions.
This allows emitting kernels that were instantiated from the host code
and which would never be explicitly referenced otherwise.
Differential Revision: http://reviews.llvm.org/D11666
llvm-svn: 244501
Rafael Espindola [Mon, 10 Aug 2015 20:50:40 +0000 (20:50 +0000)]
Use higher level functions in llvm-objdump.
This matches the rest of llvm-objdump better and isolates it from upcoming
changes to ELFFile.
llvm-svn: 244500
Sanjay Patel [Mon, 10 Aug 2015 20:45:44 +0000 (20:45 +0000)]
fix minsize detection: minsize attribute implies optimizing for size
llvm-svn: 244499
Sanjay Patel [Mon, 10 Aug 2015 20:34:34 +0000 (20:34 +0000)]
[x86, SSE]]add missing tests for load folding with partial register update
The minsize case is wrong; that will be fixed in the next commit.
llvm-svn: 244498
Artem Belevich [Mon, 10 Aug 2015 20:33:56 +0000 (20:33 +0000)]
[CUDA] Added stubs for new attributes used by CUDA headers.
The main purpose is to avoid errors and warnings while parsing CUDA
header files. The attributes are currently unused otherwise.
Differential version: http://reviews.llvm.org/D11690
llvm-svn: 244497
Rafael Espindola [Mon, 10 Aug 2015 20:25:04 +0000 (20:25 +0000)]
Delete getDotSymtabSec.
Another step in avoiding iterating over all sections in the ELFFile constructor.
llvm-svn: 244496
Simon Pilgrim [Mon, 10 Aug 2015 20:21:15 +0000 (20:21 +0000)]
[InstCombine] Move SSE2/AVX2 arithmetic vector shift folding to instcombiner
As discussed in D11760, this patch moves the (V)PSRA(WD) arithmetic shift-by-constant folding to InstCombine to match the logical shift implementations.
Differential Revision: http://reviews.llvm.org/D11886
llvm-svn: 244495
Tyler Nowicki [Mon, 10 Aug 2015 20:13:32 +0000 (20:13 +0000)]
Removed unused and incorrectly implemented classof() on Optimization Remark base class.
llvm-svn: 244494
Colin LeMahieu [Mon, 10 Aug 2015 19:58:06 +0000 (19:58 +0000)]
[TableGen] NFC improving comments about what the tokenized identifiers will contain.
llvm-svn: 244493
Tyler Nowicki [Mon, 10 Aug 2015 19:56:40 +0000 (19:56 +0000)]
Append options for floating-point commutivity when related diagnostics are produced.
With this patch clang appends the command line options that would allow vectorization when floating-point commutativity is required. Specifically those are enabling fast-math or specifying a loop hint.
llvm-svn: 244492
Jonathan Roelofs [Mon, 10 Aug 2015 19:56:39 +0000 (19:56 +0000)]
Fix a few more cases of 'CHECK[^:]*$'. NFCI
llvm-svn: 244491
Nick Lewycky [Mon, 10 Aug 2015 19:54:11 +0000 (19:54 +0000)]
Fix typo.
llvm-svn: 244490
Tyler Nowicki [Mon, 10 Aug 2015 19:51:46 +0000 (19:51 +0000)]
Late evaluation of the fast-math vectorization requirement.
This patch moves the verification of fast-math to just before vectorization is done. This way we can tell clang to append the command line options would that allow floating-point commutativity. Specifically those are enableing fast-math or specifying a loop hint.
llvm-svn: 244489
Reid Kleckner [Mon, 10 Aug 2015 19:39:01 +0000 (19:39 +0000)]
[dllimport] A non-imported class with an imported key can't have a key
Summary:
The vtable takes its DLL storage class from the class, not the key
function. When they disagree, the vtable won't be exported by the DLL
that defines the key function. The easiest way to ensure that importers
of the class emit their own vtable is to say that the class has no key
function.
Reviewers: hans, majnemer
Subscribers: cfe-commits
Differential Revision: http://reviews.llvm.org/D11913
llvm-svn: 244488
Jonathan Roelofs [Mon, 10 Aug 2015 19:22:55 +0000 (19:22 +0000)]
Fix another case of 'CHECK[^:]*$'. NFCI
llvm-svn: 244486
Tyler Nowicki [Mon, 10 Aug 2015 19:14:16 +0000 (19:14 +0000)]
Modify diagnostic messages to clearly indicate the why interleaving wasn't done.
Sometimes interleaving is not beneficial, as determined by the cost-model and sometimes it is disabled by a loop hint (by the user). This patch modifies the diagnostic messages to make it clear why interleaving wasn't done.
llvm-svn: 244485
James Y Knight [Mon, 10 Aug 2015 19:11:39 +0000 (19:11 +0000)]
[Sparc] Implement i64 load/store support for 32-bit sparc.
The LDD/STD instructions can load/store a 64bit quantity from/to
memory to/from a consecutive even/odd pair of (32-bit) registers. They
are part of SparcV8, and also present in SparcV9. (Although deprecated
there, as you can store 64bits in one register).
As recommended on llvmdev in the thread "How to enable use of 64bit
load/store for 32bit architecture" from Apr 2015, I've modeled the
64-bit load/store operations as working on a v2i32 type, rather than
making i64 a legal type, but with few legal operations. The latter
does not (currently) work, as there is much code in llvm which assumes
that if i64 is legal, operations like "add" will actually work on it.
The same assumption does not hold for v2i32 -- for vector types, it is
workable to support only load/store, and expand everything else.
This patch:
- Adds a new register class, IntPair, for even/odd pairs of registers.
- Modifies the list of reserved registers, the stack spilling code,
and register copying code to support the IntPair register class.
- Adds support in AsmParser. (note that in asm text, you write the
name of the first register of the pair only. So the parser has to
morph the single register into the equivalent paired register).
- Adds the new instructions themselves (LDD/STD/LDDA/STDA).
- Hooks up the instructions and registers as a vector type v2i32. Adds
custom legalizer to transform i64 load/stores into v2i32 load/stores
and bitcasts, so that the new instructions can actually be
generated, and marks all operations other than load/store on v2i32
as needing to be expanded.
- Copies the unfortunate SelectInlineAsm hack from ARMISelDAGToDAG.
This hack undoes the transformation of i64 operands into two
arbitrarily-allocated separate i32 registers in
SelectionDAGBuilder. and instead passes them in a single
IntPair. (Arbitrarily allocated registers are not useful, asm code
expects to be receiving a pair, which can be passed to ldd/std.)
Also adds a bunch of test cases covering all the bugs I've added along
the way.
Differential Revision: http://reviews.llvm.org/D8713
llvm-svn: 244484
Rafael Espindola [Mon, 10 Aug 2015 19:10:37 +0000 (19:10 +0000)]
rename toELFShdrIter to getSection and move it closer to getSymbol. NFC.
llvm-svn: 244483