Chuang-Yu Cheng [Wed, 6 Apr 2016 10:48:36 +0000 (10:48 +0000)]
[ppc64] Temporary disable sibling call optimization on ppc64 due to breaking test case
r265506 breaks print-stack-trace.cc test case of compiler-rt in bootstrap
test.
http://lab.llvm.org:8011/builders/clang-ppc64be-linux-multistage/builds/1708
llvm-svn: 265528
Tamas Berghammer [Wed, 6 Apr 2016 10:34:29 +0000 (10:34 +0000)]
Fix and xfail TestRegisterVariables after rL265498
llvm-svn: 265527
Dmitry Polukhin [Wed, 6 Apr 2016 10:01:46 +0000 (10:01 +0000)]
Revert "[modules] Continue factoring encoding of AST records out of ASTWriter."
This reverts commit r265518.
llvm-svn: 265526
Pavel Labath [Wed, 6 Apr 2016 09:10:29 +0000 (09:10 +0000)]
Fix a cornercase in breakpoint reporting
Summary:
This resolves a similar problem as D16720 (which handled the case when we single-step onto a
breakpoint), but this one deals with involutary stops: when we stop a thread (e.g. because
another thread has hit a breakpont and we are doing a full stop), we can end up stopping it right
before it executes a breakpoint instruction. In this case, the stop reason will be empty, but we
will still step over the breakpoint when do the next resume, thereby missing a breakpoint hit.
I have observed this happening in TestConcurrentEvents, but I have no idea how to reproduce this
behavior more reliably.
Reviewers: clayborg
Subscribers: lldb-commits
Differential Revision: http://reviews.llvm.org/D18692
llvm-svn: 265525
Pavel Labath [Wed, 6 Apr 2016 08:55:31 +0000 (08:55 +0000)]
Fixup r265398
llvm-svn: 265524
George Rimar [Wed, 6 Apr 2016 08:08:40 +0000 (08:08 +0000)]
[ELF] - Teach linkerscript error handler to show full script line and column marker on error.
When error, this adds the text line of script to the output
and a marks exact incorrect token under it:
line 1: <error text here>
UNKNOWN_TAG {
^
Differential revision: http://reviews.llvm.org/D18699
llvm-svn: 265523
George Rimar [Wed, 6 Apr 2016 07:20:45 +0000 (07:20 +0000)]
[ELF] - Do not handle ELF and program header as dummy sections.
ELF and program header are not part of OutputSections list anymore.
That helps to avoid having and working with functions like dummySectionsNum().
Still keeping them as sections helps to simplify the code.
Differential revision: http://reviews.llvm.org/D18743
llvm-svn: 265522
David Majnemer [Wed, 6 Apr 2016 07:04:53 +0000 (07:04 +0000)]
[SLPVectorizer] Vectorizing the libm sqrt to llvm's sqrt intrinsic requires nnan
To quote the langref "Unlike sqrt in libm, however, llvm.sqrt has
undefined behavior for negative numbers other than -0.0 (which allows
for better optimization, because there is no need to worry about errno
being set). llvm.sqrt(-0.0) is defined to return -0.0 like IEEE sqrt."
This means that it's unsafe to replace sqrt with llvm.sqrt unless the
call is annotated with nnan.
Thanks to Hal Finkel for pointing this out!
llvm-svn: 265521
Duncan P. N. Exon Smith [Wed, 6 Apr 2016 06:41:54 +0000 (06:41 +0000)]
IR: Move MDStrings to a BumpPtrAllocator
We never delete any MDString until the context is destroyed. Might as
well throw them onto a BumpPtrAllocator.
llvm-svn: 265520
Duncan P. N. Exon Smith [Wed, 6 Apr 2016 06:38:15 +0000 (06:38 +0000)]
IRMover: Steal arguments when moving functions, NFC
Instead of copying arguments from the source function to the
destination, steal them. This has a few advantages.
- The ValueMap doesn't need to be seeded with (or cleared of)
Arguments.
- Often the destination function won't have created any arguments yet,
so this avoids malloc traffic.
- Argument names don't need to be copied.
Because argument lists are lazy, this required a new
Function::stealArgumentListFrom helper.
llvm-svn: 265519
Richard Smith [Wed, 6 Apr 2016 06:26:08 +0000 (06:26 +0000)]
[modules] Continue factoring encoding of AST records out of ASTWriter.
llvm-svn: 265518
Davide Italiano [Wed, 6 Apr 2016 04:34:38 +0000 (04:34 +0000)]
Revert "[IRVerifier] Don't crash on invalid DIFile inside DISubprogram."
This reverts commit r265515 as lots of tests need to be fixed before
this actually can go in.
llvm-svn: 265517
Richard Trieu [Wed, 6 Apr 2016 04:22:00 +0000 (04:22 +0000)]
Add parentheses to silence warning.
llvm-svn: 265516
Davide Italiano [Wed, 6 Apr 2016 03:57:47 +0000 (03:57 +0000)]
[IRVerifier] Don't crash on invalid DIFile inside DISubprogram.
llvm-svn: 265515
Davide Italiano [Wed, 6 Apr 2016 03:07:58 +0000 (03:07 +0000)]
[IRVerifier] Avoid crashing on an invalid compile unit.
llvm-svn: 265514
Matthias Braun [Wed, 6 Apr 2016 02:59:44 +0000 (02:59 +0000)]
AArch64: Fix compile error
Fixed to adapt a use of enterBasicBlock() in my last commit (because I
had follow on patches in my repository that change the code).
llvm-svn: 265513
Rui Ueyama [Wed, 6 Apr 2016 02:52:47 +0000 (02:52 +0000)]
Do not allocate MipsReginfo using BumpPtrAllocator.
So that MipsReginfo's destructor will be called.
llvm-svn: 265512
Matthias Braun [Wed, 6 Apr 2016 02:47:09 +0000 (02:47 +0000)]
RegisterScavenger: Take a reference as enterBasicBlock() argument.
Make it obvious that the argument cannot be nullptr.
Remove an unnecessary nullptr check in initRegState.
llvm-svn: 265511
Matthias Braun [Wed, 6 Apr 2016 02:46:35 +0000 (02:46 +0000)]
LivePhysRegs: removeReg() must remove aliased registers
We must remove all aliased registers which may be more than the all sub
and super registers combined.
Bug found while reading the code. The bug does not affect any existing
target as the only use of register aliases I could found were control
registers on ARM and Hexagon which are all reserved.
llvm-svn: 265510
Matthias Braun [Wed, 6 Apr 2016 02:46:04 +0000 (02:46 +0000)]
LivePhysRegs: Remove redundant check
llvm-svn: 265509
Duncan P. N. Exon Smith [Wed, 6 Apr 2016 02:25:12 +0000 (02:25 +0000)]
ValueMapper: Fix delayed blockaddress handling after r265273
r265273 added Mapper::mapBlockAddress, which delays mapping a
blockaddress value until the function has a body. The condition was
backwards, and should be checking Function::empty instead of
GlobalValue::isDeclaration.
llvm-svn: 265508
Duncan P. N. Exon Smith [Wed, 6 Apr 2016 02:06:40 +0000 (02:06 +0000)]
AsmParser: Don't crash on unresolved !tbaa
Instead of crashing, give a nice error. As a drive-by, fix the location
associated with the errors for unresolved metadata (the location was off
by one token).
llvm-svn: 265507
Chuang-Yu Cheng [Wed, 6 Apr 2016 02:04:38 +0000 (02:04 +0000)]
[ppc64] Enable sibling call optimization on ppc64 ELFv1/ELFv2 abi
This patch enable sibling call optimization on ppc64 ELFv1/ELFv2 abi, and
add a couple of test cases. This patch also passed llvm/clang bootstrap
test, and spec2006 build/run/result validation.
Original issue: https://llvm.org/bugs/show_bug.cgi?id=25617
Great thanks to Tom's (tjablin) help, he contributed a lot to this patch.
Thanks Hal and Kit's invaluable opinions!
Reviewers: hfinkel kbarton
http://reviews.llvm.org/D16315
llvm-svn: 265506
Chuang-Yu Cheng [Wed, 6 Apr 2016 01:47:02 +0000 (01:47 +0000)]
[Power9] Implement add-pc, multiply-add, modulo, extend-sign-shift, random number, set bool, and dfp test significance
This patch implement the following instructions:
- addpcis subpcis
- maddhd maddhdu maddld
- modsw moduw modsd modud
- darn
- extswsli extswsli.
- setb
- dtstsfi dtstsfiq
Total 15 instructions
Reviewers: nemanjai hfinkel tjablin amehsan kbarton
http://reviews.llvm.org/D17885
llvm-svn: 265505
Chuang-Yu Cheng [Wed, 6 Apr 2016 01:46:45 +0000 (01:46 +0000)]
[Power9] Implement copy-paste, msgsync, slb, and stop instructions
This patch implements the following BookII and Book III instructions:
- copy copy_first cp_abort paste paste. paste_last
- msgsync
- slbieg slbsync
- stop
Total 10 instructions
Reviewers: nemanjai hfinkel tjablin amehsan kbarton
llvm-svn: 265504
Sanjoy Das [Wed, 6 Apr 2016 01:33:54 +0000 (01:33 +0000)]
[RS4GC] Add a comment
llvm-svn: 265503
Sanjoy Das [Wed, 6 Apr 2016 01:33:49 +0000 (01:33 +0000)]
Lower @llvm.experimental.deoptimize as a noreturn call
While preserving the return value for @llvm.experimental.deoptimize at
the IR level is useful during mid-level optimization, doing so at the
machine instruction level requires generating some extra code and a
return that is non-ideal. This change has LLVM lower
```
%val = call @llvm.experimental.deoptimize
ret %val
```
to effectively
```
call @__llvm_deoptimize()
unreachable
```
instead.
llvm-svn: 265502
Rafael Espindola [Wed, 6 Apr 2016 01:30:49 +0000 (01:30 +0000)]
Make helper function static. NFC.
llvm-svn: 265501
Tom Stellard [Wed, 6 Apr 2016 01:29:19 +0000 (01:29 +0000)]
AMDGPU: Document address space mapping
Summary:
Address space mapping is described in lib/Target/AMDGPU/AMDGPU.h in
Doxygen comments. This patch adds the description to user guide for
AMDGPU back-end.
Patch By: Vedran Miletić
Reviewers: tstellarAMD, arsenm
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D17046
llvm-svn: 265500
NAKAMURA Takumi [Wed, 6 Apr 2016 01:18:08 +0000 (01:18 +0000)]
AArch64CodeGen: Make AArch64RegisterBankInfo.cpp optional along LLVM_BUILD_GLOBAL_ISEL.
llvm-svn: 265499
Todd Fiala [Wed, 6 Apr 2016 01:14:37 +0000 (01:14 +0000)]
make TestRegisterVariables slightly more resilient
This test sets the compiler optimization level to -O1 and
makes some assumptions about how local frame vars will be
stored (i.e. in registers). These assumptions are not always
true.
I did a first-pass set of improvements that:
(1) no longer assumes that every one of the target locations has
every variable in a register. Sometimes the compiler
is even smarter and skips the register entirely.
(2) simply expects one of the 5 or so variables it checks
to be in a register.
This test probably passes on a whole lot more systems than it
used to now. This is certainly true on OS X.
llvm-svn: 265498
Ivan Krasin [Wed, 6 Apr 2016 01:11:10 +0000 (01:11 +0000)]
Fix a memory leak found by check-lld asan tests.
Summary:
This bug was introduced by http://reviews.llvm.org/rL265059,
where InputSectionBase got Thunks field, which can do memory allocations.
Since InputSectionBase destructors were never called (I count it as another bug),
that caused a memory leak when 2 or more thunks are added to a section.
The fix to is properly call InputSectionBase destructors from ~ObjectFile.
Reviewers: atanasyan, ruiu, rafael
Subscribers: rafael, krasin, pcc
Differential Revision: http://reviews.llvm.org/D18809
llvm-svn: 265497
Jim Ingham [Wed, 6 Apr 2016 00:25:44 +0000 (00:25 +0000)]
The FixItList typedef should have been inside "class ClangDiagnostic".
llvm-svn: 265496
Jim Ingham [Wed, 6 Apr 2016 00:25:04 +0000 (00:25 +0000)]
If the fixed expression doesn't parse, don't tell the user about it.
llvm-svn: 265495
Jim Ingham [Wed, 6 Apr 2016 00:24:17 +0000 (00:24 +0000)]
Don't write "using $_lldb_local_vars" statements for variables with
no name. These were showing up with a recent clang, I haven't tracked
down why yet, but adding them is clearly wrong.
llvm-svn: 265494
David Majnemer [Wed, 6 Apr 2016 00:14:59 +0000 (00:14 +0000)]
[SLPVectorizer] Vectorize libcalls of sqrt
We didn't realize that we could transform the libcall into a vectorized
intrinsic.
llvm-svn: 265493
Quentin Colombet [Tue, 5 Apr 2016 23:57:25 +0000 (23:57 +0000)]
[RegisterBankInfo] Include RegisterBank.h.
We actually need the definition of a RegisterBank to be able to inline
the implementation of the subscript operator.
llvm-svn: 265492
Quentin Colombet [Tue, 5 Apr 2016 23:43:58 +0000 (23:43 +0000)]
[RegisterBankInfo] Add missing include for assert.
This should appease the linux bot.
llvm-svn: 265491
Davide Italiano [Tue, 5 Apr 2016 23:37:08 +0000 (23:37 +0000)]
[DebugInfo] Fix tests so that each subprogram belongs to a CU.
llvm-svn: 265490
Quentin Colombet [Tue, 5 Apr 2016 23:34:59 +0000 (23:34 +0000)]
[AArch64] Initial implementation of the targeting of the register bank information.
llvm-svn: 265489
Manman Ren [Tue, 5 Apr 2016 23:27:51 +0000 (23:27 +0000)]
Update testing cases after backend changes.
llvm-svn: 265488
Quentin Colombet [Tue, 5 Apr 2016 23:26:39 +0000 (23:26 +0000)]
[RegisterBankInfo] Simplify the API for build a register bank.
As part of the TRI argument of addRegBankCoverage we already have access to
the TargetRegisterClass through the ID of that register class.
Therefore, there is no point in needing a TargetRegisterClass instance,
the ID is enough to get to it.
llvm-svn: 265487
Sanjoy Das [Tue, 5 Apr 2016 23:18:53 +0000 (23:18 +0000)]
[RS4GC] NFC cleanup of the DeferredReplacement class
Instead of constructors use clearly named factory methods.
llvm-svn: 265486
Sanjoy Das [Tue, 5 Apr 2016 23:18:35 +0000 (23:18 +0000)]
[RS4GC] Better codegen for deoptimize calls
Don't emit a gc.result for a statepoint lowered from
@llvm.experimental.deoptimize since the call into __llvm_deoptimize is
effectively noreturn. Instead follow the corresponding gc.statepoint
with an "unreachable".
llvm-svn: 265485
Quentin Colombet [Tue, 5 Apr 2016 23:04:54 +0000 (23:04 +0000)]
[Target] Remove a deprecated comment.
llvm-svn: 265484
Quentin Colombet [Tue, 5 Apr 2016 22:50:40 +0000 (22:50 +0000)]
[Target] Add an accessor to the register bank information.
llvm-svn: 265483
Manman Ren [Tue, 5 Apr 2016 22:44:44 +0000 (22:44 +0000)]
Swift Calling Convention: swiftcc for ARM.
Differential Revision: http://reviews.llvm.org/D18769
llvm-svn: 265482
Evgeniy Stepanov [Tue, 5 Apr 2016 22:41:50 +0000 (22:41 +0000)]
Faster stack-protector for Android/AArch64.
Bionic has a defined thread-local location for the stack protector
cookie. Emit a direct load instead of going through __stack_chk_guard.
llvm-svn: 265481
Manman Ren [Tue, 5 Apr 2016 22:41:47 +0000 (22:41 +0000)]
Swift Calling Convention: add swiftcc.
Differential Revision: http://reviews.llvm.org/D17863
llvm-svn: 265480
Quentin Colombet [Tue, 5 Apr 2016 22:34:01 +0000 (22:34 +0000)]
[RegisterBank] Implement the verify method to check for the obvious mistakes.
llvm-svn: 265479
Rafael Espindola [Tue, 5 Apr 2016 22:08:39 +0000 (22:08 +0000)]
Delete broken code.
A synthetic symbol can be global or local, and with the current
infrastructure we don't need any special code for it.
Fixes PR27228.
llvm-svn: 265478
Lang Hames [Tue, 5 Apr 2016 22:06:48 +0000 (22:06 +0000)]
[lld][MachO] Check Expected<T> for error prior to destruction.
This should fix the failures on the LLD bots caused by r265446.
llvm-svn: 265477
Adrian McCarthy [Tue, 5 Apr 2016 21:49:41 +0000 (21:49 +0000)]
Revert "XFail TestImport.py on Windows because Python 3 import rules don't work that way."
This reverts commit
e5f0ba4fcf977ad6baaaca700d3646675cdac19b.
llvm-svn: 265476
Quentin Colombet [Tue, 5 Apr 2016 21:47:56 +0000 (21:47 +0000)]
[RegisterBankInfo] Add debug print to check how the initialization is going.
llvm-svn: 265475
George Burgess IV [Tue, 5 Apr 2016 21:40:45 +0000 (21:40 +0000)]
[CFLAA] Fix PR27213; incorrect tagging of args/globals
Prior to this patch, CFLAA wouldn't tag arguments/globals properly if
it didn't find any "interesting" edges on them. This means that, if all
you do is store constants to a global or argument, we would never
actually treat it as a global/argument.
Test case:
define void @foo(i32* %A, i32* %B) #0 {
entry:
store i32 0, i32* %A, align 4
store i32 0, i32* %B, align 4
ret void
}
CFLAA would say that %A can't alias %B, because neither pointer was
used in an interesting way. This patch makes us note whether something
is an argument, global, ... regardless of how interesting CFLAA thinks
its uses are.
(For the record, using a value in an interesting way means loading
from it, using it in a GEP, ...)
llvm-svn: 265474
Quentin Colombet [Tue, 5 Apr 2016 21:40:43 +0000 (21:40 +0000)]
[RegisterBank] Add printable capabilities for future debugging.
llvm-svn: 265473
Rafael Espindola [Tue, 5 Apr 2016 21:27:30 +0000 (21:27 +0000)]
Add a test for relocations in non alloc sections.
We already got this right, but we were not testing it.
llvm-svn: 265471
Duncan P. N. Exon Smith [Tue, 5 Apr 2016 21:25:33 +0000 (21:25 +0000)]
Try harder to appease MSVC after r265456
r265465 wasn't good enough. I need to spell out all the moves.
llvm-svn: 265470
Quentin Colombet [Tue, 5 Apr 2016 21:20:12 +0000 (21:20 +0000)]
[RegisterBankInfo] Make addRegBankCoverage more capable to ease
targeting jobs.
Now, addRegBankCoverage also adds the subreg-classes not just the
sub-classes of the given register class.
llvm-svn: 265469
Junmo Park [Tue, 5 Apr 2016 21:14:31 +0000 (21:14 +0000)]
Minor code cleanups. NFC.
llvm-svn: 265468
Richard Trieu [Tue, 5 Apr 2016 21:13:54 +0000 (21:13 +0000)]
Fix a crash on invalid with template handling
This is a fix for https://llvm.org/bugs/show_bug.cgi?id=25561 which was a
crash on invalid. Change the handling of invalid decls to have a catch-all
case to prevent unexpecting decls from triggering an assertion.
llvm-svn: 265467
Duncan P. N. Exon Smith [Tue, 5 Apr 2016 21:10:45 +0000 (21:10 +0000)]
IR: Introduce ConstantAggregate, NFC
Add a common parent class for ConstantArray, ConstantVector, and
ConstantStruct called ConstantAggregate. These are the aggregate
subclasses of Constant that take operands.
This is mainly a cleanup, adding common `isa` target and removing
duplicated code. However, it also simplifies caching which constants
point transitively at `GlobalValue` (a possible future direction).
llvm-svn: 265466
Duncan P. N. Exon Smith [Tue, 5 Apr 2016 21:07:01 +0000 (21:07 +0000)]
Try to appease MSVC after r265456
I can't remember if adding `= default` will make MSVC happy, or if I
have to spell this out. Let's try the cleaner version first.
llvm-svn: 265465
Quentin Colombet [Tue, 5 Apr 2016 21:06:15 +0000 (21:06 +0000)]
[RegisterBankInfo] Implement the methods to create register banks.
llvm-svn: 265464
Duncan P. N. Exon Smith [Tue, 5 Apr 2016 20:53:47 +0000 (20:53 +0000)]
IR: Add missing assertion for ConstantVector::ConstantVector
Use the same assertion as ConstantArray. Vectors should have the right
number of elements.
llvm-svn: 265463
Ed Schouten [Tue, 5 Apr 2016 20:51:50 +0000 (20:51 +0000)]
Make TLS work for PIE executables on x86-64.
While trying to get PIE work on CloudABI for x86-64, I noticed that even
though GNU ld would generate functional binaries, LLD would not. It
turns out that we generate relocations for referencing TLS objects
inside of the text segment, which shouldn't happen.
This change extends the isRelRelative() function to list some additional
relocation types that should be treated as relative. This makes my C
library unit testing binary work on x86-64.
Approved by: ruiu
Differential Revision: http://reviews.llvm.org/D18688
Fixes bug: https://llvm.org/bugs/show_bug.cgi?id=27174
llvm-svn: 265462
Adrian McCarthy [Tue, 5 Apr 2016 20:49:09 +0000 (20:49 +0000)]
XFail TestImport.py on Windows because Python 3 import rules don't work that way.
llvm-svn: 265461
Quentin Colombet [Tue, 5 Apr 2016 20:48:32 +0000 (20:48 +0000)]
[RegisterBank] Provide a way to check if a register bank is valid.
Change the default constructor to create invalid object.
The target will have to properly initialize the register banks before
using them.
llvm-svn: 265460
Duncan P. N. Exon Smith [Tue, 5 Apr 2016 20:45:04 +0000 (20:45 +0000)]
Revert "Fix Clang-tidy modernize-deprecated-headers warnings in remaining files; other minor fixes."
This reverts commit r265454 since it broke the build. E.g.:
http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-incremental_build/22413/
llvm-svn: 265459
Duncan P. N. Exon Smith [Tue, 5 Apr 2016 20:31:23 +0000 (20:31 +0000)]
Make constructors for final subclasses of Constant private, NFC
These were `protected` before, but might as well be `private`. Also
marked the classes themselves `final`.
llvm-svn: 265458
David Blaikie [Tue, 5 Apr 2016 20:26:50 +0000 (20:26 +0000)]
llvm-dwp: Handle GCC's use of multiple debug_types.dwo sections in a single .dwo file
(also includes the .test file missing from my previous commit, r265452)
llvm-svn: 265457
Duncan P. N. Exon Smith [Tue, 5 Apr 2016 20:23:21 +0000 (20:23 +0000)]
ValueMapper: Rewrite Mapper::mapMetadata without recursion
This commit completely rewrites Mapper::mapMetadata (the implementation
of llvm::MapMetadata) using an iterative algorithm. The guts of the new
algorithm are in MDNodeMapper::map, the entry function in a new class.
Previously, Mapper::mapMetadata performed a recursive exploration of the
graph with eager "just in case there's a reason" malloc traffic.
The new algorithm has these benefits:
- New nodes and temporaries are not created eagerly.
- Uniquing cycles are not duplicated (see new unit test).
- No recursion.
Given a node to map, it does this:
1. Use a worklist to perform a post-order traversal of the transitively
referenced unmapped nodes.
2. Track which nodes will change operands, and which will have new
addresses in the mapped scheme. Propagate the changes through the
POT until fixed point, to pick up uniquing cycles that need to
change.
3. Map all the distinct nodes without touching their operands. If
RF_MoveDistinctMetadata, they get mapped to themselves; otherwise,
they get mapped to clones.
4. Map the uniqued nodes (bottom-up), lazily creating temporaries for
forward references as needed.
5. Remap the operands of the distinct nodes.
Mehdi helped me out by profiling this with -flto=thin. On his workload
(importing/etc. for opt.cpp), MapMetadata sped up by 15%, contributed
about 50% less to persistent memory, and made about 100x fewer calls to
malloc. The speedup is less than I'd hoped. The profile mainly blames
DenseMap lookups; perhaps there's a way to reduce them (e.g., by
disallowing remapping of MDString).
It would be nice to break the strange remaining recursion on the Value
side: MapValue => materializeInitFor => RemapInstruction => MapValue. I
think we could do this by having materializeInitFor return a worklist of
things to be remapped.
llvm-svn: 265456
Quentin Colombet [Tue, 5 Apr 2016 20:21:53 +0000 (20:21 +0000)]
[TargetRegisterClass] Improve the comment for how to use getSubClassMask.
llvm-svn: 265455
Eugene Zelenko [Tue, 5 Apr 2016 20:19:49 +0000 (20:19 +0000)]
Fix Clang-tidy modernize-deprecated-headers warnings in remaining files; other minor fixes.
Some Include What You Use suggestions were used too.
Use anonymous namespaces in source files.
Differential revision: http://reviews.llvm.org/D18778
llvm-svn: 265454
Ed Schouten [Tue, 5 Apr 2016 20:17:33 +0000 (20:17 +0000)]
Don't omit dynamic relocations for the GOT.
Where Clang's AArch64 backend seems to differ from the X86 backend is
that it tends to use the GOT more aggressively.
After getting CloudABI PIEs working on x86-64, I noticed that accessing
global variables would still crash on aarch64. Tracing it down, it turns
out that the GOT was filled with entries assuming the base address was
zero.
It turns out that we skip generating relocations for GOT entries in case
the relocation pointing towards the GOT is relative. Whether the thing
pointing to the GOT is absolute or relative shouldn't make any
difference; the GOT entry itself should contain the absolute address,
thus needs a relocation regardless.
Approved by: rafael
Differential Revision: http://reviews.llvm.org/D18739
llvm-svn: 265453
David Blaikie [Tue, 5 Apr 2016 20:16:38 +0000 (20:16 +0000)]
llvm-dwp: Handle dwo files produced by GCC
To start with, handle DW_FORM_string names. Follow up commit will handle
the interesting quirk with type units I was originally aiming for here.
llvm-svn: 265452
Lang Hames [Tue, 5 Apr 2016 20:11:24 +0000 (20:11 +0000)]
[llvm-rtdyld] Fix the return type on ErrorAndExit.
As suggested by Rafael - this function no longer returns a value as of r264425.
llvm-svn: 265451
Ahmed Bougacha [Tue, 5 Apr 2016 20:02:57 +0000 (20:02 +0000)]
[X86] Reuse EFLAGS and form LOCKed ops when only user is SETCC.
We only generate LOCKed versions of add/sub when the result is unused.
It often happens that the result is used, but only by a comparison. We
can optimize those out by reusing EFLAGS, which lets us use the proper
instructions, instead of having to fallback to LXADD.
Instead of doing this as an MI peephole (as we do for the other
non-LOCKed (really, non-MR) forms), do it in ISel. It becomes quite
tricky later.
This also makes it eventually possible to stop expanding and/or/xor
if the only user is an icmp (also see D18141).
This uses the LOCK ISD opcodes added by r262244.
Differential Revision: http://reviews.llvm.org/D17633
llvm-svn: 265450
Quentin Colombet [Tue, 5 Apr 2016 20:02:47 +0000 (20:02 +0000)]
[GlobalISel] Add the RegisterBankInfo class for the handling of register banks.
llvm-svn: 265449
Ahmed Bougacha [Tue, 5 Apr 2016 20:02:44 +0000 (20:02 +0000)]
[X86] Add tests for ATOMIC_LOAD_OP EFLAGS reuse. NFC.
llvm-svn: 265448
Ahmed Bougacha [Tue, 5 Apr 2016 20:02:22 +0000 (20:02 +0000)]
[X86] Simplify early-exit check. NFC.
llvm-svn: 265447
Lang Hames [Tue, 5 Apr 2016 19:57:03 +0000 (19:57 +0000)]
[Support] Add a checked flag to Expected<T>, require checks before access or
destruction.
This makes the Expected<T> class behave like Error, even when in success mode.
Expected<T> values must be checked to see whether they contain an error prior
to being dereferenced, assigned to, or destructed.
llvm-svn: 265446
Quentin Colombet [Tue, 5 Apr 2016 19:54:44 +0000 (19:54 +0000)]
[GlobalISel] Add a class, RegisterBank, to represent register banks.
llvm-svn: 265445
Sanjay Patel [Tue, 5 Apr 2016 19:50:21 +0000 (19:50 +0000)]
fixed to discard earlier advertising
Also, hardcode (there must be a better way...) the 'utils' dir in the
advertisement, so it's easier to find.
llvm-svn: 265444
Greg Clayton [Tue, 5 Apr 2016 19:29:05 +0000 (19:29 +0000)]
Fix a crasher that could happen if ClangASTSource::CompleteType() found a type whose name matched, but came from a different language. We need to verify that any types we find are clang types before trying to extra a clang::QualType and then use it.
<rdar://problem/
24138711>
llvm-svn: 265443
Sanjay Patel [Tue, 5 Apr 2016 19:27:39 +0000 (19:27 +0000)]
fix typo; NFC
llvm-svn: 265442
Quentin Colombet [Tue, 5 Apr 2016 19:26:42 +0000 (19:26 +0000)]
[AArch64][Test] Do not override the suffixes for test cases.
llvm-svn: 265441
Quentin Colombet [Tue, 5 Apr 2016 19:06:01 +0000 (19:06 +0000)]
[GlobalISel] Add the skeleton of the RegBankSelect pass.
This pass is reponsible for assigning the generic virtual registers to register
banks.
llvm-svn: 265440
Nirav Dave [Tue, 5 Apr 2016 18:59:37 +0000 (18:59 +0000)]
Fix broken tests from no-jump-table commit
Summary: Fix failing tests from no-jump-table flag addition
Reviewers: jyknight
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D18801
llvm-svn: 265439
Lang Hames [Tue, 5 Apr 2016 18:50:09 +0000 (18:50 +0000)]
[Support] clang-format Error.h.
This tidies up the ExitOnError class and some other recently added code. NFC.
llvm-svn: 265438
Jonathan Peyton [Tue, 5 Apr 2016 18:48:48 +0000 (18:48 +0000)]
[STATS] Remove trailing whitespace in stats source files
llvm-svn: 265437
Justin Lebar [Tue, 5 Apr 2016 18:26:25 +0000 (18:26 +0000)]
[CUDA] Show --cuda-gpu-arch option in clang --help.
For some reason it was hidden.
llvm-svn: 265436
Justin Lebar [Tue, 5 Apr 2016 18:26:20 +0000 (18:26 +0000)]
[CUDA] Add -fcuda-flush-denormals-to-zero.
Summary:
Setting this flag causes all functions are annotated with the
"nvvm-f32ftz" = "true" attribute.
In addition, we annotate the module with "nvvm-reflect-ftz" set
to 0 or 1, depending on whether -cuda-flush-denormals-to-zero is set.
This is read by the NVVMReflect pass.
Reviewers: tra, rnk
Subscribers: cfe-commits
Differential Revision: http://reviews.llvm.org/D18671
llvm-svn: 265435
Sanjay Patel [Tue, 5 Apr 2016 18:23:30 +0000 (18:23 +0000)]
fix documentation comments; NFC
llvm-svn: 265434
Manman Ren [Tue, 5 Apr 2016 18:13:16 +0000 (18:13 +0000)]
Swift Calling Convention: swifterror target-independent change.
At IR level, the swifterror argument is an input argument with type
ErrorObject**. For targets that support swifterror, we want to optimize it
to behave as an inout value with type ErrorObject*; it will be passed in a
fixed physical register.
The main idea is to track the virtual registers for each swifterror value. We
define swifterror values as AllocaInsts with swifterror attribute or a function
argument with swifterror attribute.
In SelectionDAGISel.cpp, we set up swifterror values (SwiftErrorVals) before
handling the basic blocks.
When iterating over all basic blocks in RPO, before actually visiting the basic
block, we call mergeIncomingSwiftErrors to merge incoming swifterror values when
there are multiple predecessors or to simply propagate them. There, we create a
virtual register for each swifterror value in the entry block. For predecessors
that are not yet visited, we create virtual registers to hold the swifterror
values at the end of the predecessor. The assignments are saved in
SwiftErrorWorklist and will be materialized at the end of visiting the basic
block.
When visiting a load from a swifterror value, we copy from the current virtual
register assignment. When visiting a store to a swifterror value, we create a
virtual register to hold the swifterror value and update SwiftErrorMap to
track the current virtual register assignment.
Differential Revision: http://reviews.llvm.org/D18108
llvm-svn: 265433
Nirav Dave [Tue, 5 Apr 2016 18:11:01 +0000 (18:11 +0000)]
Fix missing period in no-jump-table flag comment. NFC.
llvm-svn: 265432
Sanjay Patel [Tue, 5 Apr 2016 18:09:36 +0000 (18:09 +0000)]
add tests to show missing optimization from D18230
llvm-svn: 265431
Sanjay Patel [Tue, 5 Apr 2016 18:00:47 +0000 (18:00 +0000)]
add example usage and workflow to --help output
llvm-svn: 265430
David Blaikie [Tue, 5 Apr 2016 17:51:40 +0000 (17:51 +0000)]
llvm-dwp: Simplify hashing code a bit
llvm-svn: 265426
Nirav Dave [Tue, 5 Apr 2016 17:50:43 +0000 (17:50 +0000)]
Add -fno-jump-tables and-fjump-tables flags
Add no-jump-tables flag to disable use of jump tables when lowering
switch statements
Reviewers: echristo, hans
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D18407
llvm-svn: 265425