Ryan Neph [Wed, 15 Dec 2021 01:10:36 +0000 (17:10 -0800)]
venus: use upstream DRM_IOCTL_VIRTGPU_CONTEXT_INIT
And remove SIMULATE_CONTEXT_INIT and PARAM_MAX_SYNC_QUEUE_COUNT now that
we expect guest kernel support for CONTEXT_INIT with standard support
for up to 64 rings.
Signed-off-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19691>
Ryan Neph [Wed, 9 Nov 2022 22:05:18 +0000 (14:05 -0800)]
venus: update venus-protocol for multiple timelines
Signed-off-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19691>
Ryan Neph [Wed, 7 Dec 2022 21:45:40 +0000 (13:45 -0800)]
venus: formatting fixes
Signed-off-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19691>
Benjamin Tissoires [Fri, 16 Dec 2022 18:44:05 +0000 (19:44 +0100)]
CI: Overwrite valve infra's registry
This is a temporary workaround wihle we wait for valve-infra to sort
out this issue.
It is safe to do because registry.freedesktop.org is a mirror of
harbor.freedesktop.org.
Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7913
Signed-off-by: Benjamin Tissoires <benjamin.tissoires@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20362>
Yonggang Luo [Sat, 5 Nov 2022 20:32:05 +0000 (04:32 +0800)]
util: Fixes thread safety of DEBUG_GET_ONCE_*_OPTION macros
Pick DEBUG_GET_ONCE_BOOL_OPTION as a example:
The intention of DEBUG_GET_ONCE_BOOL_OPTION are returned the same value across
thread, before this commit, on different thread call the function generated by
DEBUG_GET_ONCE_BOOL_OPTION may return different value if called setenv in the
middle of debug_get_bool_option, so use debug_get_option_cached along with
new exposed function debug_parse_bool_option to solve this issue
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19554>
Yonggang Luo [Sat, 5 Nov 2022 20:26:38 +0000 (04:26 +0800)]
util: Add function debug_get_option_cached os_get_option_cached
This is used to fixes DEBUG_GET_ONCE_*_OPTION macros latter
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19554>
Yonggang Luo [Sun, 23 Oct 2022 16:30:38 +0000 (00:30 +0800)]
util: Improve os_get_android_option to be thread-safe
struct hash_table is not thread-safety, need guard by mutex,
but with thread local storage, we can simplify the code and also
got the thread safety without the need of mutex.
Another advantage is by using thread local storage, os_get_android_option
will have the same actions like getenv does, that it's not cached the
value, each call will access the property_get, like getenv will be affected
by putenv
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19554>
Yonggang Luo [Wed, 2 Nov 2022 06:46:16 +0000 (14:46 +0800)]
util: Improve prototype of debug_get_num_option and debug_get_flags_option
Getting debug_get_num_option to return int64_t, as long under 64 bit Linux are 64 bit size,
so using fixed int64_t for cross platform consistence, as long under win32 is 32 bit size.
Getting DEBUG_GET_ONCE_FLAGS_OPTION to return uint64_t to getting it to be
consistence with debug_get_flags_option.
DEBUG_GET_ONCE_NUM_OPTION is not accessed in codebase, so add unittest for it, it maybe
used in future, remove it is not consistence
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19554>
Yonggang Luo [Wed, 2 Nov 2022 09:58:36 +0000 (17:58 +0800)]
util: Indent u_debug.c with 3 space instead of tab
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19554>
Yonggang Luo [Fri, 4 Nov 2022 12:48:02 +0000 (20:48 +0800)]
glsl: fixes -Werror,-Wunused-but-set-variable for clang-15 in glcpp-parse.y and glsl_parser.yy
error messages:
src/compiler/glsl/glcpp/glcpp-parse.c:1691:9: error: variable 'glcpp_parser_nerrs' set but not used [-Werror,-Wunused-but-set-variable]
int yynerrs = 0;
^
src/compiler/glsl/glsl_parser.cpp:2370:9: error: variable '_mesa_glsl_nerrs' set but not used [-Werror,-Wunused-but-set-variable]
int yynerrs = 0;
^
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19875>
Yonggang Luo [Tue, 22 Nov 2022 16:47:53 +0000 (00:47 +0800)]
glsl: Fixes indent issue after replace tab with 3 space by tools in glcpp-parse.y
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19875>
Yonggang Luo [Tue, 22 Nov 2022 16:37:28 +0000 (00:37 +0800)]
glsl: replace tab with 3 space in glcpp-parse.y
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19875>
Yonggang Luo [Tue, 22 Nov 2022 16:34:35 +0000 (00:34 +0800)]
glsl: Fixes ident issue in glsl_parser.yy and update editorconfig for it
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19875>
Yonggang Luo [Fri, 4 Nov 2022 11:31:47 +0000 (19:31 +0800)]
panvk: Fixes -Werror,-Wunused-but-set-variable for clang-15 in panvk_descriptor_set.c
../../src/panfrost/vulkan/panvk_descriptor_set.c:67:13: error: variable 'dynoffset_idx' set but not used [-Werror,-Wunused-but-set-variable]
unsigned dynoffset_idx = 0, img_idx = 0;
^
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19875>
Yonggang Luo [Fri, 4 Nov 2022 13:03:08 +0000 (21:03 +0800)]
loader: fixes -Werror,-Wdeprecated-non-prototype for clang-15 in pipe-loader
There are multiple error messages, show one of them:
../../src/gallium/auxiliary/pipe-loader/pipe_loader_sw.c:219:54: error: passing arguments to a function without a prototype is deprecated in
all versions of C and is not supported in C2x [-Werror,-Wdeprecated-non-prototype]
sdev->ws = sdev->dd->winsys[i].create_winsys(drisw_lf);
^
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19875>
Jesse Natalie [Thu, 15 Dec 2022 22:59:11 +0000 (14:59 -0800)]
d3d12/ci: Update expectations
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20346>
Jesse Natalie [Thu, 15 Dec 2022 22:05:13 +0000 (14:05 -0800)]
dzn: Swizzle SRV access to stencil
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20346>
Jesse Natalie [Thu, 15 Dec 2022 18:59:57 +0000 (10:59 -0800)]
dzn: Pass input clip size to shader compilation
For cases where both clip and cull are used, and a shader has both
inputs and outputs that can contain them, we need metadata to tell
us where the clip array ends and the cull array begins, since they
get combined into CLIP location registers. For outputs, this is in
the nir info, but for input we pass it in a sideband channel.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20346>
Jesse Natalie [Fri, 4 Nov 2022 22:27:43 +0000 (15:27 -0700)]
dzn: Don't add UAV flag to DSV textures
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20346>
Jesse Natalie [Fri, 4 Nov 2022 22:27:24 +0000 (15:27 -0700)]
dzn: Use ResolveSubresourceRegion to support non-averaging resolve modes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20346>
Jesse Natalie [Fri, 4 Nov 2022 21:23:29 +0000 (14:23 -0700)]
dzn: Use driver-implemented triangle fans if available
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20346>
Jesse Natalie [Fri, 4 Nov 2022 21:21:22 +0000 (14:21 -0700)]
dzn: Get options15
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20346>
Jesse Natalie [Thu, 15 Dec 2022 21:06:16 +0000 (13:06 -0800)]
microsoft/compiler: Handle cull distance starting fractional with no previous clip
This can happen if the clip distance was declared, but was discarded as an
unused variable.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20346>
Jesse Natalie [Thu, 15 Dec 2022 20:43:59 +0000 (12:43 -0800)]
microsoft/compiler: Sort all user varyings before any sysvals
User varyings are linked by both name and register. The name is based
on how many *variables* are before it in final driver_location sort
order, not necessarily how many registers are before it.
In some cases where clip/cull distance are involved, it's possible
for one shader to write into a part of the cull distance that's
ignored by a downstream shader, but because linking is done by
*whole* register locations, and clip/cull can be combined using
*fractional* register locations, this is hard to detect. Since no
non-sysvals end up using fractional locations, just put all non-sysvals
first so they always generate the same semantic names for the same
register locations.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20346>
Jesse Natalie [Thu, 15 Dec 2022 19:02:57 +0000 (11:02 -0800)]
microsoft/compiler: Make nir_var_to_dxil_sysvalue_type static
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20346>
Jesse Natalie [Thu, 15 Dec 2022 18:57:42 +0000 (10:57 -0800)]
microsoft/compiler: Handle both input and output clip/cull distances
For clip/cull coming into a GS and being written, this pass was wrong
and would modify variable types incorrectly. Track both inputs and
outputs separately.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20346>
Alyssa Rosenzweig [Wed, 14 Dec 2022 02:20:42 +0000 (21:20 -0500)]
panfrost: Don't use texture format swizzles on v7
They're too restricted for AFBC. Fix up instead. There are two problems at play:
1. We can't just map the format swizzle to the pixel format ordering on v7,
because the "reordered" values aren't allowed with compression.
2. We can't just compose the format swizzle with the API swizzle, because the
composed swizzle is applied to the border colour, so we need to be able to
apply an inverted swizzle to the border colour. That only works for bijective
format swizzles.
Fortunately, there's a neat solution: decompose the format's swizzle into two
swizzles, the first mapping to a reordering that IS allowed for compression, and
the second a bijection. Then we use the allowed reordering when texturing, apply
the bijective swizzle to the API swizzle, and apply the inverse of the bijective
swizzle to the border colour. When we're sampling a border colour, what's now
happening mathematically is:
(API swizzle o bijective swizzle)((bijective swizzle^-1)(border colour)) =
(API swizzle o (bijective swizzle o bijective swizzle^-1))(border colour) =
API swizzle(border colour)
which is exactly what we wanted.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20311>
Alyssa Rosenzweig [Wed, 14 Dec 2022 01:12:58 +0000 (20:12 -0500)]
panfrost: Allow swizzled AFBC on v9+
On v6 and earlier, the hardware supports arbitrary format swizzles for AFBC, so
there's no restriction on AFBC. On v8 and newer, the format swizzle gets applied
to the *decompressed* interchange format, so we can effectively support BGRA of
AFBC images without any special handling. (Confirmed working on v9. Obviously I
can't test on v8 but the expression is cleaner if we assume optimistically it's
like v9. Without hardware, we get to make that assumption :-p)
That just leaves v7 as the only architecture where format swizzles are
restricted for compression but there are no plane descriptor. Don't apply the
restriction to the newer parts.
This gets us AFBC of window surfaces on v9+. As the limiting case, fullscreen
glmark2-es2-wayland -btexture (1080p) in sway on Mali-G57 from 1300fps to
2353fps.
45% reduction in frame time is nothing to sneeze at.
Achoo.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20311>
Alyssa Rosenzweig [Wed, 14 Dec 2022 02:52:26 +0000 (21:52 -0500)]
panfrost: Introduce pan_afbc_mode
Introduce an enum to represent an AFBC compression mode. These modes are not
formats, on Valhall they are decoupled from the format. As such, it does not
make sense to use a pipe_format to represent them. Add an enum that we can use
in a straightforward way on Midgard and Bifrost to fallback for texture views,
and can map 1:1 to the Valhall hardware enum.
In addition to being less overloaded semantically, this lets -Wswitch kick in to
ensure that we handle all enums when translating. The straightforward
translation raises the following warnings:
../src/panfrost/lib/pan_cs.c:437:9: warning: enumeration value ‘PAN_AFBC_MODE_R5G5B5A1’ not handled in switch [-Wswitch]
437 | switch (panfrost_afbc_format(PAN_ARCH, format)) {
| ^~~~~~
...indicating that some formats were missed, leading to assertion fails "unknown
canonical AFBC format" when rendering RGB5A1, which dEQP-GLES31 does. Fixes
regressions in
dEQP-GLES31.functional.draw_buffers_indexed.random.max_required_draw_buffers.*
on Valhall.
Given how scarce v9 hardware is, that v10 isn't upstream yet, and the offending
code was merged a week ago, this should not have actually affected anyone. At
any rate, it's a good reminder we really do need CI for v9...
Fixes:
8e125b6c15b ("panfrost: Enable AFBC of more formats")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20311>
Alyssa Rosenzweig [Wed, 14 Dec 2022 05:11:43 +0000 (00:11 -0500)]
panfrost: Luminance-alpha AFBC unsupported on v7+
The L8_UNORM, A8_UNORM, and L8A8_UNORM v7 formats do not support AFBC,
regardless of swizzling. We're about to lift the restrictions on swizzling with
AFBC on v7, so we'll need to handle these cases explicitly to avoid using AFBC
in these cases.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20311>
Alyssa Rosenzweig [Wed, 14 Dec 2022 01:31:38 +0000 (20:31 -0500)]
panfrost: Align WSI strides for tiled AFBC
When calculating legacy WSI strides for tiled AFBC, we need to account for the
greater alignment requirement of tiled AFBC, or importing resources will fail
later.
Since tiled AFBC is only supported on v7 and later, and AFBC of window surfaces
isn't being used on Linux on v7 and later, this probably hasn't been hit in
practice. Probably.
We're about to fix AFBC of window surfaces so we need to fix this side first.
Fixes:
0255f554f39 ("panfrost: Advertise 16x16 tiled AFBC")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20311>
Alyssa Rosenzweig [Wed, 14 Dec 2022 01:08:50 +0000 (20:08 -0500)]
panfrost: Remove panfrost_blit_format
Trivial.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20311>
Alyssa Rosenzweig [Wed, 14 Dec 2022 01:06:50 +0000 (20:06 -0500)]
panfrost: Remove RGTC emulation relic
u_transfer_helper no longer emulates RGTC, so this code path is dead. RGTC
emulation now happens in the state tracker so the formats will work out
properly. (Similar to how other BCn formats are emulated in mesa/st.)
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20311>
Alyssa Rosenzweig [Wed, 14 Dec 2022 01:06:24 +0000 (20:06 -0500)]
asahi: Remove agx_blit_format
Copied from panfrost, decopy the useless.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20311>
Rhys Perry [Fri, 16 Dec 2022 15:13:54 +0000 (15:13 +0000)]
radv/ci: add yet another pipeline barrier test as flake
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/
33638274
Also add a few similar tests.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20359>
Rhys Perry [Thu, 15 Dec 2022 17:26:53 +0000 (17:26 +0000)]
radv/gfx11: enable VK_AMD_shader_explicit_vertex_parameter
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20341>
Rhys Perry [Thu, 15 Dec 2022 17:25:56 +0000 (17:25 +0000)]
ac/llvm/gfx11: implement load_input_vertex
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20341>
Rhys Perry [Thu, 15 Dec 2022 17:20:10 +0000 (17:20 +0000)]
aco/gfx11: implement load_input_vertex
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20341>
pal1000 [Sun, 9 Oct 2022 21:56:03 +0000 (00:56 +0300)]
OpenCL/draw module: Support linking with LLVM and clang 15 static libraries
Cc: mesa-stable
Closes: #7243
Closes: #7487
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19009>
Samuel Pitoiset [Wed, 7 Dec 2022 13:37:08 +0000 (14:37 +0100)]
radv: enable graphicsPipelineLibraryIndependentInterpolationDecoration
They don't need to match.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20202>
Samuel Pitoiset [Wed, 7 Dec 2022 11:10:01 +0000 (12:10 +0100)]
radv: enable graphicsPipelineLibraryFastLinking
I think fast-linking could be improved a lot but this allows to test
GPL with Zink (RADV_PERFTEST=gpl + ZINK_DEBUG=gpl).
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20202>
Samuel Pitoiset [Wed, 7 Dec 2022 13:28:48 +0000 (14:28 +0100)]
radv: import compiled binaries from libraries only when fast-linking is enabled
When VK_PIPELINE_CREATE_LINK_TIME_OPTIMIZATION_BIT_EXT is used, the
pipeline includes a complete set of state specified entirely by
libraries. That means that we should skip using compiled binaries
(including PS epilogs) and we should create an optimized pipeline.
Found this with Zink because RADV was creating two pipelines with the
same PS epilog, while the optimized one shouldn't use any PS epilog.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20202>
Rhys Perry [Thu, 15 Dec 2022 20:51:25 +0000 (20:51 +0000)]
radv/gfx11: disable mesh shaders
Even if the perftest is used, these should be disabled on GFX11. We
don't implement it yet
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: 22.3 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20358>
Rhys Perry [Thu, 15 Dec 2022 20:31:52 +0000 (20:31 +0000)]
aco/gfx11: export mrtz in discard early exit for non-color shaders
If a shader doesn't export any color targets and instead only exports
mrtz, the discard early exit block should match.
Fixes artifacts on Lara in Rise of the Tomb Raider benchmark and hair in
The Witcher 3 (classic).
https://reviews.llvm.org/D128185
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes:
bc8da20dda6 ("aco: export MRT0 instead of NULL on GFX11")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20345>
Erik Faye-Lund [Mon, 5 Dec 2022 15:16:43 +0000 (16:16 +0100)]
zink: fix line-smooth interpolation
Extending the lines by half a pixel in each direction without doing
anything about the varyings makes the varyings interpolate over a
distance than intended. While this can be negligeble for long lines,
it can lead to big error for short lines.
Let's instead add extra geometry for each of the line-caps, so we can
make sure the varyings stay constant for the whole cap, and interpolate
over the intended distance instead.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19847>
Erik Faye-Lund [Tue, 6 Dec 2022 07:54:34 +0000 (08:54 +0100)]
zink: lower smooth-lines if not supported
This implements line-smoothing the same way as the draw-module does,
except using a geometry shader instead of a CPU pass.
Ideally, this should be enabled either by checking for the various
smooth-line caps, or by a DRIconf setting.
Unfortunately, RADV doesn't support he smooth-lines features, and we
don't want to force it down a pessimistic shader-key code-path. So that
plan is out the window for now.
While DRIconf is also neat, it's a bit of work to wire up, and we don't
really know of any real-world applications who would need this yet. So,
for now, let's just unconditionally enable is on the IMG proprietary
driver, which is going to need this for sure.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19847>
Erik Faye-Lund [Wed, 16 Nov 2022 15:28:06 +0000 (16:28 +0100)]
zink: add line-smooth lowering passes
These passes implements basically the same logic as draw_pipe_aaline.c
does, but using geometry shaders instead of doing it CPU-side.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19847>
Erik Faye-Lund [Thu, 1 Dec 2022 21:17:42 +0000 (22:17 +0100)]
zink: fix line-stipple varying allocation
This was really derpy. There's two things wrong; first of all, we should
pick at LEAST VARYING_SLOT_VAR0, second, util_last_bit64 returns one
more than the index of the bit already, so we don't want to add twice
here.
Fixes:
4b17c099ca4 ("zink: add line-stippling lowering passes")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19847>
Gert Wollny [Fri, 16 Dec 2022 10:46:33 +0000 (11:46 +0100)]
r600/sfn: Check possibility of channel switching also for trans-slot
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7878
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20355>
Gert Wollny [Thu, 15 Dec 2022 14:23:48 +0000 (15:23 +0100)]
r600: don't try to serialized shaders translated from TGSI
TTN seems to have a problem encoding vec4[4] correctly, so that
serialization might fail.
Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7891
Fixes: 5b205ef (r600: Store nir shaders serialized to save memory)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20355>
David Heidelberg [Thu, 15 Dec 2022 23:36:13 +0000 (00:36 +0100)]
ci: allow omitting of --rev for ci_run_n_monitor.py
When --rev is omitted, try to get revision automatically.
Acked-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20271>
David Heidelberg [Sun, 11 Dec 2022 23:48:05 +0000 (00:48 +0100)]
ci: ci_run_n_monitor fix Unicode log parsing
Fixes issues as `...truncated \ xXX escape` while parsing the log.
Acked-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20271>
Iago Toral Quiroga [Fri, 16 Dec 2022 11:31:27 +0000 (12:31 +0100)]
v3dv: be more careful when restoring dirty state after meta operations
So far we have been only restoring dirty dynamic states used by meta
pipelines however, static state from meta pipelines will also clear
dirty flags, preventing follow-up draw calls in the command buffer
to honor these if they are flagged as dynamic states in their
pipelines. Fix this by always resetting all dirty state flags after
a meta operation so we re-emit all the state we need with the next draw
call.
Fixes:
dEQP-VK.dynamic_state.monolithic.image.clear
cc: mesa-stable
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20356>
Iago Toral Quiroga [Fri, 16 Dec 2022 09:32:15 +0000 (10:32 +0100)]
v3dv: pipeline creation feedback may not request all stages
Nothing in the spec seems to require that the number of stages for
which creation feedback is requested must match the number of stages
available in the pipeline. In fact, the spec explicitly mentions
that this number could be 0:
"If pipelineStageCreationFeedbackCount is not 0,
pPipelineStageCreationFeedbacks must be a valid pointer to an
array of pipelineStageCreationFeedbackCount
VkPipelineCreationFeedback structures"
Fixes an assert crash in:
dEQP-VK.pipeline.monolithic.creation_feedback.graphics_tests.vertex_stage_fragment_stage_no_cache_zero_out_feedback_cout
cc: mesa-stable
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20352>
Michel Dänzer [Fri, 20 Aug 2021 15:56:24 +0000 (17:56 +0200)]
egl/wayland: Prefer back buffer with minimum buffer age
This may allow applications making use of buffer age to save some effort
in some cases.
v2: (Simon Ser)
* Add space between struct member and "<" operator.
* Remove break statement which prevented the change from working as
intended in swrast_update_buffers.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18269>
Michel Dänzer [Fri, 20 Aug 2021 15:10:24 +0000 (17:10 +0200)]
loader/dri3: Simplify new buffer allocation in dri3_find_back
We can find the idle buffer with lowest buffer age or the first
unallocated slot in the same loop.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18269>
Michel Dänzer [Thu, 19 Aug 2021 13:53:06 +0000 (15:53 +0200)]
loader/dri3: Find idle buffer with minimum buffer age in dri3_find_back
This may allow applications making use of buffer age to save some effort
in some cases.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18269>
Michel Dänzer [Thu, 19 Aug 2021 14:03:03 +0000 (16:03 +0200)]
loader/dri3: Clean up dri3_find_back logic
No need to go through the loop again for allocating a new buffer.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18269>
Karol Herbst [Thu, 1 Dec 2022 15:57:22 +0000 (16:57 +0100)]
zink: lower mem_global to scalar
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20106>
Karol Herbst [Thu, 1 Dec 2022 15:55:27 +0000 (16:55 +0100)]
nir_lower_io_to_scalar: handle load/store_global
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20106>
Karol Herbst [Thu, 1 Dec 2022 15:53:49 +0000 (16:53 +0100)]
nir_lower_io_to_scalar: make use of nir_get_io_offset_src
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20106>
Iago Toral Quiroga [Thu, 15 Dec 2022 07:04:08 +0000 (08:04 +0100)]
v3dv: honor render area in subpass resolve fallback
When falling back to handling subpass resolves via separate
image resolves we were resolving the entire attachment instead
of limiting the resolve to the render area defined for the render
pass.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20331>
Iago Toral Quiroga [Wed, 14 Dec 2022 11:38:28 +0000 (12:38 +0100)]
v3dv: handle depth/stencil resolves we can't implement via TLB
If we can't use the TLB to do a subpass resolve we have a fallaback
that emits separate image resolves, but this fallback was only
handling color resolves. This adds depth/stencil as well.
Fixes some of the issues we have with CTS 1.3.4 in:
dEQP-VK.pipeline.monolithic.multisample.misc.*
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20331>
Iago Toral Quiroga [Wed, 14 Dec 2022 11:35:26 +0000 (12:35 +0100)]
v3dv: don't resolve by averaging samples on depth/stencil resolves
For these we always want to use sample_0, averaging is reserved for
color formats. We were already doing this correctly for depth/stencil
resolved in render passes, but not for those happening through
vkCmdResolveImage.
Fixes some of the issues we have with CTS 1.3.4 in:
dEQP-VK.pipeline.monolithic.multisample.misc.*
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20331>
Iago Toral Quiroga [Wed, 14 Dec 2022 09:03:38 +0000 (10:03 +0100)]
v3dv: always store/restore attachment state during meta operations
attachment state is only relevant during render passes, however,
there is a corner case: if we can't resolve an attachment in a
subpass using the hardware, we emit a manual image resolve in the
driver which can trigger a meta operation via blit. In this case,
we pretend we are not in a render pass (since vulkan disallows
blits/resolves in a render pass) but we really want to keep the
attachment state after the meta operation.
Fixes some of the issues we have with CTS 1.3.4 in:
dEQP-VK.pipeline.monolithic.multisample.misc.*
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20331>
Chad Versace [Thu, 8 Dec 2022 19:28:22 +0000 (11:28 -0800)]
anv: Use vma_heap for descriptor pool host allocation
Pre-patch, anv_descriptor_pool used a free list for host allocations
that never merged adjacent free blocks. If the pool only allocated
fixed-sized blocks, then this would not be a problem. But the pool
allocations are variable-sized, and this caused over half of the pool's
memory to be consumed by unusable free blocks in some workloads, causing
unnecessary memory footprint.
Replacing the free list with util_vma_heap, which does merge adjacent
free blocks, fixes the memory explosion in the target workload.
Disdavantges of util_vma_heap compared to the free list:
- The heap calls malloc() when a new hole is created.
- The heap calls free() when a hole disappears or is merged with an
adjacent hole.
- The Vulkan spec expects descriptor set creation/destruction to be
thread-local lockless in the common case. For workloads that
create/destroy with high frequency, malloc/free may cause overhead.
Profiling is needed.
Tested with a ChromeOS internal TensorFlow benchmark, provided by
package 'tensorflow', running with its OpenCL backend on clvk.
cmdline: benchmark_model --graph=mn2.tflite --use_gpu=true --min_secs=60
gpu: adl
memory footprint from start of benchmark:
before: init=132.691MB max=227.684MB
after: init=134.988MB max=134.988MB
Reported-by: Romaric Jodin <rjodin@google.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20289>
Chad Versace [Thu, 8 Dec 2022 21:49:43 +0000 (13:49 -0800)]
util/vma: Track size of free memory in heap
This allows users to detect fragmentation on allocation failure.
If heap allocation fails but the allocation size is not larger than the
total free size, then the allocation failed due to fragmentation.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20289>
Iván Briano [Fri, 16 Dec 2022 05:25:13 +0000 (21:25 -0800)]
Revert "anv: Refactor anv_pipeline to use the anv_pipeline_type"
This reverts commit
b1126abb38a5ff4a10c4c3240d01c22c1fb90c1b.
This breaks all hell at least on DG2, as there are several cases left
where current_pipeline gets checked against GPGPU to decide what to do,
and the value doesn't match that of ANV_HW_PIPELINE_STATE_COMPUTE.
On top of that, it also misses checking for
ANV_HW_PIPELINE_STATE_RAYTRACING.
Then there's the fact that in some cases, current_pipeline will be
UINT32_MAX, because it's the original undefined state and also used
after executing a secondary command buffer because we are not tracking
on which pipeline did the secondary left us.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7910
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20349>
Kenneth Graunke [Thu, 15 Dec 2022 00:06:45 +0000 (16:06 -0800)]
iris: Don't reject CPU access for non-invalidating buffer write maps
Buffer maps that don't invalidate their destination range work better
as direct CPU maps than staging blits. The application may write only
part of the range, effectively combining the new data with existing
data. So even if the map would stall, the staging blit path won't help
us, as we have to read the existing data to populate the staging buffer
before returning it. This incurs a stall anyway - plus a read and copy.
In contrast, a direct map doesn't need to read any data - it can just
write the destination and the existing data will still be there.
Fixes excessive blits for stalling buffer writes that don't invalidate
the buffer since my recent map heuristic rework.
Fixes:
bec68a85a2d ("iris: Improve direct CPU map heuristics")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7895
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20330>
Tapani Pälli [Thu, 15 Dec 2022 18:28:21 +0000 (20:28 +0200)]
anv: remove some gen8 specifics handled now in hasvk
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20342>
David Heidelberg [Tue, 13 Dec 2022 14:39:33 +0000 (15:39 +0100)]
ci: restore reliable Alpine 3.16
Alpine 3.17 suffered random freezes.
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20294>
Nanley Chery [Wed, 14 Dec 2022 00:30:01 +0000 (16:30 -0800)]
iris: Check for zero in clear color compatibility fn
Both formats may interpret the clear color as zero.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20320>
Sil Vilerino [Thu, 15 Dec 2022 17:24:17 +0000 (12:24 -0500)]
d3d12: Add ASSERTED to variables only used in debug builds to fix build MSVC with C4189 errors
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20340>
Jordan Justen [Thu, 1 Dec 2022 20:25:17 +0000 (15:25 -0500)]
intel/isl: Disable CCS on MTL until B0 (Wa_14017353530)
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20322>
Jianxun Zhang [Tue, 11 Oct 2022 17:34:39 +0000 (10:34 -0700)]
intel/dev: Enable AUX map on MTL
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20322>
Jordan Justen [Tue, 13 Dec 2022 22:07:02 +0000 (17:07 -0500)]
intel/aux_map: Ignore format bits when using tile-4
Based on Jianxun's ("iris: don't get format bits in AUX tables").
With gfx12.5+, the compression format is once again coming from the
surface state programming. MTL once again uses an aux-map, but it
ignores the format bits within the the aux-map metadata.
Ref: Bspec 44930: "Compression format from AUX page walk is ignored.
Instead compression format from Surface State is used."
gfx12.5+ also uses tile-4 rather than y-tiling, so if we don't see
y-tiling, we can return 0 from intel_aux_map_format_bits() for the
ignored format bits.
Rework:
* Just return 0 if not using y-tiling as suggested by Nanley.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20322>
Jordan Justen [Tue, 8 Feb 2022 00:34:53 +0000 (16:34 -0800)]
iris/resource: Check devinfo::has_local_mem before using BO_ALLOC_LMEM
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20322>
José Roberto de Souza [Thu, 10 Nov 2022 20:46:37 +0000 (12:46 -0800)]
iris: Nuke dead IRIS_CONTEXT* macros
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19650>
José Roberto de Souza [Tue, 11 Oct 2022 20:08:20 +0000 (13:08 -0700)]
iris: Nuke flags from iris_bufmgr that can read from devinfo
Now that devinfo is stored in iris_bufmgr we can nuke this duplicated
flags.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19650>
José Roberto de Souza [Fri, 14 Oct 2022 19:23:12 +0000 (12:23 -0700)]
iris: Only fetch intel_device_info once per bufmgr
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19650>
José Roberto de Souza [Tue, 11 Oct 2022 20:37:29 +0000 (13:37 -0700)]
iris: Store intel_device_info in iris_bufmgr
We can have multiple pipe_screen but only one iris_bufmgr per device.
So better to store intel_device_info into the shared iris_bufmgr and
save some memory.
Also in future patches iris_bufmgr will make more use of
intel_device_info.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19650>
Lionel Landwerlin [Thu, 15 Dec 2022 12:18:38 +0000 (14:18 +0200)]
anv: fixup another dirty issue with gpu_memcpy
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20335>
Patrick Lerda [Thu, 15 Dec 2022 10:39:03 +0000 (11:39 +0100)]
panfrost: fix memory leak related to disk cache
Direct leak of 3912 byte(s) in 2 object(s) allocated from:
#0 0x7fbd4641b0 in __interceptor_malloc (/usr/lib64/libasan.so.6+0xa41b0)
#1 0x7f74413518 in parse_and_validate_cache_item ../src/util/disk_cache_os.c:549
#2 0x7f74414b84 in disk_cache_load_item ../src/util/disk_cache_os.c:599
#3 0x7f74410364 in disk_cache_get ../src/util/disk_cache.c:551
#4 0x7f775695ac in panfrost_disk_cache_retrieve ../src/gallium/drivers/panfrost/pan_disk_cache.c:125
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20336>
Rohan Garg [Wed, 20 Apr 2022 13:29:30 +0000 (15:29 +0200)]
anv: Refactor anv_pipeline to use the anv_pipeline_type
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20316>
Konstantin Seurer [Tue, 6 Dec 2022 16:26:36 +0000 (17:26 +0100)]
radv/rra: Fix leaf node id order
Leaf nodes aren't stored in build order so we have to account for that
when dumping leaf node ids.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20184>
Konstantin Seurer [Fri, 9 Dec 2022 07:49:18 +0000 (08:49 +0100)]
radv/rra: Validate geometry_id
The following patch will use geometry_id so make sure that it's in
bounds.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20184>
Konstantin Seurer [Tue, 6 Dec 2022 16:08:46 +0000 (17:08 +0100)]
radv/rra: Refactor resource management during dumping
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20184>
Konstantin Seurer [Tue, 6 Dec 2022 15:38:10 +0000 (16:38 +0100)]
radv/rra: Emit leaf node ids for leaf nodes instead of internal nodes
Fixes: e4283d8 ("radv/rra: Handle box16 nodes")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20184>
Samuel Pitoiset [Thu, 15 Dec 2022 14:34:35 +0000 (15:34 +0100)]
ac/sqtt: bump the maximum number of traces to 6 for GFX11
GFX11 can have more than 4 SEs. I think it would be better to allocate
an array but that's for later.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20337>
Samuel Pitoiset [Thu, 15 Dec 2022 09:33:30 +0000 (10:33 +0100)]
ac/rgp: add missing GFX11 bits for RGP
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20337>
Rhys Perry [Wed, 14 Dec 2022 17:52:07 +0000 (17:52 +0000)]
ac/nir: remove num_es_threads_var
A bit count of es_accepted works for both when ngg is and isn't
dynamically enabled. Unlike the other sequence, this should only be a
single SALU instruction.
fossil-db (gfx1100, nggc):
Totals from 41388 (30.75% of 134574) affected shaders:
Instrs:
25783544 ->
25432959 (-1.36%); split: -1.36%, +0.00%
CodeSize:
127281160 ->
125878820 (-1.10%); split: -1.10%, +0.00%
Latency:
92849566 ->
92723047 (-0.14%); split: -0.14%, +0.00%
InvThroughput: 9542194 -> 9485012 (-0.60%); split: -0.60%, +0.00%
Copies: 2031074 -> 1928796 (-5.04%); split: -5.04%, +0.00%
Branches: 642407 -> 642409 (+0.00%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20321>
Rhys Perry [Wed, 14 Dec 2022 17:50:24 +0000 (17:50 +0000)]
ac/nir: fix ngg culling on gfx11
This subtraction can underflow.
If subgroup_id*wave_size is larger than num_live_vertices_in_workgroup,
num_es_threads_var should be zero.
fossil-db (gfx1100, nggc):
Totals from 41388 (30.75% of 134574) affected shaders:
Instrs:
25700772 ->
25783544 (+0.32%)
CodeSize:
126950072 ->
127281160 (+0.26%)
Latency:
92809233 ->
92849566 (+0.04%); split: -0.00%, +0.04%
InvThroughput: 9526675 -> 9542194 (+0.16%)
Copies: 2031078 -> 2031074 (-0.00%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20321>
Eric Engestrom [Wed, 14 Dec 2022 11:36:51 +0000 (11:36 +0000)]
vc4: replace open-coded F_DUPFD_CLOEXEC with os_dupfd_cloexec()
Just like 12 lines above.
Split out of !20180
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20313>
Jordan Justen [Fri, 9 Dec 2022 00:31:20 +0000 (16:31 -0800)]
intel/common/intel_genX_state.h: Add intel_set_ps_dispatch_state()
This replaces brw_fs_get_dispatch_enables(), which was added in
b9403b1c477 ("intel: factor out dispatch PS enabling logic"), but this
function will not work well for future changes to 3DSTATE_PS.
So, instead, this moves the related code into a "genX" file which can
directly update 3DSTATE_PS for the given platform.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20329>
Jordan Justen [Thu, 3 Nov 2022 20:55:44 +0000 (13:55 -0700)]
intel/common: Add intel_genX_state.h
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20329>
Samuel Pitoiset [Fri, 21 Oct 2022 01:31:27 +0000 (01:31 +0000)]
radv/ci: add lists for GFX1100
0 failures, call it a win (the RT ones are CTS bugs).
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20315>
Kenneth Graunke [Tue, 13 Dec 2022 03:55:10 +0000 (19:55 -0800)]
st/mesa: Enable Alpha writes when writing RGB faked as RGBA
Some GPUs are able to render more efficiently when all channels of a
color attachment are written, since whole pixels are being overwritten,
rather than hitting a read-modify-write cycle where newly written data
has to be combined with existing unmodified image data.
When faking GL_RGB as RGBA (in case RGB/RGBX isn't color renderable),
we introduce an extra channel that doesn't exist from the application
point of view. With such a format, a color mask of 0x7 (RGB) would mean
to write all channels. But because we've added an alpha channel behind
their back, this becomes a partial write. We are free to write whatever
garbage we want to the alpha channel, however. So we can enable alpha
writes, making this a more efficient full pixel write again.
This is done unconditionally as it's expected to address a problem
common to many drivers and isn't expected to be harmful, even on GPUs
where it may not help much.
Improves WebGL Aquarium performance on Alderlake GT1 by around 2.4x, in
the Chromium, using Wayland (the --enable-features=UseOzonePlatform and
--ozone-platform=wayland flags).
v2: Don't require PIPE_CAP_RGB_OVERRIDE_DST_ALPHA_BLEND (Marek)
v3: Fix independent blending enables (Emma) - now set when needed,
skipped when not needed, and PIPE_CAP_INDEP_BLEND_ENABLE is no
longer a requirement. We just optimize where we can.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7864
Reviewed-by: Matt Turner <mattst88@gmail.com> [v1]
Reviewed-by: Marek Olšák <marek.olsak@amd.com> [v2]
Reviewed-by: Emma Anholt <emma@anholt.net> [v3]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20290>
Eric Engestrom [Wed, 14 Dec 2022 22:38:44 +0000 (22:38 +0000)]
docs: update calendar and link releases notes for 22.3.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20328>
Eric Engestrom [Wed, 14 Dec 2022 21:05:30 +0000 (21:05 +0000)]
docs: add release notes for 22.3.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20328>
Alyssa Rosenzweig [Wed, 30 Nov 2022 22:08:14 +0000 (17:08 -0500)]
panfrost: Add tool to print supported texture formats
While all Panfrost-supported Mali GPUs support all the compressed texture
formats architecturally, the system integrator decides which formats will
actually be wired up in the production system-on-chip. In the past there may
have been legal considerations, I'm neither a lawyer nor a system integrator so
couldn't say.
It's useful for users to know which compressed texture formats are supported by
their hardware, to understand its performance characteristics (and perhaps to
buy systems that support their needs, especially if they need BCn formats which
are omitted in many Mali implementations).
To help with that, this commit adds a small standalone tool that prints which
formats are supported. It is tested so far on Mali-T860 and Mali-G57.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Tested-by: Chris Healy <healych@amazon.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20086>