Louis Dionne [Wed, 10 Apr 2019 19:35:42 +0000 (19:35 +0000)]
[pstl] Add missing forward declarations for equal
We added the 4-iterator variants of std::equal in r357613, but we
forgot to add the corresponding forward declarations.
llvm-svn: 358129
David Green [Wed, 10 Apr 2019 19:18:58 +0000 (19:18 +0000)]
[ARM] Add an extra test for constant hoist. NFC
llvm-svn: 358128
Saleem Abdulrasool [Wed, 10 Apr 2019 19:16:14 +0000 (19:16 +0000)]
clangd-fuzzer: repair the build
The inclusion of private headers of clangd percolates into the fuzzer.
llvm-svn: 358127
Alexey Bataev [Wed, 10 Apr 2019 19:11:33 +0000 (19:11 +0000)]
[OPENMP]Improve detection of number of teams, threads in target
regions.
Added more complex analysis for number of teams and number of threads in
the target regions, also merged related common code between CGOpenMPRuntime
and CGOpenMPRuntimeNVPTX classes.
llvm-svn: 358126
John McCall [Wed, 10 Apr 2019 19:11:32 +0000 (19:11 +0000)]
Fix for different build configurations.
llvm-svn: 358125
Craig Topper [Wed, 10 Apr 2019 19:09:06 +0000 (19:09 +0000)]
[X86] Add test case for LEA formation regression seen with D60358. NFC
If we have an (add X, (and (aext (shl Y, C1)), C2)), we can pull the shift through and+aext to fold into an LEA with the.
Assuming C1 is small enough and C2 masks off all of the extend bits.
This pattern showed up in D60358. And we need to handle it to prevent a regression.
llvm-svn: 358124
Craig Topper [Wed, 10 Apr 2019 19:08:59 +0000 (19:08 +0000)]
[X86] Replace some if statements in isel address matching that should never be true with asserts. And move them earlier before we looked through operands that don't change size. NFC
These ifs were ensuring we don't have to handle types larger than 64 bits probably because we use getZExtValue in several places below them.
None of the callers of this code pass types larger than 64-bits so we can just assert instead of branching in release code.
I've also moved them earlier since we're just looking through operations that don't effect bit width.
This is prep work for some refactoring I plan to do to the (and (shl)) handling code.
llvm-svn: 358123
Nick Desaulniers [Wed, 10 Apr 2019 19:01:44 +0000 (19:01 +0000)]
[X86AsmPrinter] refactor to limit use of Modifier. NFC
Summary:
The Modifier memory operands is used in 2 cases of memory references
(H & P ExtraCodes). Rather than pass around the likely nullptr Modifier,
refactor the handling of the Modifier out from printOperand().
The refactorings in this patch:
- Don't forward declare printOperand, move its definition up.
- The diff makes it look like there's a change to printPCRelImm
(narrator: there's not).
- Create printModifiedOperand()
- Move logic for Modifier to there from printOperand
- Use printModifiedOperand in 3 call sites that actually create
Modifiers.
- Remove now unused Modifier parameter from printOperand
- Remove default parameter from printLeaMemReference as it only has 1
call site that explicitly passes a parameter.
- Remove default parameter from printMemReference, make call lone call
site explicitly pass nullptr.
- Drop Modifier parameter from printIntelMemReference, as Intel style
memory references don't support the Modifiers in question.
This will allow future changes to printOperand() to make it a pure virtual
method on the base AsmPrinter class, allowing for more generic handling
of some architecture generic constraints. X86AsmPrinter was the only
derived class of AsmPrinter to have additional parameters on its
printOperand function.
Reviewers: craig.topper, echristo
Reviewed By: echristo
Subscribers: hiraditya, llvm-commits, srhines
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60526
llvm-svn: 358122
Louis Dionne [Wed, 10 Apr 2019 18:52:24 +0000 (18:52 +0000)]
Fix header inclusion order failures
Summary: See https://bugs.llvm.org/show_bug.cgi?id=41432
Subscribers: libcxx-commits
Tags: #libc
Differential Revision: https://reviews.llvm.org/D60525
llvm-svn: 358121
Ali Tamur [Wed, 10 Apr 2019 18:30:03 +0000 (18:30 +0000)]
[llvm] Non-functional change: declared a local variable as const.
llvm-svn: 358120
Zachary Turner [Wed, 10 Apr 2019 18:26:51 +0000 (18:26 +0000)]
[PDB Docs] Start documenting CodeView Type Records.
This puts the general layout of the document in place and fully
describes 1 simple type record. Followups will fill out more
pieces.
llvm-svn: 358119
Roman Lebedev [Wed, 10 Apr 2019 18:26:42 +0000 (18:26 +0000)]
[X86] X86ScheduleBdVer2: use !listsplat operator to cleanup loadres calculation
The problem is that one can't concatenate an empty list
(implied all-ones) with non-empty list here. The result
will be the non-empty list, and it won't match the length
of the ExePorts list.
The problems begin when LoadRes != 1 here,
which is the case in PdWriteResYMMPair,
and more importantly i think it will be the case for PdWriteResExPair.
llvm-svn: 358118
Roman Lebedev [Wed, 10 Apr 2019 18:26:36 +0000 (18:26 +0000)]
[TableGen] Introduce !listsplat 'binary' operator
Summary:
```
``!listsplat(a, size)``
A list value that contains the value ``a`` ``size`` times.
Example: ``!listsplat(0, 2)`` results in ``[0, 0]``.
```
I plan to use this in X86ScheduleBdVer2.td for LoadRes handling.
This is a little bit controversial because unlike every other binary operator
the types aren't identical.
Reviewers: stoklund, javed.absar, nhaehnle, craig.topper
Reviewed By: javed.absar
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60367
llvm-svn: 358117
Roman Lebedev [Wed, 10 Apr 2019 18:26:23 +0000 (18:26 +0000)]
[kate] Add '!mul' operator that was introduced in D58775
llvm-svn: 358116
John McCall [Wed, 10 Apr 2019 18:07:18 +0000 (18:07 +0000)]
Fix an off-by-one mistake in IRGen's copy-construction
special cases in the presence of zero-length arrays.
Patch by Joran Bigalet!
llvm-svn: 358115
David Green [Wed, 10 Apr 2019 18:05:57 +0000 (18:05 +0000)]
[ARM] Add an extra constant hoisting test. NFC
This adds a simple extra test for constant hoisting to show it's
usefulness with constant addresses like those seen in memory
mapped registers in embedded systems.
llvm-svn: 358114
David Green [Wed, 10 Apr 2019 18:00:41 +0000 (18:00 +0000)]
Revert rL357745: [SelectionDAG] Compute known bits of CopyFromReg
Certain optimisations from ConstantHoisting and CGP rely on Selection DAG not
seeing through to the constant in other blocks. Revert this patch while we come
up with a better way to handle that.
I will try to follow this up with some better tests.
llvm-svn: 358113
Nico Weber [Wed, 10 Apr 2019 17:31:34 +0000 (17:31 +0000)]
llvm-undname: Fix another crash-on-invalid
This fixes a regression from https://reviews.llvm.org/D60354. We used to
SymbolNode *Symbol = demangleEncodedSymbol(MangledName, QN);
if (Symbol) {
Symbol->Name = QN;
}
but changed that to
SymbolNode *Symbol = demangleEncodedSymbol(MangledName, QN);
if (Error)
return nullptr;
Symbol->Name = QN;
and one branch somewhere returned a nullptr without setting Error.
Looking at the code changed in r340083 and r340710 that branch looks
like a remnant from an earlier attempt to demangle RTTI descriptors
that has since been rewritten -- so just remove this branch. It
shouldn't change behavior for correctly mangled symbols.
llvm-svn: 358112
Matt Arsenault [Wed, 10 Apr 2019 17:27:56 +0000 (17:27 +0000)]
GlobalISel: Move computeValueLLTs
Call lowering should use this directly instead of going through the
EVT version, but more work is needed to deal with this (mostly the
passing of the IR type pointer instead of the relevant properties in
ArgInfo).
llvm-svn: 358111
Matt Arsenault [Wed, 10 Apr 2019 17:27:55 +0000 (17:27 +0000)]
GlobalISel: Fix invoke lowering creating invalid type registers
Unlike the call handling, this wasn't checking for void results and
creating a register with the invalid LLT
llvm-svn: 358110
Matt Arsenault [Wed, 10 Apr 2019 17:27:53 +0000 (17:27 +0000)]
GlobalISel: Support legalizing G_CONSTANT with irregular breakdown
llvm-svn: 358109
Craig Topper [Wed, 10 Apr 2019 17:27:29 +0000 (17:27 +0000)]
[AArch64] Teach getTestBitOperand to look through ANY_EXTENDS
This patch teach getTestBitOperand to look through ANY_EXTENDs when the extended bits aren't used. The test case changed here is based what D60358 did to test16 in tbz-tbnz.ll. So this patch will avoid that regression.
Differential Revision: https://reviews.llvm.org/D60482
llvm-svn: 358108
Saleem Abdulrasool [Wed, 10 Apr 2019 17:25:14 +0000 (17:25 +0000)]
build: add binary dir to the unittests
Missed part of the change to make clangd build on Darwin. Fixes the build after
SVN r358103.
llvm-svn: 358107
Louis Dionne [Wed, 10 Apr 2019 17:12:06 +0000 (17:12 +0000)]
[libc++abi] Create a macro for the 32 bit guard setting on ARM platforms
Summary:
The goal is to use a descriptive name for this feature, instead of just
using __arm__.
Reviewers: EricWF
Subscribers: javed.absar, kristof.beyls, christof, jkorous, dexonsmith, libcxx-commits
Tags: #libc
Differential Revision: https://reviews.llvm.org/D60520
llvm-svn: 358106
Matt Arsenault [Wed, 10 Apr 2019 17:07:56 +0000 (17:07 +0000)]
GlobalISel: Handle odd breakdowns for bit ops
llvm-svn: 358105
John McCall [Wed, 10 Apr 2019 17:03:09 +0000 (17:03 +0000)]
Don't emit an unreachable return block.
Patch by Brad Moody.
llvm-svn: 358104
Saleem Abdulrasool [Wed, 10 Apr 2019 16:48:52 +0000 (16:48 +0000)]
clangd: fix the build with XPC
`Transport.h` does not include `Features.inc`. However, since it is used in a
subdirectory, it cannot directly include the header as it is not available.
Include `Features.inc` in `ClangdLSPServer.h` prior to the inclusion of
`Transport.h` which will provide the interfaces in `ClangdMain.cpp` where the
symbol `newXPCTransport` will not be defined due to it being preprocessed away
since the configuration is not passed along to the initial inclusion.
llvm-svn: 358103
Nick Desaulniers [Wed, 10 Apr 2019 16:38:44 +0000 (16:38 +0000)]
add FIXME: as per echristo
llvm-svn: 358102
Nick Desaulniers [Wed, 10 Apr 2019 16:38:43 +0000 (16:38 +0000)]
[AsmPrinter] refactor to remove remove AsmVariant. NFC
Summary:
The InlineAsm::AsmDialect is only required for X86; no architecture
makes use of it and as such it gets passed around between arch-specific
and general code while being unused for all architectures but X86.
Since the AsmDialect is queried from a MachineInstr, which we also pass
around, remove the additional AsmDialect parameter and query for it deep
in the X86AsmPrinter only when needed/as late as possible.
This refactor should help later planned refactors to AsmPrinter, as this
difference in the X86AsmPrinter makes it harder to make AsmPrinter more
generic.
Reviewers: craig.topper
Subscribers: jholewinski, arsenm, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, nhaehnle, javed.absar, sbc100, jgravelle-google, eraman, hiraditya, aheejin, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, llvm-commits, peter.smith, srhines
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60488
llvm-svn: 358101
Nikita Popov [Wed, 10 Apr 2019 16:32:15 +0000 (16:32 +0000)]
[InstCombine] Handle ssubo always overflow
Following D60483 and D60497, this adds support for AlwaysOverflows
handling for ssubo. This is the last case we can handle right now.
Differential Revision: https://reviews.llvm.org/D60518
llvm-svn: 358100
Nikita Popov [Wed, 10 Apr 2019 16:27:36 +0000 (16:27 +0000)]
[InstCombine] ssubo X, C -> saddo X, -C
ssubo X, C is equivalent to saddo X, -C. Make the transformation in
InstCombine and allow the logic implemented for saddo to fold prior
usages of add nsw or sub nsw with constants.
Patch by Dan Robertson.
Differential Revision: https://reviews.llvm.org/D60061
llvm-svn: 358099
Sam McCall [Wed, 10 Apr 2019 16:26:58 +0000 (16:26 +0000)]
[clangd] Fix non-indexing of builtin functions like printf when the TU is C
llvm-svn: 358098
Sander de Smalen [Wed, 10 Apr 2019 16:24:48 +0000 (16:24 +0000)]
Improve compile-time performance in computeKnownBitsFromAssume.
This patch changes the order of pattern matching by first testing
a compare instruction's predicate, before doing the pattern
match for the whole expression tree.
Patch by Paul Walker.
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D60504
llvm-svn: 358097
Simon Pilgrim [Wed, 10 Apr 2019 16:24:47 +0000 (16:24 +0000)]
[X86][AVX] getTargetConstantBitsFromNode - extract bits from X86ISD::SUBV_BROADCAST
llvm-svn: 358096
Nikita Popov [Wed, 10 Apr 2019 16:18:01 +0000 (16:18 +0000)]
[InstCombine] Handle saddo always overflow
Followup to D60483: Handle AlwaysOverflow conditions for saddo as
well.
Differential Revision: https://reviews.llvm.org/D60497
llvm-svn: 358095
Fangrui Song [Wed, 10 Apr 2019 15:45:54 +0000 (15:45 +0000)]
[clangd] Use #if CLANGD_BUILD_XPC because it may be defined as 0
llvm-svn: 358094
Saleem Abdulrasool [Wed, 10 Apr 2019 15:45:05 +0000 (15:45 +0000)]
clangd: repair the build after SVN r358091
Fix the name of the variable being checked. NFCI.
llvm-svn: 358093
Alexander Kornienko [Wed, 10 Apr 2019 15:42:53 +0000 (15:42 +0000)]
Fix a typo
llvm-svn: 358092
Sam McCall [Wed, 10 Apr 2019 15:16:54 +0000 (15:16 +0000)]
[clangd] Don't insert extra namespace qualifiers when Sema gets lost.
Summary:
There are cases where Sema can't tell that "foo" in foo::Bar is a
namespace qualifier, like in incomplete macro expansions.
After this patch, if sema reports no specifier but it looks like there's one in
the source code, then we take it into account.
Reworked structure and comments in getQueryScopes to try to fight
creeping complexity - unsure if I succeeded.
I made the test harder (the original version also passes).
Reviewers: ioeric
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D60503
llvm-svn: 358091
Sam Clegg [Wed, 10 Apr 2019 15:06:17 +0000 (15:06 +0000)]
[WebAssembly] Assign GOT entries symbols used in data relocations
Differential Revision: https://reviews.llvm.org/D60492
llvm-svn: 358090
Fangrui Song [Wed, 10 Apr 2019 14:52:37 +0000 (14:52 +0000)]
[MachineOutliner] Replace ostringstream based string concatenation with Twine
This makes my libLLVMCodeGen.so.9svn 4936 bytes smaller.
While here, delete unused #include <map>
llvm-svn: 358089
Jonas Devlieghere [Wed, 10 Apr 2019 14:30:00 +0000 (14:30 +0000)]
[testsuite] Split Obj-C foundation test
TestObjCMethods2.py was the third-longest running test on Darwin. By
splitting it up, lit can exploit parallelism to reduce the total wall
clock time.
llvm-svn: 358088
Hans Wennborg [Wed, 10 Apr 2019 14:27:47 +0000 (14:27 +0000)]
clang-cl: Fix parsing of the /F option (PR41405)
llvm-svn: 358087
Robert Widmann [Wed, 10 Apr 2019 14:19:05 +0000 (14:19 +0000)]
[LLVM-C] Correct The Current Debug Location Accessors (Again)
Summary: Resubmitting D60484 with the conflicting Go bindings renamed to avoid collisions.
Reviewers: whitequark, deadalnix
Subscribers: hiraditya, llvm-commits, sammccall
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60511
llvm-svn: 358086
Diogo N. Sampaio [Wed, 10 Apr 2019 13:34:18 +0000 (13:34 +0000)]
[AArch64] Add lowering pattern for scalar fp16 facge and facgt
Summary: The fp16 scalar version of facge and facgt requires a custom patter matching, as the result type is not the same width of the operands.
Reviewers: olista01, javed.absar, pbarrio
Reviewed By: javed.absar
Subscribers: kristof.beyls, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60212
llvm-svn: 358083
Sam McCall [Wed, 10 Apr 2019 13:29:37 +0000 (13:29 +0000)]
Revert "[LLVM-C] Correct The Current Debug Location Accessors"
This reverts commit r358039, which added symbols that conflict with the
Go bindings.
llvm-svn: 358082
Diogo N. Sampaio [Wed, 10 Apr 2019 13:28:06 +0000 (13:28 +0000)]
[ARM] [FIX] Add missing f16 vector operations lowering
Summary:
Add missing <8xhalf> shufflevectors pattern, when using concat_vector dag node.
As well, allows <8xhalf> and <4xhalf> vldup1 operations.
These instructions are required for v8.2a fp16 lowering of vmul_n_f16, vmulq_n_f16 and vmulq_lane_f16 intrinsics.
Reviewers: olista01, pbarrio, LukeGeeson, efriedma
Reviewed By: efriedma
Subscribers: efriedma, javed.absar, kristof.beyls, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60319
llvm-svn: 358081
Clement Courbet [Wed, 10 Apr 2019 13:18:05 +0000 (13:18 +0000)]
[NFC] Fix unused variable warning.
llvm-svn: 358080
Roman Lebedev [Wed, 10 Apr 2019 12:47:47 +0000 (12:47 +0000)]
[llvm-exegesis] Pacify bots - don't std::move() - prevents copy elision
llvm-svn: 358079
Xing GUO [Wed, 10 Apr 2019 12:47:21 +0000 (12:47 +0000)]
[llvm-readobj] Should declare `ListScope` for `verneed` entries.
Summary: YAML mappings require keys to be unique. See: https://yaml.org/spec/1.2/spec.html#id2764652
Reviewers: jhenderson, grimar, rupprecht, espindola, ruiu
Reviewed By: ruiu
Subscribers: ruiu, emaste, arichardson, MaskRay, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60438
llvm-svn: 358078
Roman Lebedev [Wed, 10 Apr 2019 12:20:14 +0000 (12:20 +0000)]
[llvm-exegesis] YamlContext: fix some missing spaces/quotes/newlines in error strings
llvm-svn: 358077
Roman Lebedev [Wed, 10 Apr 2019 12:19:57 +0000 (12:19 +0000)]
[llvm-exegesis] Fix error propagation from yaml writing (from serialization)
Investigating https://bugs.llvm.org/show_bug.cgi?id=41448
llvm-svn: 358076
Sam McCall [Wed, 10 Apr 2019 12:15:35 +0000 (12:15 +0000)]
[clangd] Add -header-insertion=never flag to disable include insertion in code completion
Summary: One clear use case: use with an editor that reacts poorly to edits above the cursor.
Reviewers: ioeric
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D60409
llvm-svn: 358075
Sam McCall [Wed, 10 Apr 2019 11:50:40 +0000 (11:50 +0000)]
[clangd] Refactor speculateCompletionFilter and also extract scope.
Summary:
Intent is to use the heuristically-parsed scope in cases where we get bogus
results from sema, such as in complex macro expansions.
Added a motivating testcase we currently get wrong.
Name changed because we (already) use this for things other than speculation.
Reviewers: ioeric
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D60500
llvm-svn: 358074
David Stenberg [Wed, 10 Apr 2019 11:28:28 +0000 (11:28 +0000)]
[DebugInfo] Track multiple registers in DbgEntityHistoryCalculator
Summary:
When calculating the debug value history, DbgEntityHistoryCalculator
would only keep track of register clobbering for the latest debug value
per inlined entity. This meant that preceding register-described debug
value fragments would live on until the next overlapping debug value,
ignoring any potential clobbering. This patch amends
DbgEntityHistoryCalculator so that it keeps track of all registers that
a inlined entity's currently live debug values are described by.
The DebugInfo/COFF/pieces.ll test case has had to be changed since
previously a register-described fragment would incorrectly outlive its
basic block.
The parent patch D59941 is expected to increase the coverage slightly,
as it makes sure that location list entries are inserted after clobbered
fragments, and this patch is expected to decrease it, as it stops
preceding register-described from living longer than they should. All in
all, this patch and the preceding patch has a negligible effect on the
output from `llvm-dwarfdump -statistics' for a clang-3.4 binary built
using the RelWithDebInfo build profile. "Scope bytes covered" increases
by 0.5%, and "variables with location" increases from 2212083 to
2212088, but it should improve the accuracy quite a bit.
This fixes PR40283.
Reviewers: aprantl, probinson, dblaikie, rnk, bjope
Reviewed By: aprantl
Subscribers: llvm-commits
Tags: #debug-info, #llvm
Differential Revision: https://reviews.llvm.org/D59942
llvm-svn: 358073
David Stenberg [Wed, 10 Apr 2019 11:28:20 +0000 (11:28 +0000)]
[DebugInfo] Improve handling of clobbered fragments
Summary:
Currently the DbgValueHistorymap only keeps track of clobbered registers
for the last debug value that it has encountered. This could lead to
preceding register-described debug values living on longer in the
location lists than they should. See PR40283 for an example. This
patch does not introduce tracking of multiple registers, but changes
the DbgValueHistoryMap structure to allow for that in a follow-up
patch. This patch is not NFC, as it at least fixes two bugs in
DwarfDebug (both are covered in the new clobbered-fragments.mir test):
* If a debug value was clobbered (its End pointer set), the value would
still be added to OpenRanges, meaning that the succeeding location list
entries could potentially contain stale values.
* If a debug value was clobbered, and there were non-overlapping
fragments that were still live after the clobbering, DwarfDebug would
not create a location list entry starting directly after the
clobbering instruction. This meant that the location list could have
a gap until the next debug value for the variable was encountered.
Before this patch, the history map was represented by <Begin, End>
pairs, where a new pair was created for each new debug value. When
dealing with partially overlapping register-described debug values, such
as in the following example:
DBG_VALUE $reg2, $noreg, !1, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
[...]
DBG_VALUE $reg3, $noreg, !1, !DIExpression(DW_OP_LLVM_fragment, 64, 32)
[...]
$reg2 = insn1
[...]
$reg3 = insn2
the history map would then contain the entries `[<DV1, insn1>, [<DV2, insn2>]`.
This would leave it up to the users of the map to be aware of
the relative order of the instructions, which e.g. could make
DwarfDebug::buildLocationList() needlessly complex. Instead, this patch
makes the history map structure monotonically increasing by dropping the
End pointer, and replacing that with explicit clobbering entries in the
vector. Each debug value has an "end index", which if set, points to the
entry in the vector that ends the debug value. The ending entry can
either be an overlapping debug value, or an instruction which clobbers
the register that the debug value is described by. The ending entry's
instruction can thus either be excluded or included in the debug value's
range. If the end index is not set, the debug value that the entry
introduces is valid until the end of the function.
Changes to test cases:
* DebugInfo/X86/pieces-3.ll: The range of the first DBG_VALUE, which
describes that the fragment (0, 64) is located in RDI, was
incorrectly ended by the clobbering of RAX, which the second
(non-overlapping) DBG_VALUE was described by. With this patch we
get a second entry that only describes RDI after that clobbering.
* DebugInfo/ARM/partial-subreg.ll: This test seems to indiciate a bug
in LiveDebugValues that is caused by it not being aware of fragments.
I have added some comments in the test case about that. Also, before
this patch DwarfDebug would incorrectly include a register-described
debug value from a preceding block in a location list entry.
Reviewers: aprantl, probinson, dblaikie, rnk, bjope
Reviewed By: aprantl
Subscribers: javed.absar, kristof.beyls, jdoerfert, llvm-commits
Tags: #debug-info, #llvm
Differential Revision: https://reviews.llvm.org/D59941
llvm-svn: 358072
Simon Pilgrim [Wed, 10 Apr 2019 11:09:58 +0000 (11:09 +0000)]
[TargetLowering] Move shouldFoldShiftPairToMask next to preferShiftsToClearExtremeBits. NFCI.
As discussed on PR41359, we're probably going to keep both of these but we need to make it more explicit how they complement each other.
llvm-svn: 358071
Pavel Labath [Wed, 10 Apr 2019 11:07:28 +0000 (11:07 +0000)]
Minidump: Use llvm parser for reading the ModuleList stream
In this patch, I just remove the structure definitions for the
ModuleList stream and the associated parsing code. The rest of the code
is converted to work with the definitions in llvm. NFC.
llvm-svn: 358070
Rui Ueyama [Wed, 10 Apr 2019 10:37:10 +0000 (10:37 +0000)]
Discard debuginfo for object files empty after GC
Patch by Robert O'Callahan.
Rust projects tend to link in all object files from all dependent
libraries and rely on --gc-sections to strip unused code and data.
Unfortunately --gc-sections doesn't currently strip any debuginfo
associated with GC'ed sections, so lld links in the full debuginfo from
all dependencies even if almost all that code has been discarded. See
https://github.com/rust-lang/rust/issues/56068 for some details.
Properly stripping debuginfo for discarded sections would be difficult,
but a simple approach that helps significantly is to mark debuginfo
sections as live only if their associated object file has at least one
live code/data section. This patch does that. In a (contrived but not
totally artificial) Rust testcase linked above, it reduces the final
binary size from 46MB to 5.1MB.
Differential Revision: https://reviews.llvm.org/D54747
llvm-svn: 358069
Fangrui Song [Wed, 10 Apr 2019 10:35:10 +0000 (10:35 +0000)]
[AsmPrinter] Delete unused RangeSpanList::addRange
llvm-svn: 358068
Fangrui Song [Wed, 10 Apr 2019 10:30:22 +0000 (10:30 +0000)]
MCSymbolicELF: simplify. (Flags & (x << s)) >> s is equivalent to Flags >> s & x
llvm-svn: 358067
Fangrui Song [Wed, 10 Apr 2019 09:41:48 +0000 (09:41 +0000)]
MCDwarf: use write_zeroes for MCDwarfLineAddr::FixedEncode
This is more efficient than allocating a std::vector<uint8_t>.
llvm-svn: 358066
Diana Picus [Wed, 10 Apr 2019 09:31:28 +0000 (09:31 +0000)]
Fixup r358063
Fix warning/error about mixed signedness.
llvm-svn: 358065
Diana Picus [Wed, 10 Apr 2019 09:14:37 +0000 (09:14 +0000)]
[ARM GlobalISel] Add some asserts. NFC.
Make sure some arm opcodes don't unintentionally sneak into thumb mode.
llvm-svn: 358064
Diana Picus [Wed, 10 Apr 2019 09:14:32 +0000 (09:14 +0000)]
[ARM GlobalISel] Select G_FCONSTANT for VFP3
Make it possible to TableGen code for FCONSTS and FCONSTD.
We need to make two changes to the TableGen descriptions of vfp_f32imm
and vfp_f64imm respectively:
* add GISelPredicateCode to check that the immediate fits in 8 bits;
* extract the SDNodeXForms into separate definitions and create a
GISDNodeXFormEquiv and a custom renderer function for each of them.
There's a lot of boilerplate to get the actual value of the immediate,
but it basically just boils down to calling ARM_AM::getFP32Imm or
ARM_AM::getFP64Imm.
llvm-svn: 358063
Diana Picus [Wed, 10 Apr 2019 09:14:24 +0000 (09:14 +0000)]
[ARM GlobalISel] Select G_FCONSTANT into pools
Put all floating point constants into constant pools and load their
values from there.
llvm-svn: 358062
Diana Picus [Wed, 10 Apr 2019 09:14:16 +0000 (09:14 +0000)]
[ARM GlobalISel] Map G_FCONSTANT
llvm-svn: 358061
David Stenberg [Wed, 10 Apr 2019 09:07:43 +0000 (09:07 +0000)]
[DebugInfo] Rename DbgValueHistoryMap::{InstrRange -> Entry}, NFC
Summary:
In an upcoming commit the history map will be changed so that it
contains explicit entries for instructions that clobber preceding debug
values, rather than Begin- End range pairs, so generalize the name to
"Entry".
Also, prefix the iterator variable names in buildLocationList() with
"E". In an upcoming commit the entry will have query functions such as
"isD(e)b(u)gValue", which could at a glance make one confuse it for
iterations over MachineInstrs, so make the iterator names a bit more
distinct to avoid that.
Reviewers: aprantl
Reviewed By: aprantl
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59939
llvm-svn: 358060
David Stenberg [Wed, 10 Apr 2019 09:07:32 +0000 (09:07 +0000)]
[DebugInfo] Make InstrRange into a class, NFC
Summary:
Replace use of std::pair by creating a class for the debug value
instruction ranges instead. This is a preparatory refactoring for
improving handling of clobbered fragments.
In an upcoming commit the Begin pointer will become a PointerIntPair, so
it will be cleaner to have a getter for that.
Reviewers: aprantl
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59938
llvm-svn: 358059
Florian Hahn [Wed, 10 Apr 2019 09:03:03 +0000 (09:03 +0000)]
[ScheduleDAG] Add statistics for maintaining the topological order.
This is helpful to measure the impact of D60125 on maintaining
topological orders.
Reviewers: MatzeB, atrick, efriedma, niravd
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D60187
llvm-svn: 358058
David Stenberg [Wed, 10 Apr 2019 08:44:57 +0000 (08:44 +0000)]
Add REQUIRES: asserts to test using -debug-only
llvm-svn: 358057
Florian Hahn [Wed, 10 Apr 2019 08:17:28 +0000 (08:17 +0000)]
[VPLAN] Minor improvement to testing and debug messages.
1. Use computed VF for stress testing.
2. If the computed VF does not produce vector code (VF smaller than 2), force VF to be 4.
3. Test vectorization of i64 data on AArch64 to make sure we generate VF != 4 (on X86 that was already tested on AVX).
Patch by Francesco Petrogalli <francesco.petrogalli@arm.com>
Differential Revision: https://reviews.llvm.org/D59952
llvm-svn: 358056
Pavel Labath [Wed, 10 Apr 2019 07:55:04 +0000 (07:55 +0000)]
Docstringify some comments in the swig interface files
Without these, the comments don't end up in the generated python code.
llvm-svn: 358055
Fangrui Song [Wed, 10 Apr 2019 07:44:23 +0000 (07:44 +0000)]
[DWARF] Simplify LineTable::findRowInSeq
We want the last row whose address is less than or equal to Address.
This can be computed as upper_bound - 1, which is simpler than
lower_bound followed by skipping equal rows in a loop.
Since FirstRow (LowPC) does not satisfy the predicate (OrderByAddress)
while LastRow-1 (HighPC) satisfies the predicate. We can decrease the
search range by two, i.e.
upper_bound [FirstRow,LastRow) = upper_bound [FirstRow+1,LastRow-1)
llvm-svn: 358053
Nikita Popov [Wed, 10 Apr 2019 07:10:53 +0000 (07:10 +0000)]
[InstCombine] Handle usubo always overflow
Check AlwaysOverflow condition for usubo. The implementation is the
same as the existing handling for uaddo and umulo. Handling for saddo
and ssubo will follow (smulo doesn't have the necessary ValueTracking
support).
Differential Revision: https://reviews.llvm.org/D60483
llvm-svn: 358052
Nikita Popov [Wed, 10 Apr 2019 07:10:44 +0000 (07:10 +0000)]
[InstCombine] Directly call computeOverflow methods in OptimizeOverflowCheck; NFC
Instead of using the willOverflow helpers. This makes it easier to
extend handling of AlwaysOverflows.
llvm-svn: 358051
Chen Zheng [Wed, 10 Apr 2019 06:52:09 +0000 (06:52 +0000)]
[InstCombine] Canonicalize (-X s/ Y) to -(X s/ Y).
Differential Revision: https://reviews.llvm.org/D60395
llvm-svn: 358050
Rui Ueyama [Wed, 10 Apr 2019 06:32:05 +0000 (06:32 +0000)]
Rename a variable and add a comment.
llvm-svn: 358049
Akira Hatanaka [Wed, 10 Apr 2019 06:20:23 +0000 (06:20 +0000)]
[CodeGen][ObjC] Emit the retainRV marker as a module flag instead of
named metadata.
This fixes a bug where ARC contract wasn't inserting the retainRV
marker when LTO was enabled, which caused objects returned from a
function to be auto-released.
rdar://problem/
49464214
Differential Revision: https://reviews.llvm.org/D60302
llvm-svn: 358048
Akira Hatanaka [Wed, 10 Apr 2019 06:20:20 +0000 (06:20 +0000)]
[ObjC][ARC] Convert the retainRV marker that is passed as a named
metadata into a module flag in the auto-upgrader and make the ARC
contract pass read the marker as a module flag.
This is needed to fix a bug where ARC contract wasn't inserting the
retainRV marker when LTO was enabled, which caused objects returned
from a function to be auto-released.
rdar://problem/
49464214
Differential Revision: https://reviews.llvm.org/D60303
llvm-svn: 358047
Craig Topper [Wed, 10 Apr 2019 05:43:20 +0000 (05:43 +0000)]
[X86] Move the 2 byte VEX optimization for MOV instructions back to the X86AsmParser::processInstruction where it used to be. Block when {vex3} prefix is present.
Years ago I moved this to an InstAlias using VR128H/VR128L. But now that we support {vex3} pseudo prefix, we need to block the optimization when it is set to match gas behavior.
llvm-svn: 358046
Fangrui Song [Wed, 10 Apr 2019 05:31:21 +0000 (05:31 +0000)]
[llvm-objdump] Don't print trailing space in dumpBytes
In disassembly output, dumpBytes prints a space, followed by a tab
printed by printInstr. Remove the extra space.
llvm-svn: 358045
Aaron Smith [Wed, 10 Apr 2019 04:57:18 +0000 (04:57 +0000)]
[lldb-server] Introduce Socket::Initialize and Terminate to simply WSASocket setup
Reviewers: zturner, labath
Reviewed By: labath
Subscribers: lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D60440
llvm-svn: 358044
Fangrui Song [Wed, 10 Apr 2019 04:46:01 +0000 (04:46 +0000)]
[llvm-objdump] Accept and ignore --wide/-w
This is similar to what we do for llvm-readobj (--wide/-W is for GNU
readelf compatibility).
The test will be added in D60376.
llvm-svn: 358043
Jim Lin [Wed, 10 Apr 2019 01:56:32 +0000 (01:56 +0000)]
[Sparc] Fix incorrect MI insertion position for spilling f128.
Summary:
Obviously, new built MI (sethi+add or sethi+xor+add) for constructing large offset
should be inserted before new created MI for storing even register into memory.
So the insertion position should be *StMI instead of II.
before fixed:
std %f0, [%g1+80]
sethi 4, %g1 <<<
add %g1, %sp, %g1 <<< this two instructions should be put before "std %f0, [%g1+80]".
sethi 4, %g1
add %g1, %sp, %g1
std %f2, [%g1+88]
after fixed:
sethi 4, %g1
add %g1, %sp, %g1
std %f0, [%g1+80]
sethi 4, %g1
add %g1, %sp, %g1
std %f2, [%g1+88]
Reviewers: venkatra, jyknight
Reviewed By: jyknight
Subscribers: jyknight, fedor.sergeev, jrtc27, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60397
llvm-svn: 358042
Craig Topper [Wed, 10 Apr 2019 01:29:59 +0000 (01:29 +0000)]
[X86] Support the EVEX versions vcvt(t)ss2si and vcvt(t)sd2si with the {evex} pseudo prefix in the assembler.
The EVEX versions are ambiguous with the VEX versions based on operands alone so we had explicitly dropped
them from the AsmMatcher table. Unfortunately, when we add them they incorrectly show in the table before
their VEX counterparts. This is different how the prioritization normally works.
To fix this we have to explicitly reject the instructions unless the {evex} prefix has been seen.
llvm-svn: 358041
Craig Topper [Tue, 9 Apr 2019 23:30:36 +0000 (23:30 +0000)]
[X86] Add VEX_LIG to scalar VEX/EVEX instructions that were missing it.
Scalar VEX/EVEX instructions don't use the L bit and don't look at it for decoding either.
So we should ignore it in our disassembler.
The missing instructions here were found by grepping the raw tablegen class definitions in
the tablegen debug output.
llvm-svn: 358040
Robert Widmann [Tue, 9 Apr 2019 22:31:56 +0000 (22:31 +0000)]
[LLVM-C] Correct The Current Debug Location Accessors
Summary: Deprecate the existing accessors for the "current debug location" of an IRBuilder. The setter could not handle being reset to NULL, and the getter would create bogus metadata if the NULL location was returned. Provide direct metadata-based accessors instead.
Reviewers: whitequark, deadalnix
Reviewed By: whitequark
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60484
llvm-svn: 358039
Robert Widmann [Tue, 9 Apr 2019 22:27:51 +0000 (22:27 +0000)]
[LLVM-C] Add Bindings to Access an Instruction's DebugLoc
Summary: Provide direct accessors to supplement LLVMSetInstDebugLocation. In addition, properly accept and return the NULL location. The old accessors provided no way to do this, so the current debug location cannot currently be cleared.
Reviewers: whitequark, deadalnix
Reviewed By: whitequark
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60481
llvm-svn: 358038
Robert Widmann [Tue, 9 Apr 2019 21:53:31 +0000 (21:53 +0000)]
[LLVM-C] Add Section and Symbol Iterator Accessors for Object File Binaries
Summary: This brings us to full feature parity with the old API, so I've deprecated it and updated the tests. I'll do a follow-up patch to do some more cleanup and documentation work in this header.
Reviewers: whitequark, deadalnix
Reviewed By: whitequark
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60407
llvm-svn: 358037
Craig Topper [Tue, 9 Apr 2019 21:37:21 +0000 (21:37 +0000)]
[X86] Fix a dangling StringRef issue introduced in r358029.
I was attempting to convert mnemonics to lower case after processing a pseudo prefix. But the ParseOperands just hold a StringRef for tokens so there is no where to allocate the memory.
Add FIXMEs for the lower case issue which also exists in the prefix parsing code.
llvm-svn: 358036
Amara Emerson [Tue, 9 Apr 2019 21:22:43 +0000 (21:22 +0000)]
[AArch64][GlobalISel] Add isel support for vector G_ICMP and G_ASHR & G_SHL
The selection for G_ICMP is unfortunately not currently importable from SDAG
due to the use of custom SDNodes. To support this, this selection method has an
opcode table which has been generated by a script, indexed by various
instruction properties. Ideally in future we will have a GISel native selection
patterns that we can write in tablegen to improve on this.
For selection of some types we also need support for G_ASHR and G_SHL which are
generated as a result of legalization. This patch also adds support for them,
generating the same code as SelectionDAG currently does.
Differential Revision: https://reviews.llvm.org/D60436
llvm-svn: 358035
Amara Emerson [Tue, 9 Apr 2019 21:22:40 +0000 (21:22 +0000)]
[AArch64][GlobalISel] Legalize vector G_ICMP.
Selection support will be coming in a later patch.
Differential Revision: https://reviews.llvm.org/D60435
llvm-svn: 358034
Amara Emerson [Tue, 9 Apr 2019 21:22:37 +0000 (21:22 +0000)]
[AArch64][GlobalISel] Add legalization for some vector G_SHL and G_ASHR.
This is needed for some future support for vector ICMP.
Differential Revision: https://reviews.llvm.org/D60433
llvm-svn: 358033
Amara Emerson [Tue, 9 Apr 2019 21:22:33 +0000 (21:22 +0000)]
[GlobalISel][AArch64] Allow CallLowering to handle types which are normally
required to be passed as different register types. E.g. <2 x i16> may need to
be passed as a larger <2 x i32> type, so formal arg lowering needs to be able
truncate it back. Likewise, when dealing with returns of these types, they need
to be widened in the appropriate way back.
Differential Revision: https://reviews.llvm.org/D60425
llvm-svn: 358032
Nikita Popov [Tue, 9 Apr 2019 20:02:23 +0000 (20:02 +0000)]
[InstCombine] Add with.overflow always overflow tests; NFC
The uadd and umul cases are currently handled, the usub, sadd, ssub
and smul cases are not. usub, sadd and ssub already have the
necessary ValueTracking support, smul doesn't.
llvm-svn: 358031
Craig Topper [Tue, 9 Apr 2019 19:23:37 +0000 (19:23 +0000)]
[AArch64] Add test case to show missed opportunity to remove a shift before tbnz when the shift has been zero extended from i32 to i64. NFC
This pattern showed up in D60358 and it was suggested I had a test and fix that separately.
llvm-svn: 358030
Craig Topper [Tue, 9 Apr 2019 18:45:15 +0000 (18:45 +0000)]
[X86] Add support for {vex2}, {vex3}, and {evex} to the assembler to match gas. Use {evex} to improve the one our 32-bit AVX512 tests.
These can be used to force the encoding used for instructions.
{vex2} will fail if the instruction is not VEX encoded, but otherwise won't do anything since we prefer vex2 when possible. Might need to skip use of the _REV MOV instructions for this too, but I haven't done that yet.
{vex3} will force the instruction to use the 3 byte VEX encoding or fail if there is no VEX form.
{evex} will force the instruction to use the EVEX version or fail if there is no EVEX version.
Differential Revision: https://reviews.llvm.org/D59266
llvm-svn: 358029
Louis Dionne [Tue, 9 Apr 2019 18:35:56 +0000 (18:35 +0000)]
[pstl][CMake] Install CMake export files
This allows other projects to depend on PSTL using the classic CMake
find_package protocol.
llvm-svn: 358028
Craig Topper [Tue, 9 Apr 2019 18:33:56 +0000 (18:33 +0000)]
[DAGCombiner][X86][SystemZ] Canonicalize SSUBO with immediate RHS to SADDO by negating the immediate.
This lines up with what we do for regular subtract and it matches up better with X86 assumptions in isel patterns that add with immediate is more canonical than sub with immediate.
Differential Revision: https://reviews.llvm.org/D60020
llvm-svn: 358027