platform/kernel/u-boot.git
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-x86
Tom Rini [Mon, 23 May 2016 22:32:47 +0000 (18:32 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-x86

8 years agoMerge branch 'master' of git://git.denx.de/u-boot-mips
Tom Rini [Sat, 21 May 2016 00:43:27 +0000 (20:43 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mips

8 years agoARM: fix ifdef in ARMv8 lowlevel_init() again
Masahiro Yamada [Fri, 20 May 2016 03:13:10 +0000 (12:13 +0900)]
ARM: fix ifdef in ARMv8 lowlevel_init() again

Commit 116611937faa ("ARM: fix ifdefs in ARMv8 lowlevel_init()")
accidentally inverted the logic of CONFIG_ARMV8_MULTIENTRY.

Fixes: 116611937faa ("ARM: fix ifdefs in ARMv8 lowlevel_init()")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
8 years agoSPL: fat: Fix spl_parse_image_header() return value handling
Tom Rini [Mon, 23 May 2016 15:51:13 +0000 (11:51 -0400)]
SPL: fat: Fix spl_parse_image_header() return value handling

The spl_parse_image_header() can return 0 and it is not an error.
Only treat non-zero return value as an error.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <van.freenix@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoomap3: Fix SPI registers on am33xx and am43xx
Martin Hejnfelt [Thu, 19 May 2016 07:11:58 +0000 (09:11 +0200)]
omap3: Fix SPI registers on am33xx and am43xx

When the base registers are read from device tree the base is not
0x48030100 as the driver expects, but 0x48030000, resulting in
non functioning SPI. To deal with this, use same idea as how this
is done in the linux kernel (drivers/spi/spi-omap2-mcspi.c) and
add a structure with a field that is used to shift the registers
on these systems.

v2: Fixed commit subject line to correct cpu

Signed-off-by: Martin Hejnfelt <mh@newtec.dk>
8 years agokbuild: fixdep: Check fstat(2) return value
Tom Rini [Fri, 13 May 2016 14:54:04 +0000 (10:54 -0400)]
kbuild: fixdep: Check fstat(2) return value

Coverity has recently added a check that will find when we don't check
the return code from fstat(2).  Copy/paste the checking logic that
print_deps() has with an appropriate re-wording of the perror() message.

[ Linux commit : 46fe94ad18aa7ce6b3dad8c035fb538942020f2b ]

Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Marek <mmarek@suse.com>
8 years agospl: Setup default value for OF_LIST
Michal Simek [Wed, 4 May 2016 13:14:11 +0000 (15:14 +0200)]
spl: Setup default value for OF_LIST

OF_LIST can't remain empty that's why setup it up to default DTB.

If it is empty u-boot.img is created without FDT partition:
For example:
  ./tools/mkimage -f auto -A arm -T firmware -C none -O u-boot -a
0x8000000 -e 0 -n "U-Boot 2016.05-rc3 ..." -E -b  -d u-boot-nodtb.bin u-boot.img
Can't set 'timestamp' property for '' node (FDT_ERR_NOSPACE)
FIT description: Firmware image with one or more FDT blobs
Created:         Wed May  4 15:02:52 2016
 Image 0 (firmware@1)
  Description:  U-Boot 2016.05-rc3-00080-gff2e12ae22a8-dirty for zynqmp
board
  Created:      Wed May  4 15:02:52 2016
  Type:         Firmware
  Compression:  uncompressed
  Data Size:    unavailable
  Architecture: ARM
  Load Address: 0x08000000
 Default Configuration: 'conf@1'
 Configuration 0 (conf@1)
  Description:  unavailable
  Kernel:       unavailable

And then image like this doesn't contain description and link to FDT and
can't boot.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agospl: fit: Print error message when FDT is not present
Michal Simek [Wed, 4 May 2016 13:08:00 +0000 (15:08 +0200)]
spl: fit: Print error message when FDT is not present

When FDT is not present in the image user doesn't get any error what's
wrong. Print error message if LIBCOMMON_SUPPORT is enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Seris-cc: uboot
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agomkimage: Add a quiet mode
Simon Glass [Sun, 1 May 2016 19:55:38 +0000 (13:55 -0600)]
mkimage: Add a quiet mode

Some build systems want to be quiet unless there is a problem. At present
mkimage displays quite a bit of information when generating a FIT file. Add
a '-q' flag to silence this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agoimage-fit: Don't display an error in fit_set_timestamp()
Simon Glass [Sun, 1 May 2016 19:55:37 +0000 (13:55 -0600)]
image-fit: Don't display an error in fit_set_timestamp()

This function returns an error code and its caller may be able to fix the
error. For example fit_handle_file() expands the device tree to fit if there
is a lack of space.

In this case the caller does not want an error displayed. It is confusing,
since it suggests that something is wrong, when it fact everything is fine.
Drop the error.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agomalloc: improve memalign fragmentation fix
Stephen Warren [Mon, 25 Apr 2016 21:55:42 +0000 (15:55 -0600)]
malloc: improve memalign fragmentation fix

Commit 4f144a416469 "malloc: work around some memalign fragmentation
issues" enhanced memalign() so that it can succeed in more cases where
heap fragmentation is present. However, it did not solve as many cases
as it could. This patch enhances the code to cover more cases.

The alignment code works by allocating more space than the user requests,
then adjusting the returned pointer to achieve alignment. In general, one
must allocate "alignment" bytes more than the user requested in order to
guarantee that alignment is possible. This is what the original code does.
The previous enhancement attempted a second allocation if the padded
allocation failed, and succeeded if that allocation just happened to be
aligned; a fluke that happened often in practice. There are still cases
where this could fail, yet where it is still possible to honor the user's
allocation request. In particular, if the heap contains a free region that
is large enough for the user's request, and for leading padding to ensure
alignment, but has no or little space for any trailing padding. In this
case, we can make a third(!) allocation attempt after calculating exactly
the size of the leading padding required to achieve alignment, which is
the minimal over-allocation needed for the overall memalign() operation to
succeed if the third and second allocations end up at the same location.

This patch isn't checkpatch-clean, since it conforms to the existing
coding style in dlmalloc.c, which is different to the rest of U-Boot.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agox86: galileo: Override SMBIOS product name
Bin Meng [Sun, 22 May 2016 08:45:39 +0000 (01:45 -0700)]
x86: galileo: Override SMBIOS product name

Override the default product name U-Boot reports in the SMBIOS
table, to be compatible with the Intel provided UEFI BIOS, as
Linux kernel drivers (drivers/mfd/intel_quark_i2c_gpio.c and
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c) make use of
it to do different board level configuration.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: Switch to use SMBIOS Kconfig options when writing SMBIOS tables
Bin Meng [Sun, 22 May 2016 08:45:38 +0000 (01:45 -0700)]
x86: Switch to use SMBIOS Kconfig options when writing SMBIOS tables

Make use of the newly added Kconfig options of board manufacturer
and product name to write SMBIOS tables.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: kconfig: Add two options for SMBIOS manufacturer and product name
Bin Meng [Sun, 22 May 2016 08:45:37 +0000 (01:45 -0700)]
x86: kconfig: Add two options for SMBIOS manufacturer and product name

This introduces two Kconfig options to be used by SMBIOS tables:
board manufacturer and product name.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: galileo: Enable MP table generation
Bin Meng [Sun, 22 May 2016 08:45:36 +0000 (01:45 -0700)]
x86: galileo: Enable MP table generation

Now that we have added CPU uclass driver and fixed the IOAPIC ID
conflict, enable MP table generation so that IOAPIC can be used
by the Linux kernel.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: broadwell: Correct I/O APIC ID
Bin Meng [Sun, 22 May 2016 08:45:35 +0000 (01:45 -0700)]
x86: broadwell: Correct I/O APIC ID

Currently ID 2 is assgined to broadwell I/O APIC, however per
chromebook_samus.dts 2 is the core#2 LAPIC ID. Now we change
I/O APIC ID to 4 to avoid conflict.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: quark: Assign a unique I/O APIC ID
Bin Meng [Sun, 22 May 2016 08:45:34 +0000 (01:45 -0700)]
x86: quark: Assign a unique I/O APIC ID

After power-on, both LAPIC and I/O APIC appear with the same APIC ID
zero, which creates an ID conflict. When generating MP table, U-Boot
reports zero as the LAPIC ID in the processor entry, and zero as the
I/O APIC ID in the I/O APIC as well as the I/O interrupt assignment
entries. Such MP table confuses Linux kernel and finally a kernel
panic is seen during boot:

  BUG: unable to handle kernel paging request at ffff9000
  IP: [<c101d462>] native_io_apic_write+0x22/0x30
  *pdpt = 00000000014fb001 *pde = 00000000014ff067 *pte = 0000000000000000
  Oops: 0002 [#1]
  Modules linked in:
  Pid: 1, comm: swapper Tainted: G        W    3.8.7 #3 intel galileo/galileo
  EIP: 0060:[<c101d462>] EFLAGS: 00010086 CPU: 0
  EIP is at native_io_apic_write+0x22/0x30
  ...
  Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000009

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: Call lapic_setup() in interrupt_init()
Bin Meng [Sun, 22 May 2016 08:45:33 +0000 (01:45 -0700)]
x86: Call lapic_setup() in interrupt_init()

Let's configure LAPIC in a common place - interrupt_init().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: Remove SMP limitation in lapic_setup()
Bin Meng [Sun, 22 May 2016 08:45:32 +0000 (01:45 -0700)]
x86: Remove SMP limitation in lapic_setup()

At present LAPIC is enabled and configured as virtual wire mode
in lapic_setup() only when CONFIG_SMP is on. This limitation is
however not necessary as for uniprocessor this is still needed.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: Don't touch IA32_APIC_BASE MSR on Intel Quark
Bin Meng [Sun, 22 May 2016 08:45:31 +0000 (01:45 -0700)]
x86: Don't touch IA32_APIC_BASE MSR on Intel Quark

Intel Quark processor core provides an integrated Local APIC but
does not support the IA32_APIC_BASE MSR. As a result, the Local
APIC is always globally enabled and the Local APIC base address
is fixed at 0xfee00000. Attempting to access the IA32_APIC_BASE
MSR causes a general protection fault.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: galileo: Enable CPU driver
Bin Meng [Sun, 22 May 2016 08:45:30 +0000 (01:45 -0700)]
x86: galileo: Enable CPU driver

Add a cpu node in the device tree and enable CPU driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: Use latest microcode for all BayTrail boards
Bin Meng [Mon, 23 May 2016 07:25:20 +0000 (15:25 +0800)]
x86: Use latest microcode for all BayTrail boards

Update board device tree to include latest microcode, and remove
the old no longer needed microcode.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
8 years agox86: baytrail: Update to latest microcode
Bin Meng [Sun, 22 May 2016 08:45:28 +0000 (01:45 -0700)]
x86: baytrail: Update to latest microcode

Update BayTrail microcde to rev 325 (for CPUID 30673), rev 907
(for CPUID 30679).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: Add some notes for MRC cache with Intel FSP
Bin Meng [Sun, 22 May 2016 08:45:27 +0000 (01:45 -0700)]
x86: Add some notes for MRC cache with Intel FSP

MRC cache relies on Intel FSP to produce a special GUID that
contains the MRC cache data. Add such information in the
CONFIG_ENABLE_MRC_CACHE help entry.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: crownbay: Disable boot stage support
Bin Meng [Sun, 22 May 2016 08:45:26 +0000 (01:45 -0700)]
x86: crownbay: Disable boot stage support

It is observed that when enabling boot stage support, occasionally
the board reboots during boot over and over again, and eventually
boots to shell. This was seen on my board, but not on Jian's board.
Debugging shows that the TSC timer calibration against PIT fails
as boot stage APIs utilize timer in a very early stage and at that
time TSC/PIT may not be stable enough for the calibration to pass.

Disable it for now.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Jian Luo <Jian.Luo4@boschrexroth.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoacpi: Clean IASL generated intermediate files
Bin Meng [Sun, 22 May 2016 08:45:25 +0000 (01:45 -0700)]
acpi: Clean IASL generated intermediate files

For boards that support ACPI, there are dsdt.aml, dsdt.asl.tmp and
dsdt.c in the board directory after a successful build. These are
intermediate files generated by IASL, and should be removed during
a 'make clean'.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: doc: Add porting hints for ACPI with Windows
Bin Meng [Wed, 11 May 2016 14:45:12 +0000 (07:45 -0700)]
x86: doc: Add porting hints for ACPI with Windows

Windows might cache system information and only detect ACPI changes
if you modify the ACPI table versions.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: baytrail: Add GPIO ASL description
Bin Meng [Wed, 11 May 2016 14:45:11 +0000 (07:45 -0700)]
x86: baytrail: Add GPIO ASL description

Since BayTrail, Intel starts to use new GPIO IPs in their chipset.
This adds the GPIO ASL, so that OS can load corresponding drivers
for it. On Linux, this is BayTrail pinctrl driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: baytrail: Add internal UART ASL description
Bin Meng [Wed, 11 May 2016 14:45:10 +0000 (07:45 -0700)]
x86: baytrail: Add internal UART ASL description

BayTrail integrates an internal ns15550 compatible UART (PNP0501).
Its IRQ is hardwired to IRQ3 in old revision chipset, but in newer
revision one IRQ4 is being used for ISA compatibility. Handle this
correctly in the ASL file.

Linux does not need this ASL, but Windows need this to correctly
discover a COM port existing in the system so that Windows can
show it in the 'Device Manager' window, and expose this COM port
to any terminal emulation application.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoacpi: Quieten IASL output when 'make -s' is used
Bin Meng [Wed, 11 May 2016 14:45:09 +0000 (07:45 -0700)]
acpi: Quieten IASL output when 'make -s' is used

IASL compiler does not provide a command line option to turn off
its non-warning message. To quieten the output when 'make -s',
redirect its output to /dev/null.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: doc: Mention Ubuntu/Windows installation and boot support
Bin Meng [Wed, 11 May 2016 14:45:08 +0000 (07:45 -0700)]
x86: doc: Mention Ubuntu/Windows installation and boot support

As of now, U-Boot can support installing and booting Ubuntu/Windows
with the help of SeaBIOS. Update the documentation.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: baytrail: Enable SeaBIOS on all boards
Bin Meng [Wed, 11 May 2016 14:45:07 +0000 (07:45 -0700)]
x86: baytrail: Enable SeaBIOS on all boards

SeaBIOS can be loaded by U-Boot to aid the installation of Ubuntu
and Windows to a SATA drive and boot from there. Enable it on all
BayTrail boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: doc: Update information about IGD with SeaBIOS
Bin Meng [Wed, 11 May 2016 14:45:06 +0000 (07:45 -0700)]
x86: doc: Update information about IGD with SeaBIOS

Document how to make SeaBIOS load and run the VGA ROM of Intel
IGD device when loaded by U-Boot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: acpi: Remove header length check when writing tables
Bin Meng [Wed, 11 May 2016 14:45:05 +0000 (07:45 -0700)]
x86: acpi: Remove header length check when writing tables

Before moving 'current' pointer during ACPI table writing, we always
check the table length to see if it is larger than the table header.
Since our purpose is to generate valid tables, the check logic is
always true, which can be avoided.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: acpi: Remove the unnecessary checksum calculation of DSDT
Bin Meng [Wed, 11 May 2016 14:45:04 +0000 (07:45 -0700)]
x86: acpi: Remove the unnecessary checksum calculation of DSDT

The generated AmlCode[] from IASL already has the calculated DSDT
table checksum in place. No need for us to calculate it again.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: acpi: Switch to ACPI mode by ourselves instead of requested by OSPM
Bin Meng [Wed, 11 May 2016 14:45:03 +0000 (07:45 -0700)]
x86: acpi: Switch to ACPI mode by ourselves instead of requested by OSPM

Per ACPI spec, during ACPI OS initialization, OSPM can determine
that the ACPI hardware registers are owned by SMI (by way of the
SCI_EN bit in the PM1_CNT register), in which case the ACPI OS
issues the ACPI_ENABLE command to the SMI_CMD port. The SCI_EN bit
effectively tracks the ownership of the ACPI hardware registers.

However since U-Boot does not support SMI, we report all 3 fields
in FADT (SMI_CMD, ACPI_ENABLE, ACPI_DISABLE) as zero, by following
the spec who says: these fields are reserved and must be zero on
system that does not support System Management mode.

U-Boot seems to behave in a correct way that the ACPI spec allows,
at least Linux does not complain, but apparently Windows does not
think so. During Windows bring up debugging, it is observed that
even these 3 fields are zero, Windows are still trying to issue SMI
with hardcoded SMI port address and commands, and expecting SCI_EN
to be changed by the firmware. Eventually Windows gives us a BSOD
(Blue Screen of Death) saying ACPI_BIOS_ERROR and refuses to start.

To fix this, turn on the SCI_EN bit by ourselves. With this patch,
now U-Boot can install and boot Windows 8.1/10 successfully with
the help of SeaBIOS using legacy interface (non-UEFI mode).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: Use high_table_malloc() for tables passing to SeaBIOS
Bin Meng [Wed, 11 May 2016 14:45:02 +0000 (07:45 -0700)]
x86: Use high_table_malloc() for tables passing to SeaBIOS

Now that we already reserved high memory for configuration tables,
call high_table_malloc() to allocate tables from the region.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: Reserve configuration tables in high memory
Bin Meng [Wed, 11 May 2016 14:45:01 +0000 (07:45 -0700)]
x86: Reserve configuration tables in high memory

When SeaBIOS is on, reserve configuration tables in reserve_arch().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: Unify reserve_arch() for all x86 boards
Bin Meng [Wed, 11 May 2016 14:45:00 +0000 (07:45 -0700)]
x86: Unify reserve_arch() for all x86 boards

Instead of asking each platform to provide reserve_arch(),
supply it in arch/x86/cpu/cpu.c in a unified way.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: Prepare configuration tables in dedicated high memory region
Bin Meng [Wed, 11 May 2016 14:44:59 +0000 (07:44 -0700)]
x86: Prepare configuration tables in dedicated high memory region

Currently when CONFIG_SEABIOS is on, U-Boot allocates configuration
tables via normal malloc(). To simplify, use a dedicated memory
region which is reserved on the stack before relocation for this
purpose. Add functions for reserve and malloc.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: Compile coreboot_table.c only for SeaBIOS
Bin Meng [Wed, 11 May 2016 14:44:58 +0000 (07:44 -0700)]
x86: Compile coreboot_table.c only for SeaBIOS

coreboot_table.c only needs to be built when SeaBIOS is used.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: Fix up PIRQ routing table checksum earlier
Bin Meng [Wed, 11 May 2016 14:44:57 +0000 (07:44 -0700)]
x86: Fix up PIRQ routing table checksum earlier

PIRQ routing table checksum is fixed up in copy_pirq_routing_table(),
which is fine if we only write the configuration table once. But with
the SeaBIOS case, when we write the table for the second time, the
checksum will be fixed up to zero per the checksum algorithm, which
is caused by the checksum field not being zero before fix up, since
the checksum has already been calculated in the first run.

To fix this, move the checksum fixup to create_pirq_routing_table(),
so that copy_pirq_routing_table() only does what its function name
suggests: copy the table to somewhere else.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: Call board_final_cleanup() in last_stage_init()
Bin Meng [Wed, 11 May 2016 14:44:56 +0000 (07:44 -0700)]
x86: Call board_final_cleanup() in last_stage_init()

At present board_final_cleanup() is called before booting a Linux
kernel. This actually needs to be done before booting anything,
like SeaBIOS, VxWorks or Windows.

Move the call to last_stage_init() instead.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: minnowmax: Adjust U-Boot environment address in SPI flash
Bin Meng [Wed, 11 May 2016 14:44:55 +0000 (07:44 -0700)]
x86: minnowmax: Adjust U-Boot environment address in SPI flash

Currently U-Boot environment address is at offset 0x7fe00 of a 8MB
SPI flash. When creating a partial u-boot.rom image without flash
descriptor and ME firmware, U-Boot actually occupies the last 1MB
of the flash, and reprograming U-Boot causes previous environment
settings get lost which is not convenient during testing.

Adjust the environment address to 0x6ef000 instead (before the MRC
cache data region in the flash).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoconfig: sandbox: enable qfw and cmd_qfw for testing
Miao Yan [Mon, 23 May 2016 02:37:22 +0000 (19:37 -0700)]
config: sandbox: enable qfw and cmd_qfw for testing

This patch enables qfw and cmd_qfw on sandbox for build coverage test

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: qemu: rename qemu/acpi_table.c
Miao Yan [Mon, 23 May 2016 02:37:21 +0000 (19:37 -0700)]
x86: qemu: rename qemu/acpi_table.c

Rename qemu/acpi_table.c to qemu/e820.c, because ACPI stuff is moved
to qfw core, this file only contains code for installing e820 table.

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agocmd: qfw: bring ACPI generation code into qfw core
Miao Yan [Mon, 23 May 2016 02:37:20 +0000 (19:37 -0700)]
cmd: qfw: bring ACPI generation code into qfw core

Loading ACPI table from QEMU's fw_cfg interface is not x86 specific
(ARM64 may also make use of it). So move the code to common place.

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agocmd: qfw: do not depend on x86
Miao Yan [Mon, 23 May 2016 02:37:19 +0000 (19:37 -0700)]
cmd: qfw: do not depend on x86

The qfw command interface used to depend on X86, this patch removes
this restriction so it can be built for sandbox for testing. For normal
usage, it can only be used with CONFIG_QEMU.

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agocmd: qfw: do not require default macros when building qfw command
Miao Yan [Mon, 23 May 2016 02:37:18 +0000 (19:37 -0700)]
cmd: qfw: do not require default macros when building qfw command

The qfw command interface makes use of CONFIG_LOADADDR and
CONFIG_RAMDISKADDR to setup kernel. But not all boards have these macros,
which causes build problem on those platforms.

This patch fixes this issue.

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agocmd: qfw: rename qemu_fw_cfg.[c|h] to qfw.[c|h]
Miao Yan [Mon, 23 May 2016 02:37:17 +0000 (19:37 -0700)]
cmd: qfw: rename qemu_fw_cfg.[c|h] to qfw.[c|h]

Make file names consistent with CONFIG_QFW and CONFIG_CMD_QFW

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: qemu: add comment about qfw register endianness
Miao Yan [Mon, 23 May 2016 02:37:16 +0000 (19:37 -0700)]
x86: qemu: add comment about qfw register endianness

This patch adds some comments about qfw register endianness for clarity.

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: qemu: move x86 specific operations out of qfw core
Miao Yan [Mon, 23 May 2016 02:37:15 +0000 (19:37 -0700)]
x86: qemu: move x86 specific operations out of qfw core

The original implementation of qfw includes several x86 specific
operations, like directly calling outb/inb and using some inline
assembly code which prevents it being ported to other architectures.

This patch adds callback functions and moves those to arch/x86/

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: qemu: split qfw command interface and qfw core
Miao Yan [Mon, 23 May 2016 02:37:14 +0000 (19:37 -0700)]
x86: qemu: split qfw command interface and qfw core

This patch splits qfw command interface and qfw core function into two
files, and introduces a new Kconfig option (CONFIG_QFW) for qfw core.

Now when qfw command interface is enabled, it will automatically select
qfw core. This patch also makes the ACPI table generation select
CONFIG_QFW.

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agocmd: qfw: make fwcfg_present and fwcfg_dma_present public
Miao Yan [Mon, 23 May 2016 02:37:13 +0000 (19:37 -0700)]
cmd: qfw: make fwcfg_present and fwcfg_dma_present public

This patch is part of the qfw refactor work. This patch makes
qemu_fwcfg_present() and qemu_fwcfg_dma_present() public functions.

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agocmd: qfw: remove qemu_fwcfg_free_files()
Miao Yan [Mon, 23 May 2016 02:37:12 +0000 (19:37 -0700)]
cmd: qfw: remove qemu_fwcfg_free_files()

This patch is part of the qfw refactor work.

The qemu_fwcfg_free_files() function is only used in error handling in
ACPI table generation, let's not make this a core function and move it
to the right place.

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agocmd: qfw: add API to iterate firmware list
Miao Yan [Mon, 23 May 2016 02:37:11 +0000 (19:37 -0700)]
cmd: qfw: add API to iterate firmware list

This patch is part of the refactor work of qfw. It adds 3 APIs to qfw
core to iterate firmware list.

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: qemu: fix ACPI Kconfig options
Miao Yan [Mon, 23 May 2016 02:37:10 +0000 (19:37 -0700)]
x86: qemu: fix ACPI Kconfig options

CONFIG_GENENRATE_ACPI_TABLE controls the generation of ACPI table which
uses U-Boot's built-in methods and CONFIG_QEMU_ACPI_TABLE controls whether
to load ACPI table from QEMU's fw_cfg interface.

But with commit "697ec431469ce0a4c2fc2c02d8685d907491af84 x86: qemu: Drop
our own ACPI implementation", there is only one way to support ACPI table
for QEMU targets which is the fw_cfg interface. Having two Kconfig options
for this purpose is not necessary any more, so this patch consolidates
the two.

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: qemu: Move qfw command over to cmd and add Kconfig entry
Tom Rini [Fri, 6 May 2016 14:40:22 +0000 (10:40 -0400)]
x86: qemu: Move qfw command over to cmd and add Kconfig entry

- Move the command portion of arch/x86/cpu/qemu/fw_cfg.c into
  cmd/qemu_fw_cfg.c
- Move arch/x86/include/asm/fw_cfg.h to include/qemu_fw_cfg.h
- Rename ACPI table portion to arch/x86/cpu/qemu/acpi_table.c

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: doc: Document ACPI support
Bin Meng [Sat, 7 May 2016 14:46:37 +0000 (07:46 -0700)]
x86: doc: Document ACPI support

Remove ACPI from the TODO list and add a new section to document
current ACPI support in U-Boot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: doc: Minor update for accuracy
Bin Meng [Sat, 7 May 2016 14:46:36 +0000 (07:46 -0700)]
x86: doc: Minor update for accuracy

This updates the doc for the following places:
- Mention CRB for Bayley Bay
- Mention Congatec QEVAL 2.0 & conga-QA3/E3845
- Limit part of the QEMU paragraphs to 80 cols
- Correct some typos (drive, it's, Ubuntu)
- Add description for "console=ttyS0,115200"
- Remove CONFIG_BOOTDELAY description which is already
  in x86-common.h

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: Remove acpi=off boot parameter when ACPI is on
Bin Meng [Sat, 7 May 2016 14:46:35 +0000 (07:46 -0700)]
x86: Remove acpi=off boot parameter when ACPI is on

Remove the kernel boot parameter acpi=off so that kernel can turn on
ACPI support.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: baytrail: Add .gitignore for ACPI enabled boards
Bin Meng [Sat, 7 May 2016 14:46:34 +0000 (07:46 -0700)]
x86: baytrail: Add .gitignore for ACPI enabled boards

Let git ignore dsdt.aml, dsdt.asl.tmp and dsdt.c files.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: baytrail: Enable ACPI table generation for all boards
Bin Meng [Sat, 7 May 2016 14:46:33 +0000 (07:46 -0700)]
x86: baytrail: Enable ACPI table generation for all boards

Enable ACPI table generation by creating a DSDT table for all baytrail
boards: conga-qeval20-qa3-e3845, bayleybay and minnowmax.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: baytrail: Generate ACPI FADT/MADT tables
Bin Meng [Sat, 7 May 2016 14:46:32 +0000 (07:46 -0700)]
x86: baytrail: Generate ACPI FADT/MADT tables

FADT/MADT tables are platform specific. Generate them for BayTrail.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: baytrail: Add platform ASL files
Bin Meng [Sat, 7 May 2016 14:46:31 +0000 (07:46 -0700)]
x86: baytrail: Add platform ASL files

This adds basic BayTrail platform ASL files. They are intended to be
included in dsdt.asl of any board that is based on this platform.

Note: ACPI mode support for GPIO/LPSS/SCC/LPE are not supported for
now. They will be added in the future.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: acpi: Return table length in acpi_create_madt_lapics()
Bin Meng [Sat, 7 May 2016 14:46:30 +0000 (07:46 -0700)]
x86: acpi: Return table length in acpi_create_madt_lapics()

Like other MADT table write routines, make acpi_create_madt_lapics()
return how many bytes it has written instead of the table end addr.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: acpi: Add some generic ASL libraries
Bin Meng [Sat, 7 May 2016 14:46:29 +0000 (07:46 -0700)]
x86: acpi: Add some generic ASL libraries

This adds several generic ASL libraries that can be included by
other ASL files, which are:

- debug.asl: for debug output using POST I/O port and legacy serial port
- globutil.asl: for string compare routines
- statdef.asl: for _STA status values

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: acpi: Clean up table header revisions
Bin Meng [Sat, 7 May 2016 14:46:28 +0000 (07:46 -0700)]
x86: acpi: Clean up table header revisions

The comment of initializing table header revision says:

    /* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */

which might mislead it may increase per ACPI spec revision.
However this is not the case. It's actually a fixed number
as defined in ACPI spec, and in the laest ACPI spec 6.1,
some table header revisions are still 1. Clean these up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: acpi: Align FACS table to a 64 byte boundary
Bin Meng [Sat, 7 May 2016 14:46:27 +0000 (07:46 -0700)]
x86: acpi: Align FACS table to a 64 byte boundary

Per ACPI spec, the FACS table address must be aligned to a 64 byte
boundary (Windows checks this, but Linux does not).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: acpi: Use u32 in table write routines
Bin Meng [Sat, 7 May 2016 14:46:26 +0000 (07:46 -0700)]
x86: acpi: Use u32 in table write routines

Use u32 instead of unsigned long in the table write routines, as
other routines do.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: acpi: Adjust order in acpi_table.c
Bin Meng [Sat, 7 May 2016 14:46:25 +0000 (07:46 -0700)]
x86: acpi: Adjust order in acpi_table.c

Rearrange the routine order a little bit, to follow the order
in which ACPI table is defined in acpi_table.h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: acpi: Change fill_header()
Bin Meng [Sat, 7 May 2016 14:46:24 +0000 (07:46 -0700)]
x86: acpi: Change fill_header()

Rename fill_header() to acpi_fill_header() for consistency.
Change its signature to remove the 'length' parameter and
make it a public API.

Also remove the unnecessary include files, and improve the
AmlCode[] comment a little bit.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: acpi: Remove acpi_create_ssdt_generator()
Bin Meng [Sat, 7 May 2016 14:46:23 +0000 (07:46 -0700)]
x86: acpi: Remove acpi_create_ssdt_generator()

This acpi_create_ssdt_generator() currently does nothing.
Remove this for now.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: acpi: Reorder code in acpi_table.h
Bin Meng [Sat, 7 May 2016 14:46:22 +0000 (07:46 -0700)]
x86: acpi: Reorder code in acpi_table.h

Reorder the ACPI tables appearance by following the order:
RSDP, RSDT, XSDT, FADT, FACS, MADT, MCFG. And adjust the
table flag defines accordingly.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: acpi: Various changes to acpi_table.h
Bin Meng [Sat, 7 May 2016 14:46:21 +0000 (07:46 -0700)]
x86: acpi: Various changes to acpi_table.h

- Use "U-BOOT" and "U-BOOTBL" for the OEM ID and OEM table ID.
- Do not typedef acpi_header_t, instead use struct acpi_table_hader.
- Use a shorter name aslc_id and aslc-revision.
- Change MCFG base address to use 32-bit value pairs (_l and _h).
- Apply ACPI_APIC_ prefix to MADT APIC type macros and make
  their names to be more readable.
- Apply __packed to struct acpi_madt_irqoverride and struct
  acpi_madt_lapic_nmi tables, as they are not naturally aligned
  by the compiler which leads to wrong sizeof(struct).
- Rename model to res1 as it is reserved after ACPI spec 1.0.
- Apply ACPI_ prefix to the PM profile macros and change them
  to enum.
- Add ospm_flags to FACS structure which is defined since ACPI 4.0.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: acpi: Remove unused codes
Bin Meng [Sat, 7 May 2016 14:46:20 +0000 (07:46 -0700)]
x86: acpi: Remove unused codes

- Remove #include <> header files.
- Remove APM_CNT register defines, which should not be here as
  they are SMI related.
- Remove MP_IRQ_ defines as they are duplicates of the same ones
  in asm/mpspec.h.
- Remove ACTL register defines, which should not be here as they
  are chipset specific.
- Remove functional fixed hardware defines, which are not used.
- Remove dev_scope related defines, which are not used.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoacpi: Output all errors/warnings/remarks when compiling ASL
Bin Meng [Sat, 7 May 2016 14:46:19 +0000 (07:46 -0700)]
acpi: Output all errors/warnings/remarks when compiling ASL

Remove -va option when invoking IASL compiler so that we can see
errors/warnings/remarks in the build log.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoacpi: Specify U-Boot include path for ASL files
Bin Meng [Sat, 7 May 2016 14:46:18 +0000 (07:46 -0700)]
acpi: Specify U-Boot include path for ASL files

It will be much easier if we split the whole dsdt.asl file into
multiple smaller ASL parts and have access to U-Boot include files.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoacpi: Explicitly spell out dsdt.c in the make rule
Bin Meng [Sat, 7 May 2016 14:46:17 +0000 (07:46 -0700)]
acpi: Explicitly spell out dsdt.c in the make rule

Currently the make rule for dsdt.c uses a wildcard, as below:

  $(obj)/%.c:    $(src)/%.asl

To avoid any side effect, explicitly mention dsdt.c as this is
the file we intend to use for ACPI DSDT AML generation.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoacpi: Change build log for ASL files
Bin Meng [Sat, 7 May 2016 14:46:16 +0000 (07:46 -0700)]
acpi: Change build log for ASL files

Currently when compiling U-Boot with ASL file, the build log says:

  ASL     board/intel/bayleybay/dsdt.c

This looks odd as ASL compiler's input is ASL file, not C file.
Change the make rule to use $< instead.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: dts: Update to include ACTL register details
Bin Meng [Sat, 7 May 2016 14:46:15 +0000 (07:46 -0700)]
x86: dts: Update to include ACTL register details

This updates all x86 boards that currently have IRQ router in the
dts files to include ACTL register details.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: irq: Enable SCI on IRQ9
Bin Meng [Sat, 7 May 2016 14:46:14 +0000 (07:46 -0700)]
x86: irq: Enable SCI on IRQ9

By default SCI is disabled after power on. ACTL is the register to
enable SCI and route it to PIC/APIC. To support both ACPI in PIC
mode and APIC mode, configure SCI to use IRQ9.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
8 years agox86: irq: Reserve IRQ9 for ACPI in PIC mode
Bin Meng [Sat, 7 May 2016 14:46:13 +0000 (07:46 -0700)]
x86: irq: Reserve IRQ9 for ACPI in PIC mode

Reserve IRQ9 which is to be used as SCI interrupt number
for ACPI in PIC mode.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: acpi: Fix compiler warnings in write_acpi_tables()
Bin Meng [Sat, 7 May 2016 14:46:12 +0000 (07:46 -0700)]
x86: acpi: Fix compiler warnings in write_acpi_tables()

Fix the following two build warnings in function 'write_acpi_tables':

  warning: format '%lx' expects argument of type 'long unsigned int',
  but argument 2 has type 'u32' [-Wformat=]

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: Fix build warning in tables.c when CONFIG_SEABIOS
Bin Meng [Sat, 7 May 2016 14:46:11 +0000 (07:46 -0700)]
x86: Fix build warning in tables.c when CONFIG_SEABIOS

The following build warning is seen in tables.c:

  warning: implicit declaration of function 'memalign'

Add the missing header file to fix it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: Drop asm/acpi.h
Bin Meng [Sat, 7 May 2016 14:46:10 +0000 (07:46 -0700)]
x86: Drop asm/acpi.h

Remove asm/acpi.h which is never used.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agopico-imx6ul: Select CONFIG_HUSH_PARSER option
Fabio Estevam [Tue, 17 May 2016 13:51:44 +0000 (10:51 -0300)]
pico-imx6ul: Select CONFIG_HUSH_PARSER option

Select CONFIG_HUSH_PARSER option in order to fix the following
problem:

Unknown command 'if' - try 'help'
Unknown command 'then' - try 'help'
Unknown command 'else' - try 'help'
Unknown command 'fi' - try 'help'

Reported-by: Daiane Angolini <daiane.angolini@nxp.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Daiane Angolini <daiane.angolini@nxp.com>
8 years agoeeprom: merge cmdline parsing of eeprom commands
Nikita Kiryanov [Sat, 16 Apr 2016 14:55:13 +0000 (17:55 +0300)]
eeprom: merge cmdline parsing of eeprom commands

Merge the parsing of layout aware and layout unaware eeprom commands into
one parsing function. With this change, layout aware commands now follow
the eeprom read and eeprom write conventions of making i2c bus and i2c address
parameters optional.

Cc: Heiko Schocher <hs@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
8 years agoeeprom: use eeprom_execute_command for all eeprom functions
Nikita Kiryanov [Sat, 16 Apr 2016 14:55:12 +0000 (17:55 +0300)]
eeprom: use eeprom_execute_command for all eeprom functions

Update eeprom_execute_command() and related code to accommodate both layout
aware and layout unaware functions.

No functional changes.

Cc: Heiko Schocher <hs@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
[trini: Make eeprom_execute_command have ulong for i2c_addr]
Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agomalta: Support MIPS32r6 configurations
Paul Burton [Mon, 16 May 2016 09:52:14 +0000 (10:52 +0100)]
malta: Support MIPS32r6 configurations

Both real Malta boards & QEMU's Malta emulation can feature MIPS32r6
CPUs. Allow building U-Boot for such systems by selecting
CONFIG_SUPPORTS_CPU_MIPS32_R6 for Malta.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
8 years agomalta: Remove ".set mips32" directive
Paul Burton [Mon, 16 May 2016 09:52:13 +0000 (10:52 +0100)]
malta: Remove ".set mips32" directive

We always build for a mips32 or higher ISA, so this ".set mips32"
directive is redundant. Once MIPSr6 support is added it will become
harmful since some instruction encodings change & this directive will
cause the older encodings to be incorrectly emitted instead of the
appropriate ones for the build.

In preparation for supporting MIPSr6, remove this redundant directive.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
8 years agoMIPS: Support for targetting MIPSr6
Paul Burton [Mon, 16 May 2016 09:52:12 +0000 (10:52 +0100)]
MIPS: Support for targetting MIPSr6

Add support for targetting MIPS32r6 & MIPS64r6 systems, in the same way
that we currently select release 1 or release 2 targets. MIPSr6 is not
entirely backwards compatible with earlier releases of the architecture.
Some instructions are encoded differently, some are removed, some are
reused, so it is not practical to run U-Boot built for earlier revisions
on a MIPSr6 system. Update their Kconfig help text to reflect that.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
8 years agoMIPS: Simplify CONFIG_SYS_CPU values
Paul Burton [Mon, 16 May 2016 09:52:11 +0000 (10:52 +0100)]
MIPS: Simplify CONFIG_SYS_CPU values

Rather than having the values for CONFIG_SYS_CPU depend upon each
architecture revision, have them depend upon the more general
CONFIG_CPU_MIPS32 & CONFIG_CPU_MIPS64 which in turn depend upon the
architecture revisions.

This is done in preparation for adding MIPSr6 support, which would
otherwise need to introduce new cases here.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
8 years agoMIPS: Use unchecked immediate addition/subtraction
Paul Burton [Mon, 16 May 2016 09:52:10 +0000 (10:52 +0100)]
MIPS: Use unchecked immediate addition/subtraction

In MIPS assembly there have historically been 2 variants of immediate
addition - the standard "addi" which traps if an overflow occurs, and
the unchecked "addiu" which does not trap on overflow. In release 6 of
the MIPS architecture the trapping variants of immediate addition &
subtraction have been removed. In preparation for supporting MIPSr6,
stop using the trapping instructions from assembly & switch to their
unchecked variants.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
8 years agomips: ath79: Add support for TPLink WDR4300
Marek Vasut [Fri, 6 May 2016 18:10:41 +0000 (20:10 +0200)]
mips: ath79: Add support for TPLink WDR4300

Add support for the TPLink WDR4300 router, which is based on the
AR9344 MIPS 74Kc CPU and has 128 MiB of RAM. The USB is supported
on this system as well.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
8 years agomips: ath79: Add AR934x support
Marek Vasut [Fri, 6 May 2016 18:10:40 +0000 (20:10 +0200)]
mips: ath79: Add AR934x support

Add support for the Atheros AR934x WiSoCs. This patchs adds complete
system init, including PLL and DRAM init, both of which happen from
full C environment, since the AR934x has proper SRAM.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
8 years agomips: ath79: Add support for ungating ethernet on ar933x and ar934x
Marek Vasut [Fri, 6 May 2016 18:10:39 +0000 (20:10 +0200)]
mips: ath79: Add support for ungating ethernet on ar933x and ar934x

Add code to ungate the ethernet controller on ar933x and ar934x .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
8 years agomips: ath79: dts: Add ethernet MAC nodes for ar933x
Marek Vasut [Fri, 6 May 2016 18:10:38 +0000 (20:10 +0200)]
mips: ath79: dts: Add ethernet MAC nodes for ar933x

Add node for both ethernet controllers in the ar933x.
The PHY is attached only to the first ethernet controller.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
8 years agomips: ath79: Add support for ungating USB on ar933x and ar934x
Marek Vasut [Fri, 6 May 2016 18:10:37 +0000 (20:10 +0200)]
mips: ath79: Add support for ungating USB on ar933x and ar934x

Add code to ungate the USB controller on ar933x and ar934x .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
8 years agomips: ath79: dts: Add generic-ehci node
Marek Vasut [Fri, 6 May 2016 18:10:36 +0000 (20:10 +0200)]
mips: ath79: dts: Add generic-ehci node

Add generic EHCI node for the ChipIdea EHCI controller in the ath79.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>