Marc Zyngier [Fri, 17 Mar 2023 16:22:51 +0000 (00:22 +0800)]
arm64: Use FEAT_HAFDBS to track dirty pages when available
Some recent arm64 cores have a facility that allows the page
table walker to track the dirty state of a page. This makes it
really efficient to perform CMOs by VA as we only need to look
at dirty pages.
Signed-off-by: Marc Zyngier <maz@kernel.org>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: https://android.googlesource.com/platform/external/u-boot/+/3c433724e6f830a6b2edd5ec3d4a504794887263
Tom Rini [Tue, 25 Apr 2023 18:22:40 +0000 (14:22 -0400)]
Merge branch '2023-04-25-use-bounce-buffers-for-VIRTIO_F_IOMMU_PLATFORM'
To quote the author:
These patches will use bounce buffers when VIRTIO_F_IOMMU_PLATFORM
feature is in a virtio device.
This feature can be tested with qemu with -device virtio-iommu-pci. So
that when a -device virtio-blk-pci with iommu_platform=true, it will
uses the bounce buffer instead.
Will Deacon [Wed, 29 Mar 2023 14:25:00 +0000 (22:25 +0800)]
virtio: Use bounce buffers when VIRTIO_F_IOMMU_PLATFORM is set
Devices advertising the VIRTIO_F_IOMMU_PLATFORM feature require
platform-specific handling to configure their DMA transactions.
When handling virtio descriptors for such a device, use bounce
buffers to ensure that the underlying buffers are always aligned
to and padded to PAGE_SIZE in preparation for platform specific
handling at page granularity.
Signed-off-by: Will Deacon <willdeacon@google.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Link: https://android.googlesource.com/platform/external/u-boot/+/1eff171e613ee67dca71dbe97be7282e2db17011
Reviewed-by: Simon Glass <sjg@chromium.org>
Will Deacon [Wed, 29 Mar 2023 14:24:59 +0000 (22:24 +0800)]
virtio: Allocate bounce buffers for devices with VIRTIO_F_IOMMU_PLATFORM
In preparation for bouncing virtio data for devices advertising the
VIRTIO_F_IOMMU_PLATFORM feature, allocate an array of bounce buffer
structures in the vring, one per descriptor.
Signed-off-by: Will Deacon <willdeacon@google.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Link: https://android.googlesource.com/platform/external/u-boot/+/3e052749e7c50c4c1a6014e645ae3b9be3710c07
Reviewed-by: Simon Glass <sjg@chromium.org>
Will Deacon [Wed, 29 Mar 2023 14:24:58 +0000 (22:24 +0800)]
virtio: Add helper functions to attach/detach vring descriptors
Move the attach and detach logic for manipulating vring descriptors
out into their own functions so that we can later extend these to
bounce the data for devices with VIRTIO_F_IOMMU_PLATFORM set.
Signed-off-by: Will Deacon <willdeacon@google.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Link: https://android.googlesource.com/platform/external/u-boot/+/f73258a4bfe968c5f935db45f2ec5cc0104ee796
Reviewed-by: Simon Glass <sjg@chromium.org>
Will Deacon [Wed, 29 Mar 2023 14:24:57 +0000 (22:24 +0800)]
virtio: Allocate virtqueue in page-size units
In preparation for explicit bouncing of virtqueue pages for devices
advertising the VIRTIO_F_IOMMU_PLATFORM feature, introduce a couple
of wrappers around virtqueue allocation and freeing operations,
ensuring that buffers are handled in terms of page-size units.
Signed-off-by: Will Deacon <willdeacon@google.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Link: https://android.googlesource.com/platform/external/u-boot/+/b4bb5227d4cf4fdfcd8b4e1ff2692d3a54d1482a
Reviewed-by: Simon Glass <sjg@chromium.org>
Will Deacon [Wed, 29 Mar 2023 14:24:56 +0000 (22:24 +0800)]
virtio: pci: Tear down VQs in virtio_pci_reset()
The pages backing the virtqueues for virtio PCI devices are not freed
on reset, despite the virtqueue structure being freed as part of the
driver '->priv_auto' destruction at ->remove() time.
Call virtio_pci_del_vqs() from virtio_pci_reset() to free the virtqueue
pages before freeing the virtqueue structure itself.
Signed-off-by: Will Deacon <willdeacon@google.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Link: https://android.googlesource.com/platform/external/u-boot/+/5ed54ccd83cbffd0d8719ce650604b4e44b5b0d8
Reviewed-by: Simon Glass <sjg@chromium.org>
Will Deacon [Wed, 29 Mar 2023 14:24:55 +0000 (22:24 +0800)]
virtio: Expose VIRTIO_F_IOMMU_PLATFORM in device features
If we detect the VIRTIO_F_IOMMU_PLATFORM transport feature for a device,
then expose it in the device features.
Signed-off-by: Will Deacon <willdeacon@google.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Link: https://android.googlesource.com/platform/external/u-boot/+/9693bd26bfcfe77d6a1295a561420e08c5daf019
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Mon, 24 Apr 2023 22:09:22 +0000 (18:09 -0400)]
Merge branch '2023-04-24-TI-platform-updates'
- Merge in assorted K3 updates, and re-sync all of the device trees for
TI platforms with v6.3-rc6
Christian Gmeiner [Tue, 28 Mar 2023 14:13:14 +0000 (16:13 +0200)]
arm: mach-k3: am642: move do_dt_magic() after sysfw loading
Makes it possible to use e.g mcu_spi0 for custom board detection.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Neha Malcom Francis [Fri, 14 Apr 2023 11:03:52 +0000 (16:33 +0530)]
include: configs: j721e_evm: Fix name_fdt for J7200
Currently, name_fdt is not set for J7200, fix this so right DTB is
picked during boot.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Manorit Chawdhry [Fri, 14 Apr 2023 04:18:01 +0000 (09:48 +0530)]
arm: mach-k3: common: re-locate authentication for atf/optee
For setting up the master firewalls present in the K3 SoCs, the arm64
clusters need to be powered on.
Re-locates the code for atf/optee authentication.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Manorit Chawdhry [Fri, 14 Apr 2023 04:18:00 +0000 (09:48 +0530)]
remoteproc: ti_k3_arm64: Change the startup of arm64 core
Configuring master firewalls require the power of the cluster to be
enabled before configuring them, change the load of rproc to configure
the gtc clocks and start the cluster along with configuring the boot
vector.
The start of rproc will only start the core.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Manorit Chawdhry [Fri, 14 Apr 2023 04:17:59 +0000 (09:47 +0530)]
arm: dts: k3-am625-r5-sk: add a53 cluster power
adds a53 cluster to control from the rproc driver
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Manorit Chawdhry [Fri, 14 Apr 2023 04:17:58 +0000 (09:47 +0530)]
arm: dts: k3-am62a7-r5-sk: add a53 cluster power domain node
adds a53 cluster to control from the rproc driver
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Manorit Chawdhry [Fri, 14 Apr 2023 04:17:57 +0000 (09:47 +0530)]
arm: dts: k3-am642-r5: add a53 cluster power domain node
adds a53 cluster to control from the rproc driver
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Manorit Chawdhry [Fri, 14 Apr 2023 04:17:56 +0000 (09:47 +0530)]
arm: dts: k3-am642-r5-sk: add a53 cluster power domain node
adds a53 cluster to control from the rproc driver
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Manorit Chawdhry [Fri, 14 Apr 2023 04:17:55 +0000 (09:47 +0530)]
arm: dts: k3-j7200-r5: add a72 cluster power domain node
adds a72 cluster to control from the rproc driver
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Manorit Chawdhry [Fri, 14 Apr 2023 04:17:54 +0000 (09:47 +0530)]
arm: dts: k3-j721e-r5: add a72 cluster power domain node
adds a72 cluster to control from the rproc driver
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Manorit Chawdhry [Fri, 14 Apr 2023 04:17:53 +0000 (09:47 +0530)]
arm: dts: k3-j721e-r5-sk: add a72 cluster power domain node
adds a72 cluster to control from the rproc driver
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Manorit Chawdhry [Fri, 14 Apr 2023 04:17:52 +0000 (09:47 +0530)]
arm: dts: k3-j721s2-r5: add a72 cluster power domain node
adds a72 cluster to control from the rproc driver
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Andrew Davis [Thu, 6 Apr 2023 16:38:21 +0000 (11:38 -0500)]
arm: mach-k3: Remove empty sys_proto.h include
This header file is now empty, remove it.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Andrew Davis [Thu, 6 Apr 2023 16:38:20 +0000 (11:38 -0500)]
arm: mach-k3: Move J721s2 SPL init functions to mach-k3
This matches AM64 and J721e and removes the need to forward
declare k3_spl_init(), k3_mem_init(), and check_rom_loaded_sysfw()
in sys_proto.h.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Andrew Davis [Thu, 6 Apr 2023 16:38:19 +0000 (11:38 -0500)]
arm: mach-k3: Move sdelay() and wait_on_value() declaration
These probably should be in some system wide header given their use.
Until then move them out of K3 sys_proto.h so we can finish cleaning
that header out.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Andrew Davis [Thu, 6 Apr 2023 16:38:18 +0000 (11:38 -0500)]
arm: mach-k3: Remove unused fdt_disable_node()
This function is not used currently; remove it.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Andrew Davis [Thu, 6 Apr 2023 16:38:17 +0000 (11:38 -0500)]
arm: mach-k3: Add weak do_board_detect() to common file
This matches how it was done for pre-K3 TI platforms and it allows
us to move the forward declaration out of sys_proto.h.
It also removes the need for K3_BOARD_DETECT as one is free to simply
override the weak function in their board files as needed.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Andrew Davis [Thu, 6 Apr 2023 16:38:16 +0000 (11:38 -0500)]
arm: mach-k3: Move sysfw-loader.h out of mach includes
This header is only used locally by K3 init files, no need to have it
up with the global mach includes. Move into local includes.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Andrew Davis [Thu, 6 Apr 2023 16:38:15 +0000 (11:38 -0500)]
arm: mach-k3: Make release_resources_for_core_shutdown() common
This function is the same for each device when it needs to shutdown
the R5 core. Move this to the common section and move the remaining
device specific ID list to the device hardware include.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Andrew Davis [Thu, 6 Apr 2023 16:38:14 +0000 (11:38 -0500)]
configs: j721s2_evm.h: Remove refrences to J7200 EVM
The J7200 EVM will not include this file, this J7200 checks look
to be a copy/paste errora from j721e_evm.h, which J7200 *can* include.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Andrew Davis [Thu, 6 Apr 2023 16:38:13 +0000 (11:38 -0500)]
configs: j721x_evm: Remove unneeded check for SYS_K3_SPL_ATF
The TARGET_x_R5_EVM check is already enough to limit these defines to
only the correct builds. Remove the extra outer check.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Andrew Davis [Thu, 6 Apr 2023 16:38:12 +0000 (11:38 -0500)]
soc: soc_ti_k3: Use hardware.h to remove definition duplication
The K3 JTAG and SoC ID information is already stored in the K3 arch
hardware file, include that and use its definitions here.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Andrew Davis [Thu, 6 Apr 2023 16:38:11 +0000 (11:38 -0500)]
arm: mach-k3: Move J721e SoC detection out of common section
This belongs in the J721e specific file as it is the only place
this is used. Any board level users should use the SOC driver.
While here, move the J721e and J7200 SoC IDs out of sys_proto.h
and into hardware.h. Use a macro borrowed from Rockchip and add
the rest of the SoC IDs for completeness and later use.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Andrew Davis [Thu, 6 Apr 2023 16:38:10 +0000 (11:38 -0500)]
arm: mach-k3: Move MSMC fixup to SoC level
The MSMC fixup is something we do based on SoC, not based on the board.
So this fixup does not belong in the board files. Move this to the
mach-k3 common file so that it does not have to be done in each board
that uses these SoCs.
We use ft_system_setup() here instead of ft_board_setup() since it is no
longer board level. Enable OF_SYSTEM_SETUP in the configurations that use
this to keep functionality the same.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Andrew Davis [Tue, 11 Apr 2023 18:25:10 +0000 (13:25 -0500)]
Revert "arm: dts: dra7*/am57xx-idk-evm-u-boot: Add ipu early boot DT changes"
This reverts commit
5717294230bc3578959960003be8984bbbb33642. This
does not exist in upstream kernel.org and breaks boot on DRA7-EVMs.
Drop the same.
Signed-off-by: Andrew Davis <afd@ti.com>
Andrew Davis [Tue, 11 Apr 2023 18:25:09 +0000 (13:25 -0500)]
arm: dts: keystone: Non-functional changes sync with v6.3-rc6
This is a collection of all the whitespace, renames, comment, and other
changes that should not change the DT functionality from Linux v6.3-rc6.
Signed-off-by: Andrew Davis <afd@ti.com>
Andrew Davis [Tue, 11 Apr 2023 18:25:08 +0000 (13:25 -0500)]
arm: dts: omap: Non-functional changes sync with v6.3-rc6
This is a collection of all the whitespace, renames, comment, and other
changes that should not change the DT functionality from Linux v6.3-rc6.
Signed-off-by: Andrew Davis <afd@ti.com>
Andrew Davis [Tue, 11 Apr 2023 18:25:07 +0000 (13:25 -0500)]
arm: dts: dm8x: Non-functional changes sync with v6.3-rc6
This is a collection of all the whitespace, renames, comment, and other
changes that should not change the DT functionality from Linux v6.3-rc6.
Signed-off-by: Andrew Davis <afd@ti.com>
Andrew Davis [Tue, 11 Apr 2023 18:25:06 +0000 (13:25 -0500)]
arm: dts: dra7x: Non-functional changes sync with v6.3-rc6
This is a collection of all the whitespace, renames, comment, and other
changes that should not change the DT functionality from Linux v6.3-rc6.
Signed-off-by: Andrew Davis <afd@ti.com>
Andrew Davis [Tue, 11 Apr 2023 18:25:05 +0000 (13:25 -0500)]
arm: dts: am3x: Non-functional changes sync with v6.3-rc6
This is a collection of all the whitespace, renames, comment, and other
changes that should not change the DT functionality from Linux v6.3-rc6.
Signed-off-by: Andrew Davis <afd@ti.com>
Andrew Davis [Tue, 11 Apr 2023 18:25:04 +0000 (13:25 -0500)]
arm: dts: am437x: Update to IOPAD to sync with v6.3-rc6
Several DTS files have been updated in the Linux kernel with a new
IOPAD macro. Sync for the same here.
Signed-off-by: Andrew Davis <afd@ti.com>
Andrew Davis [Tue, 11 Apr 2023 18:25:03 +0000 (13:25 -0500)]
arm: dts: am3x: Update IOPAD to PADCONF to sync with v6.3-rc6
Several DTS files have been updated in the Linux kernel with a new
PADCONF macro replacing the IOPAD version. Sync for the same here.
Signed-off-by: Andrew Davis <afd@ti.com>
Andrew Davis [Tue, 11 Apr 2023 18:25:02 +0000 (13:25 -0500)]
arm: dts: keystone: Update devicetree header comments to sync with v6.3-rc6
Signed-off-by: Andrew Davis <afd@ti.com>
Andrew Davis [Tue, 11 Apr 2023 18:25:01 +0000 (13:25 -0500)]
arm: dts: omap5x: Update devicetree header comments to sync with v6.3-rc6
Signed-off-by: Andrew Davis <afd@ti.com>
Andrew Davis [Tue, 11 Apr 2023 18:25:00 +0000 (13:25 -0500)]
arm: dts: omap4x: Update devicetree header comments to sync with v6.3-rc6
Signed-off-by: Andrew Davis <afd@ti.com>
Andrew Davis [Tue, 11 Apr 2023 18:24:59 +0000 (13:24 -0500)]
arm: dts: omap3x: Update devicetree header comments to sync with v6.3-rc6
Signed-off-by: Andrew Davis <afd@ti.com>
Andrew Davis [Tue, 11 Apr 2023 18:24:58 +0000 (13:24 -0500)]
arm: dts: dra7x: Update devicetree header comments to sync with v6.3-rc6
Signed-off-by: Andrew Davis <afd@ti.com>
Andrew Davis [Tue, 11 Apr 2023 18:24:57 +0000 (13:24 -0500)]
arm: dts: dm8x: Update devicetree header comments to sync with v6.3-rc6
Signed-off-by: Andrew Davis <afd@ti.com>
Andrew Davis [Tue, 11 Apr 2023 18:24:56 +0000 (13:24 -0500)]
arm: dts: am57x: Update devicetree header comments to sync with v6.3-rc6
Signed-off-by: Andrew Davis <afd@ti.com>
Andrew Davis [Tue, 11 Apr 2023 18:24:55 +0000 (13:24 -0500)]
arm: dts: am43x: Update devicetree header comments to sync with v6.3-rc6
Signed-off-by: Andrew Davis <afd@ti.com>
Andrew Davis [Tue, 11 Apr 2023 18:24:54 +0000 (13:24 -0500)]
arm: dts: am3x: Update devicetree header comments to sync with v6.3-rc6
Signed-off-by: Andrew Davis <afd@ti.com>
Simon Glass [Sun, 23 Apr 2023 18:16:00 +0000 (06:16 +1200)]
patman: Declare the future Series memory
This member is used in series.MakeCcFile() so should be declared in the
Series class.
Add a declaration to silence the warning.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Sun, 23 Apr 2023 16:15:56 +0000 (12:15 -0400)]
Merge tag 'u-boot-rockchip-
20230421' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Add rk3588 evb support;
- Update pinctrl for rk3568 and rk3588;
- Update rk3288 dts;
- Update mmc support for rk3568 and rk3588;
- Add rng support for rk3588;
- Add DSI support for rk3568;
- Some other misc fixes in dts, config, driver;
Tom Rini [Sat, 22 Apr 2023 22:32:08 +0000 (18:32 -0400)]
Merge tag 'efi-2023-07-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2023-07-rc1-2
Documentation:
* Describe Python coding style
UEFI:
* Enable tests for authenticated capsules on the sandbox
* Fix pylint warnings
* Correct struct efi_hii_keyboard_layout definition
Tom Rini [Sat, 22 Apr 2023 22:31:46 +0000 (18:31 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
* Add StarFive VisionFive v2 Board support
* Support CONFIG_REMAKE_ELF
* Code cleanups for RISC-V architecture
Tom Rini [Sat, 22 Apr 2023 22:31:21 +0000 (18:31 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-watchdog
- watchdog: arm_smc_wdt: add watchdog support (Lionel)
- watchdog: ftwdt010: return a previously deleted driver now ported to
DM (Sergei)
- watchdog: Add a watchdog driver for Raspberry Pi boards (Etienne)
Tom Rini [Sat, 22 Apr 2023 22:30:56 +0000 (18:30 -0400)]
Merge tag 'u-boot-stm32-
20230419' of https://source.denx.de/u-boot/custodians/u-boot-stm
configs:
_ Add usb_pgood_delay for ST boards
_ increase malloc size for pre-reloc for stm32mp15
_ Set CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=2s for stm32mp15
dts:
_ Add QSPI support on STM32MP13x SoC family
_ Add FMC support on STM32MP13x SoC family
drivers/machine:
_ pinctrl_stm32: Add slew rate support for stm32_pinctrl_get_pin_muxing()
_ spi: stm32_qspi: Remove useless struct stm32_qspi_flash
_ rawnand: stm32_fmc2: remove unsupported EDO mode
_ stm32mp: fix various array bounds checks
Tom Rini [Sat, 22 Apr 2023 22:30:31 +0000 (18:30 -0400)]
Merge tag 'u-boot-nand-
20230422' of https://source.denx.de/u-boot/custodians/u-boot-nand-flash
Pull request for u-boot-nand-
20230422
Replaces a patch by Linus Walleij merged with pull request
u-boot-nand-
20230417, with a newer version that contains fixes for tests
run by Tom Rini.
Linus Walleij [Fri, 7 Apr 2023 13:40:05 +0000 (15:40 +0200)]
mtd: rawnand: nand_base: Handle algorithm selection
For BRCMNAND with 1-bit BCH ECC (BCH-1) such as used on the
D-Link DIR-885L and DIR-890L routers, we need to explicitly
select the ECC like this in the device tree:
nand-ecc-algo = "bch";
nand-ecc-strength = <1>;
nand-ecc-step-size = <512>;
This is handled by the Linux kernel but U-Boot core does
not respect this. Fix it up by parsing the algorithm and
preserve the behaviour using this property to select
software BCH as far as possible.
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm]
Link: https://lore.kernel.org/all/20230407134008.1939717-3-linus.walleij@linaro.org/
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Dario Binacchi [Sat, 22 Apr 2023 20:58:10 +0000 (22:58 +0200)]
Revert "mtd: rawnand: nand_base: Handle algorithm selection"
It will be replaced by a more recent version which contains fixes for
tests run by Tom Rini.
This reverts commit
ff33d3c87c2a1ab576607c2f67a9cb7690a4e7ca.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
FUKAUMI Naoki [Thu, 20 Apr 2023 12:00:41 +0000 (12:00 +0000)]
configs: rockchip: radxa-cm3-io: drop CONFIG_USB_DWC3_GENERIC
it's not used by rk35xx
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
FUKAUMI Naoki [Thu, 20 Apr 2023 12:00:40 +0000 (12:00 +0000)]
arm: dts: rockchip: radxa-cm3-io, rock-3a: enable regulators for usb
enable regulators for usb host function
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
FUKAUMI Naoki [Thu, 20 Apr 2023 12:00:39 +0000 (12:00 +0000)]
configs: rockchip: radxa-cm3-io, rock-3a: enable commands for i2c/pmic/regulator
enable commands for i2c/pmic/regulator and relevant configs.
also drop configs for unused regulators.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
FUKAUMI Naoki [Thu, 20 Apr 2023 12:00:38 +0000 (12:00 +0000)]
configs: rockchip: rock-3a: make usb host work
add support for USB host function on ROCK 3A
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 18 Apr 2023 16:46:45 +0000 (16:46 +0000)]
mmc: rockchip_sdhci: Limit number of blocks read in a single command
Using DMA to load TF-A into SRAM fails when booting from eMMC on RK3588.
## Checking hash(es) for Image atf-3 ... sha256 error!
Bad hash value for 'hash' hash node in 'atf-3' image node
spl_load_simple_fit: can't load image loadables index 2 (ret = -1)
mmc_load_image_raw_sector: mmc block read error
Fix this by using PIO mode in SPL and limit the number of blocks used in
a single read command to avoid triggering Data End Bit Error interrupt.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Peter Geis [Tue, 18 Apr 2023 16:46:44 +0000 (16:46 +0000)]
mmc: sdhci: Allow disabling of SDMA in SPL
Rockchip emmc devices have a similar issue to Rockchip dwmmc devices,
where performing DMA to SRAM later causes issues with suspend/resume.
Allow us to toggle SDMA in SPL for sdhci similar to ADMA support, so we
can ensure DMA is not used when loading the SRAM code.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
[jonas@kwiboo.se: add Kconfig default value and fix ADMA typo]
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Jonas Karlman [Tue, 18 Apr 2023 16:46:42 +0000 (16:46 +0000)]
clk: rockchip: rk3588: Add limited TMCLK_EMMC clock support
The device tree sdhci node reference the TMCLK_EMMC clock, add limited
support this clock to rk3588 cru driver. Fixes probe of sdhci driver.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 18 Apr 2023 16:46:41 +0000 (16:46 +0000)]
rockchip: rk3588-rock-5b: Include eMMC node in SPL dtb
Add sdhci node to SPL and u-boot,spl-boot-order. Also add more supported
mmc modes and pinctrl.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 18 Apr 2023 16:46:39 +0000 (16:46 +0000)]
mmc: rockchip_sdhci: Add support for RK3588
Add support for RK3588 to the rockchip sdhci driver.
Use driver data to handle differences between RK3568 and RK3588:
- Set "Receive original clock source is auto gating" for RK3588.
- Set "Receive clock source is no-inverted" only on RK3568 and "Transmit
clock source is invertion of original clock input" for RK3588.
- Use different txclk_tapnum for HS400 modes on RK3588.
- Configure the CMDOUT reg for HS400 modes for RK3588.
This is based on the mainline linux and vendor kernel driver and have
successfully been tested with rock5b-rk3588_defconfig and
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_SPEED_MODE_SET=y
using the following command to switch mode and then read 512 MiB of data
from eMMC into memory,
=> mmc dev 0 0 <mode> && mmc info && mmc read
10000000 2000 10000
for each of the modes below.
0 = MMC legacy
1 = MMC High Speed (26MHz)
3 = MMC High Speed (52MHz)
4 = MMC DDR52 (52MHz)
10 = HS200 (200MHz)
11 = HS400 (200MHz)
12 = HS400ES (200MHz)
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 18 Apr 2023 16:46:38 +0000 (16:46 +0000)]
rockchip: rk3568-rock-3a: Enable support for more eMMC modes
Add supported mmc modes to rk3568-rock-3a device tree.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 18 Apr 2023 16:46:37 +0000 (16:46 +0000)]
mmc: rockchip_sdhci: Fix HS400 and HS400ES mode on RK3568
Adjust tap number for transmit clock, tap number and delay number for
strobe input to fix HS400 modes on RK3568.
New values have been picked from vendor kernel and u-boot and have
successfully been tested with rock-3a-rk3568_defconfig and
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_SPEED_MODE_SET=y
using the following command to switch mode and then read 512 MiB of data
from eMMC into memory,
=> mmc dev 0 0 <mode> && mmc info && mmc read
10000000 2000 10000
for each of the modes below.
0 = MMC legacy
1 = MMC High Speed (26MHz)
3 = MMC High Speed (52MHz)
4 = MMC DDR52 (52MHz)
10 = HS200 (200MHz)
11 = HS400 (200MHz)
12 = HS400ES (200MHz)
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 18 Apr 2023 16:46:35 +0000 (16:46 +0000)]
mmc: rockchip_sdhci: Rearrange and simplify used regs and flags
This rearrange and remove duplicate defines to make the code cleaner.
There is no need to read vendor area1 and use an offset each time, it is
easier and clearer to just use the reg offset defined in TRM, same as
the other vendor regs.
This also removes use of the misspelled const for the RK3588 CMDOUT reg,
it will be re-added when support for RK3588 is introduced.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 18 Apr 2023 16:46:34 +0000 (16:46 +0000)]
mmc: rockchip_sdhci: Remove empty get_phy and set_enhanced_strobe ops
Remove empty implementations of get_phy and set_enhanced_strobe ops.
Change driver set_enhanced_strobe to return 0 in order to allow missing
implementation of the ops.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 18 Apr 2023 16:46:33 +0000 (16:46 +0000)]
mmc: rockchip_sdhci: Update speed mode controls in set_ios_post
Refactor set_ios_post ops to correctly set UHS Speed Select field values
according to TRM. Also set or unset Enhanced Strobe Enable bit and
eMMC Card present bit in set_ios_post, the Enhanced Strobe Enable bit
was never unset after switching to HS400ES mode.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 18 Apr 2023 16:46:31 +0000 (16:46 +0000)]
mmc: rockchip_sdhci: Refactor execute tuning error handling
Check return value from mmc_send_cmd and clear HOST_CONTROL2 when there
is an error. Also skip enable of interrupt signaling and remove a delay,
a delay is already happening in sdhci_send_command.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Thu, 20 Apr 2023 15:55:15 +0000 (15:55 +0000)]
mmc: rockchip_sdhci: Use set_clock and config_dll sdhci_ops
Change to configure clock and DLL in set_clock and config_dll ops
instead of in the set_ios_post ops.
With this change the output clock is turned off while configuring DLL
parameters, according to the design recommendations.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 18 Apr 2023 16:46:29 +0000 (16:46 +0000)]
mmc: rockchip_sdhci: Add set_clock and config_dll sdhci_ops
Add support for the set_clock and config_dll sdhci_ops. Use of these ops
will allow configuration of DLL while the output clock is disabled.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 18 Apr 2023 16:46:27 +0000 (16:46 +0000)]
mmc: rockchip_sdhci: Remove unneeded emmc_phy_init
Remove the unneeded emmc_phy_init now that the no-inverter flag is
handled correctly after commit
2321a991bbb5 ("rockchip: sdhci: rk3568:
bypass DLL when clk <= 52 MHz").
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 18 Apr 2023 16:46:26 +0000 (16:46 +0000)]
mmc: rockchip_sdhci: Fix use of device private data
The device private data is misused in rockchip_sdhci_of_to_plat and
rockchip_sdhci_execute_tuning.
In these functions dev_get_priv is assigned to struct sdhci_host:
struct sdhci_host *host = dev_get_priv(dev);
Instead, the sdhci host should refer to host in struct rockchip_sdhc:
struct rockchip_sdhc *priv = dev_get_priv(dev);
struct sdhci_host *host = &priv->host;
Because host is the first member in struct rockchip_sdhc this is not a
real problem, lets fix it anyway and also use priv name consistently.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 18 Apr 2023 16:46:24 +0000 (16:46 +0000)]
mmc: sdhci: Set UHS Mode Select field for UHS SDR25 mode
Set correct UHS Mode Select field value for UHS SDR25 (50MHz) mode.
Fixes:
d1c0a2200afb ("mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 18 Apr 2023 16:46:23 +0000 (16:46 +0000)]
mmc: sdhci: Fix HISPD bit handling for MMC HS 52MHz mode
Set High Speed Enable bit for MMC High Speed (52MHz) mode.
Fixes:
f12341a95295 ("mmc: sdhci: Fix HISPD bit handling")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Chris Morgan [Thu, 13 Apr 2023 14:13:03 +0000 (09:13 -0500)]
ARM: dts: rockchip: rk3588s-u-boot: Add rng node
Add a node for the trng found on RK3588 SoCs.
Changes in V3:
- Added Reviewed-By tag.
Changes in V2:
- None
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Chris Morgan [Thu, 13 Apr 2023 14:13:02 +0000 (09:13 -0500)]
rockchip: rng: add trngv1 for rk3588
This adds support for the TRNG found in the RK3588 SoC to the
rockchip_rng driver so that it can be used for things such as
seeding randomness to Linux.
Changes in V3:
- Moved notes from commit to cover letter.
- Added Reviewed-By tag.
Changes in V2:
- Modified Kconfig to note that the Rockchip RNG driver supports all
versions of the hardware (v1, v2, and the trng in the rk3588).
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Mon, 17 Apr 2023 19:07:25 +0000 (19:07 +0000)]
clk: rockchip: rk3568: Add dummy I2S1_MCLKOUT_TX clock support
A RK3568 device tree pmic node can reference the I2S1_MCLKOUT_TX clock
in assigned-clocks, add dummy support to set parent of this clock to the
rk3568 cru driver.
Fixes probe of pmic driver and missing regulators on affected boards,
rk3568-evb and rk3568-rock-3a.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Mon, 17 Apr 2023 19:07:23 +0000 (19:07 +0000)]
pinctrl: rockchip: Fix IO mux selection on RK3568
IO mux selection is not working correctly for all pins. Sync mux route
data from linux to add any missing and update wrong trigger pins to fix
this. Also apply the pull-up fix needed for GPIO0 D3-D6.
Fixes:
1977d746aa54 ("rockchip: rk3568: add rk3568 pinctrl driver")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Jonas Karlman [Mon, 17 Apr 2023 19:07:21 +0000 (19:07 +0000)]
rockchip: rk3588: Sync sdmmc node from linux-next
Sync the sdmmc node from linux-next, include required nodes in SPL and
imply Kconfig options required for functional sdmmc clk in SPL and
U-Boot proper.
This make it possible for both SPL and U-Boot proper to configure sdmmc
clocks. In SPL, before TF-A is loaded, scru regs is configured, in
U-Boot proper a SCMI message is sent to TF-A.
Fixes:
95c8656b72dc ("ARM: dts: rockchip: rk3588s-u-boot: Add sdmmc node")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Mon, 17 Apr 2023 19:07:20 +0000 (19:07 +0000)]
rockchip: rk3588: Add support for sdmmc clocks in SPL
Booting from sdmmc on RK3588 currently works because of a workaround in
the device tree, clocks are reordered so that the driver use ciu-sample
instead of ciu, and the BootRom initializes sdmmc clocks before SPL is
loaded into DRAM.
The sdmmc clocks are normally controlled by TF-A using SCMI. However,
there is a need to control these clocks in SPL, before TF-A has started.
This adds a rk3588_scru driver to control the sdmmc clocks in SPL before
TF-A has started, using scru regs. It also adds a small glue driver to
bind the scmi clock node to the rk3588_scru driver in SPL.
Fixes:
7a474df74023 ("clk: rockchip: Add rk3588 clk support")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Mon, 17 Apr 2023 19:07:18 +0000 (19:07 +0000)]
clk: scmi: Add Kconfig option for SPL
Building U-Boot SPL with CLK_SCMI and SCMI_FIRMWARE Kconfig options
enabled and SPL_FIRMWARE disabled result in the following error.
drivers/clk/clk_scmi.o: in function `scmi_clk_gate':
drivers/clk/clk_scmi.c:84: undefined reference to `devm_scmi_process_msg'
drivers/clk/clk_scmi.c:88: undefined reference to `scmi_to_linux_errno'
drivers/clk/clk_scmi.o: in function `scmi_clk_get_rate':
drivers/clk/clk_scmi.c:113: undefined reference to `devm_scmi_process_msg'
drivers/clk/clk_scmi.c:117: undefined reference to `scmi_to_linux_errno'
drivers/clk/clk_scmi.o: in function `scmi_clk_set_rate':
drivers/clk/clk_scmi.c:139: undefined reference to `devm_scmi_process_msg'
drivers/clk/clk_scmi.c:143: undefined reference to `scmi_to_linux_errno'
drivers/clk/clk_scmi.o: in function `scmi_clk_probe':
drivers/clk/clk_scmi.c:157: undefined reference to `devm_scmi_of_get_channel'
make[1]: *** [scripts/Makefile.spl:527: spl/u-boot-spl] Error 1
make: *** [Makefile:2043: spl/u-boot-spl] Error 2
Add Kconfig option so that CLK_SCMI can be disabled in SPL to fix this.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Mon, 17 Apr 2023 19:07:17 +0000 (19:07 +0000)]
rockchip: rk35xx: Enable fdtoverlay and kernel compression
Add fdtoverlay_addr_r, kernel_comp_addr_r and imply use of
OF_LIBFDT_OVERLAY on RK3568 and RK3588 to support fdtoverlay
and kernel compression.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jonas Karlman [Mon, 17 Apr 2023 19:07:15 +0000 (19:07 +0000)]
rockchip: rk35xx: Fix boot with a large fdt blob
The TF-A blobs used to boot RK3568 and RK3588 boards is based on atf
v2.3. Mainline atf v2.3 contains an issue that could lead to a crash
when it fails to parse the fdt blob being passed as the platform param.
An issue that was fixed in atf v2.4.
The vendor TF-A seem to suffer from a similar issue, and this prevents
booting when fdt blob is large enough to trigger this condition.
Fix this by implying SPL_ATF_NO_PLATFORM_PARAM to let u-boot pass a
NULL pointer instead of the fdt blob as the platform param.
This fixes booting Radxa ROCK 3A after recent sync of device tree.
Fixes:
073d911ae64a ("rockchip: rk3568-rock-3a: Sync device tree from linux")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Jonas Karlman [Mon, 17 Apr 2023 19:07:14 +0000 (19:07 +0000)]
rockchip: rk3588-rock-5b: Fix sdmmc boot
Running U-Boot from a SD-card on ROCK 5 Model B fails to load atf using
DMA and prints debug_uart messages.
<debug_uart>
<debug_uart>
U-Boot SPL 2023.04-rc3 (Mar 12 2023 - 00:30:16 +0000)
Trying to boot from MMC1
## Checking hash(es) for config config-1 ... OK
## Checking hash(es) for Image atf-1 ... sha256 error!
Bad hash value for 'hash' hash node in 'atf-1' image node
mmc_load_image_raw_sector: mmc block read error
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
Use fifo-mode to disable DMA in SPL, add same-as-spl to boot-order and
remove DEBUG_UART_ANNOUNCE option to fix this.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
John Keeping [Mon, 27 Mar 2023 11:01:10 +0000 (12:01 +0100)]
rockchip: otp: fix misc_read() return values
The documentation for misc_read() says:
Return: number of bytes read if OK (may be 0 if EOF), -ve on error
The Rockchip efuse driver implements this so it should return the number
of bytes read rather than zero on success. Fix this so that the driver
follows the usual contract for read operations.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
John Keeping [Mon, 27 Mar 2023 11:01:09 +0000 (12:01 +0100)]
rockchip: efuse: fix misc_read() return values
The documentation for misc_read() says:
Return: number of bytes read if OK (may be 0 if EOF), -ve on error
The Rockchip efuse driver implements this so it should return the number
of bytes read rather than zero on success. Fix this so that the driver
follows the usual contract for read operations.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
John Keeping [Mon, 27 Mar 2023 11:01:08 +0000 (12:01 +0100)]
rockchip: misc: fix misc_read() return check
misc_read() is documented to return the number of bytes read or a
negative error value. The Rockchip drivers currently do not implement
this correctly and instead return zero on success or a negative error
value.
In preparation for fixing the drivers, fix the condition here to only
error on negative values.
Suggested-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Chris Morgan [Fri, 24 Mar 2023 18:53:07 +0000 (13:53 -0500)]
rockchip: video: Add support for RK3568 DSI Host
Add support for DSI Host controller on Rockchip RK3568. This driver
is heavily based on the Rockchip dw_mipi_dsi_rockchip.c driver in
Linux and the stm32_dsi.c driver in U-Boot. It should be easy to add
support for other SoCs as the only missing component from the mainline
driver is setting the VOP big or VOP little (which the rk3568 does
not have).
Driver was tested for use in sending commands to a DSI panel in order
to obtain the panel ID.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Chris Morgan [Fri, 24 Mar 2023 18:53:06 +0000 (13:53 -0500)]
drivers: phy: add Innosilicon DSI-DPHY driver
Add support for the Innosilicon DSI-DPHY driver for Rockchip SOCs.
The driver was ported from Linux and tested on a Rockchip RK3566
based device to query the panel ID via a DSI command.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonathan Liu [Thu, 23 Mar 2023 10:35:58 +0000 (21:35 +1100)]
ram: rk3399: add missing high row detection
For 2 GB LPDDR4 single-rank RAM with 16 rows, the Rockchip ddr init bin
prints:
"Bus Width=32 Col=10 Bank=8 Row=16 CS=1 Die Bus-Width=16 Size=2048MB"
U-Boot TPL prints:
"BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB"
Add missing high row detection so that U-Boot TPL prints Row=16, same as
the Rockchip ddr init bin:
"BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB"
Signed-off-by: Jonathan Liu <net147@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Sun, 19 Mar 2023 18:39:51 +0000 (18:39 +0000)]
gpio: rockchip: Add support for RK3568 and RK3588 banks
The GPIO V2 controller on RK3568 and RK3588 works very similar to
prior generation, main difference is the use of a write mask in the
upper 16 bits and register address offset have changed.
GPIO_VER_ID is a new register at 0x0078 that is used to determine when
the driver should use new or old register offsets and values. Earlier
generation return 0x0 from this offset.
Refactor code and add support for the GPIO V2 controller used in RK3568
and RK3588.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Johan Jonker [Sun, 19 Mar 2023 15:06:23 +0000 (16:06 +0100)]
rockchip: configs: mk808: enable usb support
Enable usb support in the mk808_defconfig.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Johan Jonker [Sun, 19 Mar 2023 15:06:11 +0000 (16:06 +0100)]
rockchip: configs: mk808: change CONFIG_TPL_TEXT_BASE
Currently the Rockchip rk3066a u-boot-tpl.bin file needs
to add the characters "RK30", while the other SoCs replace
the first 4 bytes. Bring this in line with the rest by
lowering CONFIG_TPL_TEXT_BASE and update rockchip.rst
instructions.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Johan Jonker [Sun, 19 Mar 2023 15:05:57 +0000 (16:05 +0100)]
arm: dts: rockchip: sync rk3066/rk3188 DT files from linux-next v6.2-rc4
Sync rk3066/rk3188 DT files from Linux.
This is the state as of linux-next v6.2-rc4.
New nfc node for MK808 rk3066a.
CRU nodes now have a clock property.
To prefend dtoc errors a fixed clock must also be
included for tpl/spl in the rk3xxx-u-boot.dtsi file.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>