util: Add util_widen_mask function.

Widens the given bit mask by a multiplier, meaning that it will
replicate each bit by that amount.
For example: 0b101 widened by 2 will become: 0b110011

This is typically used in shader I/O to transform a 64-bit
writemask to a 32-bit writemask.

Moving this function here because it is used in multiple places.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14005>

nir: Fix sorting per-primitive outputs.

Fixes: 59860d487368e18a1d85ea96988c5f4c904879b0
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14006>

CI: Don't stream wget directly into bash

If our environment has pipefail set, bash could exit early before wget
has completed, and we will die with a broken pipe. Work around this by
first downloading from wget, and then executing from bash.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14036>

v3d: enable ARB_texture_view

v2 (Iago):
 - Add comments to failing tests

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

v3d: enable ARB_texture_buffer_object and ARB_texture_buffer_range

Through their specific PIPE_CAP.

v2 (Iago)
 - Add comment in test failure

Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

st/pbo: set layer coord for array textures

Even for drivers not supporting layers, we need to include the layer
coordinate (zero in this case) when using array textures in the
download/upload FS.

Otherwise we are missing a component to get the texture, which ends up
in a malformed NIR shader.

v5 (Ilia):
 - Do not emit needless layer code.

v6 (Ilia):
 - Add comment clarifying the code logic behind.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

st/pbo: add the image format in the download FS

In the V3D driver there is a NIR lowering step for `image_store`
intrinsic, where the image store format is required for doing the proper
lowering.

Thus, let's define it for the download FS instead of
keeping it as NONE.

v2 (Illia)
 - Use format only for drivers not supporting format-less writing.

v4 (Illia):
 - Use PIPE_CAP_IMAGE_STORE_FORMATTED to reduce combinations.

v5 (Ilia):
 - Use indirect array for download FS in not formatless-store support
   drivers.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

gallium: add new PIPE_CAP_IMAGE_STORE_FORMATTED

This capability is enabled for drivers supporting formatless image
writing in shader.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

v3d: clamp clear color

On clearing a color buffer, clamp the passed color values to the allowed
ones.

Hardware do clamping for TLB values, but not for clear values.

v2 (Iago)
 - Add comment about hardware-based clamping on clear values.

v3 (Iago):
 - Use format utils to simplify clamping
 - Move clamp color function as utility

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

gallium/util: add helper to clamp colors to valid range

v3 (Iago):
 - Fix comment.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

st/pbo: do not use GS for NIR preferred shaders

If PBO require to use a GS, this is created with TGSI.

For drivers preferring NIR shaders, they need to translate it from TGSI
to NIR. But unfortunately TGSI to NIR for GS is not implemented, which
makes it crash.

So let's use a GS only for drivers preferring TGSI.

v3:
 - Add comment (Iago and Alejandro)

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

mesa: allow TEXTURE_BUFFER target for ARB_texture_buffer_range

While TEXTURE_BUFFER do not support texture parameters in
ARB_texture_buffer_object specification, it does in
ARB_texture_buffer_range, specifically TEXTURE_BUFFER_OFFSET and
TEXTURE_BUFFER_SIZE.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

v3d: restrict formats supported for PIPE_BIND_SHADER_IMAGE

So far we were relying on the supported formats filtering when
creating images from the user API.

But for some other (internal) uses, some of the formats that pass the
filter need to be restricted when binding them as shader images, as they
are not supported for this case.

v3 (Iago):
 - Change commit message.

Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

v3d: add support for no buffer object bound

From the GL_OES_texture_buffer spec:

      "If no buffer object is bound to the buffer texture, the results
       of the texel access are undefined."

this can be interpreted as allowing any result to come back, but not
terminate the program.

The current solution is not entirely complete, as it could still try to
get a wrong address for the shader state address.

This can be checked with piglit test
arb_texture_buffer_object-render-no-bo; the test is skip because it
requires OpenGL 3.1, but if overriding the version then it will crash.

Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

v3d: support for texture buffer objects

This commit handles the support for texture buffer objects. In general
it is mostly about using the buffer info from the pipe_image_view
instead of the texture info.

v2:
 - Rework some assertions (Iago)
 - Remove needless comment (Alejandro)
 - Fix comment typos (Iago)

v3:
 - Fix typos (Iago)

Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

nir/algebraic: optimize a*#b & -4

fossil-db (Sienna Cichlid):
Totals from 611 (0.47% of 128647) affected shaders:
CodeSize: 3096680 -> 3090976 (-0.18%)
Instrs: 570494 -> 569249 (-0.22%)
Latency: 5765865 -> 5759619 (-0.11%)
InvThroughput: 969840 -> 967608 (-0.23%)
VClause: 9690 -> 9688 (-0.02%)
Copies: 42884 -> 42894 (+0.02%); split: -0.01%, +0.03%
PreVGPRs: 28290 -> 28288 (-0.01%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13752>

nir/opt_offsets: remove need to loop try_extract_const_addition

fossil-db (Sienna Cichlid):
Totals from 1 (0.00% of 134572) affected shaders:
no stat changes

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14009>

nir/opt_offsets: fix try_extract_const_addition recursion

This initially looks like a miscompilation bug, but I don't think it's
actually possible for it to create incorrect code.

fossil-db (Sienna Cichlid):
Totals from 32 (0.02% of 134572) affected shaders:
VGPRs: 1336 -> 1320 (-1.20%)
CodeSize: 90552 -> 89468 (-1.20%)
Instrs: 17007 -> 16852 (-0.91%); split: -0.92%, +0.01%
Latency: 429040 -> 428136 (-0.21%); split: -0.21%, +0.00%
InvThroughput: 84966 -> 84572 (-0.46%); split: -0.47%, +0.00%
Copies: 1458 -> 1468 (+0.69%); split: -0.07%, +0.75%
Branches: 382 -> 384 (+0.52%)
PreSGPRs: 970 -> 968 (-0.21%)
PreVGPRs: 1029 -> 1011 (-1.75%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14009>

nir: add NIR_DEBUG envvar

Move all the NIR related debug environmental variables in a single
NIR_DEBUG one.

Use NIR_DEBUG=help to print all the available options.

v2:
 - Use a macro to simplify (Marcin, Jason)
 - Remove wrong changes (Marcin)

v3 (Marcin):
 - Remove rendundant NIR mentioning in option descriptions.
 - Unwrap option descriptions.
 - Ensure the constant is unsigned.
 - Use extern array to remove switch.

v4:
 - Add missing kernel shader (Jason).
 - Add unlikely() (Marcin).

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13840>

broadcom/compiler: improve documentation for Z writes

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14037>

v3d,v3dv: don't disable EZ for passthrough Z writes

The early-Z test uses Z values produced from FEP, so when
we write Z from a shader we need to disable EZ. However, there
are some instances where want to write the FEP-Z from the shader,
in which case we would not need to disable EZ.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14037>

broadcom/compiler: track passthrough Z writes

In some cases we need to make the shaders write the Z value produced
from rasterization (FEP). Track these instances because they are relevant
to early EZ setup.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14037>

broadcom/compiler: emit passthrough Z write if shader reads Z

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14037>

anv: allow VK_IMAGE_LAYOUT_UNDEFINED as final layout

From VK_KHR_synchronization2:
   "Image memory barriers that do not perform an image layout
    transition can be specified by setting oldLayout equal to
    newLayout.

    E.g. the old and new layout can both be set to
    VK_IMAGE_LAYOUT_UNDEFINED, without discarding data in the
    image."

v2: make assert more readable (Lionel Landwerlin)

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14008>

iris/batch: Add support for engines contexts

As described in "intel: Add intel_gem_create_context_engines", this
should make it easier to support an I915_ENGINE_CLASS_FOO engine in
the future. For example, maybe something like:

https://gitlab.freedesktop.org/drm/igt-gpu-tools/-/commit/98c3bbd5b54eb9914329155bfeddd0ad88f96ad2

Reworks:
 * Tweak engine counting logic (s-b Ken)
 * Tweak init of engine_classes in iris_init_engines_context (s-b Ken)
 * Add STATIC_ASSERT on engine_classes (Jordan)
 * Paulo: Call iris_hw_context_set_unrecoverable() for engines context
 * Rename to has_engines_context (s-b Paulo)
 * Jordan: Handle creating a new engines context when the context needs
   to be replaced.
 * Ken: Tweak context destroy code paths.
 * Call iris_lost_context_state on every batch. (s-b Ken)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>

iris: Make iris_kernel_context_get_priority() public

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>

iris: Destroy all batches with a new iris_destroy_batches() function

Suggested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>

iris: Move away from "hw" for some context terminology

Kernel contexts can take two forms now. In the older case a kernel
context will have a single hardware context. With an "engines" based
context, the context can now have 1 or more hardware contexts.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>

iris/batch: Add exec_flags field

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>

iris: extract iris_hw_context_set_unrecoverable()

We're going to add a second caller.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>

iris/batch: Move kernel context init to iris_init_non_engine_contexts

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>

iris: Add iris_init_batches

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>

intel: Add intel_gem_create_context_engines

Engines based contexts operate somewhat different for executing
batches. Previously, we would specify a bitmask value such as
I915_EXEC_RENDER to specify to run the batch on the render ring.

With engines contexts, instead this becomes an array of "engines", and
when the context is created we specify the class and instance of the
engine.

Each index in the array has a separate hardware-context. Previously we
had to create separate kernel level contexts to create multiple
hardware contexts, but now a single kernel context can own multiple
hardware contexts.

Another forward looking advantage to using the engines based contexts
is that the kernel does not plan to add new supported I915_EXEC_FOO
masks, whereas they instead plan to add new I915_ENGINE_CLASS_FOO
engine classes. Therefore some rings may only be usable with an engine
based class.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>

intel: Add intel_gem_count_engines

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>

docs: Add calendar entries for 22.0 release candidates.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14029>

venus: fix vn_instance_wait_roundtrip when seqno wraps

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14026>

zink/ci: Add GL4.6 tessellation flake

Seen in https://gitlab.freedesktop.org/mesa/mesa/-/jobs/16318152#L636
which is extremely unrelated.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14010>

ci: Use ci-fairy minio login via token file

For every CI job, put JWT content into a file and unset CI_JOB_JWT
environment var
=======

* virgl jobs:
- Share JWT token file to crosvm instance
- Keep using `export -p` due to high complexity in the scripts
  of these jobs. At least, the CI_JOB_JWT will not be leaked,
  since it is being unset at the `before_script` phase of each
  Mesa CI job.

* iris jobs: Update lava_job_submitter to take token file as argument
- generate-env with CI_JOB_JWT_TOKEN_FILE
- create token file during baremetal init stage

* baremetal jobs: Copy token file to bare-metal NFS

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Reviewed-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14004>

ci: Uprev piglit

Bring up the piglit replay jwt-file argument feature.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Reviewed-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14004>

ci: Update ci-fairy to version with --token-file support

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Reviewed-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14004>

meson: check for lld split TLSDESC bug (fixes #5665)

Reviewed-by: Emma Anholt <emma@anholt.net>
Tested-by: Michel Dänzer <mdaenzer@redhat.com>
Signed-off-by: Alex Xu (Hello71) <alex_y_xu@yahoo.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13934>

egl/wayland: fix surface dma-buf feedback error exits

This fixes a leak that was introduced in 89d15b9a "egl/wayland: add
initial dma-buf feedback support".

Do not leak dri2_surf->wl_dmabuf_feedback when we have to bail out
because of allocation issues.

Signed-off-by: Leandro Ribeiro <leandro.ribeiro@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13985>

egl/wayland: do not try to bind to wl_drm if not advertised

This fixes a bug that was introduced in 89d15b9a "egl/wayland: add
initial dma-buf feedback support".

Sometimes we have to fallback to wl_drm. But do not try to bind to it
when it is not advertised by the compositor.

This issue was found by n3rdopolis and reported here:
https://gitlab.freedesktop.org/mesa/mesa/-/issues/5697

Signed-off-by: Leandro Ribeiro <leandro.ribeiro@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13985>

radv: upload shader binaries of a pipeline contiguously in memory

RGP expects shaders to be contiguous in memory, otherwise it explodes
because we have to generate huge captures with lot of holes.

This reduces capture sizes of Cyberpunk 2077 from ~3.5GiB to ~180MiB.

This should also help for future pipeline libraries.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13690>

radv: pass a pointer to a pipeline for the create/insert cache functions

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13690>

radv: upload shader binaries after they are all compiled

Instead of mixing compilation and upload. This will allow us to
upload all shader binaries contiguously in memory and also for future
pipeline libraries work.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13690>

radv: add a helper function to upload a shader binary

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13690>

radv: remove never reached free() when compiling shaders

binary_out is never NULL and binaries are freed from the pipeline
after they are added to the cache.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13690>

freedreno/ci/a306: split off snorm blending failures

The hardware doesn't support this.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13990>

freedreno/ci/a306: split off the f32 blend / texturing failures

The hardware doesn't support this.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13990>

freedreno/ci/a306: separate msaa fails

The driver does not implement MSAA. When that happens these can be split
up further.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13990>

windows: Use TLS context/dispatch with shared-glapi

However they have to be called via _glapi_get_dispatch/context. This
would be safe to do on any platform, but the extra indirection is only
necessary on Windows since TLS vars can't be exported from a DLL.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13634>

freedreno/a3xx: add some legacy formats

These can be used in "legacy" buffer textures.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13989>

freedreno/ci/a306: add additional skip which hangchecks

I was having trouble getting a run to complete without this. Was working
earlier, not sure what changed.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13989>

freedreno/a6xx: Set the tess BO ptrs in the program stateobj.

Saves some draw-time work for tess.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13851>

freedreno/a6xx: Skip emitting tess BO pointers past the shader's constlen.

Some shaders don't want these pointers, and going past the constlen would
potentially overwrite consts from other draws.  This is a port of a fix
from turnip.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13851>

freedreno/a6xx: Allocate a fixed-size tess factor BO.

Saves per-batch allocations, avoids reallocation for various vertex
counts, and avoids needing the indirect tess addrs constobj so that we
could emit the relocs to the tess BO after we'd emitted all the draws.

Also apparently it fixes one of our CTS fails.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13851>

radv: Don't emit framebuffer state if there is no renderpass active.

The framebuffer state could still be dirty from when the previous
renderpass was bound.

Fixes: 5632359959f ("radv: Remove the skipping of framebuffer emission if we don't have a framebuffer.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5702
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13969>

d3d12: Support compat level 330

Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14001>

venus: ignore framebuffer for VkCommandBuffer executed outside of render pass

The vulkan spec states[1]:
> If the VkCommandBuffer will not be executed within a render pass instance,
> or if the render pass instance was begun with vkCmdBeginRenderingKHR,
> renderPass, subpass, and framebuffer are ignored.

but venus will still try to encode them, resulting in a guest-side
assert or host-side command stream error.

[1]: https://www.khronos.org/registry/vulkan/specs/1.2-extensions/man/html/VkCommandBufferInheritanceInfo.html#_description

Signed-off-by: Ryan Neph <ryanneph@google.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13988>

nir: Make nir_build_alu() variants per 1-4 arg count.

This saves a bunch of generated code to pack up the extra NULLs to get to
4 args, and saves executing the conditions in nir_build_alu() to then skip
those NULLs.

Saves another 27kb on disk.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13916>

nir: Uninline a bunch of nir.h functions.

I aimed for "things that look like big switch statements, or cases where
the compiler is unlikely to be able to constant-propagate an argument into
something useful."

Saves another 80kb on disk.  No perf difference on iris shader-db, n=23.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13916>

iris: Drop redundant iris_resource_disable_aux call

Drop the call to iris_resource_disable_aux in
iris_resource_configure_aux. With the previous patches, we no longer
create CCS surfaces and pick the AUX_NONE usage. As a result, if the aux
usage is NONE, all iris_resource fields already indicate that aux is
disabled.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12398>

iris: Enable CCS_E on 32-bpc float formats on TGL+

Allow CCS_E on these formats on TGL+ for a couple reasons:

1) TGL doesn't have the option to fall back to CCS_D/fast-clears like
   prior platforms do.

2) The CCS compression scheme on TGL improves to encode more than 3
   levels of compression. This should help floating point formats.

In my measurements, enabling this on TGL results in a minor performance
improvement on Paraview (+0.06%) rather than a major regression like on
prior platforms. The improvement was measured by taking the average of 3
runs of: waveletvolume.py -d 256 -f 600.

Also, the Intel performance CI reports a 3.81% ±0.12% FPS improvement in
Bioshock Infinite.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12398>

intel/isl: Unify fmt checks in isl_surf_supports_ccs

On TGL+, require that the surface format supports CCS_E in order to
support CCS. This aligns with the ISL code that pads the primary
surface for CCS on this platform.

Pre-TGL, require support for either CCS_D or CCS_E.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12398>

docs: update calendar and link releases notes for 21.3.1

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13998>

docs: add release notes for 21.3.1

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13998>

CI/d3d12: Add a quick_shader run

Refactor the YML for some DRY, and rename the existing pass from
"-windows" to "-quick_gl" to disambiguate it.

Reviewed-by: Enrico Galli <enrico.galli@intel.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13902>

CI/windows: Move reference files to relevant ci subdirectories

Reviewed-by: Enrico Galli <enrico.galli@intel.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13902>

CI/windows: Move SPIRV-to-DXIL test YML to microsoft folder

Reviewed-by: Enrico Galli <enrico.galli@intel.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13902>

CI/windows: Move D3D12 test YML to D3D12 driver folder

Reviewed-by: Enrico Galli <enrico.galli@intel.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13902>

freedreno/crashdec: Basing GMU log decoding

Looks like each entry is four dwords, with the second dword being a
timestamp.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13937>

freedreno/crashdec: Fallback to chip_id for GPU id

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13937>

freedreno/crashdec: HFI queue decoding

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13937>

freedreno/crashdec: Split out mempool decoding

Before we start adding GMU HFI decoding, lets split the other big
section specific decoding (mempool) out into it's own file.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13937>

turnip: Move CP_SET_SUBDRAW_SIZE to vkCmdBindPipeline() time.

Now that the subdraw size is constant for a pipeline, this lets tess draws
avoid the slow path in vkCmdDraw*().

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6089>

turnip: use SUBDRAW_SIZE and constant sized tess bos

This fixes the problem of large indirect draws, and at the same time avoids
allocating too large buffers for tessellation.

Reworked by @anholt to use a separate tess factor BO so we can skip the
WFIs to set the TESSFACTOR_ADDR.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6089>

freedreno/ir3: Make a shared helper for the tess factor stride.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6089>

nouveau/nir: Use natural alignment for scalars

We used to request vec4 alignment for everything on the nir codepath,
but this triggers an assertion failure since a0b82c24b6, which prohibits
vec4 alignment on scalars. Since requiring vec4 alignment on scalars is a
little silly anyway, this patch relaxes the alignment to naturally aligned
for scalars.

Fixes about 27 crashing tests in piglit and deqp on kepler, including eg
piglit/tests/spec/glsl-1.30/execution/fs-large-local-array.shader_test

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13883>

util/u_trace/perfetto: add new env variable to enable perfetto

When using the Vulkan API, command buffers can be recorded way before
perfetto is enabled. This can be problematic if you want already
recorded command buffers to produce traces.

This new environment variable makes perfetto enabled internally so
that command buffers are recorded with timestamps, even though no
perfetto recording happens.

v2: rename to GPU_TRACE_INSTRUMENT (Rob)

v3: Move instrumentation check to generated headers (Danylo)
    Decouple instrumentation enabling from tracing (Danylo)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13911>

util/u_trace: add end_of_pipe property to tracepoints

In order to capture the timestamp when things actually end on Intel
GPU HW, we need to know whether the timestamp should be capture at the
top or end of pipeline.

v2: use one line python if/else (Danylo)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13911>

glsl: fix for unused variable in glsl_types.cpp

Unused variable vector_elements is now used in return from
function decode_type_from_blob instead of encoded.basic.vector_elements.
In the code we can see how those variables were equated
and then the operations were made exactly to vector_elements.
But variable didn't pass into any other variables or functions.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5536
Signed-off-by: Viktoriia Palianytsia <v.palianytsia@globallogic.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13725>

spirv: handle SpvOpMemberName

Now we can see field names in structs instead of generic
"fieldN" with NIR_PRINT=1.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13941>

nir/opt_deref: don't try to cast empty structures

Found while running valgrind :

==3583454== Invalid read of size 4
==3583454==    at 0xF48336: glsl_get_struct_field_offset (nir_types.cpp:84)
==3583454==    by 0xC7CD0D: opt_replace_struct_wrapper_cast (nir_deref.c:1068)
==3583454==    by 0xC7CDD9: opt_deref_cast (nir_deref.c:1087)
==3583454==    by 0xC7DD8E: nir_opt_deref_impl (nir_deref.c:1369)
==3583454==    by 0xC7DF4E: nir_opt_deref (nir_deref.c:1428)
==3583454==    by 0xA63F3C: brw_kernel_from_spirv (brw_kernel.c:325)
==3583454==    by 0xA3BC2C: main (intel_clc.c:481)
==3583454==  Address 0xe4f7e88 is 24 bytes after a block of size 48 in arena "client"

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13952>

gallium/d3d12: Don't use designated initializers

Use of designated initializers requires at least '/std:c++20', and
mesa is using c++14 by default.

Fixes: 8d3a3e7a00b ("microsoft/compiler: Use textures for SRVs")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13912>

microsoft/compiler: Fix dxil_nir_create_bare_samplers()

_mesa_hash_table_u64_search() returns the data directly, not an
hash_entry object. We also need to take the descriptor set into account
for this pass to work properly on Vulkan shaders.

Fixes: 46bc7cf6783 ("microsoft/compiler: Rewrite sampler splitting pass to be smarter and handle derefs")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13912>

freedreno/ci: add piglit runs for a306

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13920>

android: define cpp_rtti=false because libLLVM is built w/o RTTI (v2)

libLLVM for Android is built without RTTI, but after commit ad86267
mesa inherits meson default RTTI enabled state.

cpp_rtti=false is added to meson options in android/mesa3d_cross.mk

(v2) Add Fixes tag and use spaces instead of tabs for aligning the trailing \

Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Fixes: ad862674 ("meson: Don't override built-in cpp_rtti option, error if it's invalid")
Cc: "21.3" "21.2" mesa-stable
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13901>

Revert "android: define cpp_rtti=false because libLLVM is built w/o RTTI"

This reverts commit f659d00000a1a3667f9861d01d5828dd12ec6857.
The revert is done because essential Fixes tag was missing
and to apply a better version that could be picked for mesa-stable.

Acked-by: Marijn Suijten <marijn.suijten@somainline.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13901>

aco: don't create DPP instructions with SGPR operands

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 2e6834d4f6c ("aco: combine DPP into VALU before RA")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13976>

panfrost: Add empty tile flags to GenXML

These flags control special CRC handling for empty tiles using the CRC
clear colour field added on Bifrost. Their use depends on CRC being
used. We missed these flags earlier; let's add them since they are used
by the Valhall DDK but are not new to Valhall.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13982>

radv: fix resetting the entire vertex input dynamic state

If there is holes, eg. the application firsts set vertex attributes
0 and 1, then vertex attributes 0 and 7, the format of vertex attribute
1 is still the previous one, while it should be FORMAT_INVALID to avoid
a GPU hang.

This fixes a GPU hang with Yuzu.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5627
Cc: 21.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13856>

anv: Drop code from get_blorp_surf_for_anv_buffer

The code to handle ASTC surfaces hasn't been needed since commit
dd92179a72 ("anv: Canonicalize buffer formats for image/buffer copies").

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13881>

anv: Allow transfer-only linear ASTC images

Some apps depend on this to run.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2397

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13881>

anv: Require transfer features for transfer usages

In order for an image to support the transfer usage, require that its
format can be used for blits or copies.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13881>

iris: Allow GPU-based uploads of ASTC textures

ISL recently started allowing linear ASTC surfaces to be created. With
that in place, iris can perform GPU-based uploads to ASTC textures in
the same way it does so with other compressed surfaces.

We're not aware of any reason to continue special-casing ASTC texture
uploads, so we get rid of the code which does so.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13881>

intel/isl: Allow creating non-Y-tiled ASTC surfaces

The sampler can only decode ASTC surfaces that are Y-tiled. ISL has
been asserting this restriction at surface creation time.

However, some drivers want to create a surface that is only used for
copying compressed data. And during the copy, the surface won't have a
compressed format.

To enable this behavior, we choose to move the tiling assertion to the
moment a surface state is created for the sampler.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13881>

blorp: Disallow multisampling for BLORP compute blits and copies.

We don't support typed image writes for multisampling, so we can't
handle multisampled destinations.  We also usually handle MSAA by
running the fragment shader per-sample, which we aren't accounting
for in our compute shaders, so we can't handle MSAA sources either.

We could do both of these things if we really wanted to, but we don't.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13524>

blorp: Assert that BLORP_BATCH_PREDICATE_ENABLE isn't set for compute

We don't support this, so make sure it isn't happening.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13524>

blorp: Don't try to use the 3D stencil write hardware for compute

When we're doing a stencil blit via a fragment shader, we can avoid
W-tiling shenanigans by using the stencil write hardware on Skylake
and later.

Of course, the compute engine doesn't have stencil fragment writes,
so it can't do that.  Just fall back to the detiling shenanigans.

Caught by Piglit's arb_copy_image-formats when forcing iris to use
BLOCS for resource_copy_region on Icelake.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13524>