platform/kernel/u-boot.git
3 years agoppc: Remove T1023RBD boards and T1024RDB_SECURE_BOOT
Tom Rini [Sat, 15 May 2021 01:34:22 +0000 (21:34 -0400)]
ppc: Remove T1023RBD boards and T1024RDB_SECURE_BOOT

These boards have not been converted to CONFIG_DM_PCI by the deadline
and is also missing conversion to CONFIG_DM.  Remove them.  As this is
the only ARCH_T1023 platform left, remove that support as well.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoppc: Remove MPC8555CDS boards
Tom Rini [Sat, 15 May 2021 01:34:21 +0000 (21:34 -0400)]
ppc: Remove MPC8555CDS boards

These boards have not been converted to CONFIG_DM_PCI by the deadline and is
also missing conversion to CONFIG_DM.  Remove them.  As this is the only
ARCH_MPC8555 platform left, remove that support as well.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoppc: Remove MPC8541CDS board
Tom Rini [Sat, 15 May 2021 01:34:20 +0000 (21:34 -0400)]
ppc: Remove MPC8541CDS board

This board has not been converted to CONFIG_DM_PCI by the deadline and is
also missing conversion to CONFIG_DM.  Remove it.  As this is the only
MPC8541 target left, remove that architecture support as well.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoppc: Remove TQM834x board
Tom Rini [Sat, 15 May 2021 01:34:19 +0000 (21:34 -0400)]
ppc: Remove TQM834x board

This board has not been converted to CONFIG_DM_PCI by the deadline and is
also missing conversion to CONFIG_DM.  Remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoppc: Remove sbc8548 boards
Tom Rini [Sat, 15 May 2021 01:34:18 +0000 (21:34 -0400)]
ppc: Remove sbc8548 boards

These boards have not been converted to CONFIG_DM_PCI by the deadline and are
also missing conversion to CONFIG_DM.  Remove them.

Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoppc: Remove caddy2 / vme8349 boards
Tom Rini [Sat, 15 May 2021 01:34:17 +0000 (21:34 -0400)]
ppc: Remove caddy2 / vme8349 boards

These boards have not been converted to CONFIG_DM_PCI by the deadline
and is also missing conversion to CONFIG_DM.  Remove them.

Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoppc: Remove MPC8313ERDB boards
Tom Rini [Sat, 15 May 2021 01:34:16 +0000 (21:34 -0400)]
ppc: Remove MPC8313ERDB boards

These boards have not been converted to CONFIG_DM_PCI by the deadline.
Remove them.

Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoppc: Remove ve8313 board
Tom Rini [Sat, 15 May 2021 01:34:15 +0000 (21:34 -0400)]
ppc: Remove ve8313 board

This board has not been converted to CONFIG_DM_PCI by the deadline.
Remove it.

Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Heiko Schocher <hs@denx.de>
3 years agoppc: Remove mpc8308_p1m board
Tom Rini [Sat, 15 May 2021 01:34:14 +0000 (21:34 -0400)]
ppc: Remove mpc8308_p1m board

This board has not been converted to CONFIG_DM_PCI by the deadline.
Remove it.

Cc: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoppc: Remove many T104x boards
Tom Rini [Sat, 15 May 2021 01:34:13 +0000 (21:34 -0400)]
ppc: Remove many T104x boards

These boards have not been converted to CONFIG_DM_PCI, CONFIG_DM_USB or
in some cases CONFIG_DM itself by the deadline.  Remove them.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoppc: Remove sbc8349 board
Tom Rini [Sat, 15 May 2021 01:34:12 +0000 (21:34 -0400)]
ppc: Remove sbc8349 board

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agom68k: Remove M5475x boards
Tom Rini [Sat, 15 May 2021 01:34:10 +0000 (21:34 -0400)]
m68k: Remove M5475x boards

These board has not been converted to CONFIG_DM_PCI by the deadline.
Remove them.  As this is the last of the mcf547x_8x family of boards,
remove that support as well.

Cc: TsiChung Liew <Tsi-Chung.Liew@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agom68k: Remove M5485 boards
Tom Rini [Sat, 15 May 2021 01:34:09 +0000 (21:34 -0400)]
m68k: Remove M5485 boards

These board has not been converted to CONFIG_DM_PCI by the deadline.
Remove them.  As this is all of the CONFIG_M548x platforms as well,
remove that code.

Cc: TsiChung Liew <Tsi-Chung.Liew@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoppc: Drop MPC837XERDB_SLAVE for now
Tom Rini [Sat, 15 May 2021 01:34:07 +0000 (21:34 -0400)]
ppc: Drop MPC837XERDB_SLAVE for now

Drop the MPC837XERDB_SLAVE configuration.

Cc: Sinan Akman <sinan@writeme.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agopci: Remove non-DM board_pci_fixup_dev() declaration
Tom Rini [Sat, 15 May 2021 01:34:06 +0000 (21:34 -0400)]
pci: Remove non-DM board_pci_fixup_dev() declaration

With the ventana boards migrated to DM_PCI and DM_ETH, we can remove
this prototype.

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoMerge tag 'dm-pull-6jul21' of https://source.denx.de/u-boot/custodians/u-boot-dm
Tom Rini [Wed, 7 Jul 2021 17:34:42 +0000 (13:34 -0400)]
Merge tag 'dm-pull-6jul21' of https://source.denx.de/u-boot/custodians/u-boot-dm

various minor sandbox improvements

3 years agoMerge branch '2021-07-06-update-to-gcc11-clang11'
Tom Rini [Wed, 7 Jul 2021 17:32:22 +0000 (13:32 -0400)]
Merge branch '2021-07-06-update-to-gcc11-clang11'

- Update CI to use gcc-11.1 and clang-11 to build everything.  This
  requires a few fixes to the code that these newer compilers have
  exposed.

3 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-riscv
Tom Rini [Wed, 7 Jul 2021 15:34:29 +0000 (11:34 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv

3 years agoAzure/GitLab: Move to gcc-11.1.0 and LLVM-11
Tom Rini [Fri, 2 Jul 2021 14:41:58 +0000 (10:41 -0400)]
Azure/GitLab: Move to gcc-11.1.0 and LLVM-11

- Move to gcc-11.1.0 builds from kernel.org for supported platforms and
  LLVM-11 for those tests.
- As Heinrich has noted, the RISC-V platform specification has a profile
  OS-A for running rich operating systems like Linux and BSD. This profile
  requires 64bit and UEFI conforming to the EBBR. Only the 'embedded'
  profile may use 32bit.  Given this, drop grub for 32bit RISC-V as it no
  longer compiles with gcc-11.1 and upstream is unlikely to fix it:
  https://www.mail-archive.com/grub-devel@gnu.org/msg30736.html
- Update to grub-2.06 release to address other issues of building with
  gcc-11.1.
- Update to newer Xtensa (gcc-9.2.0) and ARC (gcc-10.2) toolchains

Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agox86: Drop _X86EMU_env definition when CONFIG_BIOSEMU is used
Bin Meng [Wed, 7 Jul 2021 07:36:26 +0000 (15:36 +0800)]
x86: Drop _X86EMU_env definition when CONFIG_BIOSEMU is used

With x86 we can execute an option ROM either natively or using the
x86 emulator (if enabled with CONFIG_BIOSEMU). Both of these share
the _X86EMU_env variable, with the native code using it to hold
register state during interrupt processing.

At present, in 32-bit U-Boot, the variable is declared twice, once
in common code and once in code only compiled with CONFIG_BIOSEMU.

With GCC 11 this causes a 'multiple definitions' error on boards
with CONFIG_BIOSEMU.

Drop the emulator definition when CONFIG_BIOSEMU is used.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
3 years agobootstage: Eliminate when not enabled
Tom Rini [Mon, 3 May 2021 20:48:58 +0000 (16:48 -0400)]
bootstage: Eliminate when not enabled

When we do not have bootstage enabled, rather than include an empty
dummy function, we just don't reference it.  This saves us space in some
tight builds.  This also shows a few cases where show_boot_progress was
incorrectly guarded before.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoMakefile: Disable gcc-10.0 introduced warnings
Tom Rini [Mon, 3 May 2021 20:48:57 +0000 (16:48 -0400)]
Makefile: Disable gcc-10.0 introduced warnings

Follow what the Linux Kernel does here and disable the
'zero-length-bounds', 'array-bounds' and 'stringop-overflow' warnings
here.

This brings in commits 5c45de21a222344720996e2d79 and 5a76021c2eff7
from the Linux Kernel.

Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agopinctrl: mscc: Fix multiple definition error
Tom Rini [Mon, 3 May 2021 20:48:56 +0000 (16:48 -0400)]
pinctrl: mscc: Fix multiple definition error

With gcc-11 we get a multiple errors here as the declarations for
mscc_pinctrl_ops and mscc_gpio_ops are missing an extern.

CC: Gregory CLEMENT <gregory.clement@bootlin.com>
Cc: Lars Povlsen <lars.povlsen@microchip.com>
Cc: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
3 years agoeb_cpu5282: Declare diplay_width / display_height as externs
Tom Rini [Mon, 3 May 2021 20:48:55 +0000 (16:48 -0400)]
eb_cpu5282: Declare diplay_width / display_height as externs

The board code here references the display_width / display_height
variables set in the video driver, declare these as externs as gcc-11
will notice and lead to a multiple definition error.

Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agofreescale: Drop unnecessary cpld_data_t non-typedef
Tom Rini [Mon, 3 May 2021 20:48:54 +0000 (16:48 -0400)]
freescale: Drop unnecessary cpld_data_t non-typedef

In some board cpld.h files the definition of the cpld_data struct
not-quite makes a typedef for cpld_data_t.  This problem is caught with
gcc-11 as a multiple definition error.  As there are no users of this
non-typedef, fix this by not declaring it one to begin with.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoARM: mvebu: a38x: Correct mismatched bound warnings
Tom Rini [Mon, 3 May 2021 20:48:53 +0000 (16:48 -0400)]
ARM: mvebu: a38x: Correct mismatched bound warnings

With gcc-11 we see:
drivers/ddr/marvell/a38x/ddr3_debug.c:672:47: error: argument 2 of type 'u32[5]' {aka 'unsigned int[5]'} with mismatched bound [-Werror=array-parameter=]
  672 | int ddr3_tip_read_adll_value(u32 dev_num, u32 pup_values[MAX_INTERFACE_NUM * MAX_BUS_NUM],
      |                                           ~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from drivers/ddr/marvell/a38x/ddr3_training_ip_engine.h:10,
                 from drivers/ddr/marvell/a38x/ddr3_init.h:17,
                 from drivers/ddr/marvell/a38x/ddr3_debug.c:6:
drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h:116:47: note: previously declared as 'u32[]' {aka 'unsigned int[]'}

And similar warnings.  Correct these by updating the prototype.  Remove
the prototype for ddr3_tip_read_pup_value as it is unused.

Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoMerge tag 'u-boot-atmel-fixes-2021.10-a' of https://source.denx.de/u-boot/custodians...
Tom Rini [Wed, 7 Jul 2021 12:52:14 +0000 (08:52 -0400)]
Merge tag 'u-boot-atmel-fixes-2021.10-a' of https://source.denx.de/u-boot/custodians/u-boot-atmel

First set of u-boot-atmel fixes for 2021.10 cycle:

This small fixes set is dedicated to fixing the onewire subsystem for
the at91 boards which was broken since 2020.04.

3 years agoriscv: dts: add OpenPiton RISC-V board dts support
Tianrui Wei [Wed, 7 Jul 2021 07:48:22 +0000 (15:48 +0800)]
riscv: dts: add OpenPiton RISC-V board dts support

Previous device tree for OpenPiton emits a warning during compilation.
This commit fixes the previous warning adds dts to the OpenPiton RISC-V
board and added the device tree to MAINTAINER file.

Signed-off-by: Tianrui Wei <tianrui-wei@outlook.com>
Reported-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 years agoMerge branch '2021-07-06-platform-updates'
Tom Rini [Tue, 6 Jul 2021 22:10:10 +0000 (18:10 -0400)]
Merge branch '2021-07-06-platform-updates'

- mpc8379erdb DM_USB, DM_PCI and DM_ETH support.
- Drop PCI support from the integrator family of boards
- Add synquacer support
- Assorted lpc32xx updates and improvements
- snapdragon (and related) fixes, Broadcom iproc update

3 years agoserial: serial_msm: Ensure BAM/single character mode are disabled
Stephan Gerhold [Mon, 28 Jun 2021 08:40:09 +0000 (10:40 +0200)]
serial: serial_msm: Ensure BAM/single character mode are disabled

At the moment, the U-Boot serial_msm driver does not initialize the
UART_DM_DMEN register with the required value. Usually this does not
cause any problems, because there is Qualcomm's LK bootloader running
before U-Boot which initializes the register with the correct value.

It's important that this register is initialized correctly, because
the U-Boot driver does not make use of the BAM/DMA or single character
mode functionality of the UART controller. A different bootloader
before U-Boot might initialize the register differently.

For example, on DragonBoard 410c U-Boot can also be installed to the
"aboot" partition (replacing LK entirely). In this case U-Boot is
loaded directly by SBL, which seems to use the single-character mode
for some reason. In single character mode there is always just one
char in the FIFO, instead of the 4 characters expected by
msm_serial_fetch(). It also causes issues with "earlycon" later in
the Linux kernel, which tries to output 4 chars at once,
but only the first char will be written.

This causes early UART log in Linux to be corrupted like this:

    [ 00ano:ameoi .Q1B[ 00ac _idaM00080oo'ahani-lcle._20). 15NdNii 5 SPMSJ20:U2
    [ 00rkoolmsamel
    [ 00Fw ]elamletopsioble
    [ 00ore

instead of

    [    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd030]
    [    0.000000] Machine model: Qualcomm Technologies, Inc. APQ 8016 SBC
    [    0.000000] earlycon: msm_serial_dm0 at MMIO 0x00000000078b0000 (options '')
    [    0.000000] printk: bootconsole [msm_serial_dm0] enabled

Make sure to initialize UART_DM_DMEN correctly to fix this issue
when loading U-Boot directly after SBL (instead of through LK).

There is no functional difference when loading U-Boot through LK
since LK also initializes UART_DM_DMEN to 0x0. [1]

[1]: https://git.linaro.org/landing-teams/working/qualcomm/lk.git/tree/platform/msm_shared/uart_dm.c?h=dragonboard410c-LA.BR.1.2.7-03810-8x16.0-linaro3#n203

Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
3 years agoarm: dts: db410c: Add missing cd-gpios for SD card detection
Stephan Gerhold [Sun, 27 Jun 2021 11:06:15 +0000 (13:06 +0200)]
arm: dts: db410c: Add missing cd-gpios for SD card detection

It looks like SD card detection is broken at the moment for DB410c.
The eMMC is detected correctly, but the SD card is not.

This is probably similar to the issue fixed in commit 850514740358
("mmc: msm_sdhci: Use mmc_of_parse for setting host_caps") for eMMC,
except that the SD card does not have a property like "non-removable"
that skips the card detection.

The SDHCI on DB410c cannot detect itself if a SD card is inserted,
so add the necessary cd-gpios to make SD card detection work again.

While at it, fix the #gpio-cells for the soc_gpios to avoid DTC
warnings - the soc_gpios are actually already used with two cells
for the gpio-leds so this was just wrong all the time.

Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
3 years agoarm: snapdragon: Fix typo in clk_bcr_update()
Sheep Sun [Sun, 20 Jun 2021 02:34:35 +0000 (10:34 +0800)]
arm: snapdragon: Fix typo in clk_bcr_update()

Fix typo in clock-snapdragon.c

Signed-off-by: Sheep Sun <sunxiaoyang2003@gmail.com>
3 years agoarm: snapdragon: Use correct GICC register on APQ8016
Sheep Sun [Sun, 20 Jun 2021 02:34:34 +0000 (10:34 +0800)]
arm: snapdragon: Use correct GICC register on APQ8016

The GICC register used by u-boot is 0x0a20c000, which is actually a GICC
for WCNSS, the WLAN processor. U-boot runs on the Application Processor,
therefore it should use APCS GICC instead. Hence, correct it with APCS GICC
register address.

Signed-off-by: Sheep Sun <sunxiaoyang2003@gmail.com>
3 years agolpc32xx: ea-lpc3250devkitv2: enable i2c (DM)
Trevor Woerner [Fri, 11 Jun 2021 02:37:09 +0000 (22:37 -0400)]
lpc32xx: ea-lpc3250devkitv2: enable i2c (DM)

Enable a DMed i2c driver for the ea-lpc3250devkitv2 board.
Include some sample commands/output for testing.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
3 years agoKconfig: convert CONFIG_SYS_I2C_LPC32XX
Trevor Woerner [Fri, 11 Jun 2021 02:37:08 +0000 (22:37 -0400)]
Kconfig: convert CONFIG_SYS_I2C_LPC32XX

Convert the CONFIG_SYS_I2C_LPC32XX configuration symbol from an include
directive to a Kconfig value.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agolpc32xx: i2c: finish DM/OF code
Trevor Woerner [Fri, 11 Jun 2021 02:37:07 +0000 (22:37 -0400)]
lpc32xx: i2c: finish DM/OF code

Add the of_match/compatible string to the lpc32xx i2c driver so it works
correctly with device-tree.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
3 years agolpc32xx: i2c: fix base address
Trevor Woerner [Fri, 11 Jun 2021 02:37:06 +0000 (22:37 -0400)]
lpc32xx: i2c: fix base address

The lpc32xx driver was not obtaining the per-device base address correctly
from the device tree. Fix the FIXME in order to get the correct base address.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
3 years agolpc32xx: i2c: remove unused define
Trevor Woerner [Fri, 11 Jun 2021 02:37:05 +0000 (22:37 -0400)]
lpc32xx: i2c: remove unused define

The LPC32XX_I2C_STAT_DRMI is not used anywhere so remove it.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
3 years agoarm: lpc32xx: add EA LPC3250 DevKitv2 board support
Trevor Woerner [Fri, 11 Jun 2021 02:37:04 +0000 (22:37 -0400)]
arm: lpc32xx: add EA LPC3250 DevKitv2 board support

Add basic support for running U-Boot on the Embedded Artists LPC3250
Developer's Kit v2 board by launching U-Boot from the board's s1l loader
(which comes pre-installed on the board).

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
3 years agolpc32xx: import device tree from Linux
Trevor Woerner [Fri, 11 Jun 2021 02:37:03 +0000 (22:37 -0400)]
lpc32xx: import device tree from Linux

Import the dtsi, dts, and clock binding files for the lpc32xx ea3250 board
directly and unmodified from the latest Linux kernel.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
3 years agolpc32xx: Kconfig: switch to CONFIG_CONS_INDEX
Trevor Woerner [Fri, 11 Jun 2021 02:37:02 +0000 (22:37 -0400)]
lpc32xx: Kconfig: switch to CONFIG_CONS_INDEX

There's nothing special or unique to the lpc32xx that requires its own config
parameter for specifying the console uart index. Therefore instead of using
the lpc32xx-specific CONFIG_SYS_LPC32XX_UART include parameter, use the
already-available CONFIG_CONS_INDEX from Kconfig.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agoconfigs: synquacer: Enable EFI capsule update support
Masami Hiramatsu [Fri, 4 Jun 2021 09:45:31 +0000 (18:45 +0900)]
configs: synquacer: Enable EFI capsule update support

Enable EFI capsule update support. With the EFI capsule update,
you can update U-Boot, TF-A and OP-TEE. TF-A and OP-TEE are
usually combined as a FIP binary, but if the binary is bigger
than 480KB, you have to modify FIP header, split the OP-TEE
and stores the OP-TEE binary in the different place. This
configuration supports both cases.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
3 years agodoc: qemu: arm64: Fix the documentation of capsule update
Masami Hiramatsu [Fri, 4 Jun 2021 09:45:21 +0000 (18:45 +0900)]
doc: qemu: arm64: Fix the documentation of capsule update

Since the EDK2 GenerateCapsule script is out of date and it
doesn't generate the supported version capsule file, the document
should refer the mkeficapsule in tools.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
3 years agoboard: synquacer: Add DeveloperBox 96boards EE support
Masami Hiramatsu [Fri, 4 Jun 2021 09:45:10 +0000 (18:45 +0900)]
board: synquacer: Add DeveloperBox 96boards EE support

Add the DeveloperBox 96boards EE support. This board is also
known as Socionext SynQuacer E-Series. It contians one "SC2A11"
SoC, which has 24-cores of arm Cortex-A53, and 4 DDR3 slots,
3 PCIe slots (1 4x port and 2 1x ports which are expanded via
PCIe bridge chip), 2 USB 3.0 ports and 2 USB 2.0 ports, 2 SATA
ports and 1 GbE, 64MB NOR flash and 8GB eMMC on standard
MicroATX Form Factor.

For more information, see this page;
  https://www.96boards.org/product/developerbox/

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
3 years agoARM: dts: synquacer: Add device trees for DeveloperBox
Masami Hiramatsu [Fri, 4 Jun 2021 09:44:59 +0000 (18:44 +0900)]
ARM: dts: synquacer: Add device trees for DeveloperBox

Add device trees for 96boards EE DeveloperBox and basement SynQuacer
SoC dtsi. These files are imported from EDK2

commit 83d38b0b4c0f240d4488c600bbe87cea391f3922

as-is (except for the changes #include path and some macros).

And add U-Boot specific changes in synquacer-sc2a11-developerbox-u-boot.dtsi

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
3 years agoi2c: synquacer: SNI Synquacer I2C controller
Jassi Brar [Fri, 4 Jun 2021 09:44:48 +0000 (18:44 +0900)]
i2c: synquacer: SNI Synquacer I2C controller

Add driver for class of I2C controllers found on
Socionext Synquacer platform.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
3 years agospi: synquacer: Add HSSPI SPI controller driver for SynQuacer
Jassi Brar [Fri, 4 Jun 2021 09:44:27 +0000 (18:44 +0900)]
spi: synquacer: Add HSSPI SPI controller driver for SynQuacer

This is a driver for the HSSPI SPI controller on SynQuacer SoC.
The HSSPI has command sequence mode (memory mapped) and
direct mode (FIFO access). The driver will operate it under
the direct mode. And before booting OS, it switch back to the
command sequence mode since that is compatible with default
EDK2 behavior.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
3 years agommc: synquacer: Add SynQuacer F_SDH30 SDHCI driver
Jassi Brar [Fri, 4 Jun 2021 09:44:16 +0000 (18:44 +0900)]
mmc: synquacer: Add SynQuacer F_SDH30 SDHCI driver

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
3 years agopci: synquacer: Add SynQuacer ECAM based PCIe driver
Masami Hiramatsu [Fri, 4 Jun 2021 09:44:06 +0000 (18:44 +0900)]
pci: synquacer: Add SynQuacer ECAM based PCIe driver

Add ECAM based SynQuacer PCIe RC driver. This driver configures the
PCIe RC and filter out a ghost pcie config.

Since the Linux kernel expects "socionext,synquacer-pcie-ecam" device
is configured by firmware (EDK2), it doesn't re-configure in the kernel.
So as same as EDK2, U-Boot needs to configure it before boot the kernel.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
3 years agogpio: Introduce CONFIG_GPIO_EXTRA_HEADER to cleanup #ifdefs
Masami Hiramatsu [Fri, 4 Jun 2021 09:43:55 +0000 (18:43 +0900)]
gpio: Introduce CONFIG_GPIO_EXTRA_HEADER to cleanup #ifdefs

Since some SoCs and boards do not hae extra asm/arch/gpio.h,
introduce CONFIG_GPIO_EXTRA_HEADER instead of adding
!define(CONFIG_ARCH_XXXX) in asm/gpio.h.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
3 years agodm: pci: Skip setting VGA bridge bits if parent device is the host bus
Masami Hiramatsu [Fri, 4 Jun 2021 09:43:34 +0000 (18:43 +0900)]
dm: pci: Skip setting VGA bridge bits if parent device is the host bus

Commit bbbcb5262839 ("dm: pci: Enable VGA address forwarding on bridges")
sets the VGA bridge bits by checking pplat->class, but if the parent
device is the pci host bus device, it can be skipped. Moreover, it
shouldn't access the pplat because the parent has different plat data.

Without this fix, "pci enum" command cause a synchronous abort.

pci_auto_config_devices: start
PCI Autoconfig: Bus Memory region: [78000000-7fffffff],
Physical Memory [78000000-7fffffffx]
PCI Autoconfig: Bus I/O region: [0-ffff],
Physical Memory [77f00000-77f0ffffx]
pci_auto_config_devices: device pci_6:0.0
PCI Autoconfig: BAR 0, Mem, size=0x1000000, address=0x78000000 bus_lower=0x79000000

PCI Autoconfig: BAR 1, Mem, size=0x8000000, No room in resource, avail start=79000000 / size=8000000, need=8000000
PCI: Failed autoconfig bar 14

PCI Autoconfig: BAR 2, I/O, size=0x4, address=0x1000 bus_lower=0x1004

PCI Autoconfig: BAR 3, Mem, size=0x2000000, address=0x7a000000 bus_lower=0x7c000000

PCI Autoconfig: BAR 4, I/O, size=0x80, address=0x1080 bus_lower=0x1100

PCI Autoconfig: ROM, size=0x80000, address=0x7c000000 bus_lower=0x7c080000

"Synchronous Abort" handler, esr 0x96000006
elr: 00000000e002bd28 lr : 00000000e002bce8 (reloc)
elr: 00000000fff6fd28 lr : 00000000fff6fce8
x0 : 0000000000001041 x1 : 000000000000003e
x2 : 00000000ffb0f8c8 x3 : 0000000000000001
x4 : 0000000000000080 x5 : 0000000000000000
x6 : 00000000fff718fc x7 : 000000000000000f
x8 : 00000000ffb0f238 x9 : 0000000000000008
x10: 0000000000000000 x11: 0000000000000010
x12: 0000000000000006 x13: 000000000001869f
x14: 00000000ffb0fcd0 x15: 0000000000000020
x16: 00000000fff71cc4 x17: 0000000000000000
x18: 00000000ffb13d90 x19: 00000000ffb14320
x20: 0000000000000000 x21: 00000000ffb14090
x22: 00000000ffb0f8c8 x23: 0000000000000001
x24: 00000000ffb14c10 x25: 0000000000000000
x26: 0000000000000000 x27: 0000000000000000
x28: 00000000ffb14c70 x29: 00000000ffb0f830

Code: 52800843 52800061 52800e00 97ffcf65 (b9400280)
Resetting CPU ...

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agoata: ahci-pci: Use scsi_ops to initialize ops
Masami Hiramatsu [Fri, 4 Jun 2021 09:43:23 +0000 (18:43 +0900)]
ata: ahci-pci: Use scsi_ops to initialize ops

Without this fix, scsi-scan will cause a synchronous abort
when accessing ops->scan.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agoarm: iproc: Add higher speed configurations
Chris Packham [Fri, 4 Jun 2021 02:25:36 +0000 (14:25 +1200)]
arm: iproc: Add higher speed configurations

Add support for 1.3GHz, 1.35GHz and 1.4GHz parts. This is based on
equivalent code in Broadcom's LDK 5.0.6.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
3 years agoARM: integrator: Drop PCI support
Linus Walleij [Sat, 15 May 2021 12:44:19 +0000 (14:44 +0200)]
ARM: integrator: Drop PCI support

We didn't convert the Integrator to use DM for PCI in
time, and we don't use it either so let's just drop
PCI support from the Integrator.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
3 years agompc8379erdb: enable DM_USB DM_PCI DM_ETH
Sinan Akman [Tue, 11 May 2021 18:18:02 +0000 (14:18 -0400)]
mpc8379erdb: enable DM_USB DM_PCI DM_ETH

Signed-off-by: Sinan Akman <sinan@writeme.com>
3 years agotools: Fix default target compile tools in Python tools
Alper Nebi Yasak [Mon, 7 Jun 2021 18:11:37 +0000 (21:11 +0300)]
tools: Fix default target compile tools in Python tools

In commit 1e4687aa47ed ("binman: Use target-specific tools when
cross-compiling"), a utility function was implemented to get preferred
compilation tools using environment variables like CC and CROSS_COMPILE.
Although it intended to provide custom default tools (same as those in
the global Makefile) when no relevant variables were set (for example
using "gcc" for "cc"), it is only doing so when CROSS_COMPILE is set and
returning the literal name of the tool otherwise.

Remove the check for an empty CROSS_COMPILE, which makes the function
use it as an empty prefix to the custom defaults and return the intended
executables.

Fixes: 1e4687aa47ed ("binman: Use target-specific tools when cross-compiling")
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
3 years agosandbox: cros-ec: Add tests for the Chromium OS EC PWM driver
Alper Nebi Yasak [Wed, 19 May 2021 16:33:31 +0000 (19:33 +0300)]
sandbox: cros-ec: Add tests for the Chromium OS EC PWM driver

This patch adds a limited pulse-width modulator to sandbox's Chromium OS
Embedded Controller emulation. The emulated PWM device supports multiple
channels but can only set a duty cycle for each, as the actual EC
doesn't expose any functionality or information other than that. Though
the EC supports specifying the PWM channel by its type (e.g. display
backlight, keyboard backlight), this is not implemented in the emulation
as nothing in U-Boot uses this type specification.

This emulated PWM device is then used to test the Chromium OS PWM driver
in sandbox. Adding the required device node to the sandbox test
device-tree unfortunately makes it the first PWM device, so this also
touches some other tests to make sure they still use the sandbox PWM.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agoremove struct uclass_driver::ops
Rasmus Villemoes [Wed, 19 May 2021 16:08:11 +0000 (18:08 +0200)]
remove struct uclass_driver::ops

Each _device_ belonging to a given uclass of course has its own ->ops,
of a type determined by and known to the uclass.

However, no instance of a uclass_driver seems to populate ->ops, and
the only reference to it in code is this relocation.

Moreover, it's not really clear what could sensibly be assigned; it
would have to be some "struct uclass_ops *" providing a set of methods
for the core to call on that particular uclass, but should the need
for that ever arise, it would be better to have a member of that
particular type instead of void*.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agosandbox: don't refer to symbol _init
Heinrich Schuchardt [Wed, 19 May 2021 10:02:39 +0000 (12:02 +0200)]
sandbox: don't refer to symbol _init

GCC provides a symbol _init in crti.o on x86_64 and aarch64 but not on
RISC-V. The following lines leads to a build error for sandbox_defconfig on
RISC-V due to the missing symbol:

    common/board_f.c:269:
    #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
            gd->mon_len = (ulong)&_end - (ulong)_init;

The sandbox code is not copied into the memory allocated using mmap().
Hence we can safely use gd->mon_len = 0 to avoid the reference to _init.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
3 years agosandbox: fix sandbox_reset()
Heinrich Schuchardt [Wed, 12 May 2021 16:38:51 +0000 (18:38 +0200)]
sandbox: fix sandbox_reset()

state_uninit() and dm_uninit() are mutually exclusive:

state_uninit() prints via drivers. So it cannot be executed after
dm_uninit().

dm_uninit() requires memory. So it cannot be executed after state_uninit()
which releases all memory.

Just skip dm_uninit() when resetting the sandbox. We will wake up in a new
process and allocate new memory. So this cleanup is not required. We don't
do it in sandbox_exit() either.

This avoids a segmentation error when efi_reset_system_boottime() is
invoked by a UEFI application.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agosandbox: ensure that state->ram_buf is in low memory
Heinrich Schuchardt [Tue, 11 May 2021 19:03:16 +0000 (21:03 +0200)]
sandbox: ensure that state->ram_buf is in low memory

Addresses in state->ram_buf must be in the low 4 GiB of the address space.
Otherwise we cannot correctly fill SMBIOS tables. This shows up in warnings
like:

    WARNING: SMBIOS table_address overflow 7f752735e020

Ensure that state->ram_buf is initialized by the first invocation of
os_malloc().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agodm: define LOG_CATEGORY for all uclass
Patrick Delaunay [Tue, 27 Apr 2021 09:02:19 +0000 (11:02 +0200)]
dm: define LOG_CATEGORY for all uclass

Define LOG_CATEGORY for all uclass to allow filtering with
log command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agosandbox: Support signal handling only when requested
Simon Glass [Mon, 22 Mar 2021 05:21:01 +0000 (18:21 +1300)]
sandbox: Support signal handling only when requested

At present if sandbox crashes it prints a message and tries to exit. But
with the recently introduced signal handler, it often seems to get stuck
in a loop until the stack overflows:

Segmentation violation

Segmentation violation

Segmentation violation

Segmentation violation

Segmentation violation

Segmentation violation

Segmentation violation
...

The signal handler is only useful for a few tests, as I understand it.
Make it optional.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-riscv
Tom Rini [Tue, 6 Jul 2021 16:22:39 +0000 (12:22 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv

3 years agoMerge branch 'network_master' of https://source.denx.de/u-boot/custodians/u-boot-net
Tom Rini [Tue, 6 Jul 2021 16:22:10 +0000 (12:22 -0400)]
Merge branch 'network_master' of https://source.denx.de/u-boot/custodians/u-boot-net

3 years agoboard: sifive: support spl multi-dtb on unmatched board
Zong Li [Wed, 30 Jun 2021 15:23:50 +0000 (23:23 +0800)]
board: sifive: support spl multi-dtb on unmatched board

There are two revisions of unmatched board with different DDR timing,
we'd like to support multi-dtb mechanism in SPL, then it selects the
right DTB at runtime according to PCB revision in I2C EEPROM.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 years agoriscv: dts: add dts for unmatched rev1
Zong Li [Wed, 30 Jun 2021 15:23:49 +0000 (23:23 +0800)]
riscv: dts: add dts for unmatched rev1

The difference between unmatched rev3 and rev1 is DDR timing, the rev3
uses 1866 MT/s for 16GiB, and rev1 uses 2133 MT/s for 8GiB.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 years agoboard: sifive: Add an interface to get PCB revision
Zong Li [Wed, 30 Jun 2021 15:23:48 +0000 (23:23 +0800)]
board: sifive: Add an interface to get PCB revision

There are different DDR parameter settings for different board
revisions. Add a new interface to get the PCB revision to determine
which DT should be selected at runtime.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 years agoriscv: sifive: fu740: Support i2c in spl
Zong Li [Wed, 30 Jun 2021 15:23:47 +0000 (23:23 +0800)]
riscv: sifive: fu740: Support i2c in spl

Enable SPL_I2C_SUPPORT for fu740, and add 'u-boot,dm-spl' property in
i2c node.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 years agoriscv: sifive: fu740: kconfig: Enable support for Opencores I2C controller
Zong Li [Wed, 30 Jun 2021 15:23:46 +0000 (23:23 +0800)]
riscv: sifive: fu740: kconfig: Enable support for Opencores I2C controller

Enable the Opencores I2C controller on FU740

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 years agoboard: sifive: unmatched: add initial support for a platform ID EEPROM
Zong Li [Wed, 30 Jun 2021 15:23:45 +0000 (23:23 +0800)]
board: sifive: unmatched: add initial support for a platform ID EEPROM

Add initial support for the PCB description EEPROM for SiFive HiFive
Unmatched boards.

This implementation is refactored based on Paul Walmsley's porting and
adopt the suggestions from David Abdurachmanov.

Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 years agoARM: dts: at91: fix the GPIO polarity for onewire
Eugen Hristev [Wed, 23 Jun 2021 13:13:35 +0000 (16:13 +0300)]
ARM: dts: at91: fix the GPIO polarity for onewire

The GPIO polarity for onewire must be GPIO_ACTIVE_HIGH.
On previous versions this used to work as it looks like the right flag values
are being passed since :
https://lists.denx.de/pipermail/u-boot/2020-April/407195.html

And that series broke the old functionality for onewire nodes.
Some boards had the correct value for the polarity, but it wasn't clear
so I replaced it with the right macro for the flag, instead of an empty value.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
3 years agow1: w1-gpio: claim the gpio with correct initial flag
Eugen Hristev [Wed, 23 Jun 2021 13:11:58 +0000 (16:11 +0300)]
w1: w1-gpio: claim the gpio with correct initial flag

gpio_request_by_name should be called with proper flags.
The 0 value flag is invalid, and causes bad initialization of the gpio.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
3 years agommc: openpiton: add piton_mmc driver
Tianrui Wei [Thu, 1 Jul 2021 04:54:20 +0000 (12:54 +0800)]
mmc: openpiton: add piton_mmc driver

This commit adds support to piton_mmc driver for OpenPiton-riscv64
This driver has many things set as preconfigured because the hardware
automatically configures most of the settings during startup.

Signed-off-by: Tianrui Wei <tianrui-wei@outlook.com>
Signed-off-by: Jonathan Balkind <jbalkind@ucsb.edu>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
3 years agoboard: riscv: add openpiton-riscv64 SoC support
Tianrui Wei [Thu, 1 Jul 2021 04:54:19 +0000 (12:54 +0800)]
board: riscv: add openpiton-riscv64 SoC support

This patch adds openpiton-riscv64 SOC support. In particular, this
board supports a standard bootflow through zsbl->u-boot SPL->
opensbi->u-boot proper->Linux. There are separate defconfigs for
building u-boot SPL and u-boot proper

Signed-off-by: Tianrui Wei <tianrui-wei@outlook.com>
Signed-off-by: Jonathan Balkind <jbalkind@ucsb.edu>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 years agoriscv: sifive: Set default fdtfile names
Dimitri John Ledkov [Wed, 16 Jun 2021 15:39:06 +0000 (16:39 +0100)]
riscv: sifive: Set default fdtfile names

Set default fdtfile names for unleashed and unmatched boards, as used
in the upstream Linux kernel. This allows sysboot command to find and
load appropriate dtb for the matching kernel from universal stock
Ubuntu RISC-V rootfs images based on fdtdir setting in extlinux.conf.

Signed-off-by: Dimitri John Ledkov <dimitri.ledkov@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
cc: Paul Walmsley <paul.walmsley@sifive.com>
cc: Palmer Dabbelt <palmer@dabbelt.com>
cc: Anup Patel <anup.patel@wdc.com>
cc: Atish Patra <atish.patra@wdc.com>
cc: Pragnesh Patel <pragnesh.patel@sifive.com>
cc: Green Wan <green.wan@sifive.com>

3 years agodrivers: clk: sifive: fu740-prci: replace 'pciaux' with 'pcieaux'
Green Wan [Mon, 28 Jun 2021 11:13:08 +0000 (19:13 +0800)]
drivers: clk: sifive: fu740-prci: replace 'pciaux' with 'pcieaux'

Replace 'pciaux' with 'pcieaux', including name string and function
prefix. The old name string, 'pciaux', might cause an error if PCIe
driver is changed to use clk_get_by_name() with 'pcieaux' to get
clock.

Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 years agonet: dwc_eth_qos: cosmetic: remove unused define EQOS_DESCRIPTOR_ALIGN
Patrick Delaunay [Tue, 30 Mar 2021 12:34:50 +0000 (14:34 +0200)]
net: dwc_eth_qos: cosmetic: remove unused define EQOS_DESCRIPTOR_ALIGN

Remove the define EQOS_DESCRIPTOR_ALIGN unused since the
commit 6f1e668d964e ("net: dwc_eth_qos: Pad descriptors to cacheline size")

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
3 years agoboard: sl28: add DSA support for variant 2
Michael Walle [Wed, 23 Jun 2021 11:56:02 +0000 (13:56 +0200)]
board: sl28: add DSA support for variant 2

Now that u-boot gained DSA support, and it is already enabled for the
kontron_sl28 board, add the last missing piece and enable the
corresponding devices it in the device tree.

Signed-off-by: Michael Walle <michael@walle.cc>
3 years agonet: enetc: propagate the return code from phy_startup() to eth_ops::start
Vladimir Oltean [Tue, 29 Jun 2021 17:53:17 +0000 (20:53 +0300)]
net: enetc: propagate the return code from phy_startup() to eth_ops::start

Make sure that errors in the PHY driver .startup() method, such as no
link, are propagated and not ignored.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
3 years agonet: enetc: force the RGMII MAC speed/duplex instead of using in-band signaling
Vladimir Oltean [Tue, 29 Jun 2021 17:53:16 +0000 (20:53 +0300)]
net: enetc: force the RGMII MAC speed/duplex instead of using in-band signaling

The RGMII spec supports optional in-band status reporting for the speed
and duplex negotiated on the copper side, and the ENETC driver enables
this feature by default.

However, this does not work when the PHY does not implement the in-band
reporting, or when there is a MAC-to-MAC connection described using a
fixed-link. In that case, it would be better to disable the feature in
the ENETC MAC and always force the speed and duplex to the values that
were negotiated and retrieved over MDIO once the autoneg is finished.
Since this works always, we just do it unconditionally and drop the
in-band code.

Note that because we need to wait for the autoneg to complete, we need
to move enetc_setup_mac_iface() after phy_startup() returns, and then
pass the phydev pointer all the way to enetc_init_rgmii().

The same considerations have led to a similar Linux driver patch as well:
https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git/commit/?id=c76a97218dcbb2cb7cec1404ace43ef96c87d874

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
3 years agonet: enetc: require a PHY device when probing
Vladimir Oltean [Tue, 29 Jun 2021 17:53:15 +0000 (20:53 +0300)]
net: enetc: require a PHY device when probing

Given that even a fixed-link has an associated phy_device, there is no
reason to operate in a mode when dm_eth_phy_connect fails.

Remove the driver checks for a NULL priv->phy and just return -ENODEV
when that happens.

Copyright updated according to corporate requirements.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
3 years agoarm: dts: ls1028a: disable enetc-2 by default
Vladimir Oltean [Tue, 29 Jun 2021 17:53:14 +0000 (20:53 +0300)]
arm: dts: ls1028a: disable enetc-2 by default

The enetc-2 port is used as DSA master (connected back-to-back to
mscc_felix_port4). Since the convention is to not enable ports in the
common SoC dtsi unless they are used on the board, then enable enetc-2
only when mscc_felix_port4 itself is enabled.

All existing device trees appear to adhere to this rule, so disable
enetc-2 in the SoC dtsi.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
3 years agoarm: dts: ls1028a: declare the fixed-link speeds for the internal ENETC ports
Vladimir Oltean [Tue, 29 Jun 2021 17:53:13 +0000 (20:53 +0300)]
arm: dts: ls1028a: declare the fixed-link speeds for the internal ENETC ports

To comply with the device tree bindings expectations for an Ethernet
controller, as well as to simplify the driver code, declare fixed-link
nodes for the internal ENETC ports (attached to the mscc_felix switch).

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
3 years agoarm: dts: ls1028a: enable internal RGMII delays for the LS1028A-QDS AR8035 PHY
Vladimir Oltean [Tue, 29 Jun 2021 17:53:12 +0000 (20:53 +0300)]
arm: dts: ls1028a: enable internal RGMII delays for the LS1028A-QDS AR8035 PHY

There are no PCB trace delays on this board, so the PHY needs to enable
its internal ones in order to have a proper electrical connection to the
enetc MAC.

Fixes: b32e9a757837 ("arm: dts: ls1028a updates for network interfaces")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
3 years agoarm: dts: ls1028a: enable the switch CPU port for the LS1028A-QDS
Vladimir Oltean [Tue, 29 Jun 2021 17:53:11 +0000 (20:53 +0300)]
arm: dts: ls1028a: enable the switch CPU port for the LS1028A-QDS

Due to an upstream change, the ls1028a.dtsi bindings for the mscc_felix
switch got accepted with all ports disabled by default and with no link
to the DSA master - this needs to be done on a per board basis.

Note that enetc-2 is not currently disabled in the ls1028a.dtsi, but
presumably at some point it might become. Explicitly enable it in the
QDS device trees anyway, to proactively avoid issues when that happens.

Fixes: a7fdac7e2a2a ("arm: dts: ls1028a: define QDS networking protocol combinations")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
3 years agonet: smc911x: Determine bus width at runtime
Andre Przywara [Mon, 28 Jun 2021 13:30:31 +0000 (14:30 +0100)]
net: smc911x: Determine bus width at runtime

The SMC911x Ethernet MACs can be integrated using a 16 or 32-bit bus.
The driver needs to know about this choice, which is the reason for us
having a Kconfig symbol for that.

Now this bus width is already described using a devicetree property, and
since the driver is DM compliant and is using the DT now, we should query
this at runtime. We leave the Kconfig choice around, in case the DT is
missing this property.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
3 years agonet: smc911x: Drop redundant CONFIG_SMC911X_16_BIT Kconfig symbol
Andre Przywara [Mon, 28 Jun 2021 13:30:30 +0000 (14:30 +0100)]
net: smc911x: Drop redundant CONFIG_SMC911X_16_BIT Kconfig symbol

The SMC911x Ethernet driver needs to know which accessor functions it
can use to access the MMIO registers. For that reason we have a Kconfig
choice between 16 and 32-bit bus width.

Since it's only those two options that we (and the Linux kernel)
support, and there does not seem to be any evidence of another bus
width anywhere, limit the Kconfig construct to a simple symbol.

This simplifies the code and allows a later rework to be much easier.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
3 years agocmd: net: add a 'net list' command to list network devs
Tim Harvey [Fri, 18 Jun 2021 22:26:21 +0000 (15:26 -0700)]
cmd: net: add a 'net list' command to list network devs

In a system with multiple network controllers it can be difficult
to know the names of the various devices available. This is especially
true for USB ether devices as they do not display device names upon
detection.

This is being added as a net sub-system in case other commands may
want to be added or moved here.

Note that this is only enabled for DM_ETH

Example:
U-Boot > net
net - NET sub-system

Usage:
net list - list available devices

U-Boot > net list
eth0 : ethernet@2188000 00:d0:12:98:f5:47 active
eth1 : e1000#0 00:d0:12:98:f5:48
eth2 : asix_eth 8c:ae:4c:f5:84:9d
eth3 : asix_eth 8c:ae:4c:f9:41:e3

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
3 years agophy: add nxp tja1103 phy driver
Radu Pirea (NXP OSS) [Fri, 18 Jun 2021 18:58:30 +0000 (21:58 +0300)]
phy: add nxp tja1103 phy driver

Add nxp tja1103 phy driver.

Signed-off-by: Radu Pirea (NXP OSS) <radu-nicolae.pirea@oss.nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
3 years agoMerge branch '2021-07-01-update-CI-containers'
Tom Rini [Mon, 5 Jul 2021 19:29:44 +0000 (15:29 -0400)]
Merge branch '2021-07-01-update-CI-containers'

- General test.py improvements
- Rewrite the squashfs tests
- Update our CI container to Ubuntu 20.04 "focal" base.
- Make some changes to the Azure yaml so that we can have more tests run
  there.

3 years agoDocker/CI: Update to "focal" and latest build
Tom Rini [Thu, 10 Jun 2021 14:57:36 +0000 (10:57 -0400)]
Docker/CI: Update to "focal" and latest build

Move us up to being based on Ubuntu 20.04 "focal" and the latest tag
from Ubuntu for this release.  For this, we make sure that "python" is
now python3 but still include python2.7 for the rx51 qemu build as that
is very old and does not support python3.

Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agotest/py: rewrite sqfsls command test suite
Joao Marcos Costa [Wed, 30 Jun 2021 22:45:05 +0000 (19:45 -0300)]
test/py: rewrite sqfsls command test suite

Add more details to test cases by comparing each expected line with the
command's output. Add new test cases:
- sqfsls at an empty directory
- sqfsls at a sub-directory

Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> [on sandbox]
Signed-off-by: Joao Marcos Costa <jmcosta944@gmail.com>
3 years agotest/py: rewrite sqfsload command test suite
Joao Marcos Costa [Wed, 30 Jun 2021 22:45:04 +0000 (19:45 -0300)]
test/py: rewrite sqfsload command test suite

The previous strategy to know if a file was correctly loaded was to
check for how many bytes were read and compare it against the file's
original size. Since this is not a good solution, replace it by
comparing the checksum of the loaded bytes against the original file's
checksum. Add more test cases: files at a sub-directory and non-existent
file.

Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> [on sandbox]
Signed-off-by: Joao Marcos Costa <jmcosta944@gmail.com>
3 years agotest/py: rewrite common tools for SquashFS tests
Joao Marcos Costa [Wed, 30 Jun 2021 22:45:03 +0000 (19:45 -0300)]
test/py: rewrite common tools for SquashFS tests

Remove the previous OOP approach, which was confusing and incomplete.
Add more test cases by making SquashFS images with various options,
concerning file fragmentation and its compression. Add comments to
properly document the code.

Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> [on sandbox]
Signed-off-by: Joao Marcos Costa <jmcosta944@gmail.com>
3 years agoAzure: Add loop devices and CAP_SYS_ADMIN for sandbox test.py tests
Alper Nebi Yasak [Mon, 21 Jun 2021 18:51:56 +0000 (21:51 +0300)]
Azure: Add loop devices and CAP_SYS_ADMIN for sandbox test.py tests

The filesystem test setup needs to prepare disk images for its tests,
with either guestmount or loop mounts. The former requires access to the
host fuse device (added in a previous patch), the latter requires access
to host loop devices. Both mounts also need additional privileges since
docker's default configuration prevents the containers from mounting
filesystems (for host security).

Add any available loop devices to the container and try to add as few
privileges as possible to run these tests, which narrow down to adding
SYS_ADMIN capability and disabling apparmor confinement. However, this
much still seems to be insecure enough to let malicious container
processes escape as root on the host system [1].

[1] https://blog.trailofbits.com/2019/07/19/understanding-docker-container-escapes/

Since the mentioned tests are marked to run only on the sandbox board,
add these additional devices and privileges only when testing with that.

An alternative to using mounts is modifying the filesystem tests to use
virt-make-fs (like some EFI tests do), but it fails to generate a
partitionless FAT filesystem image on Debian systems. Other more
feasible alternatives are using guestfish or directly using libguestfs
Python bindings to create and populate the images, but switching the
test setups to these is nontrivial and is left as future work.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
3 years agoAzure: Add fuse device for test.py tests
Alper Nebi Yasak [Mon, 21 Jun 2021 18:51:55 +0000 (21:51 +0300)]
Azure: Add fuse device for test.py tests

The EFI secure boot and capsule test setups need to prepare disk images
for their tests using virt-make-fs, which requires access to the host
fuse device. This is not exposed to the docker container by default and
has to be added explicitly. Add it.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
3 years agotools: docker: Install a readable kernel for libguestfs-tools
Alper Nebi Yasak [Mon, 21 Jun 2021 18:51:54 +0000 (21:51 +0300)]
tools: docker: Install a readable kernel for libguestfs-tools

The filesystem and EFI (capsule and secure boot) test setups try to use
guestmount and virt-make-fs respectively to prepare disk images to run
tests on. However, these libguestfs tools need a kernel image and fail
with the following message (revealed in debug/trace mode) if it can't
find one:

    supermin: failed to find a suitable kernel (host_cpu=x86_64).

    I looked for kernels in /boot and modules in /lib/modules.

    If this is a Xen guest, and you only have Xen domU kernels
    installed, try installing a fullvirt kernel (only for
    supermin use, you shouldn't boot the Xen guest with it).

This failure then causes these tests to be skipped in CIs. Install a
kernel package in the Docker containers so the CIs can run these
tests with libguestfs tools again (assuming the container is run with
necessary host devices and privileges). As this kernel would be only
used for virtualization, we can use the kernel package specialized for
that. On Ubuntu systems kernel images are not readable by non-root
users, so explicitly add read permissions with chmod as well.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agotest/py: Wait for guestmount worker to exit after running guestunmount
Alper Nebi Yasak [Fri, 4 Jun 2021 19:04:46 +0000 (22:04 +0300)]
test/py: Wait for guestmount worker to exit after running guestunmount

Some filesystem tests are failing when their image is prepared with
guestmount, but succeeding if loop mounts are used instead. The reason
seems to be a race condition the guestmount(1) manual page explains:

    When guestunmount(1)/fusermount(1) exits, guestmount may still be
    running and cleaning up the mountpoint.  The disk image will not be
    fully finalized.

    This means that scripts like the following have a nasty race condition:

     guestmount -a disk.img -i /mnt
     # copy things into /mnt
     guestunmount /mnt
     # immediately try to use 'disk.img' ** UNSAFE **

    The solution is to use the --pid-file option to write the guestmount
    PID to a file, then after guestunmount spin waiting for this PID to
    exit.

The Python standard library has an os.waitpid() function for waiting a
child to terminate, but it cannot wait on non-child processes. Implement
a utility function that can do this by polling the process repeatedly
for a given duration, optionally killing the process if it won't
terminate on its own. Apply the suggested solution with this utility
function, which makes the failing tests succeed again.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agotest/py: Use loop mounts if guestmount fails in filesystem tests
Alper Nebi Yasak [Fri, 4 Jun 2021 19:04:45 +0000 (22:04 +0300)]
test/py: Use loop mounts if guestmount fails in filesystem tests

If guestmount isn't available on the system, filesystem test setup falls
back to using loop mounts to prepare its disk images. If guestmount is
available but fails to work, the tests are immediately skipped. Instead
of giving up on a guestmount failure, try using loop mounts as an
attempt to keep tests running.

Also stop checking if guestmount is in PATH, as trying to run a missing
guestmount can now follow the same failure codepath and fall back to
loop mounts anyway.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>