Marcel Ziswiler [Fri, 12 Jul 2019 10:35:07 +0000 (12:35 +0200)]
toradex: configblock: fix colibri imx8x target
The Colibri iMX8X target got re-named late in the cycle which we forgot
to reflect here. Furthermore, it was missing the interactive part should
a customer have bricked his module and want to re-create the
configuration block. Fix this.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Marcel Ziswiler [Fri, 12 Jul 2019 10:35:06 +0000 (12:35 +0200)]
toradex: configblock: generic wi-fi/bt handling
Make the interactive Wi-Fi/BT handling generic by pulling it out of the
Colibri iMX6ULL interactive part to be re-used for Apalis iMX8 and
Colibri iMX8X.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Stefan Agner [Fri, 12 Jul 2019 10:35:05 +0000 (12:35 +0200)]
toradex: configblock: initialize MMC before switching partition
If the module is in serial downloader mode, we do no longer read the
environment from eMMC. Therefor, the eMMC is unitialized when trying
to read the config block. Use mmc_init to initialize the selected
MMC device before using it.
Note: In case the MMC has already been initialized, the mmc_init
detects that and returns immediately.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Ye Li [Wed, 10 Jul 2019 10:38:37 +0000 (10:38 +0000)]
imx6dq: Fix chip version issue for rev1.3
According to iMX6DQ RM, the minor field (low 8 bits) in DIGPROG is not
aligned on silicon revision 1.3. So update get_cpu_rev to correct the
revision.
0x00630002 Silicon revision 1.2
0x00630005 Silicon revision 1.3
0x00630006 Silicon revision 1.6
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Lukasz Majewski [Tue, 9 Jul 2019 15:00:05 +0000 (17:00 +0200)]
serial: mxc: Add compatibles to NXP's serial driver (for imx21 and imx53)
This patch fixes not enabled uart2 (and hence serial console) on i.MX53
devices. After following commit
1d255904c306 ("ARM: dts: imx: imx53:
Synchronize iMX53 DT with Linux") from the uart2 compatible the
'fsl,imx7d-uart' has been removed (which was correct).
However, the root cause of the problem was the commit
98d62e618bb9 ("arm:
imx: add i.MX53 Beckhoff CX9020 Embedded PC") which introduced this
compatible.
Moreover, without this patch all i.MX53 UARTs are not usable as neither
'fsl,imx53-uart' nor 'fsl,imx21-uart' are in compatible IDs in
drivers/serial/serial_mxc.c file.
The fix is to add 'fsl,imx53-uart' and 'fsl,imx21-uart' as compatibles
for the aforementioned serial driver (those are also defined in the Linux
kernel).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Lukasz Majewski [Tue, 9 Jul 2019 14:04:06 +0000 (16:04 +0200)]
config: imx53: Disable support for EFI on HSC|DDC boards
This patch disables support for running EFI applications on HSC|DDC boards.
As a result - considerable size reduction (~14%) has been observed (for
for u-boot-dtb.imx 475KiB to 407KiB).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Ludwig Zenz [Tue, 2 Jul 2019 12:49:49 +0000 (14:49 +0200)]
ARM: imx6: DHCOM i.MX6 PDK: config SPL to load U-Boot fitImage with mulitple DTs
Configure fitImage for U-Boot with a device tree for imx6 quad/dual
and duallite/solo. This enables to support the imx6 derivates
quad/dual/duallite/solo with a single binary.
Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Ludwig Zenz [Tue, 2 Jul 2019 12:49:48 +0000 (14:49 +0200)]
ARM: dts: imx: dh-imx6: Add DHCOM iMX6 Duallite PDK2 device tree
This device tree adds support for DHCOM iMX6 duallite and solo
deriviates.
Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Ludwig Zenz [Tue, 2 Jul 2019 12:49:47 +0000 (14:49 +0200)]
ARM: dts: dh-imx6: Refactor DT with som and board level defs for use with imx6 duallite
To use the device tree definitions imx6q-dhcom-som.dtsi for all imx6 derivatives rename
it to imx6qdl-dhcom.dtsi. We omit the '-som', because it simplifies further mainlinening
of already existing device trees.
To reuse board level common stuff imx6qdl-dhcom-pdk2.dtsi is created and included by
imx6q-dhcom-pdk2.dts.
Signed-off-by Ludwig Zenz <lzenz@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Igor Opaniuk [Tue, 25 Jun 2019 14:06:43 +0000 (17:06 +0300)]
colibri_imx6: configs: remove legacy usbboot command
Remove obsolete legacy usbboot wrapper, as distroboot can handle
booting from USB drivers.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Igor Opaniuk [Tue, 25 Jun 2019 14:06:42 +0000 (17:06 +0300)]
apalis_imx6: configs: remove legacy usbboot command
Remove obsolete legacy usbboot wrapper, as distroboot can handle
booting from USB drivers.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Marek Vasut [Thu, 20 Jun 2019 22:49:47 +0000 (00:49 +0200)]
ARM: imx: dh-imx6: Enable DM regulator
Enable DM support for regulators and fixed regulator driver and
convert USB Vbus control over to the regulators defined in DT.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ludwig Zenz <lzenz@dh-electronics.com>
Cc: Stefano Babic <sbabic@denx.de>
Tested-by: Ludwig Zenz <lzenz@dh-electronics.com>
Igor Opaniuk [Tue, 18 Jun 2019 11:57:32 +0000 (14:57 +0300)]
colibri_imx7: introduce androidboot wrapper
1. Introduce androidboot wrapper for booting AOSP.
2. Add partitions_android env var for simplifying the process of
writing new gpt table from U-boot shell/fastboot.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Anatolij Gustschin [Mon, 17 Jun 2019 13:38:58 +0000 (15:38 +0200)]
arm: dts: imx: fsl-imx8dx.dtsi: add gpio aliases to fix gpio command
The gpio command currently uses equal bank names "GPIO0_"
for all existing gpio banks, i. e.:
U-Boot# gpio status -a
Bank GPIO0_:
GPIO0_0: input: 0 [ ]
GPIO0_1: output: 1 [x] dbg1.gpios
...
Bank GPIO0_:
GPIO0_0: input: 0 [ ]
GPIO0_1: input: 0 [ ]
...
So the command is broken, it is not possible to address
a desired bank. Add gpio aliases to fix this.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Shyam Saini [Mon, 17 Jun 2019 12:37:13 +0000 (18:07 +0530)]
board: engicam: Remove bogus check for mmc for imx6ul isiot
imx6ul-isiot-mmc.dts was removed in uboot version v2018.03 and from then
onwards IMX6UL isiot uses imx6ul-isiot-emmc.dts for mmc, so remove
unnecessary check for mmc.
Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
Igor Opaniuk [Fri, 14 Jun 2019 07:59:11 +0000 (10:59 +0300)]
colibri/apalis imx: drop DFU support
We never really added a sensible DFU configuration for platforms
based on eMMC. Most of the things one might want to do can also be done
with UMS or fastboot, so drop the DFU configuration.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Philippe Schenker <philippe.schenker@toradex.com>
Breno Matheus Lima [Thu, 13 Jun 2019 21:10:56 +0000 (21:10 +0000)]
mx6sxsabresd: imximage.cfg: Handle the CONFIG_SECURE_BOOT case
Secure boot is not enabled in mx6sxsabresd imximage.cfg, add support
for it.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Anatolij Gustschin [Wed, 12 Jun 2019 11:35:26 +0000 (13:35 +0200)]
arm: imx8: don't duplicate build_info()
Move build_info() to common place.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Anatolij Gustschin [Wed, 12 Jun 2019 11:35:25 +0000 (13:35 +0200)]
arm: imx8: factor out uart init code
New imx8 boards started adding duplicated UART init code.
Factor out this to common function sc_pm_setup_uart().
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Igor Opaniuk [Tue, 11 Jun 2019 12:29:03 +0000 (15:29 +0300)]
colibri_imx7_emmc: enable CONFIG_ARMV7_BOOT_SEC_DEFAULT
Enable CONFIG_ARMV7_BOOT_SEC_DEFAULT by default to avoid a kernel
crash when booting NXP linux kernels in non-secure world,
when job ring device allocation is done by CAAM hw accelerator driver:
caam
30900000.caam: job rings = 3, qi = 0
caam_jr
30901000.jr0: failed to flush job ring 0
caam_jr: probe of
30901000.jr0 failed with error -5
caam_jr
30902000.jr1: failed to flush job ring 1
caam_jr: probe of
30902000.jr1 failed with error -5
caam_jr
30903000.jr2: failed to flush job ring 2
caam_jr: probe of
30903000.jr2 failed with error -5
caam algorithms registered in /proc/crypto
Job Ring Device allocation for transform failed
caam
30900000.caam: caam pkc algorithms registered in /proc/crypto
Unable to handle kernel NULL pointer dereference at virtual address
00000010
pgd =
c0004000
[
00000010] *pgd=
00000000
Internal error: Oops: 5 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Tainted:
Hardware name: Freescale i.MX7 Dual (Device Tree)
task:
ec0d8000 task.stack:
ec0ce000
PC is at caam_sm_startup+0x3f8/0x4f4
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Marcel Ziswiler [Wed, 10 Jul 2019 07:42:38 +0000 (09:42 +0200)]
colibri-imx6ull: fix vidargs
Unfortunately, that missing M makes the current downstream NXP BSP
4.14.98_2.0.0_ga crash early during Linux kernel boot. Fix this.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Tested-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Joris Offouga [Tue, 11 Jun 2019 12:08:50 +0000 (14:08 +0200)]
pico-imx7d: Enable DM_USB
This patch enable usb support with device-tree
Signed-off-by: Joris Offouga <offougajoris@gmail.com>
Reviewed-by: Jun Nie <jun.nie@linaro.org>
Marek Vasut [Sun, 9 Jun 2019 16:46:45 +0000 (18:46 +0200)]
ARM: imx: m53menlo: Convert WDT support to DM
Enable DM Watchdog support on iMX53 M53Menlo.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Lukasz Majewski [Tue, 4 Jun 2019 13:42:04 +0000 (15:42 +0200)]
IMX: serial: dm: Set DM_FLAG_PRE_RELOC in the IMX uart driver
The DM_FLAG_PRE_RELOC shall be set unconditionally as this driver is going
to be re-used in both early SPL and U-Boot proper's pre-reloc.
For i.MX based devices it is crucial to have available the serial console
before relocation (otherwise the board may hand).
The device definition may be provided either via device tree description or
with U_BOOT_DEVICE(mxc_serial) definition. In the latter case the device
will not bind in U-Boot proper when DM_FLAG_PRE_RELOC is not set.
The !CONFIG_IS_ENABLED(OF_CONTROL) #if check was set as a "workaround" for
DM problem described in following commit
4687919684e0
("serial: Remove DM_FLAG_PRE_RELOC flag in various drivers").
Let's look on this check more thoroughly - we add this flag if the board
doesn't support OF_CONTROL. This is a bit strange as the serial_mxc.c can
be used with CONFIG_DM_SERIAL but without corresponding device tree
description (OF_CONTROL). In such case the aforementioned
U_BOOT_DEVICE(mxc_serial) definition is used.
Other boards/SoCs have this flag set unconditionally for serial driver.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Marek Vasut [Sun, 9 Jun 2019 01:46:22 +0000 (03:46 +0200)]
watchdog: imx: Add DM support
Add DM and DT probing support to iMX watchdog driver. This should
allow boards to move over to this driver, enable SYSRESET_WATCHDOG
to handle cpu_reset() if required.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Marek Vasut [Sun, 9 Jun 2019 01:46:21 +0000 (03:46 +0200)]
watchdog: Split WDT from SPL_WDT
Use CONFIG_IS_ENABLED(WDT) to permit use of WDT in SPL without DM,
while the full U-Boot can use rich DM/DT WDT driver.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Tested-by: Suniel Mahesh <sunil.m@techveda.org>
Lukasz Majewski [Sun, 9 Jun 2019 20:54:44 +0000 (22:54 +0200)]
ARM: display5: Remove U_BOOT_DEVICE definition of serial_mxc
Before the wide DM/DTS adoption in the U-Boot proper, the display5
has been using only DM_SERIAL to provide serial console in
pre-relocation.
After moving to full DM/DTS adoption in the U-Boot proper the
U_BOOT_DEVICE definition is not needed anymore, as it has been
replaced with udevice creation from provided DTS description.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Lukasz Majewski [Sun, 9 Jun 2019 20:54:43 +0000 (22:54 +0200)]
DTS: Add imx6q-display5-u-boot.dtsi file with u-boot specific properties
This file setups UART5 based serial to be used as pre-relocation
console in the U-Boot proper.
On purpose pinux configuration is omitted here as it has been already
done in SPL. For early pre-relocation code we only need the serial
device from DTS.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Lukasz Majewski [Sun, 9 Jun 2019 20:54:42 +0000 (22:54 +0200)]
DTS: imx: Add display5 board (imx6q based) device tree description (v5.1)
This commit ports from Linux kernel - tag: v5.1 - the device tree
description for display5 board.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Lukasz Majewski [Sun, 9 Jun 2019 20:54:41 +0000 (22:54 +0200)]
ARM: display5: Increase the pre-relocation malloc pool size to 4KiB
Porting more DTS code from Linux kernel for display5 board required
increase of pre-relocation malloc pool size in U-Boot proper.
The early malloc memory is necessary for handling parsing and setup of
e.g. serial port device (and all its ancestors in DT tree).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
Lukasz Majewski [Sun, 9 Jun 2019 20:54:40 +0000 (22:54 +0200)]
gpio: Add missing parenthesis to the GPIO_TO_PORT define
Add missing parenthesis to the GPIO_TO_PORT macro.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Lukasz Majewski [Sun, 9 Jun 2019 20:54:39 +0000 (22:54 +0200)]
ARM: display5: Fix CS check after moving some SPI related CONFIGs to Kconfig
After commit
14453fbfadc2 ("Convert CONFIG_SF_DEFAULT_* to Kconfig")
and commit
abe66b1b5dec ("Convert CONFIG_ENV_SPI_* to Kconfig") ,which
moved some SPI related CONFIG_* defines to Kconfig the display5 board has
become unbootable as the SPI CS check condition had wrong value.
This commit fixes this check and allows proper SPI NOR flash operation in
SPL.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Sun, 9 Jun 2019 20:54:38 +0000 (22:54 +0200)]
cosmetic: Update comment in cmd/eeprom.c
This commit just corrects spelling of 'accessed' word in the EEPROM
comment.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Lukasz Majewski [Sun, 9 Jun 2019 20:54:37 +0000 (22:54 +0200)]
cosmetic: display5: Remove not needed comments
Some comments are not needed anymore after Kconfig automated conversion.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Shyam Saini [Wed, 12 Jun 2019 08:43:16 +0000 (14:13 +0530)]
configs: icorem6: Enable Nand bcb command
This would be used for writing spl images along nand BCB
Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
Shyam Saini [Mon, 3 Jun 2019 05:43:21 +0000 (11:13 +0530)]
configs: icore: Fix U-Boot proper loading from nand
SPL on Engicam i.Core M6 boards enabled DM, so it would require some
malloc() pool before relocation in order to load U-Boot proper properly.
So, enable SPL malloc() pool of 0x2000 size similarly like what we have
used for icore mmc defconfigs.
Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
Heiko Schocher [Tue, 28 May 2019 04:51:52 +0000 (06:51 +0200)]
pwm: imx: add DM_PWM support
add DM support for pwm-imx driver.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Tue, 28 May 2019 04:51:51 +0000 (06:51 +0200)]
pwm: imx: add Kconfig support
add Kconfig support for this driver.
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Martyn Welch <martyn.welch@collabora.co.uk>
Sébastien Szymanski [Mon, 20 May 2019 09:43:16 +0000 (11:43 +0200)]
opos6uldev: remove board_ehci_hcd_init function
This function sets the polarity of the PWR signal which is not used on
the opos6uldev board. Remove it.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Lukasz Majewski [Thu, 16 May 2019 14:01:38 +0000 (16:01 +0200)]
doc: Update parallel NOR flash related information in README.falcon
This commit updates the doc/README.falcon regarding Falcon boot on
NOR flash memories.
This code is used by MCCMON6 board - so for more details please refer to
configs/mccmon6_nor_defconfig.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Thu, 16 May 2019 14:01:37 +0000 (16:01 +0200)]
Kconfig: Add CMD_SPL_NOR_OFS config for falcon boot argument offset
This option will provide the offset in the parallel NOR flash memory to,
which the falcon boot data is stored.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Thu, 16 May 2019 14:01:36 +0000 (16:01 +0200)]
Kconfig: cosmetic: Update description of CMD_SPL_NAND_OFS
The CMD_SPL_NAND_OFS description was a bit misleading, has
been updated.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Thu, 16 May 2019 14:01:35 +0000 (16:01 +0200)]
Kconfig: Make CMD_SPL_NAND_OFS only available when proper memory is used
This commit makes the CMD_SPL_NAND_OFS only visible when we use NAND
memory.
Before this change it was present when only CMD_SPL was enabled (and
would stay when board with other falcon boot medium is used).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Thu, 16 May 2019 07:41:44 +0000 (09:41 +0200)]
ARM: imx: Disable 1Gbps support on MCCMON6's KSZ9031 PHY
mccmon6 works in 10/100 MiB Ethernet environment, so disabling 1GiB support
improves robustness of the network after power up (as one don't need to
wait for autoneg).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Thu, 16 May 2019 07:41:43 +0000 (09:41 +0200)]
ARM: imx: config: Disable support for USB on MCCMON6
The IMX6Q based MCCMON6 is not using USB for any purpose.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Thu, 16 May 2019 07:41:42 +0000 (09:41 +0200)]
ARM: imx: cosmetic: Remove not needed comment from the mccmon6.h file
This comment is a leftover from the Kconfig CONFIG_*MTD* move.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Ye Li [Wed, 15 May 2019 09:57:01 +0000 (09:57 +0000)]
mx7ulp_evk: Update DDR freq to 352.8Mhz for ULP B0
On i.MX7ULP B0, the DDR clock target is increased from 320Mhz to 380Mhz.
We update DDR clock relevant settings to approach the target. But since the
limitation on LCDIF pix clock for HDMI output
(refer "mx7ulp_evk: Change APLL and its PFD0 frequencies"), we set DDR
clock to 352.8Mhz (25.2Mhz * 14) by using the clock path:
APLL PFD0 -> DDR CLK -> NIC0 -> NIC1 -> LCDIF clock
To reduce the impact to entire system, the NIC0_DIV and NIC1_DIV are kept,
so the divider 14 is calculated as:
14 = (NIC0_DIV + 1) * (NIC1_DIV + 1) * (LCDIF_PCC_DIV + 1)
NIC0_DIV: 1
NIC1_DIV: 0
LCDIF_PCC_DIV: 6
APLL and APLL PFD0 settings:
PFD0 FRAC: 27
APLL MULT: 22
APLL NUM: 1
APLL DENOM: 20
This patch applies the new settings for both DCD and plugin.
There is no DDR script change on this new frequency.
Overnight memtester is passed.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Wed, 15 May 2019 09:56:59 +0000 (09:56 +0000)]
mx7ulp: Select the SCG1 APLL PFD as a system clock source
Due to the APLL out glitch issue, the APLLCFG PLLS bit must
be set to select SCG1 APLL PFD for generating system clock to align
with the design.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Wed, 15 May 2019 09:56:56 +0000 (09:56 +0000)]
mx7ulp_evk: Change APLL and its PFD0 frequencies
To support HDMI display on EVK board, the LCDIF pix clock must be
25.2Mhz. Since the its PCC divider range is from 1-8, the max rate
of LCDIF PCC source clock is 201.6Mhz. This limits the source clock
must from NIC1 bus clock or NIC1 clock, other sources from APLL PFDs
are higher than this max rate.
The NIC1 bus clock and NIC1 clock are from DDRCLK whose parent source
is APLL PFD0, so we must change the APLL PFD0 and have impact to DDRCLK,
NIC1 and NIC1 bus.
Eventually, this requests to set the APLL PFD0 frequency to 302.4Mhz
(25.2 * 12), with settings:
PFD0 FRAC: 32
APLL MULT: 22
APLL NUM: 2
APLL DENOM: 5
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Fancy Fang <chen.fang@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Wed, 15 May 2019 09:56:53 +0000 (09:56 +0000)]
mx7ulp_evk: Update LPDDR3 script
Update LPDDR3 script with the changes below:
-Update the precharge command to CMD=01 at the DDR initialization phase
-remove unimplemented registers
Write data bit delay --refer to the DDR_TRIM bits in
IOMUXC1_DDR_SW_PAD_CTL_PAD_DDRn
Test:
One EVK board passes overnight stress test.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Wed, 15 May 2019 09:56:51 +0000 (09:56 +0000)]
mx7ulp: Fix APLL num and denom setting issue
For the current APLL setting, as we want the APLL PFD0 to meet DDR clock 320Mhz requirement.
We set MULT to 20, NUM to 4 and DENOM to 2, to get final 22 multiplier. But according to the RM,
the NUM should always be less than the DENOM. So our setting violates the rule.
Actually the ROM has already set the MULT to 22 and leave NUM/DENOM in default value. The calculated APLL PFD0 clock
is 318.9888Mhz, which also meet the DDR requirement.
To fix the issue, we remove the PLL settings in DCD to use default value from ROM, and only set the PFD0 FRAC.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Bryan O'Donoghue [Wed, 8 May 2019 18:14:48 +0000 (19:14 +0100)]
warp7: Specify a default CONFIG_OPTEE_LOAD_ADDR if non provided
If no CONFIG_OPTEE_LOAD_ADDR is provided i.e. you are not loading OPTEE
into memory in u-boot, then just set the non-existent CONFIG option to
zero, elsewise stringify(CONFIG_OPTEE_LOAD_ADDR) will return
"CONFIG_OPTEE_LOAD_ADDR" - which looks weird in the u-boot environment.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Bryan O'Donoghue [Wed, 8 May 2019 18:14:47 +0000 (19:14 +0100)]
warp7: include: configs: Specify an fdtovaddr
In the Mbed Linux OS bootflow OP-TEE runs before u-boot and provides a DTB
overlay at 0x83100000.
This overlay should subsequently be merged into the main DTB before handing
over to the kernel.
This patch defines fdtovaddr at 0x83100000.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Bryan O'Donoghue [Wed, 8 May 2019 18:14:46 +0000 (19:14 +0100)]
warp7_bl33: configs: Enable CONFIG_OF_LIBFDT_OVERLAY
This commit enables CONFIG_OF_LIBFDT_OVERLAY a requirement to perform a
merge of an OPTEE provided DTB overlay into our main kernel DTB image.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Bryan O'Donoghue [Wed, 8 May 2019 18:14:45 +0000 (19:14 +0100)]
warp7_bl33: configs: Enable CONFIG_OF_LIBFDT
In order to switch on DTB overlay support in WaRP7 BL33 we first need to
switch on LIBFDT support. Do that now.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Bryan O'Donoghue [Wed, 8 May 2019 18:14:44 +0000 (19:14 +0100)]
warp7: include: configs: Differentiate bootscript address from loadaddr
Reusing the loadaddr to load the boot script breaks some of the logic we
want to have around the bootscript/FIT load addresses. Making a dedicated
bootscript address allows us to differentiate the bootscript load address
from the Linux Kernel or OPTEE load address, thus ensuring that no matter
what the load sequence the bootscript and Kernel/OPTEE binary load
addresses do not conflict.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Bryan O'Donoghue [Wed, 8 May 2019 18:14:43 +0000 (19:14 +0100)]
warp7: include: configs: Specify image name of bootscript in FIT
When obtaining the bootscript from a FIT image we need to specify the name
of the bootscript as defined inside of the FIT.
This patch makes a define that appends a "bootscr" parameter to the source
command when compiling up in FIT mode on warp7.
An environment variable is supplied to enable others to use a different
name than "bootscr" as the image name of the boot script in their FIT.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Bryan O'Donoghue [Wed, 8 May 2019 18:14:42 +0000 (19:14 +0100)]
warp7_bl33: configs: Enable FIT as the boot.scr format
This patch switches on FIT verification of boot.scr. After this commit your
boot.scr must be in the FIT format.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Matti Vaittinen [Tue, 7 May 2019 07:45:55 +0000 (10:45 +0300)]
regulator: bd718x7: support ROHM BD71837 and BD71847 PMICs
BD71837 and BD71847 is PMIC intended for powering single-core,
dual-core, and quad-core SoC’s such as NXP-i.MX 8M. BD71847
is used for example on NXP imx8mm EVK.
Add regulator driver for ROHM BD71837 and BD71847 PMICs.
BD71837 contains 8 bucks and 7 LDOS. BD71847 is reduced
version containing 6 bucks and 6 LDOs. Voltages for DVS
bucks (1-4 on BD71837, 1 and 2 on BD71847) can be adjusted
when regulators are enabled. For other bucks and LDOs we may
have over- or undershooting if voltage is adjusted when
regulator is enabled. Thus this is prevented by default.
BD718x7 has a quirk which may leave power output disabled
after reset if enable/disable state was controlled by SW.
Thus the SW control is only allowed for BD71837 bucks
3 and 4 by default. The impact of this limitation must be
evaluated board-by board and restrictions may need to be
modified. (Linux driver get's these limitations from DT and we
may want to implement same on u-Boot driver).
Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Peng Fan [Sun, 5 May 2019 13:24:00 +0000 (13:24 +0000)]
imx: imx8dx/qxp: enable thermal
Add thermal dts node
Enable thermal in defconfig
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Sun, 5 May 2019 13:23:54 +0000 (13:23 +0000)]
thermal: add i.MX8 thermal driver
Add i.MX8 thermal driver to support get temperature from SCU.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Sun, 5 May 2019 13:23:51 +0000 (13:23 +0000)]
misc: imx8: add sc_misc_get_temp
Add sc_misc_get_temp to support get temperature
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Bryan O'Donoghue [Sat, 4 May 2019 00:08:26 +0000 (01:08 +0100)]
MAINTAINERS: Update lib/optee with my details
Commit
32ce6179fb99 ("optee: Add lib entries for sharing OPTEE code across
ports") adds code into lib/optee but neglects to update MAINTAINERS to make
me buggable for questions and maintenance.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Suggested-by: Jens Wiklander <jens.wiklander@linaro.org>
Bryan O'Donoghue [Sat, 4 May 2019 00:08:25 +0000 (01:08 +0100)]
warp7: configs: bl33: Tidy up OPTEE defines
When booting in BL33 mode i.e. with u-boot loaded by OP-TEE we get the
following print-out.
Board: WARP7 in secure mode OPTEE DRAM 0xa0000000-0xa0000000
This is incorrect the right range is 0x9e000000-0xa0000000. This patch
fixes the defines on the warp7_bl33_defconfig file to tidy up the output.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Bryan O'Donoghue [Sat, 4 May 2019 00:08:23 +0000 (01:08 +0100)]
optee: Make TZDRAM config options contingent on CONFIG_OPTEE
Commit
c7b3a7ee5351 ("optee: adjust dependencies and default values for
dram") makes the TZDRAM defines for OPTEE show up for all configs as a
side-effect. While not harmful its not what we really want.
This patch makes the following defines contingent on CONFIG_OPTEE=y
CONFIG_OPTEE_TZDRAM_BASE
CONFIG_OPTEE_TZDRAM_SIZE
Rightly, if you don't have CONFIG_OPTEE=y you don't care about the above
two defines.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Rui Miguel Silva <rui.silva@linaro.org>
Acked-by: Rui Miguel Silva <rui.silva@linaro.org>
Lukasz Majewski [Wed, 19 Jun 2019 15:31:07 +0000 (17:31 +0200)]
spi: mxs: Add support DM/DTS for i.MX28 mxs SPI driver (DM_SPI conversion)
This patch converts mxs_spi driver to support DM/DTS.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Lukasz Majewski [Wed, 19 Jun 2019 15:31:06 +0000 (17:31 +0200)]
pinctrl: mxs: Add support for i.MX2[38] mxs pinctrl driver
The code responsible for setting proper values in the MUX registers
(in the mxs_pinctrl_set_state()) has been ported from Linux kernel
- SHA1:
17bb763e7eaf tag v5.1.11 from linux-stable.
As the pinctrl node in the imx28.dtsi file has gpio pins nodes as subnodes,
it was necessary to use 'dm_scan_fdt_dev()' (as a .bind method) to also
make them 'visible' by the DM's "gpio_mxs" driver.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Lukasz Majewski [Wed, 19 Jun 2019 15:31:05 +0000 (17:31 +0200)]
gpio: mxs: Add support for DM/DTS in the mxs_gpio.c driver (DM_GPIO)
This patch adds support for DM/DTS in the mxs_gpio.c driver.
Information regarding per gpio controller pin number is passed via DTS.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Lukasz Majewski [Wed, 19 Jun 2019 15:31:04 +0000 (17:31 +0200)]
ARM: dts: imx: Provide 'gpio-ranges' for mxs_gpio driver
Those properties are U-Boot specific as the mxs gpio Linux driver (up to
version v5.1.11) is not supporting them.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Wed, 19 Jun 2019 15:31:03 +0000 (17:31 +0200)]
net: fec: Enable support for i.MX28 DM_ETH in the fec_mxc.c driver
The fec_mxc.c driver can be reused by i.MX28 when DM_ETH is enabled.
One only needs to add proper compatible and dependency on FEC_MXC in the
Kconfig.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Lukasz Majewski [Wed, 19 Jun 2019 15:31:02 +0000 (17:31 +0200)]
ARM: dts: imx: Copy imx28 device tree related files from Linux kernel (v5.1.11)
This patch copies from the Linux kernel stable (tag v5.1.11)
SHA1:
17bb763e7eaf i.MX28 related device tree files.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Adam Ford [Thu, 23 May 2019 19:11:32 +0000 (14:11 -0500)]
ARM: imx6q_logic: With SPL_OF_CONTROL enabled, remove MMC init
Since the board uses SPL_OF_CONTROL now, we don't need to
explicitly initialize the MMC driver, but we still need to
pinmux the corresponding pins. This patch removes the
initialization code and leave just the muxing behind.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Thu, 23 May 2019 19:11:31 +0000 (14:11 -0500)]
ARM: imx6q_logic: Enable SPL_DM with SPL_OF_CONTROL
With the spl code correctly returning either MMC1 or MMC2,
this board can not boot either from internal eMMC (MMC1) or
the uSD card on the baseboard (MMC2) using the device tree.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Thu, 23 May 2019 19:11:30 +0000 (14:11 -0500)]
spl: imx6: Let spl_boot_device return USDHC1 or USDHC2
Currently, when the spl_boot_device checks the boot device, it
will only return MMC1 when it's either sd or eMMC regardless
of whether or not it's MMC1 or MMC2. This is a problem when
booting from MMC2 if MMC isn't being manually configured like in
the DM_SPL case with SPL_OF_CONTROL.
This patch will check the register and return either MMC1 or MMC2.
Signed-off-by: Adam Ford <aford173@gmail.com>
Shyam Saini [Fri, 14 Jun 2019 07:35:35 +0000 (13:05 +0530)]
doc: imx: Add documentation for nandbcb command
Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
Shyam Saini [Fri, 14 Jun 2019 07:35:33 +0000 (13:05 +0530)]
i.MX6: nand: add nandbcb command for imx
Writing/updating boot image in nand device is not
straight forward in i.MX6 platform and it requires
boot control block(BCB) to be configured.
It becomes difficult to use uboot 'nand' command to
write BCB since it requires platform specific attributes
need to be taken care of.
It is even difficult to use existing msx-nand.c driver by
incorporating BCB attributes like mxs_dma_desc does
because it requires change in mtd and nand command.
So, cmd_nandbcb implemented in arch/arm/mach-imx
BCB contains two data structures, Firmware Configuration Block(FCB)
and Discovered Bad Block Table(DBBT). FCB has nand timings,
DBBT search area, page address of firmware.
On summary, nandbcb update will
- erase the entire partition
- create BCB by creating 2 FCB/DBBT block followed by
1 FW block based on partition size and erasesize.
- fill FCB/DBBT structures
- write FW/SPL on FW1
- write FCB/DBBT in first 2 blocks
for nand boot, up on reset bootrom look for FCB structure in
first block's if FCB found the nand timings are loaded for
further reads. once FCB read done, DTTB will load and finally
firmware will be loaded which is boot image.
Refer section "NAND Boot" from doc/imx/common/imx6.txt for more usage
information.
Reviewed-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
Lukasz Majewski [Mon, 24 Jun 2019 13:50:52 +0000 (15:50 +0200)]
clk: Add MAINTAINERS entry for clocks (./drivers/clk/)
The clock subsystem needs active maintenance as it steadily grows.
I do offer my help for this task.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Mon, 24 Jun 2019 13:50:51 +0000 (15:50 +0200)]
defconfig: sandbox: Enable SANDBOX_CLK_CCF to reuse generic CCF code
Enable by default the Common Clock Framework [CCF] clock code for sandbox.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Mon, 24 Jun 2019 13:50:50 +0000 (15:50 +0200)]
clk: sandbox: Add sandbox test code for Common Clock Framework [CCF]
This patch provides code to implement the CCF clock tree in sandbox. It
uses all the introduced primitives; some generic ones are reused, some
sandbox specific were developed.
In that way (after introducing the real CCF tree in sandbox) the recently
added to clk-uclass.c: clk_get_by_id() and clk_get_parent_rate() are tested
in their natural work environment.
Usage (sandbox_defconfig and sandbox_flattree_defconfig):
./u-boot --fdt arch/sandbox/dts/test.dtb --command "ut dm clk_ccf"
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Mon, 24 Jun 2019 13:50:49 +0000 (15:50 +0200)]
clk: sandbox: Adjust clk-mux.c to emulate reading divider value from HW
The generic mux clock code for CCF requires reading the clock multiplexer
value from HW registers. As sandbox by design has readl() as no-op it was
necessary to provide this value in the other way.
The new field in the mux structure (accessible only when sandbox is run)
has been introduced for this purpose.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Mon, 24 Jun 2019 13:50:48 +0000 (15:50 +0200)]
clk: sandbox: Adjust clk-divider to emulate reading its value from HW
The generic divider clock code for CCF requires reading the divider value
from HW registers. As sandbox by design has readl() as no-op it was
necessary to provide this value in the other way.
The new field in the divider structure (accessible only when sandbox is
run) has been introduced for this purpose.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Mon, 24 Jun 2019 13:50:47 +0000 (15:50 +0200)]
dts: sandbox: Add 'osc' clock for Common Clock Framework [CCF] testing
This patch adds the 'osc' fixed clock to facilitate the CCF testing in
the sandbox U-Boot. It is a starting point for building CCF hierarchy of
clocks.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Mon, 24 Jun 2019 13:50:46 +0000 (15:50 +0200)]
dm: clk: Extend clk_get_parent_rate() to support CLK_GET_RATE_NOCACHE flag
If the CLK_GET_RATE_NOCACHE flag is set - the clk_get_parent_rate()
provides recalculated clock value without considering the cache setting.
This may be necessary for some clocks tightly coupled with power domains
(i.e. imx8), and prevents from reading invalid cached values.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Lukasz Majewski [Mon, 24 Jun 2019 13:50:45 +0000 (15:50 +0200)]
clk: Port Linux common clock framework [CCF] for imx6q to U-boot (tag: v5.1.12)
This patch brings the files from Linux kernel (linux-stable/linux-5.1.y
SHA1:
5752b50477da)to provide clocks support as it is used on the Linux
kernel with Common Clock Framework [CCF] setup.
The directory structure has been preserved. The ported code only supports
reading information from PLL, MUX, Divider, etc and enabling/disabling
the clocks USDHCx/ECSPIx depending on used bus. Moreover, it is agnostic
to the alias numbering as the information about the clock is read from the
device tree.
One needs to pay attention to the comments indicating necessary for U-Boot's
driver model changes.
If needed, the code can be extended to support the "set" part of the clock
management.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Mon, 24 Jun 2019 13:50:44 +0000 (15:50 +0200)]
dm: clk: Define clk_get_by_id() for clk operations
This commit adds the clk_get_by_id() function, which is responsible
for getting the udevice with matching clk->id. Such approach allows
re-usage of inherit DM list relationship for the same class (UCLASS_CLK).
As a result - we don't need any other external list - it is just enough
to look for UCLASS_CLK related udevices.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Lukasz Majewski [Mon, 24 Jun 2019 13:50:43 +0000 (15:50 +0200)]
dm: clk: Define clk_get_parent_rate() for clk operations
This commit adds the clk_get_parent_rate() function, which is responsible
for getting the rate of parent clock.
Unfortunately, u-boot's DM support for getting parent is different
(the parent relationship is in udevice) than the one in Common Clock
Framework [CCF] in Linux.
To alleviate this problem - the clk_get_parent_rate() function has been
introduced to clk-uclass.c.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Lukasz Majewski [Mon, 24 Jun 2019 13:50:42 +0000 (15:50 +0200)]
dm: clk: Define clk_get_parent() for clk operations
This commit adds the clk_get_parent() function, which is responsible
for getting the parent's struct clock pointer.
U-Boot's DM support for getting parent is different (the parent
relationship is in udevice) than the one in Common Clock Framework [CCF]
in Linux. To obtain the pointer to struct clk of parent the
pdev->uclass_priv field is read via dev_get_clk_ptr() wrapper.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Lukasz Majewski [Mon, 24 Jun 2019 13:50:41 +0000 (15:50 +0200)]
clk: Introduce clk-provider.h to store Common Clock Framework's internals
This file now stores the dev_get_clk_ptr() wrapper on the dev_get_uclass_priv()
function.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Mon, 24 Jun 2019 13:50:40 +0000 (15:50 +0200)]
clk: Provide struct clk for fixed rate clock (clk_fixed_rate.c)
Up till now the fixed rate clock ('osc') has been added to UCLASS_CLK
without declaring struct clk. As a result it was only accessible by
iterating the udevice's uclass list.
This is a problem for clock code, which operates on pointers to struct
clk (like clk_get_rate()), not udevices.
After this change struct clk is accessible from udevice and udevice from
struct clk.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Lukasz Majewski [Mon, 24 Jun 2019 13:50:39 +0000 (15:50 +0200)]
clk: Extend struct clk to provide clock type agnostic flags
This commit extends the struct clk to provide information regarding the
flags related to this devices.
Those flags are clk device agnostic and indicate generic features
(like e.g. CLK_GET_RATE_NOCACHE - the need to always recalculate the rate).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Lukasz Majewski [Mon, 24 Jun 2019 13:50:38 +0000 (15:50 +0200)]
clk: Extend struct clk to provide information regarding clock rate
This commit extends the struct clk to provide information regarding the
clock rate.
As a result the clock tree traversal is performed at most once, and further
reads are using the cached value.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Mon, 24 Jun 2019 13:50:37 +0000 (15:50 +0200)]
clk: Remove clock ID check in .get_rate() of clk_fixed_*
This check requires the struct clk passed to .get_rate() to be always
cleared out as any clock with valid ID causes -EINVAL return value.
The return code of fixed clocks shall always be returned.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Lukasz Majewski [Mon, 24 Jun 2019 13:50:36 +0000 (15:50 +0200)]
dm: Fix documentation entry as there is no UCLASS_CLOCK uclass
There is no UCLASS_CLOCK uclass defined. Instead we do use the UCLASS_CLK.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Lukasz Majewski [Mon, 24 Jun 2019 13:50:35 +0000 (15:50 +0200)]
clk: doc: Add documentation entry for Common Clock Framework [CCF] (i.MX)
This patch describes the design decisions considerations and taken approach
for porting in a separate documentation entry.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tom Rini [Thu, 18 Jul 2019 15:31:37 +0000 (11:31 -0400)]
Merge branch '2019-07-17-master-imports'
- Various FS/disk related fixes with security implications.
- Proper fix for the pci_ep test.
- Assorted bugfixes
- Some MediaTek updates.
- 'env erase' support.
Tom Rini [Wed, 17 Jul 2019 13:58:24 +0000 (09:58 -0400)]
Revert "test: Disable pci_ep test for now"
We now have a proper fix for this test, stop disabling it in CI.
This reverts commit
ae8d23a668755d804748a1cf848426b28338b3d5.
Signed-off-by: Tom Rini <trini@konsulko.com>
Ramon Fried [Mon, 15 Jul 2019 20:04:41 +0000 (23:04 +0300)]
pci_ep: fix wrong addressing to barno
barno was mistakely readed from the target structure,
resulting in undefined behavious depending on the previous memory
content. fix that.
Fixes:
bb413337826e ("pci_ep: add pci endpoint sandbox driver")
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
[trini: Drop unused bar_idx]
Signed-off-by: Tom Rini <trini@konsulko.com>
Oleksandr Zhadan [Thu, 11 Jul 2019 15:52:49 +0000 (11:52 -0400)]
board: Arcturus: ucp1020: Removing obsoleted stuff
Removed one of the defconfig(obsoleted) file
and unused CONFIG_MMC_SPI definition to avoid confusion
about if this board using non-DM stuff or not.
uCP1020 is completely DM free board, tested and runs well.
Signed-off-by: Oleksandr Zhadan <oleks@arcturusnetworks.com>
Signed-off-by: Michael Durrant <mdurrant@arcturusnetworks.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Weijie Gao [Thu, 11 Jul 2019 07:10:23 +0000 (15:10 +0800)]
blk: Invalidate block cache when switching hwpart
Some storage devices have multiple hw partitions and both address from
zero, for example eMMC.
However currently block cache invalidation only applies to block
write/erase.
This can cause a problem that data of current hw partition is cached
before switching to another hw partition. And the following read
operation of the latter hw partition will get wrong data when reading
from the addresses that have been cached previously.
To solve this problem, invalidate block cache after a successful
select_hwpart operation.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Thu, 11 Jul 2019 06:26:26 +0000 (14:26 +0800)]
arm: dts: MediaTek: remove tick-timer from mt7629.dtsi
This patch removes tick-timer as all mt7629 boards should use arch timer.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>