Neil Roberts [Sun, 26 May 2019 13:32:49 +0000 (15:32 +0200)]
glsl/lower_instructions: Use float16 constants when appropriate
When lowering instructions that involve floating-point constants, pick
the appropriate type for the constant so that it will also work with
float16 parameters.
v2: Use float16_t constructor instead of helper function.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
Neil Roberts [Thu, 16 May 2019 15:01:06 +0000 (17:01 +0200)]
glsl/validate: Allow float16 in the expression tree
v2. [Hyunjun Ko (zzoon@igalia.com)] squashed 3 commits
into one commit.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
Kristian H. Kristensen [Wed, 4 Mar 2020 21:57:33 +0000 (13:57 -0800)]
glsl: Add type queries for fp16+float and fp16+float+double
Following the is_integer_32_64() convention, add is_float_16_32() and
float_16_32_64() for these commonly tested combinations.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
Hyunjun Ko [Tue, 7 May 2019 06:20:28 +0000 (06:20 +0000)]
glsl: Handle fp16 unary operations when lowering matrix operations
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
Neil Roberts [Wed, 9 Oct 2019 11:07:40 +0000 (13:07 +0200)]
glsl: Add ir_unop_f2fmp
This is the same as ir_unop_f2f16 except that it comes with a promise
that it is safe to optimise it out if the result is immediately
converted back to float32 again. Normally this would be a lossy
operation but it is safe to do if the conversion was generated as part
of the precision lowering pass.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
Neil Roberts [Thu, 16 May 2019 11:25:28 +0000 (13:25 +0200)]
glsl: Add b2f16 and f162b conversion operations
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
Neil Roberts [Fri, 19 Apr 2019 13:36:00 +0000 (15:36 +0200)]
glsl: Add IR conversion ops for 16-bit float types
Adds ir_unop_f162f and ir_unop_f2f16.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
Kristian H. Kristensen [Tue, 25 Feb 2020 21:43:39 +0000 (13:43 -0800)]
glsl: Expand fp16 to float before constant expression evaluation
This way the generated constant folding code doesn't need to
understand fp16. All operations have to be expanded to full float for
evaulation on the CPU, so we might as well do it up front. As far as
GLSL is concerned, fp16 isn't a separate type from float, so
everything we're supposed to support for float we need to do for fp16.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
Kristian H. Kristensen [Tue, 4 Feb 2020 23:50:25 +0000 (15:50 -0800)]
glsl: Implement constant propagation for fp16
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
Kristian H. Kristensen [Thu, 16 Jan 2020 22:58:57 +0000 (14:58 -0800)]
glsl: Add fp16 case for ir_triop_lrp optimization
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
Neil Roberts [Sun, 21 Apr 2019 10:42:21 +0000 (12:42 +0200)]
glsl: Add support for float16 types in the IR tree
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
Kristian H. Kristensen [Thu, 16 Jan 2020 22:56:53 +0000 (14:56 -0800)]
glsl: Add ir_constant constructor for fp16
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
Kristian H. Kristensen [Tue, 25 Feb 2020 21:38:11 +0000 (13:38 -0800)]
freedreno/ir3: Don't fold conversions into sign
Not supported.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
Pierre-Eric Pelloux-Prayer [Wed, 30 Oct 2019 19:39:08 +0000 (20:39 +0100)]
gitlab-ci: rules:changes to test on tested drivers changes
For now tests only use these drivers:
* llvmpipe
* softpipe
* freedreno
* lima
* etnaviv
* panfrost
So using rules:changes gitlab feature to run the tests when the changes
made are potentially affecting these drivers.
A few notes:
* the following code:
.piglit-test:
extends:
- .test-gl
- .llvmpipe-rules
makes gitlab replace .test-gl "rules:changes" values by the one from
".llvmpipe-rules".
* rules:changes always matches for non-MR new branches so jobs will always be
created (and they'll be run if their dependencies are run). For pushes to
existing branches the files changed by the push are used to match the
rules:changes path.
* the same gitlab feature could be used for some build jobs
Acked-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2569>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2569>
Daniel Schürmann [Wed, 4 Mar 2020 16:49:06 +0000 (17:49 +0100)]
amd: join emit_kill() from radv and radeonsi in ac_nir_to_llvm
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
Daniel Schürmann [Wed, 4 Mar 2020 16:35:26 +0000 (17:35 +0100)]
radv: use nir_lower_discard_to_demote to work around game bugs
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
Daniel Schürmann [Wed, 4 Mar 2020 16:22:36 +0000 (17:22 +0100)]
radeonsi: lower discard to demote when FS_CORRECT_DERIVS_AFTER_KILL is enabled
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
Daniel Schürmann [Wed, 4 Mar 2020 15:48:44 +0000 (16:48 +0100)]
amd/llvm: implement nir_intrinsic_demote(_if) and nir_intrinsic_is_helper_invocation
The current implementation uses a temporary helper variable
to ensure correct behavior until LLVM provides an intrinsic.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
Daniel Schürmann [Wed, 4 Mar 2020 15:55:13 +0000 (16:55 +0100)]
nir: add pass to lower discard() to demote()
This pass is intended to work around game bugs, only!
It also lowers nir_intrinsic_load_helper_invocation to
nir_intrinsic_is_helper_invocation for consistency.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
Daniel Schürmann [Wed, 4 Mar 2020 15:43:15 +0000 (16:43 +0100)]
nir: gather info whether a shader uses demote_to_helper
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
Eli Schwartz [Sun, 8 Mar 2020 16:58:57 +0000 (12:58 -0400)]
docs: fix typo in v20 release notes
It makes no sense to wait for it to stabilize on a version released
months previously in the previous major release cycle.
This was probably intended to be recommending the first bugfix release
of the current major.minor release cycle.
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4106>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4106>
Eric Engestrom [Mon, 9 Mar 2020 11:41:59 +0000 (11:41 +0000)]
Revert "docs/relnotes/19.3: fix vulkan version reported"
This reverts commit
5ff443b8aa9650f907bd9b5524bab21febe42ec9
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4112>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4112>
Tapani Pälli [Mon, 9 Mar 2020 08:35:20 +0000 (10:35 +0200)]
nir: fix compilation warning on glsl_get_internal_ifc_packing
Removes following warning:
warning: 'const' type qualifier on return type has no effect
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4111>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4111>
Krzysztof Raszkowski [Fri, 6 Mar 2020 15:09:24 +0000 (16:09 +0100)]
gallium/swr: Fix vcvtph2ps llvm intrinsic compile error
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4090>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4090>
Pierre-Eric Pelloux-Prayer [Thu, 5 Mar 2020 10:00:28 +0000 (11:00 +0100)]
meson: enable -fno-common by default
This flag is enabled by default starting with gcc 10.
All the compilation issues have been fixed, so use it by default
to make sure we're not introducing regressions.
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4058>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4058>
Pierre-Eric Pelloux-Prayer [Thu, 5 Mar 2020 08:37:58 +0000 (09:37 +0100)]
omx: fix build with gcc 10
bellagio/omx header files reference a global variable without the
extern keyworkd.
Now that gcc-10 enables the '-fno-common' by default the build fails.
Since these are external headers we can't easily fix them, so for
now build the omx module with the '-fcommon' flag to keep the
previous behavior.
See https://gitlab.freedesktop.org/mesa/mesa/issues/2385
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4058>
Matt Turner [Thu, 27 Feb 2020 18:48:37 +0000 (10:48 -0800)]
intel/compiler: Discount NOPs from instruction counts
Scheduler changes can cause changes in the number of instructions due to
this workaround, so just don't include NOPs in the instruction counts to
prevent shader-db noise.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
Matt Turner [Thu, 5 Mar 2020 00:24:25 +0000 (16:24 -0800)]
intel/compiler: Pass shader_stats for each SIMD mode
Passing shader_stats to the fs_generator constructor means that the
SIMD8 shader stats from the visitor (such as the scheduler mode) will be
reported out for the SIMD16/SIMD32 versions as well.
As you can see, we are now passing 'shader_stats' and 'stats' to
generate_code(), which is obviously odd looking. Ian rebased and
committed an old patch of mine which added the shader_stats struct on
July 30 in commit
dabb5d4bee07 (i965/fs: Add a shader_stats struct.) and
shortly after on August 12 Jason added the brw_compile_stats struct in
commit
134607760ac2 (intel/compiler: Fill a compiler statistics struct).
I'd like to combine the two, but I'm not sure how. shader_stats is an
input to generate_code() while brw_compile_stats is an output and is
only used by the Vulkan driver. Leave it as is for now...
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
Matt Turner [Fri, 6 Mar 2020 21:34:13 +0000 (13:34 -0800)]
intel/compiler: Pass backend_shader * to cfg_t()
As you can see, not having a pointer to the backend_shader from within
the class makes for some weird looking code.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
Matt Turner [Fri, 28 Feb 2020 03:49:35 +0000 (19:49 -0800)]
intel/compiler: Mark visitor parameters to scheduler const
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
Matt Turner [Fri, 23 Sep 2016 12:15:33 +0000 (15:15 +0300)]
intel/compiler: Mark some methods and parameters const
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
Matt Turner [Thu, 28 Apr 2016 22:19:28 +0000 (15:19 -0700)]
intel/compiler: Make instructions_to_schedule a local variable
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
Matt Turner [Sun, 1 Mar 2020 00:12:25 +0000 (16:12 -0800)]
intel/compiler: Remove unnecessary local variables
These are already provided in the fs_reg_alloc class.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
Matt Turner [Fri, 28 Feb 2020 00:46:52 +0000 (16:46 -0800)]
intel/vec4: Make implied_mrf_writes() a vec4_instruction method
Same as commit
c20dc9b8363b (intel/fs: Make implied_mrf_writes() an
fs_inst method.)
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
Christian Gmeiner [Tue, 4 Feb 2020 10:12:15 +0000 (11:12 +0100)]
etnaviv: implement emit_string_marker
Writes string to cmdstream in payload of a nop command.
Could be useful for internal driver debugging too.
Here is how it looks decoded:
0x18000000, /* NOP (3) OP=NOP */
0x65736572, /* rese */
0x18000000, /* NOP (3) OP=NOP */
0x00000074, /* t */
0x00000000, /* GL.API_MODE := OPENGL */
or
0x00000705, /* GL.STALL_TOKEN := FROM=RA,TO=PE,FLIP0=0,FLIP1=0 */
0x00000001, /* TS.FLUSH_CACHE := FLUSH=1 */
0x18000000, /* NOP (3) OP=NOP */
0x616e7465, /* etna */
0x18000000, /* NOP (3) OP=NOP */
0x6275735f, /* _sub */
0x18000000, /* NOP (3) OP=NOP */
0x5f74696d, /* mit_ */
0x18000000, /* NOP (3) OP=NOP */
0x735f7372, /* rs_s */
0x18000000, /* NOP (3) OP=NOP */
0x65746174, /* tate */
0x00004606, /* RS.CONFIG := SOURCE_FORMAT=A8R8G8B8
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3744>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3744>
Christian Gmeiner [Fri, 14 Feb 2020 10:43:11 +0000 (11:43 +0100)]
etnaviv: increase number of supported varyings to 16
No deqp regressions.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3827>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3827>
Christian Gmeiner [Fri, 14 Feb 2020 10:46:28 +0000 (11:46 +0100)]
etnaviv: update headers from rnndb
Update to etna_viv commit
fd2e2cfd.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3827>
Christian Gmeiner [Fri, 14 Feb 2020 12:24:07 +0000 (13:24 +0100)]
etnaviv: ask kernel for max number of supported varyings
The inital etnaviv kernel driver in 4.5 has support for this param.
See kernel commit
602eb48966d7b7f7e64dca8d9ea2842d83bfae73
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3827>
Michel Dänzer [Fri, 6 Mar 2020 11:35:17 +0000 (12:35 +0100)]
gitlab-ci: Always name artifacts archive after the job producing it
This will help determine which artifacts generate how much traffic.
v2:
* Add "mesa_" prefix to make it obvious which project the artifacts are
from.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4085>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4085>
Lionel Landwerlin [Wed, 22 Jan 2020 14:53:54 +0000 (16:53 +0200)]
anv: stop storing prog param data into shader blobs
We have no use for this data in Anv.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason EKstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3517>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3517>
Jason Ekstrand [Fri, 7 Feb 2020 13:13:12 +0000 (07:13 -0600)]
anv: Bounds-check pushed UBOs when robustBufferAccess = true
We also have to add nir_intrinsic_load_push_constant to the list of
intrinsics which use push constants in brw_nir_analyze_ubo_ranges
because we're moving the loop where we rewrite the intrinsics to after
we've analyzed UBO loads.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
Jason Ekstrand [Fri, 7 Feb 2020 10:33:19 +0000 (04:33 -0600)]
anv: Add an align_down_u32 helper
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
Jason Ekstrand [Tue, 11 Feb 2020 16:12:06 +0000 (10:12 -0600)]
anv: Align UBO sizes to 32B
This makes all of our bounds checking consistent with the block loads we
do for constant offset UBO accesses.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
Jason Ekstrand [Tue, 11 Feb 2020 14:02:12 +0000 (08:02 -0600)]
anv: Delete some pointless break statements
They immediately follow returns.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
Jason Ekstrand [Tue, 11 Feb 2020 13:40:05 +0000 (07:40 -0600)]
anv: Pass buffer addresses into emit_push_constant*
While we're here, we add an assert that bind_map::push_ranges is tightly
packed. If it isn't, it breaks assumptions in the emit_push_constant*
functions.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
Jason Ekstrand [Tue, 11 Feb 2020 13:52:17 +0000 (07:52 -0600)]
anv: Mark max_push_range UNUSED and simplify the code
The compiler should be smart enough to figure out that it's unused on
Gen11 and earlier and delete the code which calculates. Us adding an
`if (GEN_GEN >= 12)` check is unnecessary and just dirties the code.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
Jason Ekstrand [Thu, 13 Feb 2020 20:46:25 +0000 (14:46 -0600)]
anv: Parse VkPhysicalDeviceFeatures2 in CreateDevice
The client may enable robustBufferAccess2 via either
pCreateInfo->pEnabledFeatures or via a chained-in
VkPhysicalDeviceFeatures2 struct. We need to parse both.
Fixes:
022e5c7e5a5 "anv: Implement VK_KHR_get_physical_device_properties2"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
Eric Engestrom [Fri, 6 Mar 2020 19:22:40 +0000 (20:22 +0100)]
docs/relnotes/20.0: fix vulkan version reported
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4092>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4092>
Eric Engestrom [Fri, 6 Mar 2020 19:22:28 +0000 (20:22 +0100)]
docs/relnotes/19.3: fix vulkan version reported
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4092>
Eric Engestrom [Fri, 6 Mar 2020 18:12:26 +0000 (19:12 +0100)]
gen_release_notes: fix vulkan version reported
Fixes:
4ef3f7e3d37ece7b4339 ("anv: Enable Vulkan 1.2 support")
Fixes:
7f5462e349a3f082e294 ("radv: enable Vulkan 1.2")
Fixes:
75755e0eba17f8500367 ("turnip: Pretend to support Vulkan 1.2")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4092>
Alyssa Rosenzweig [Sat, 7 Mar 2020 00:31:49 +0000 (19:31 -0500)]
pan/bi: Fix Android.mk
Files listed in Makefile.sources did not exist, this affects the android
build for other drivers as well.
[Patch by Tapani manually cherrypicked into this branch]
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Alyssa Rosenzweig [Sat, 7 Mar 2020 00:27:25 +0000 (19:27 -0500)]
pan/bi: Rename next-wait to simply 'wait'
next-wait is from a quirk of packing that the dependency indices are
"off by one"; we don't emulate this quirk in the IR since it's easy
enough to patch over in the disassembler. Let's not confuse anybody with
it.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Alyssa Rosenzweig [Sat, 7 Mar 2020 00:25:00 +0000 (19:25 -0500)]
pan/bi: Add dummy scheduler
Do the absolute simplest possible thing -- create a clause for every
instruction, and just pick whichever slot we can, nopping the other,
copying whatever constant we have whether it's used or not.
To be clear - this is not to be used in a production compiler. But this
lets actual bundles and clauses show up in the BIR, which unblocks work
on final code generation and packing (which can happen more or less in
parallel to NIR->BIR, optimization, register allocation, and writing an
actual scheduling).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Alyssa Rosenzweig [Fri, 6 Mar 2020 21:29:35 +0000 (16:29 -0500)]
pan/bi: Implement load_const
In the laziest possible way... We can just emit worst case moves which
DCE will eat for breakfast anyway, and inline constants on instructions
where that is supported directly. This approach eliminates a lot of
nasty corner cases that Midgard's crazy cache scheme has hit, at the
expense of slightly more work for DCE (but it's only a single iteration
of an O(N) pass that has to run anyway..)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Alyssa Rosenzweig [Fri, 6 Mar 2020 14:52:09 +0000 (09:52 -0500)]
pan/bi: Add preliminary LOAD_UNIFORM implementation
Lots of things are missing (indirect access, UBOs) but we have this
stubbed out for now.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Alyssa Rosenzweig [Fri, 6 Mar 2020 14:44:19 +0000 (09:44 -0500)]
pan/bi: Implement store_vary for vertex shaders
As far as I/O goes, these four should hold us over for a while.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Alyssa Rosenzweig [Fri, 6 Mar 2020 14:43:43 +0000 (09:43 -0500)]
pan/bi: Add helpers for creating temporaries
Also from Midgard, adapted to our addressing scheme.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Alyssa Rosenzweig [Fri, 6 Mar 2020 14:33:52 +0000 (09:33 -0500)]
pan/bi: Implement load_input for vertex shaders
Corresponds to a single LD_ATTR instruction, easy enough.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Alyssa Rosenzweig [Fri, 6 Mar 2020 14:26:44 +0000 (09:26 -0500)]
pan/bi: Implement store_output for fragment shaders
Corresponds to a BLEND instruction, possibly preceded by an ATEST
instruction.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Alyssa Rosenzweig [Fri, 6 Mar 2020 14:26:20 +0000 (09:26 -0500)]
pan/bi: Add bi_schedule_barrier helper
Copypaste from Midgard.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Alyssa Rosenzweig [Fri, 6 Mar 2020 14:25:58 +0000 (09:25 -0500)]
pan/bi: Add blend_location to IR for BI_BLEND
To specify which render target is being written.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Alyssa Rosenzweig [Thu, 5 Mar 2020 22:50:18 +0000 (17:50 -0500)]
pan/bi: Implement nir_intrsinic_load_interpolated_input
Enough for basic varying reads.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Alyssa Rosenzweig [Thu, 5 Mar 2020 22:49:45 +0000 (17:49 -0500)]
pan/bi: Fix destination printing
It should get the same treatment as sources to handle SSA/reg/etc.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Alyssa Rosenzweig [Thu, 5 Mar 2020 22:10:46 +0000 (17:10 -0500)]
pan/bi: Handle jumps (breaks, continues)
Loops should behave reasonably now.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Alyssa Rosenzweig [Thu, 5 Mar 2020 22:03:53 +0000 (17:03 -0500)]
pan/bi: Handle loops when ingesting CFG
Not very useful without also handling breaks and continues, of course.
We use the strategy from v3d (vir_to_nir) instead of Midgard's, since
the latter is mildly insane. I mean, it passes deqp but...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Alyssa Rosenzweig [Thu, 5 Mar 2020 21:45:16 +0000 (16:45 -0500)]
pan/bi: Add support for if-else blocks
Branch lowering code lifted from Midgard as usual.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Alyssa Rosenzweig [Thu, 5 Mar 2020 21:52:29 +0000 (16:52 -0500)]
pan/bi: Call nir_lower_io_to_temporaries in cmdline
Normally mesa/st would do this for us, but we're using the standalone
compiler (in advance of having the hardware) and need this pass
particularly for fragment writeout.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Alyssa Rosenzweig [Thu, 5 Mar 2020 21:44:49 +0000 (16:44 -0500)]
pan/bi: Add instruction emit/remove helpers
As we start descending into code generation these will be of interest.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Alyssa Rosenzweig [Thu, 5 Mar 2020 21:33:09 +0000 (16:33 -0500)]
pan/bi: Print branch target
...if it's present, anyway.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Alyssa Rosenzweig [Thu, 5 Mar 2020 21:30:58 +0000 (16:30 -0500)]
pan/bi: Don't print types for unconditional branches
There's nothing to type!
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Alyssa Rosenzweig [Thu, 5 Mar 2020 15:28:13 +0000 (10:28 -0500)]
pan/bi: Improve block printing
Skip predecessor printing if there are none and match a missing brace,
also fixup the spacing.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Alyssa Rosenzweig [Thu, 5 Mar 2020 15:25:19 +0000 (10:25 -0500)]
pan/bi: Walk through the NIR control flow graph
Copypaste from Midgard with some cleanups. That seems to be a trend
these days. Hopefully boilerplate will come to a close soon.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Alyssa Rosenzweig [Thu, 5 Mar 2020 15:11:39 +0000 (10:11 -0500)]
pan/bi: Lower and optimize NIR
Pretty much a copypaste from Midgard except where architectural
decisions diverge around vectorization. On that note, we will need our
own ALU scalarization pass at some point (or rather we'll need to extend
nir_lower_alu_scalar) to allow partial lowering for 8/16-bit ops. I.e.
we'll approximately need to lower
vec4 16 ssa_2 = fadd ssa_0, ssa_1
to
vec2 16 ssa_2 = fadd ssa_0.xy, ssa_1.xy
vec2 16 ssa_3 = fadd ssa_0.zw, ssa_1.zw
vec4 16 ssa_4 = vec4 ssa_2.x, ssa_2.y, ssa_3.x, ssa_4
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Chad Versace [Wed, 12 Feb 2020 22:31:52 +0000 (14:31 -0800)]
anv: Flatten the logic add_aux_surface_if_supported (v3)
Reduces the function's max indentation level from 5 to 3 inside the big
'if' tree. And enables more comments to be attached to the condition
they describe.
v2:
- Add missing DEBUG_NO_RBC check.
v3:
- Return early on DISABLE_AUX_BIT.
- Restore original order of gen7 hiz check.
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4096>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4096>
Chad Versace [Wed, 12 Feb 2020 19:50:52 +0000 (11:50 -0800)]
anv: Refactor creation of aux surfaces (v2)
make_surface() contained a giant if-tree for creation of aux surfaces.
Move the if-tree into its own function, add_aux_surface_if_supported().
This will simplify future changes for VK_EXT_image_drm_format_modifier.
This patch merely moves the code verbatim, then extracts duplicate
assertions to the top.
v2: Rename func to add_aux_surface_if_supported [for jekstrand].
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4096>
Chad Versace [Fri, 1 Nov 2019 23:04:26 +0000 (16:04 -0700)]
anv: Add anv_image_plane_needs_shadow_surface() (v2)
The function returns true if hardware limitations require the image
plane to use a shadow surface. It replaces equivalent code in
make_surface().
Refactor only. No intended change in behavior.
Why extract this code out of vkCreateImage? If an image requires
a shadow surface, then that may impact its support for DRM format
modifiers, which must be evaluated during
vkGetPhysicalDeviceImageFormatProperties2.
v2:
- Use early return. [for jekstrand]
- Unexport function.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4096>
Timothy Arceri [Thu, 30 Jan 2020 01:05:14 +0000 (12:05 +1100)]
glsl: add subroutine support to nir linker
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
Timothy Arceri [Tue, 28 Jan 2020 04:18:14 +0000 (15:18 +1100)]
glsl: dont try to assign uniform storage for uniform blocks
Fixes a crash in some shaders.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
Timothy Arceri [Mon, 27 Jan 2020 05:46:25 +0000 (16:46 +1100)]
glsl: add support for builtins to the nir uniform linker
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
Timothy Arceri [Mon, 27 Jan 2020 02:29:51 +0000 (13:29 +1100)]
glsl: set ShaderStorageBlocksWriteAccess in the nir linker
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
Timothy Arceri [Mon, 3 Feb 2020 23:22:22 +0000 (10:22 +1100)]
glsl: nir linker fix setting of ssbo top level array
This helps correcly set it for each top level member and correctly
handle unsized arrays.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
Timothy Arceri [Fri, 17 Jan 2020 01:07:11 +0000 (12:07 +1100)]
glsl: find the base offset for block members from unnamed blocks
These block member have been split into individual vars so we need
to set the correct offsets for each member in the new glsl nir
linker. We also take this opportunity to set the correct location
for the variable.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
Timothy Arceri [Tue, 21 Jan 2020 03:57:37 +0000 (14:57 +1100)]
glsl: correctly set explicit offsets for struct members
This correctly sets offsets set in glsl when using the nir linker.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
Timothy Arceri [Fri, 17 Jan 2020 01:02:26 +0000 (12:02 +1100)]
glsl: add std140 and std430 layouts to nir uniform linker
The current ARB_gl_spirv linking only supports explicit layouts so
we need to update it to support std140 and std430 layouts before
we can use the linker for glsl.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
Timothy Arceri [Thu, 16 Jan 2020 03:46:04 +0000 (14:46 +1100)]
nir: add glsl_get_std430_size() helper
This will be used by the nir glsl linker for linking uniforms.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
Timothy Arceri [Thu, 16 Jan 2020 03:44:43 +0000 (14:44 +1100)]
nir: add glsl_get_std430_base_alignment() helper
This will be used by the nir glsl linker for linking uniforms.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
Timothy Arceri [Thu, 16 Jan 2020 03:43:30 +0000 (14:43 +1100)]
nir: add glsl_get_std140_size() helper
This will be used by the nir glsl linker for linking uniforms.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
Timothy Arceri [Thu, 16 Jan 2020 03:01:42 +0000 (14:01 +1100)]
nir: add glsl_get_std140_base_alignment() helper
This will be used by the nir glsl linker for linking uniforms.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
Timothy Arceri [Thu, 16 Jan 2020 02:24:19 +0000 (13:24 +1100)]
nir: add glsl_get_internal_ifc_packing() helper
This will be used by the nir glsl linker for linking uniforms.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
Timothy Arceri [Mon, 3 Feb 2020 23:00:39 +0000 (10:00 +1100)]
glsl: correctly find block index when linking glsl with nir linker
The existing code for spirv expects all vars to have explicit
bindings set which is not true for glsl.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
Timothy Arceri [Wed, 8 Jan 2020 00:56:36 +0000 (11:56 +1100)]
glsl: add name support to nir uniform linker
Name support is optional for spirv support but is required for glsl
support.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
Timothy Arceri [Tue, 14 Jan 2020 00:54:27 +0000 (11:54 +1100)]
glsl: move get_next_index() earlier in nir link uniforms
We will use get_next_index() in more of the helper functions in
the following patches.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
Timothy Arceri [Fri, 10 Jan 2020 03:44:07 +0000 (14:44 +1100)]
glsl: move add_parameter() earlier in nir link uniforms
We will use add_parameter() in more of the helper functions in
the following patches.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
Timothy Arceri [Fri, 10 Jan 2020 02:54:47 +0000 (13:54 +1100)]
glsl: move nir link uniforms struct defs earlier
We will need to use the state in more of the helper functions in
the following patches.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
Vasily Khoruzhick [Thu, 5 Mar 2020 06:16:30 +0000 (22:16 -0800)]
lima: gpir: enforce instruction limit earlier
Enforce instruction limit of 512 instructions earlier. This is a
workaround for infinite loops in gpir compiler and allows us to
pin point the tests that are affected.
Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4055>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4055>
Francisco Jerez [Sun, 13 Mar 2016 23:37:03 +0000 (16:37 -0700)]
intel/compiler: Calculate num_instructions in O(1) during register pressure calculation
And mark the variable declaration as const.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
Francisco Jerez [Sun, 13 Mar 2016 23:35:49 +0000 (16:35 -0700)]
intel/compiler: Move register pressure calculation into IR analysis object
This defines a new BRW_ANALYSIS object which wraps the register
pressure computation code along with its result. For the rationale
see the previous commits converting the liveness and dominance
analysis passes to the IR analysis framework.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
Francisco Jerez [Fri, 11 Mar 2016 04:56:47 +0000 (20:56 -0800)]
entel/compiler: Simplify new_idom reduction in dominance tree calculation
Trivial, just use a few less tokens to do the same thing.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
Francisco Jerez [Fri, 11 Mar 2016 04:49:54 +0000 (20:49 -0800)]
intel/compiler: Move dominance tree data structure into idom_tree object
It makes sense to keep the result of analysis passes independent from
the IR itself. Instead of representing the idom tree as a pointer in
each basic block pointing to its immediate dominator, the whole
dominator tree is represented separately from the IR as an array of
pointers inside the idom_tree object. This has the advantage that
it's no longer possible to use stale dominance results by accident
without having called require() beforehand, which makes sure that the
idom tree is recalculated if necessary.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
Francisco Jerez [Thu, 10 Mar 2016 07:31:05 +0000 (23:31 -0800)]
intel/compiler: Move idom tree calculation and related logic into analysis object
This only does half of the work. The actual representation of the
idom tree is left untouched, but the computation algorithm is moved
into a separate analysis result class wrapped in a BRW_ANALYSIS
object, along with the intersect() and dump_domtree() auxiliary
functions in order to keep things tidy.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>