platform/kernel/linux-starfive.git
4 years agodrm/amdgpu/gfx10: add support for sienna_cichlid firmware
Likun Gao [Tue, 19 Mar 2019 02:43:30 +0000 (10:43 +0800)]
drm/amdgpu/gfx10: add support for sienna_cichlid firmware

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: set asic family and ip blocks for sienna_cichlid
Likun Gao [Tue, 19 Mar 2019 01:57:53 +0000 (09:57 +0800)]
drm/amdgpu: set asic family and ip blocks for sienna_cichlid

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: set fw load type for sienna_cichlid
Likun Gao [Mon, 18 Mar 2019 13:44:13 +0000 (21:44 +0800)]
drm/amdgpu: set fw load type for sienna_cichlid

Same as Navi1x.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: add sienna_cichlid gpu info firmware v2
Likun Gao [Mon, 18 Mar 2019 13:30:50 +0000 (21:30 +0800)]
drm/amdgpu: add sienna_cichlid gpu info firmware v2

gpu info fw contains chip specific parameters.

v2: fix fw_name

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: add sienna_cichlid asic type
Likun Gao [Mon, 18 Mar 2019 13:15:25 +0000 (21:15 +0800)]
drm/amdgpu: add sienna_cichlid asic type

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Add dcn30 Headers (v2)
Jerry (Fangzhi) Zuo [Tue, 3 Mar 2020 21:50:25 +0000 (16:50 -0500)]
drm/amd/display: Add dcn30 Headers (v2)

DCN 3.0 display controller registers

v2: squash in updates from Bhawan.

Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: add VCN3.0 register headers (v2)
Leo Liu [Tue, 13 Aug 2019 14:01:47 +0000 (10:01 -0400)]
drm/amdgpu: add VCN3.0 register headers (v2)

Sienna_Cichlid VCN headers

v2: squash in updates (Alex)

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: Add ATHUB 2.1 header files (v2)
Yong Zhao [Tue, 24 Sep 2019 20:17:47 +0000 (16:17 -0400)]
drm/amdgpu: Add ATHUB 2.1 header files (v2)

v2: squash in updates (Alex)

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: add GC 10.3 header files (v2)
Likun Gao [Tue, 19 Mar 2019 08:35:51 +0000 (16:35 +0800)]
drm/amdgpu: add GC 10.3 header files (v2)

Add GC10.3 related header files.

v2: squash in updates (Alex)

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: restrict bo mapping within gpu address limits
Rajneesh Bhardwaj [Sat, 25 Apr 2020 05:01:12 +0000 (01:01 -0400)]
drm/amdgpu: restrict bo mapping within gpu address limits

Have strict check on bo mapping since on some systems, such as A+A or
hybrid, the cpu might support 5 level paging or can address memory above
48 bits but gpu might be limited by hardware to just use 48 bits. In
general, this applies to all asics where this limitation can be checked
against their max_pfn range. This restricts the range to map bo within
pratical limits of cpu and gpu for shared virtual memory access.

Reviewed-by: Oak Zeng <oak.zeng@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: Add unique_id and serial_number for Arcturus v3
Kent Russell [Mon, 27 Apr 2020 13:28:04 +0000 (09:28 -0400)]
drm/amdgpu: Add unique_id and serial_number for Arcturus v3

Add support for unique_id and serial_number, as these are now
the same value, and will be for future ASICs as well.

v2: Explicitly create unique_id only for VG10/20/ARC
v3: Change set_unique_id to get_unique_id for clarity

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: Add ReadSerial defines for Arcturus
Kent Russell [Mon, 27 Apr 2020 13:27:24 +0000 (09:27 -0400)]
drm/amdgpu: Add ReadSerial defines for Arcturus

Add the ReadSerial definitions for Arcturus to the arcturus_ppsmc.h
header for use with unique_id

Unrevert: Supported in SMU 54.23, update values to match SMU spec

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: remove useless code in RAS
Guchun Chen [Tue, 2 Jun 2020 05:53:09 +0000 (13:53 +0800)]
drm/amdgpu: remove useless code in RAS

Module parameter amdgpu_ras_mask has been involved in
the calculation of ras support capability, so drop this
redundant code.

Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: fix RAS memory leak in error case
Guchun Chen [Tue, 2 Jun 2020 05:46:22 +0000 (13:46 +0800)]
drm/amdgpu: fix RAS memory leak in error case

RAS context memory needs to freed in failure case.

Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/fru: fix header guard and include header
Alex Deucher [Thu, 28 May 2020 13:43:54 +0000 (09:43 -0400)]
drm/amdgpu/fru: fix header guard and include header

Fix the fru eeprom header guard and include it in the .c file.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/nv: enable init reset check
Alex Deucher [Thu, 28 May 2020 21:28:17 +0000 (17:28 -0400)]
drm/amdgpu/nv: enable init reset check

gpu reset is implemented for navi so we can enable this.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/nv: remove some dead code
Alex Deucher [Thu, 28 May 2020 21:23:18 +0000 (17:23 -0400)]
drm/amdgpu/nv: remove some dead code

navi never supported the pci config reset.  Neither did
vega.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/nv: allow access to SDMA status registers
Alex Deucher [Thu, 28 May 2020 21:21:38 +0000 (17:21 -0400)]
drm/amdgpu/nv: allow access to SDMA status registers

For access via ioctl for tools like umr and mesa.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: use IP discovery table for renoir
Alex Deucher [Thu, 28 May 2020 21:12:53 +0000 (17:12 -0400)]
drm/amdgpu: use IP discovery table for renoir

Rather than relying on gpu info firmware.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: clean up discovery testing
Alex Deucher [Thu, 28 May 2020 21:06:59 +0000 (17:06 -0400)]
drm/amdgpu: clean up discovery testing

Rather than checking of the variable is enabled and the
chip is the right family check for the presence of the
discovery table.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: skip gpu_info firmware if discovery info is available
Alex Deucher [Thu, 28 May 2020 20:57:27 +0000 (16:57 -0400)]
drm/amdgpu: skip gpu_info firmware if discovery info is available

The GPU info firmware is only applicable at bring up when the
IP discovery table is not present.  If it's available, use that
first and then fallback to parsing the gpu info firmware.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: give better names for the thermal IRQ related APIs
Evan Quan [Tue, 26 May 2020 09:06:04 +0000 (17:06 +0800)]
drm/amd/powerplay: give better names for the thermal IRQ related APIs

Thermal control is performed by PMFW. What handled in driver is
just whether or not to enable the alert(to driver).

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: use the common APIs for IRQ disablement/enablement
Evan Quan [Tue, 26 May 2020 08:54:22 +0000 (16:54 +0800)]
drm/amd/powerplay: use the common APIs for IRQ disablement/enablement

Also the new logics for MP1 SW IRQs disablement/enablement are added.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: stop thermal IRQs on suspend
Evan Quan [Tue, 26 May 2020 08:50:55 +0000 (16:50 +0800)]
drm/amd/powerplay: stop thermal IRQs on suspend

Added missing thermal IRQs disablement on suspend.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: added a sysfs interface for thermal throttling related V4
Evan Quan [Fri, 22 May 2020 10:57:11 +0000 (18:57 +0800)]
drm/amdgpu: added a sysfs interface for thermal throttling related V4

User can check and set the enablement of throttling logging and
the interval between each logging.

V2: simplify the sysfs interface(no string parsing)
V3: add proper lock protection on updating throttling_logging_rs.interval
V4: documentation cosmetic per Luben's suggestion

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Luben Tuikov <luben.tuikov@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: enable thermal throttling logging support V2
Evan Quan [Fri, 22 May 2020 07:42:40 +0000 (15:42 +0800)]
drm/amd/powerplay: enable thermal throttling logging support V2

Currently this feature is supported on Arcturus only. PMFW will
interrupt driver the first time when thermal throttling happened
and every one second afterwards if the throttling continuing. On
receiving the 1st interrupt, driver logs it the first time. However,
if the throttling continues, the logging will be performed every
minute to avoid log flooding.

V2: simplify the implemention by ratelimited printk

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: implement ASIC specific thermal throttling logging
Evan Quan [Thu, 21 May 2020 04:36:44 +0000 (12:36 +0800)]
drm/amd/powerplay: implement ASIC specific thermal throttling logging

Enable this for Arcturus only for now.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: update Arcturus smu-driver headers
Evan Quan [Thu, 21 May 2020 03:50:44 +0000 (11:50 +0800)]
drm/amd/powerplay: update Arcturus smu-driver headers

To fit the latest 54.24.0 PMFW.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: ack the SMUToHost interrupt on receive V2
Evan Quan [Tue, 12 May 2020 11:06:37 +0000 (19:06 +0800)]
drm/amd/powerplay: ack the SMUToHost interrupt on receive V2

There will be no further interrupt without proper ack
for current one.

V2: fix typo to really set ACK bit only

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdkfd: fix a dereference of pdd before it is null checked
Colin Ian King [Thu, 28 May 2020 22:24:53 +0000 (23:24 +0100)]
drm/amdkfd: fix a dereference of pdd before it is null checked

Currently pointer pdd is being dereferenced when assigning pointer
dpm and then pdd is being null checked.  Fix this by checking if
pdd is null before the dereference of pdd occurs.

Addresses-Coverity: ("Dereference before null check")
Fixes: 32cb59f31362 ("drm/amdkfd: Track SDMA utilization per process")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/pm: return an error during GPU reset or suspend (v2)
Alex Deucher [Sun, 24 May 2020 06:46:53 +0000 (02:46 -0400)]
drm/amdgpu/pm: return an error during GPU reset or suspend (v2)

Return an error for sysfs and debugfs power interfaces during
gpu reset and suspend.  Prevents access to the hw while it may
be in an unusable state.

v2: squash in fix to drop suspend check

Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/gmc10: program the smallK fragment size
Alex Deucher [Fri, 22 May 2020 22:14:32 +0000 (18:14 -0400)]
drm/amdgpu/gmc10: program the smallK fragment size

Explicitly set the smallk size to 0 (4k).  This is the hw
default, but set it anyway just in case something else
changed it.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agoRevert "drm/amd/display: disable dcn20 abm feature for bring up"
Harry Wentland [Thu, 28 May 2020 13:44:44 +0000 (09:44 -0400)]
Revert "drm/amd/display: disable dcn20 abm feature for bring up"

This reverts commit 96cb7cf13d8530099c256c053648ad576588c387.

This change was used for DCN2 bringup and is no longer desired.
In fact it breaks backlight on DCN2 systems.

Cc: Alexander Monakov <amonakov@ispras.ru>
Cc: Hersen Wu <hersenxs.wu@amd.com>
Cc: Anthony Koo <Anthony.Koo@amd.com>
Cc: Michael Chiu <Michael.Chiu@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reported-and-tested-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdkfd: Fix GCC 10 compiler warning
Felix Kuehling [Fri, 22 May 2020 19:57:51 +0000 (15:57 -0400)]
drm/amdkfd: Fix GCC 10 compiler warning

GCC 10 was complaining about how we append data to a buffer using snprintf:

drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_topology.c: In function ‘perf_show’:
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_topology.c:214:3: warning: ‘snprintf’ argument 4 overlaps destination object ‘buf’ [-Wrestrict]
  214 |   snprintf(buffer, PAGE_SIZE, "%s"fmt, buffer, __VA_ARGS__)
      |   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

This patch fixes the warnings and makes the sysfs code more efficient
by remembering the offset in the buffer between append operations.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Aaron Liu <aaron.liu@amd.com>
Tested-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Amber Lin <Amber.Lin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/amdgpu: Fix the CGCG setting is overwritten for SRIOV.
Gavin Wan [Thu, 21 May 2020 19:35:28 +0000 (19:35 +0000)]
drm/amd/amdgpu: Fix the CGCG setting is overwritten for SRIOV.

For SRIOV, since the CP_INT_CNTL_RING0 is programed on host side.
The Guest should not program CP_INT_CNTL_RING0 again.

Signed-off-by: Gavin Wan <Gavin.Wan@amd.com>
Reviewed-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: 3.2.87
Aric Cyr [Tue, 19 May 2020 16:35:07 +0000 (12:35 -0400)]
drm/amd/display: 3.2.87

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Don't compare same stream for synchronized vblank
Alvin Lee [Fri, 15 May 2020 22:18:20 +0000 (18:18 -0400)]
drm/amd/display: Don't compare same stream for synchronized vblank

[Why]
When determining synchronzied vblank we don't need to compare the stream
with itself

[How]
If comparing same stream, continue to next iteration

Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: [FW Promotion] Release 1.0.12
Anthony Koo [Fri, 15 May 2020 20:25:02 +0000 (16:25 -0400)]
drm/amd/display: [FW Promotion] Release 1.0.12

[Header Changes]
  - Combine all interface dependencies between driver and fw into a
    single header file
  - Add FW Versioning to the dmub_cmd.h file

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: enable plane if container of plane_status changed
Hugo Hu [Wed, 13 May 2020 08:36:28 +0000 (16:36 +0800)]
drm/amd/display: enable plane if container of plane_status changed

[why]
We hit an issue which driver reallocate a pipe from desktop bottom
pipe to video bottom pipe. In this case, driver need to re-enable
plane.

[how]
Enable plane if container of plane status changed.

Signed-off-by: Hugo Hu <hugo.hu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: combine public interfaces into single header
Anthony Koo [Fri, 15 May 2020 19:51:33 +0000 (15:51 -0400)]
drm/amd/display: combine public interfaces into single header

[Why]
We want to better encapsulate all driver-fw dependencies into a single
file.

[How]
Combine all the headers under inc folder into a single header

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Allow Diagnostics test with eDP not connected
Eric Bernstein [Mon, 11 May 2020 20:48:52 +0000 (16:48 -0400)]
drm/amd/display: Allow Diagnostics test with eDP not connected

[Why]
Diagnostics DIO test with eDP not connected is required to run

[How]
Allow Diagnostics test with eDP not connected to skip link detection but
still execute DIO test

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: unit show garbage when do OPTC blank
Paul Hsieh [Wed, 13 May 2020 03:31:42 +0000 (11:31 +0800)]
drm/amd/display: unit show garbage when do OPTC blank

[Why]
Unit enter to S4, garbage show on screen when do OPTC blank.

[How]
Wait for vblank then do OPTC blank

Signed-off-by: Paul Hsieh <paul.hsieh@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Guard against invalid array access
Aric Cyr [Wed, 13 May 2020 03:36:05 +0000 (23:36 -0400)]
drm/amd/display: Guard against invalid array access

[Why]
There are scenarios where no OPP is assigned to an OTG so its value is
0xF which is outside the size of the OPP array causing a potential
driver crash.

[How]
Change the assert to an early return to guard against access.  If
there's no OPP assigned already, then OTG will be blank anyways so no
functionality should be lost.

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Reviewed-by: Zhan Liu <Zhan.Liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Disable PG on NV12
Alvin Lee [Tue, 12 May 2020 21:21:54 +0000 (17:21 -0400)]
drm/amd/display: Disable PG on NV12

[Why]
HW team request to disable PG on NV12 (fixing missed cases)

[How]
Disable dpp and hubp PG

Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Increase Default Sizes of FW State and Trace Buffer
David Galiffi [Wed, 13 May 2020 14:36:06 +0000 (10:36 -0400)]
drm/amd/display: Increase Default Sizes of FW State and Trace Buffer

[WHY]
To facilitate DM removing the dependency between dc and the firmware
binary.

[HOW]
Setting the default values to match VBIOS: 64 KB. These values are only
used if meta is absent.

Signed-off-by: David Galiffi <David.Galiffi@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Handle link loss interrupt better
Aric Cyr [Tue, 12 May 2020 16:53:52 +0000 (12:53 -0400)]
drm/amd/display: Handle link loss interrupt better

[Why]
Link loss currently only retrains and re-enables the stream.  This can
cause issues for some sinks.

[How]
When link loss occurs, the link and stream(s) should be completely
disabled and then reenabled.

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: simplify dml log2 function
Dmytro Laktyushkin [Mon, 11 May 2020 14:33:58 +0000 (10:33 -0400)]
drm/amd/display: simplify dml log2 function

Current implementation is slightly inaccurate and will often
result in truncation/floor operation decrementing an exact
integer output by 1.

Only rounded down output is ever expected, just extract the fp
exponent for this to increase performance and avoid any
truncation issues.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Fix incorrect HDCP caps for dongle
Bhawanpreet Lakha [Mon, 11 May 2020 21:36:38 +0000 (17:36 -0400)]
drm/amd/display: Fix incorrect HDCP caps for dongle

[Why]
Previously we used link signal type to get the caps. We should use the
sink signal type

[How]
Use sink signal type instead of link signal type

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: link_status not align when power off encoder
Paul Hsieh [Fri, 8 May 2020 06:32:11 +0000 (14:32 +0800)]
drm/amd/display: link_status not align when power off encoder

[Why]
The link_status is incorrect cause driver power off eDP when backlight
on. Some eDP panels may show garbage on screen.

[How]
Correct link_status when power off encoder

Signed-off-by: Paul Hsieh <paul.hsieh@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: 3.2.86
Aric Cyr [Mon, 11 May 2020 14:33:54 +0000 (10:33 -0400)]
drm/amd/display: 3.2.86

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: Improve the MTYPE comments
Yong Zhao [Wed, 27 May 2020 00:53:21 +0000 (20:53 -0400)]
drm/amdgpu: Improve the MTYPE comments

Use words insteads of acronyms for better understanding.

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdkfd: Track SDMA utilization per process
Mukul Joshi [Wed, 27 May 2020 00:06:04 +0000 (20:06 -0400)]
drm/amdkfd: Track SDMA utilization per process

Track SDMA usage on a per process basis and report it through sysfs.
The value in the sysfs file indicates the amount of time SDMA has
been in-use by this process since the creation of the process.
This value is in microsecond granularity.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: add check before i2c_add_adapter
Wenhui Sheng [Tue, 26 May 2020 05:27:11 +0000 (13:27 +0800)]
drm/amd/powerplay: add check before i2c_add_adapter

smu_i2c_eeprom_init may be invoked twice or more
under sroiv mode, while we don't want to add check
if (!amdgpu_sriov_vf) before we invoke smu_i2c_eeprom_init/fini
each time, so we check if i2c adapter is already added
before we invoke i2c_add_adapter

Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: remove SRIOV check in SMU11 (v2)
Wenhui Sheng [Fri, 22 May 2020 04:37:18 +0000 (12:37 +0800)]
drm/amd/powerplay: remove SRIOV check in SMU11 (v2)

We don't need SRIOV check after we enable SMC msg filter in SMU11

v2: squash in unused variable fix, unused ids

Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: enable SMC message filter
Wenhui Sheng [Fri, 22 May 2020 04:30:58 +0000 (12:30 +0800)]
drm/amd/powerplay: enable SMC message filter

1. enable SMC message filter in SRIOV situation
2. return -EACCESS if msg is blocked from smu_msg_get_index
3. if msg is block, always return 0 from smu_v11_0_send_msg_with_param

Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: add SMC message filter for SMU11
Wenhui Sheng [Thu, 21 May 2020 06:11:13 +0000 (14:11 +0800)]
drm/amd/powerplay: add SMC message filter for SMU11

1. add smu_11_0_msg_mapping definition
2. add valid info for each SMC message in SRIOV

Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: check whether SMU IP is enabled before access
Evan Quan [Mon, 25 May 2020 06:29:10 +0000 (14:29 +0800)]
drm/amd/powerplay: check whether SMU IP is enabled before access

Since on early phase of bringup, the SMU IP may be not enabled or
supported. Without this, we may hit null pointer dereference on
accessing smu->adev.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Yong Zhao <Yong.Zhao@amd.com>
Tested-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Make BREAK_TO_DEBUGGER() a debug print
Nicholas Kazlauskas [Fri, 22 May 2020 18:03:26 +0000 (14:03 -0400)]
drm/amd/display: Make BREAK_TO_DEBUGGER() a debug print

[Why]
Warnings in the kernel are generally treated as errors.

The BREAK_TO_DEBUGGER macro is not a critical error or warning, but
rather intended for developer use to help investigate behavior and
sequences for other issues.

We do still make use of DC_ERROR/ASSERT(0) in various places in the
code for things that are genuine issues.

Since most developers don't actually KGDB while debugging the kernel
these essentially would have no value on their own since the KGDB
breakpoint wouldn't trigger - ASSERT(0) was used as a shortcut to get
a stacktrace.

[How]
Turn it into a DRM_DEBUG_DRIVER print instead. We unfortunately lose
the stacktrace, but we still do retain some of the useful debug
information this offers by having at least the function and line
number loggable.

If KGDB is supported in the kernel this will still trigger a real
breakpoint as well.

Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Leo Li <sunpeng.li@amd.com>
Cc: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/[radeon|amdgpu]: Replace one-element array and use struct_size() helper
Gustavo A. R. Silva [Fri, 22 May 2020 17:43:55 +0000 (12:43 -0500)]
drm/[radeon|amdgpu]: Replace one-element array and use struct_size() helper

The current codebase makes use of one-element arrays in the following
form:

struct something {
    int length;
    u8 data[1];
};

struct something *instance;

instance = kmalloc(sizeof(*instance) + size, GFP_KERNEL);
instance->length = size;
memcpy(instance->data, source, size);

but the preferred mechanism to declare variable-length types such as
these ones is a flexible array member[1][2], introduced in C99:

struct foo {
        int stuff;
        struct boo array[];
};

By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on. So, replace
the one-element array with a flexible-array member.

Also, make use of the new struct_size() helper to properly calculate the
size of struct SISLANDS_SMC_SWSTATE.

This issue was found with the help of Coccinelle and, audited and fixed
_manually_.

[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour")

Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/radeon/dpm: Replace one-element array and use struct_size() helper
Gustavo A. R. Silva [Fri, 22 May 2020 17:34:19 +0000 (12:34 -0500)]
drm/radeon/dpm: Replace one-element array and use struct_size() helper

The current codebase makes use of one-element arrays in the following
form:

struct something {
    int length;
    u8 data[1];
};

struct something *instance;

instance = kmalloc(sizeof(*instance) + size, GFP_KERNEL);
instance->length = size;
memcpy(instance->data, source, size);

but the preferred mechanism to declare variable-length types such as
these ones is a flexible array member[1][2], introduced in C99:

struct foo {
        int stuff;
        struct boo array[];
};

By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on. So, replace
the one-element array with a flexible-array member.

Also, make use of the new struct_size() helper to properly calculate the
size of struct NISLANDS_SMC_SWSTATE.

This issue was found with the help of Coccinelle and, audited and fixed
_manually_.

[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour")

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: put some case statments in family order
Alex Deucher [Mon, 18 May 2020 21:29:09 +0000 (17:29 -0400)]
drm/amdgpu: put some case statments in family order

SI and CIK came before VI and newer asics.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/sdma4: simplify the logic around powering up sdma
Alex Deucher [Mon, 18 May 2020 21:14:54 +0000 (17:14 -0400)]
drm/amdgpu/sdma4: simplify the logic around powering up sdma

Just check if it's an APU.  The checks for the ppfuncs are
pointless because if we don't have them we can't power up
sdma anyway so we shouldn't even be in this code in the first
place.  I'm not sure about the in_gpu_reset check.  This
probably needs to be double checked.  The fini logic doesn't
match the init logic however with that in_gpu_reset check
in place which seems odd.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: simplify mec2 fw check
Alex Deucher [Mon, 18 May 2020 21:09:12 +0000 (17:09 -0400)]
drm/amdgpu: simplify mec2 fw check

Check if mec2 fw exists rather than checking asic types.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: simplify CZ/ST and KV/KB/ML checks
Alex Deucher [Mon, 18 May 2020 21:10:11 +0000 (17:10 -0400)]
drm/amdgpu: simplify CZ/ST and KV/KB/ML checks

Just check for APU.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: simplify raven and renoir checks
Alex Deucher [Mon, 18 May 2020 21:01:12 +0000 (17:01 -0400)]
drm/amdgpu: simplify raven and renoir checks

Just check for APU.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/gfx10: add navi12 to gfxoff case
Alex Deucher [Mon, 18 May 2020 20:45:13 +0000 (16:45 -0400)]
drm/amdgpu/gfx10: add navi12 to gfxoff case

Looks like it should be handled here as well.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/sdma4: add renoir to powergating setup
Alex Deucher [Mon, 18 May 2020 20:42:21 +0000 (16:42 -0400)]
drm/amdgpu/sdma4: add renoir to powergating setup

Looks like renoir should be handled here as well.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: simplify ATIF backlight handling
Alex Deucher [Tue, 5 May 2020 19:44:57 +0000 (15:44 -0400)]
drm/amdgpu: simplify ATIF backlight handling

Just register the a pointer to the backlight device and use
that. Unifies the DC and non-DC handling.

Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/radeon: disable AGP by default
Christian König [Tue, 12 May 2020 08:55:58 +0000 (10:55 +0200)]
drm/radeon: disable AGP by default

Always use the PCI GART instead. We just have to many cases
where AGP still causes problems. This means a performance
regression for some GPUs, but also a bug fix for some others.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: print warning when input address is invalid
Guchun Chen [Fri, 22 May 2020 07:50:15 +0000 (15:50 +0800)]
drm/amdgpu: print warning when input address is invalid

This will assist debug in error injection case.

Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: skip smu_i2c_eeprom_init/fini under sriov mode
Hua Zhang [Thu, 14 May 2020 07:47:30 +0000 (15:47 +0800)]
drm/amd/powerplay: skip smu_i2c_eeprom_init/fini under sriov mode

When smu_i2c_eeprom_init is called on the smu resuming process
under sroiv mode, there will be a call trace:
[  436.377690]  dump_stack+0x63/0x85
[  436.377695]  kobject_init+0x77/0x90
[  436.377704]  device_initialize+0x28/0x110
[  436.377708]  device_register+0x12/0x20
[  436.377756]  i2c_register_adapter+0xeb/0x400
[  436.377763]  i2c_add_adapter+0x5a/0x80
[  436.377951]  arcturus_i2c_eeprom_control_init+0x60/0x80 [amdgpu]
[  436.378123]  smu_resume+0xcc/0x110 [amdgpu]
[  436.378247]  amdgpu_device_gpu_recover+0xfb1/0xfc0 [amdgpu]
[  436.378401]  amdgpu_job_timedout+0xf2/0x150 [amdgpu]
[  436.378414]  drm_sched_job_timedout+0x70/0xc0 [amd_sched]
[  436.378420]  ? drm_sched_job_timedout+0x70/0xc0 [amd_sched]
[  436.378430]  process_one_work+0x1fd/0x3f0
[  436.378438]  worker_thread+0x34/0x410
[  436.378444]  kthread+0x121/0x140
[  436.378451]  ? process_one_work+0x3f0/0x3f0
[  436.378456]  ? kthread_create_worker_on_cpu+0x70/0x70
[  436.378464]  ret_from_fork+0x35/0x40

This is because smu_i2c_eeprom is not released on gpu recovering.
Actually, smu_i2c_eeprom_init/fini are only needed under bare
mental mode.

Signed-off-by: Hua Zhang <hua.zhang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: remove the support of vega20 from swsmu
Kevin Wang [Wed, 20 May 2020 03:41:40 +0000 (11:41 +0800)]
drm/amd/powerplay: remove the support of vega20 from swsmu

by default, vega20 will use legacy powerplay driver.
in order to maintain the code conveniently in the future,
remove the support of vega20 from swsmu.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: remove the support of xgmi pstate on vega20 from swsmu
Kevin Wang [Wed, 20 May 2020 03:25:23 +0000 (11:25 +0800)]
drm/amd/powerplay: remove the support of xgmi pstate on vega20 from swsmu

the vega20 asic uses legacy powerplay driver by default.

1. cleanup is_support_sw_smu_xgmi() function.
(only use for vega20 xgmi pstate check)
2. by default, the vega20 set xgmi pstate by legacy powerplay routine.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: change memory training to common function
Likun Gao [Thu, 21 May 2020 07:40:41 +0000 (15:40 +0800)]
drm/amdgpu: change memory training to common function

Change memory training init and finit a common function, as it only have
software behavior do not relay on the IP version of PSP.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: FW Release 1.0.11
Anthony Koo [Sat, 9 May 2020 21:32:10 +0000 (17:32 -0400)]
drm/amd/display: FW Release 1.0.11

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Remove nv12 work around
Yongqiang Sun [Fri, 8 May 2020 14:43:14 +0000 (10:43 -0400)]
drm/amd/display: Remove nv12 work around

[Why]
dal side nv12 wa has a lot of side effects.
KMD side wa is used, so this should be remove.

[How]
Removed wa from dal side.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: fix dml immediate flip input
Dmytro Laktyushkin [Wed, 6 May 2020 19:08:59 +0000 (15:08 -0400)]
drm/amd/display: fix dml immediate flip input

Set the correct value to immediate flip required field.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Samson Tam <Samson.Tam@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: fix dml log2 function
Dmytro Laktyushkin [Fri, 1 May 2020 19:43:09 +0000 (15:43 -0400)]
drm/amd/display: fix dml log2 function

This change removes internal rounding in dml_log2 function.

Dml_log2 is expected to return a float output. In case an int is needed
dml will floor the output on it's own.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Support CW4 for DMUB ringbuffer inbox
Nicholas Kazlauskas [Thu, 7 May 2020 17:35:41 +0000 (13:35 -0400)]
drm/amd/display: Support CW4 for DMUB ringbuffer inbox

[Why]
Region 4 is non cacheable and slower than using cache window 4.

[How]
Check the firmware version to determine how we should program the
base address and memory windows.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Add DMUB firmware version helpers in DMUB service
Nicholas Kazlauskas [Thu, 7 May 2020 17:09:18 +0000 (13:09 -0400)]
drm/amd/display: Add DMUB firmware version helpers in DMUB service

[Why]
In order to switch over the inbox from region4 to cw4 we need to know if
the firmware is capable of properly invalidating the cache before
reading the commands.

Easiest way is to just check the firmware version, but we don't have the
helper macros or a way for the dmub_srv to know what version it is.

[How]
Add a new fw_version field to the creation parameters that driver can
optional pass in. Assumes a version of 0x00000000 is invalid.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: vbios data table packing
Jake Wang [Tue, 5 May 2020 14:02:36 +0000 (10:02 -0400)]
drm/amd/display: vbios data table packing

[WHY]
Currently we're copying the entire bios image into vbios.  Loading time
for FW with entire bios(54272 bytes) is 105138us.  By copying only the
sections of bios we're using(4436 bytes), loading time drops to 104326us
which saves us 812us.

[HOW]
ROM header, master data table, and all data tables will be packed in
contiguous manner. The offsets for the data tables are remapped to their
newly packed location.

Signed-off-by: Jake Wang <haonan.wang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: DP link layer test 4.2.1.1 fix due to specs update
Wenjing Liu [Thu, 30 Apr 2020 18:03:05 +0000 (14:03 -0400)]
drm/amd/display: DP link layer test 4.2.1.1 fix due to specs update

[why]
DP link layer CTS specs updated to change the test parameters in test
4.2.1.1.
Before it requires source to delay 400us on aux no reply.
With the specs updates Errata5, it requires source to delay 3.2ms
(based on LTTPR aux timeout)
This causes our test to fail after updating with the latest test
equipment firmware.

[how]
the change is to allow LTTPR 3.2ms aux timeout delay by default.
And only set to 400us if LTTPR is not present.
Before this piece of logic is interwined with LTTPR support.
Now we will default to 3.2ms aux timeout even if LTTPR support is not
enabled by driver.

Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: update dml interfaces and variables
Dmytro Laktyushkin [Wed, 22 Apr 2020 17:29:08 +0000 (13:29 -0400)]
drm/amd/display: update dml interfaces and variables

Preparation for new asic support.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: 3.2.85
Aric Cyr [Mon, 4 May 2020 03:55:10 +0000 (23:55 -0400)]
drm/amd/display: 3.2.85

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Fix ABM memory alignment issue
Wyatt Wood [Fri, 1 May 2020 00:04:47 +0000 (20:04 -0400)]
drm/amd/display: Fix ABM memory alignment issue

[Why]
Due to packing of abm_config_table, memory addresses aren't aligned to
32 bit boundary dmcub prefers.  Therefore when using pointers to this
structure, it's possible that dmcub will automatically align the data
read from that address, yielding incorrect values.

[How]
Instead of packing 1 byte boundary, explicitly pack values to 4 byte
boundary. Since there is a dependency on the existing iram table
structure on driver side, we must copy to a second structure, which is
aligned correctly, before passing to fw.

Signed-off-by: Wyatt Wood <wyatt.wood@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: FW release 1.0.10
Anthony Koo [Sat, 2 May 2020 03:06:03 +0000 (23:06 -0400)]
drm/amd/display: FW release 1.0.10

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Implement some asic specific abm call backs.
Yongqiang Sun [Mon, 27 Apr 2020 16:49:39 +0000 (12:49 -0400)]
drm/amd/display: Implement some asic specific abm call backs.

[Why & How]
Implement abm set_pipe call stacks
Have some asics speicifc call stacks for abm.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Add bit swap helper based on endianness
Rodrigo Siqueira [Fri, 24 Apr 2020 14:49:38 +0000 (10:49 -0400)]
drm/amd/display: Add bit swap helper based on endianness

Christian Koenig pointed out a code duplication related to bit swap in
case of big-endian manipulation. This commit adds a helper for handling
this verification and reduces the requirement of replicate some part of
the code.

Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Reviewed-by: Wyatt Wood <Wyatt.Wood@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Don't pass invalid fw_bss_data pointer into DMUB srv
Nicholas Kazlauskas [Thu, 30 Apr 2020 16:24:05 +0000 (12:24 -0400)]
drm/amd/display: Don't pass invalid fw_bss_data pointer into DMUB srv

[Why]
If bss_data_size is 0 then we shouldn't be passing down fw_bss_data into
the DMUB service since the region isn't really "valid."

[How]
Pass NULL instead if the size is 0.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Zhan Liu <Zhan.Liu@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Check bss_data_size before going down legacy DMUB load path
Nicholas Kazlauskas [Thu, 30 Apr 2020 16:18:16 +0000 (12:18 -0400)]
drm/amd/display: Check bss_data_size before going down legacy DMUB load path

[Why]
New unified firmware binary with only inst const still passes down
fw_bss_data != NULL and params->bss_data_size == 0 from DM.

This leads it into the legacy path causing firmware state allocation to
be too small.

[How]
Check bss_data_size as well.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Zhan Liu <Zhan.Liu@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Do not fail if build scaling params fails
Sung Lee [Wed, 29 Apr 2020 21:24:23 +0000 (17:24 -0400)]
drm/amd/display: Do not fail if build scaling params fails

[WHY]
Failing validation when building scaling parameters causes corruption to
occur due to pipe splitting with smaller pixel widths than HW supports.
This needs to fail silently for now to hide the corruption until the
corruption itself can be fixed.

[HOW]
Do not fail validation if building scaling params fails.

Signed-off-by: Sung Lee <sung.lee@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Handle persistence in DM
Jaehyun Chung [Tue, 28 Apr 2020 16:41:54 +0000 (12:41 -0400)]
drm/amd/display: Handle persistence in DM

[Why]
Remove dm_write_persistent_data and dm_read_persistent_data as
persistence should be handled in DM.

[How]
Remove functions. Move read/write calls into DM layer while maintaining
logic.

Signed-off-by: Jaehyun Chung <jaehyun.chung@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agoMerge tag 'amd-drm-next-5.8-2020-05-27' of git://people.freedesktop.org/~agd5f/linux...
Dave Airlie [Thu, 28 May 2020 06:10:16 +0000 (16:10 +1000)]
Merge tag 'amd-drm-next-5.8-2020-05-27' of git://people.freedesktop.org/~agd5f/linux into drm-next

amd-drm-next-5.8-2020-05-27:

amdgpu:
- SRIOV fixes
- RAS fixes
- VCN 2.5 DPG (Dynamic PowerGating) fixes
- FP16 updates for display
- CTF cleanups
- Display fixes
- Fix pcie bw sysfs handling
- Enable resizeable BAR support for gmc 10.x
- GFXOFF fixes for Raven
- PM sysfs handling fixes

amdkfd:
- Fix a race condition
- Warning fixes

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200527231219.3930-1-alexander.deucher@amd.com
4 years agoMerge tag 'drm-misc-next-fixes-2020-05-27' of git://anongit.freedesktop.org/drm/drm...
Dave Airlie [Thu, 28 May 2020 05:38:26 +0000 (15:38 +1000)]
Merge tag 'drm-misc-next-fixes-2020-05-27' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

Short summary of fixes pull (less than what git shortlog provides):

There's a fix for panel brighness on Lenovo X13 Yoga devices and a fix for
-Wformat warnings on architectures where atomic-64 counters are not of
type unsigned long long.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20200527080123.GA8186@linux-uq9g
4 years agodrm/amd/display: Fix potential integer wraparound resulting in a hang
Aric Cyr [Tue, 12 May 2020 15:48:48 +0000 (11:48 -0400)]
drm/amd/display: Fix potential integer wraparound resulting in a hang

[Why]
If VUPDATE_END is before VUPDATE_START the delay calculated can become
very large, causing a soft hang.

[How]
Take the absolute value of the difference between START and END.

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: drop cursor position check in atomic test
Simon Ser [Sat, 23 May 2020 11:53:41 +0000 (11:53 +0000)]
drm/amd/display: drop cursor position check in atomic test

get_cursor_position already handles the case where the cursor has
negative off-screen coordinates by not setting
dc_cursor_position.enabled.

Signed-off-by: Simon Ser <contact@emersion.fr>
Fixes: 626bf90fe03f ("drm/amd/display: add basic atomic check for cursor plane")
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: fix device attribute node create failed with multi gpu
Kevin Wang [Fri, 22 May 2020 14:06:17 +0000 (22:06 +0800)]
drm/amdgpu: fix device attribute node create failed with multi gpu

the origin design will use varible of "attr->states" to save node
supported states on current gpu device, but for multi gpu device, when
probe second gpu device, the driver will check attribute node states
from previous gpu device wthether to create attribute node.
it will cause other gpu device create attribute node faild.

1. add member attr_list into amdgpu_device to link supported device attribute node.
2. add new structure "struct amdgpu_device_attr_entry{}" to track device attribute state.
3. drop member "states" from amdgpu_device_attr.

v2:
1. move "attr_list" into amdgpu_pm and rename to "pm_attr_list".
2. refine create & remove device node functions parameter.

fix:
drm/amdgpu: optimize amdgpu device attribute code

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/nouveau: use correct conflicting framebuffer API
Dave Airlie [Tue, 26 May 2020 04:18:27 +0000 (14:18 +1000)]
drm/nouveau: use correct conflicting framebuffer API

nouveau was calling the fbdev API which has issues with modules
and built-ins. Call the correct API.

Reported-by: Randy Dunlap <rdunlap@infradead.org>
Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested
Fixes: 2dd4d163cd9c ("drm/nouveau: remove open-coded version of remove_conflicting_pci_framebuffers()")
Link: https://lore.kernel.org/lkml/21b52c28-3ace-cd13-d8ce-f38f2c6b2a96@infradead.org/T/#u
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agodrm/vblank: Fix -Wformat compile warnings on some arches
Lyude Paul [Thu, 21 May 2020 20:46:47 +0000 (16:46 -0400)]
drm/vblank: Fix -Wformat compile warnings on some arches

On some architectures like ppc64le and aarch64, compiling with
-Wformat=1 will throw the following warnings:

  In file included from drivers/gpu/drm/drm_vblank.c:33:
  drivers/gpu/drm/drm_vblank.c: In function 'drm_update_vblank_count':
  drivers/gpu/drm/drm_vblank.c:273:16: warning: format '%llu' expects
  argument of type 'long long unsigned int', but argument 4 has type
  'long int' [-Wformat=]
    DRM_DEBUG_VBL("updating vblank count on crtc %u:"
                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  ./include/drm/drm_print.h:407:22: note: in definition of macro
  'DRM_DEBUG_VBL'
    drm_dbg(DRM_UT_VBL, fmt, ##__VA_ARGS__)
                        ^~~
  drivers/gpu/drm/drm_vblank.c:274:22: note: format string is defined here
           " current=%llu, diff=%u, hw=%u hw_last=%u\n",
                     ~~~^
                     %lu

So, fix that with a typecast.

Co-developed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20200521204647.2578479-1-lyude@redhat.com
4 years agodrm/amdgpu: Sync with VM root BO when switching VM to CPU update mode
Felix Kuehling [Wed, 20 May 2020 01:02:45 +0000 (21:02 -0400)]
drm/amdgpu: Sync with VM root BO when switching VM to CPU update mode

This fixes an intermittent bug where a root PD clear operation still in
progress could overwrite a PDE update done by the CPU, resulting in a
VM fault.

Fixes: 108b4d928c03 ("drm/amd/amdgpu: Update VM function pointer")
Reported-by: Jay Cornwall <Jay.Cornwall@amd.com>
Tested-by: Jay Cornwall <Jay.Cornwall@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>