review.tizen.org Git - platform/upstream/mesa.git/log

ci/nouveau: Disable the gm20b jobs entirely.

The old (broken, hw failure) board isn't really hooked up right now, and
I'm waiting on buying some remaining bits to set up the 10 boards sitting
in the box here.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21205>

ci/freedreno: Update a3xx piglit_shader xfails.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21205>

ci/freedreno: Add an xfail for a618 VK full run.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21205>

ci/freedreno: Update a530 manual-run xfails.

A lot of this looks like fractional run test list updates.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21205>

ci/freedreno: Disable the a306_piglit_gl job.

It's broken with recurring hangchecks. Someone would need to restabilize
it, but turn it off for anyone to find until someone (me? :( ) cares.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21205>

ci/zink: Update TGL full-run xfails.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21205>

ci: Disable systems in my farm that haven't recovered.

We lost power in a storm, and these ones didn't come back afterwards. I
suspect I need a new PSU. And maybe some surge protection for the future.
:(

I've left the CI code in place for some day when I hopefully swap out the
power supplies.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21205>

mesa/st: Measure compressed fallback unmap paths

Add code to help find performance issues. The logging is disabled by
default.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19827>

mesa/st: Enable compute-based transcoding to DXT5

By enabling this path, we get a 56% decrease in upload time on a texture
upload microbenchmark. This was measured on an Ice Lake with an iris
driver that tries to use the compressed format fallback path.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19827>

mesa/st: Add st_texture_image_resource_level

Returns the level of the gl_texture_image with respect to the resource
it's allocated within. Example: returns 0 for non-finalized texture.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19827>

mesa/st: Add st_compute_transcode_astc_to_dxt5

Add a function to upload ASTC data, transcoding it to BC3/DXT5 in the
process.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19827>

mesa/st: Add and use create_bc1_endpoint_ssbo

Create and cache the SSBO used by the BC1 compute shader program.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19827>

mesa/st: Add get_compute_program

Add a function to create and cache the compute programs that will be
used to transcode ASTC to DXT5.

Note that the error paths in st_create_context_priv may actually lead to
segfaults if hit. I've been able to work around them by 1) moving them
further down and 2) returning early from st_glFlush if st->pipe is NULL.
I don't know if that's the right solution however.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19827>

mesa: Create _mesa_CreateShaderProgramv_impl

Factor out the implementation of _mesa_CreateShaderProgramv so that we
can make programs that will encode DXT5.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19827>

glsl: Modify the #includes in the DXT5 shaders

1. Drop the commented out includes. Shader caching is disabled if those
   are found.

2. Replace the active includes with "%s". Later on, we'll construct the
   final strings with vasprintf. One downside to doing this is that the
   glsl file extensions are no longer true. These files are now
   templates.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19827>

glsl: Add compute shaders to encode DXT5/BC3

These compute shaders are from the MIT-licensed GPU compressor, Betsy.
I have included copyright headers, inlined the __sharedOnlyBarrier macro
definition from the "UavCrossPlatform_piece_all.glsl" header when
applicable, and made the following changes to support GLES:

   * Conditionally disable the const keyword in the BC3 shaders
   * Make the params uniform in the BC4 shader uint2
   * Avoid implicit data type conversions in the BC3 shaders
   * Use constructors for array initialization in the BC1 shader
   * Add precision qualifiers to the BC3 shaders
   * Output to an rgba16ui image for the BC1 and BC4 shaders
   * Set the version of the BC3 shaders to 310 es

Ref: https://github.com/darksylinc/betsy/tree/cc723dcae9
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19827>

docs: Document the implicit barriers around blits

We're going to use resource_copy_region to copy from a resource that has
been written to with imageStore. Make it clear that this is safe.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19827>

crocus: disable Y tiling for render targets properly.

The old code would disallow linear targets as well which would confuse
things with reimporting dma-bufs.

Fixes: 32728dc66e36 ("crocus: introduce main resource configuration helper.")
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21209>

iris: disable preemption for 3DPRIMITIVE during streamout

This is required by Wa_16013994831.

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19947>

intel/fs: fix mesh indirect movs

The size in src[2] is in byte and needs to cover any possible data
accessed in src[0] by the indirection. That way the register
allocation is aware of what cannot be spilled for the instruction to
execute on valid data.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 70ace2bbcd ("intel/compiler: Implement Task Output and Mesh Input")
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21188>

zink: set PIPE_CAP_SURFACE_REINTERPRET_BLOCKS

this fixes perf for CompressedTexSubImage and makes DOOM2016 run at full speed

ref #8223

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21218>

zink: use GPL to handle (simple) separate shader objects

apps/games using separate shader objects end up passing the separable
shaders to the link_shader hook individually, which is still not ideal for
zink's usage since the more optimal path is to have all the shaders and create
a RAST+FS GPL stage that can run all the inter-stage io handlers

it IS technically possible to handle this for simple VS+FS pipelines using
GPL, however, but it's kinda gross. such shaders now use descriptor buffer
to create their own pipelines/layouts/descriptors async, and then a "separable"
variant of the gfx program can be created by fast-linking these together

the "separable" gfx program can't handle shader variants, but it can do basic
pipeline caching for PSO state changes, which makes it flexible enough to sorta
kinda maybe handle the most basic cases of separate shader objects

descriptor buffer is used because having to create and manage a separate architecture
for sets/pools/templates is too nightmarish even for me

this is, at best, a partial solution, but it's the best the vulkan api can
currently do

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21197>

zink: enable combining intermediate gpl libs from combine function

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21197>

zink: move gpl input/output funcs to zink_pipeline.c

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21197>

zink: allow multiple gpl libraries in zink_create_gfx_pipeline_combined()

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21197>

zink: add gpl flags for libraries based on shaders passed

no change to current operations

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21197>

zink: split out gfx pipeline library creation

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21197>

zink: add flags param to zink_pipeline_layout_create()

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21197>

zink: split out VkShaderModule creation

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21197>

zink: avoid the descriptor set multiplier for bindless buffers

the bindless descriptor buffer is already correctly sized, so it needs
to avoid the huge set multiplier or it'll explode all available vram

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21216>

zink: flag bindless_init before calling zink_batch_bind_db() in init

this otherwise fails to bind the bindless buffer

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21216>

docs: add missing RADV_PERFTEST=video_decode

Fixes: 9477f117f4d ("radv/video: add initial frameworking.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21158>

radv: Assert the hardware support rbplus when emitting rbplus state.

If someone forget to check for rbplus before setting dirty bits, it's going
to cause really mysterious bugs.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21189>

radv: Fix missing rbplus_allowed check for dynamic PS epilogs.

This created really mysterious bugs on gfx10.

Fixes flickering in a bunch of DXVK games, most visibly Overwatch 2.

Fixes: eb07a11b8f4 ("radv: add support for compiling PS epilogs on-demand")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8258
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21189>

radv: stop skipping the cache for monolithic graphics pipelines with GPL

Only libraries and optimized (LTO) pipelines are still unsupported,
but there is no reason to skip the cache for monolithic pipelines.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21198>

radv: stop skipping the cache for compute/raytracing pipelines with GPL

This was a hard solution somewhat.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21198>

radv: simplify creating a FS epilog from a library

It's now compiled in radv_graphics_pipeline_compile().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21140>

radv: make sure to disable MRT compaction when compiling a PS epilog with GPL

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21140>

radv: fix disabling MRT compaction for on-demand PS epilogs

Some dynamic states require to compile PS epilogs on-demand. In this
case, MRT compaction should be disabled because we don't know the CB
state when compiling the fragment shader.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21140>

radv: regroup PS epilog info when generating the graphics pipeline key

No logical change.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21140>

radv: simplify determining when the fragment shader needs an epilog

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21140>

radv: cleanup graphics pipeline library flags uses

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21140>

radv: fix skipping graphics pipeline compilation when the FS is NULL

Fixes: 3eb97b9d334 ("radv: skip compilation when possible with GPL fast-linking")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21192>

intel/blorp: disable REP16 for gfx12+ with R10G10B10_FLOAT_A2

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21137>

util: Fixes error: no previous prototype for 'mesa_cache_db_entry_remove'
Fixes: c92c99481fd ("util/mesa-db: Support removal of cache entries")

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21191>

zink: Add tracing of blit operations.

I found this useful in lining up some perfetto traces between zink+anv and
iris, and understanding what was going on in them. Also it's a demo of
being able to insert annotations for work in the command stream, which I
suspect we'll want more of.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20657>

u_trace: Add an interface for checking trace enablement outside a context.

For zink, we want to know if we should pass command stream markers down to
the underlying driver, but we don't have our own trace context we're
recording trace events with. We definitely want those markers if the
underlying driver is going to be doing perfetto tracing, or is requesting
marker tracing. So, create an interface for querying those flags before
they get copied down to an actual u_trace_context.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20657>

hasvk: Remove remaining bits of anv_i915_query()

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20948>

anv: Remove remaining bits of anv_i915_query()

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20948>

anv: Start to move anv_gem_stubs.c to kmd backend

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20948>

anv: Add basic KMD backend infrastructure

Functions that are in hot paths will have a different treatment to
support i915 and Xe KMD.

Each KMD will have an anv_kmd_backend that will have the hot path
functions set, this way we can avoid branch prediction misses.

Other functions will gradually be moved to anv_kmd_backend.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20948>

anv: Use DRM_IOCTL_I915_GEM_CREATE_EXT in all supported kernels

As we continue to refactor the code base to support Xe KMD here I'm
dropping anv_gem_create() and unifying all graphics memory allocation
calls to anv_gem_create_regions().

anv_gem_create_regions() will call DRM_IOCTL_I915_GEM_CREATE_EXT
for integrated platforms too only leaving DRM_IOCTL_I915_GEM_CREATE
calls to kernel versions that do not support
DRM_IOCTL_I915_GEM_CREATE_EXT.
This can be detected by devinfo->mem.use_class_instance as
DRM_I915_QUERY_MEMORY_REGIONS uAPI landed in the same kernel version
as DRM_IOCTL_I915_GEM_CREATE_EXT.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20948>

anv: Convert drm_i915_gem_memory_class_instance to intel_memory_class_instance

Also using pointers to intel_device_info struct instead of replicate
the same information.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20948>

intel: Add intel_memory_class_instance

This is a KMD independent struct to hold memory class and instance
values.

drm_i915_gem_memory_class_instance usage will be gradually replaced.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20948>

ci/freedreno: Don't forget to report flakes on a618, too.

I just noticed that our flake reports are only coming from cheza, which is
a bummer because almost all the VK coverage is on a618 unless you're
kicking off a full run.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21092>

freedreno: make sure depth/stencil layouts are always tiled

Small depth/stencil textures were using linear tiling, but depth/stencil
attachments cannot use linear tiling for sysmem rendering.

Fixes:
KHR-GL45.geometry_shader.layered_framebuffer.stencil_support
KHR-GL45.geometry_shader.layered_framebuffer.depth_support

Signed-off-by: Amber Amber <amber@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21046>

docs: update calendar for 22.3.5

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21207>

docs: add release notes for 22.3.5

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21207>

zink: relax bresenhamLines requirement for non-strictLine drivers

non-strictLine Vulkan drivers use either parallelogram or bresenham
rasterization for default line modes.
This method of rasterisation produces close enough results that it
in practice is GL/GLES spec compliant (at least cts wise).
Don't emit a feature missing warning for this case.

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20985>

aco: don't modify exec in p_interp_gfx11

The RDNA3 ISA docs say that lds_param_load write the entire quad
regardless of exec, so this isn't needed.

fossil-db (gfx1100):
Totals from 5291 (3.93% of 134574) affected shaders:
Instrs: 4891396 -> 4789628 (-2.08%)
CodeSize: 25519032 -> 25111960 (-1.60%)
Latency: 36122982 -> 36074300 (-0.13%); split: -0.14%, +0.00%
InvThroughput: 4162436 -> 4161424 (-0.02%); split: -0.02%, +0.00%
Copies: 263862 -> 263838 (-0.01%)
PreSGPRs: 225012 -> 224179 (-0.37%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21171>

aco: support omod/imod for v_fmac_f16

Only matters for post-RA DPP16.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21174>

aco: don't list imod/omod support v_fmaak_f32/v_fmamk_f32

We can never use them anyway because these opcodes don't support VOP3/DPP16/SDWA

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21174>

aco: allow output modifiers for ldexp_f16

It also supports imod for the first operand, but we cannot express that at
moment.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21174>

aco: don't allow output modifiers for v_cvt_pkrtz_f16_f32

Cc: mesa-stable
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21174>

freedreno: Indent fixes

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21195>

freedreno/a2xx: Move pack_rgba()

It is only used in fd2_draw.c

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21195>

freedreno: Quiet unused variable warnings

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21195>

ir3: Quiet unused variable warning

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21195>

d3d12: Video Encode - Fix ID3D12CommandAllocator leak

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21196>

d3d12: Video processing - Fix out of bounds array access

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21196>

freedreno/drm/virtio: Limit guest handles passed to virtgpu

We only need to have virtgpu in the loop for shared buffers when
implicit sync is in play. The rest of the time we can rely on userspace
fence waits.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21143>

freedreno/drm: Move sa_cpu_prep() to core

Now that we can do a blocking wait on an fd_fence (which the suballoc
heap already depended on) we can just move the fence wait into core
leaving the backend cpu_prep() implementation only needing to care
about implicit sync on shared buffers.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21143>

freedreno/a6xx: Move CS state to PROG state group

It is pretty easy to just cache the stateobj with the hwcso (since
unlike 3d, there is only a single shader state) and re-emit it by
pointer when it changes, now that the CS state doesn't depend on the
grid info.

This also moves immed consts into the PROG state, so they are only
updated when the PROG state is dirty. And splits user consts and
driver param consts, so they are only re-emit when needed.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21127>

pvr: Add firmware stream support for transfer submit

Move transfer jobs over to the new firmware stream interface. This had already
been done for render and compute jobs in 947e183ff55 ("pvr: Implement new
firmware stream interface").

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21163>

pvr: Update FWIF transfer queue register structures

This matches changes made in FW 1.17.OS@6293467.

Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21163>

mesa/st: Handle all 10 bpc types in st_choose_format

Only GL_UNSIGNED_INT_2_10_10_10_REV was handled, add
GL_UNSIGNED_INT_10_10_10_2 & GL_UNSIGNED_INT_10_10_10_2_OES.

This makes sure that if the Gallium driver doesn't support the exact
corresponding format, another 10 bpc format is tried before an 8 bpc one
as a fallback.

Fixes the mutter test cogl-test-offscreen-texture-formats with iris.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21021>

mesa/st: Fix GL_EXT_texture_type_2_10_10_10_REV name in comment

Suggested by Adam Jackson in
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21021#note_1747761

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21021>

anv: put the video extension behind a variable

As initialized acked.

The WSI code is currently trying to blit on the video queue.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 633efa7af7b4 ("anv: enable video decode extensions.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21194>

pvr: Clarify unreachable text

Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20430>

pvr: Add block printing support during validation

Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20430>

pvr: Validate instruction repeat and src/dst sizes

Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20430>

pvr: Adjust instruction repeat offset

Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20430>

pvr: Keep NIR SSA defs instead of registers

Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20430>

pvr: Drop the ENUM_PACKED macro

Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20430>

pvr: Commonise some instruction member defs

Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20430>

pvr: Support dual-destination ALU instructions

Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20430>

pvr: Add support for optional instruction params

Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20430>

pvr: Add new Rogue compiler framework

Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20430>

aco: add mov/cndmask opcodes to does_fp_op_flush_denorms

For completeness sake also add v_mov_b32, even if we don't use imod for it
because it's only supported since gfx10.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21170>

aco: fix imod/omod for gfx11 VOP3 opcodes

Fixes: d8d99c3c4f2 ("aco: add GFX11 opcode numbers")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21170>

util/vbuf: fix multidraw unrolling

* drawid needs to be incremented at end of loop
* rescope draw structs to initialize at top of loop

fix #8191

Fixes: 6b07893b31f ("util/vbuf: handle multidraws")

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Mark Janes <markjanes@swizzler.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21139>

radv: Fix noop FS not getting constructed for GPL pipelines.

The condition was inverted, causing compilation to be actually skipped when
a noop FS is used and straight emitting the pipeline from the default
initialized struct.

Fixes: 3eb97b9d334 ("radv: skip compilation when possible with GPL fast-linking")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21166>

radv: CSE ray_launch_{size|id}

Stats for Q2RTX
Totals from 7 (0.01% of 134913) affected shaders: (GFX10.3)

VGPRs: 736 -> 704 (-4.35%)
CodeSize: 204424 -> 204400 (-0.01%); split: -0.03%, +0.02%
MaxWaves: 67 -> 69 (+2.99%)
Instrs: 37540 -> 37549 (+0.02%); split: -0.02%, +0.04%
Latency: 973556 -> 973267 (-0.03%)
InvThroughput: 209068 -> 200902 (-3.91%)
VClause: 920 -> 921 (+0.11%); split: -0.11%, +0.22%
SClause: 1045 -> 1043 (-0.19%)
Copies: 4853 -> 4865 (+0.25%); split: -0.08%, +0.33%
Branches: 1571 -> 1578 (+0.45%)
PreSGPRs: 421 -> 407 (-3.33%)
PreVGPRs: 638 -> 632 (-0.94%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21156>

radv: Refactor radv_emit_ngg_culling_state so it's based on dirty flags.

This significantly lowers the CPU overhead of this function.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20980>

radv: Remove NGG culling skip from command buffer.

This code used to runtime-disable NGG culling for small draw calls.
However, this had too much CPU overhead, let's remove it.
It will be solved by the shaders instead.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20980>

radv: Use shader code to skip NGG culling in small workgroups.

Extend RADV lowering of the load_cull_any_enabled_amd intrinsic to
take into account the number of primitives in the current workgroup.

Workgroups that have less than 16 triangles are considered "small"
and will disable shader culling. Note that LLPC does the same,
but it checks the number of vertices not primitives.

The primary intention of this change is to eliminate the need to
check the draw size in radv_cmd_buffer, but this is actually
beneficial to larger draw calls too, specifically this may improve
the performance of the last workgroup of larger draws too.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20980>

radv: Move checking primitive topology to radv_get_ngg_culling_settings.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20980>

radv: Don't change LDS_SIZE for NGG culling shaders.

There was no measurable perf benefit from this optimization,
and it made the code messy and difficult to refactor.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20980>