Jonas Devlieghere [Wed, 22 Jan 2020 23:14:50 +0000 (15:14 -0800)]
[lldb/Test] Skip script interpreter tests reading from stdin for lldb-repro
The reproducers currently only shadow the command interpreter. It would
be possible to make it work for the Lua interpreter which uses the
IOHandlerEditline under the hood, but the Python one runs a REPL in
Python itself so there's no (straightforward) way to shadow that.
Given that we already capture any API calls, this isn't super high on my
list of priorities.
Jonas Devlieghere [Wed, 22 Jan 2020 22:51:26 +0000 (14:51 -0800)]
[lldb/Utility] Don't forward directories to the file collector
The VFS mapping writer assumes that all the paths it gets are files.
When passed a directory, it ends up as a file in the VFS mapping twice,
once as a file and once as a directory.
{
'type': 'file',
'name': "Output",
'external-contents': "/root/path/to/Output"
},
{
'type': 'directory',
'name': "Output",
'contents': [ ... ]
}
Richard Smith [Wed, 22 Jan 2020 22:48:56 +0000 (14:48 -0800)]
[www] Update cxx_status page to list changes on the Clang 10 branch as
"Clang 10" not "SVN".
Nikita Popov [Sat, 18 Jan 2020 15:54:43 +0000 (16:54 +0100)]
[InstCombine] Combine neg of shl of sub (PR44529)
Fixes https://bugs.llvm.org/show_bug.cgi?id=44529. We already have
a combine to sink a negation through a left-shift, but it currently
only works if the shift operand is negatable without creating any
instructions. This patch introduces freelyNegateValue() as a more
powerful extension of dyn_castNegVal(), which allows negating a
value as long as this doesn't end up increasing instruction count.
Specifically, this patch adds support for negating A-B to B-A.
This mechanism could in the future be extended to handle general
negation chains that a) start at a proper 0-X negation and b) only
require one operand to be freely negatable. This would end up as a
weaker form of D68408 aimed at the most obviously profitable subset
that eliminates a negation entirely.
Differential Revision: https://reviews.llvm.org/D72978
Nikita Popov [Sat, 18 Jan 2020 15:54:25 +0000 (16:54 +0100)]
[InstCombine] Add test for PR44529; NFC
Craig Topper [Wed, 22 Jan 2020 21:59:14 +0000 (15:59 -0600)]
[X86] Cast to __v4hi instead of __m64 in the implementation of _mm_extract_pi16 and _mm_insert_pi16.
__m64 is a vector of 1 long long. But the builtins these intrinsics
are calling expect a vector of 4 shorts.
Fixes PR44589
Nicolas Vasilache [Wed, 22 Jan 2020 00:48:31 +0000 (19:48 -0500)]
[mlir][Linalg] Add tensor support to Linalg EDSC Builders
Summary:
This diff extends the Linalg EDSC builders so we can easily create mixed
tensor/buffer linalg.generic ops. This is expected to be useful for
HLO -> Linalg lowering.
The StructuredIndexed struct is made to derive from ValueHandle and can
now capture a type + indexing expressions. This is used to represent return
tensors.
Pointwise unary and binary builders are extended to allow both output buffers
and return tensors. This has implications on the number of region arguments.
Reviewers: ftynse, hanchung, asaadaldien
Subscribers: mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73149
Davide Italiano [Wed, 22 Jan 2020 21:56:11 +0000 (13:56 -0800)]
[TestStdModuleSysroot] Only run locally.
Nikita Popov [Sat, 18 Jan 2020 12:08:49 +0000 (13:08 +0100)]
[PatternMatch] Make m_c_ICmp swap the predicate (PR42801)
This addresses https://bugs.llvm.org/show_bug.cgi?id=42801.
The m_c_ICmp() matcher is changed to provide the swapped predicate
if the operands are swapped.
Existing uses of m_c_ICmp() fall in one of two categories: Working
on equality predicates only, where swapping is irrelevant.
Or performing a manual swap, in which case this patch removes it.
The only exception is the foldICmpWithLowBitMaskedVal() fold, which
does not swap the predicate, and instead reasons about whether
a swap occurred or not for each predicate. Getting the swapped
predicate allows us to merge the logic for pairs of predicates,
instead of duplicating it.
Differential Revision: https://reviews.llvm.org/D72976
Sean Fertile [Tue, 21 Jan 2020 20:24:50 +0000 (15:24 -0500)]
[PowerPC] Collect some CallLowering arguments into a struct. [NFC]
Collect the calling convention and a number of boolean arguments into a
structure to slightly reduces the number of arguments passed around between
LowerCall_<Subtarget>, FinishCall and a few of the helpers. Also
calulates if a call is indirect once using the exisitng helper and caches the
result replacing several instances where we duplicated the logic determining if
a call is indirect.
Alexandre Ganea [Wed, 22 Jan 2020 21:53:38 +0000 (16:53 -0500)]
Clang] Fix expansion of response files in -Wp after integrated-cc1 change
After rGb4a99a061f517e60985667e39519f60186cbb469, passing a response file such as -Wp,@a.rsp wasn't working anymore because .rsp expansion happens inside clang's main() function.
This patch adds response file expansion in the -cc1 tool.
Differential Revision: https://reviews.llvm.org/D73120
Nikita Popov [Sat, 18 Jan 2020 11:21:14 +0000 (12:21 +0100)]
[PatternMatch] Add m_APInt/m_APFloat matchers accepting undef
The current m_APInt() and m_APFloat() matchers do not accept splats
that include undefs (unlike m_Zero() and other matchers for specific
values). We can't simply change the default behavior, as there are
existing transforms that would not be safe with undefs.
For this reason, I'm introducing new m_APIntAllowUndef() and
m_APFloatAllowUndef() matchers, that allow splats with undefs.
Additionally, m_APIntForbidUndef() and m_APFloatForbidUndef() are
added. These have the same behavior as the existing m_APInt() and
m_APFloat(), but serve as an explicit indication that undefs were
considered and found unsound for this transform. This helps
distinguish them from existing uses of m_APInt() where we do not
know whether undefs can or cannot be allowed without additional review.
Differential Revision: https://reviews.llvm.org/D72975
Bruno Cardoso Lopes [Wed, 22 Jan 2020 20:43:19 +0000 (12:43 -0800)]
[ODRHash] Factor out functionality for CXXRecord ODR diagnostics (NFCI)
There's going to be a lot of common code between RecordDecl and
CXXRecordDecl, factor out some of the logic in preparation for
adding the RecordDecl side.
Jonas Devlieghere [Wed, 22 Jan 2020 21:22:58 +0000 (13:22 -0800)]
[lldb/Reproducer] Correctly instrument enum values
Enum values can be serialized trivially and should not go through the
object registry.
Jonas Devlieghere [Wed, 22 Jan 2020 20:15:14 +0000 (12:15 -0800)]
[lldb/Test] Use lit's capabilities to skip lldb-repro tests.
This allows us to skip the reproducer tests themselves as a whole as
well as individual tests with the UNSUPPORTED keyword.
Jonas Devlieghere [Wed, 22 Jan 2020 18:46:43 +0000 (10:46 -0800)]
[lldb/Util] Fix lldb-repro now it doesn't take a path to lldb
The indices into the arguments array were off because we no longer pass
the path to lldb as the first argument.
Jim Ingham [Wed, 22 Jan 2020 21:20:15 +0000 (13:20 -0800)]
Convert AssertTrue( A == B) to AssertEqual(A, B) in TestObjCStepping.py.
Matt Arsenault [Wed, 22 Jan 2020 21:01:15 +0000 (16:01 -0500)]
R600: Fix failing testcase
Max Moroz [Wed, 22 Jan 2020 20:56:16 +0000 (12:56 -0800)]
[libFuzzer] Add INFO output when LLVMFuzzerCustomMutator is found.
Summary:
there is an ongoing work on interchangeable custom mutators
(https://github.com/google/clusterfuzz/pull/1333/files#r367706283)
and having some sort of signalling from libFuzzer that it has loaded
a custom mutator would be helpful.
The initial idea was to make the mutator to print something, but given
the anticipated variety of different mutators, it does not seem possible
to make all of them print the same message to signal their execution.
Reviewers: kcc, metzman
Reviewed By: metzman
Subscribers: #sanitizers, llvm-commits
Tags: #sanitizers, #llvm
Differential Revision: https://reviews.llvm.org/D73136
Keith Smiley [Wed, 22 Jan 2020 20:48:25 +0000 (12:48 -0800)]
[llvm-cov] Add support for -skip-functions to lcov
Summary:
This flag was added for the json format to exclude functions from the
output. This mirrors that behavior in lcov (where it was previously
accepted but ignored). This makes the output file smaller which can be
beneficial depending on how you consume it, especially if you don't use
this data anyways.
Patch by Keith Smiley (@keith).
Reviewers: kastiglione, Dor1s, vsk, allevato
Reviewed By: Dor1s, allevato
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73160
Sanjay Patel [Wed, 22 Jan 2020 19:48:28 +0000 (14:48 -0500)]
[x86] fold vperm2x128 to concat of 128-bit high half vectors
vperm (ins ?, X, C), (ins ?, Y, C), 0x31 --> concat X, Y
This is another shuffle problem seen with PR42024:
https://bugs.llvm.org/show_bug.cgi?id=42024
We have this small crack in legalization/lowering/combining/demanded
that allows forming a vperm2f128 of high halves with AVX1 when we
could do better by peeking through the insert_subvector nodes.
AFAICT, it requires IR as shown in the diffs - much larger than legal
vectors - to avoid all of the usual folds.
Another option would prevent forming the 256-bit vperm in lowering.
Differential Revision: https://reviews.llvm.org/D73197
Chris Tetreault [Wed, 22 Jan 2020 19:50:10 +0000 (11:50 -0800)]
[SVE] Pass Scalable argument to VectorType::get in Bitcode Reader
Pass the Scalability test to VectorType::get in order to be able to
deserialize bitcode that contains scalable vector operations
Differential Revision: https://reviews.llvm.org/D73144
Alexander Lanin [Wed, 22 Jan 2020 20:26:11 +0000 (15:26 -0500)]
Extend misc-misplaced-const to detect using declarations as well as typedef
Aaron Ballman [Wed, 22 Jan 2020 20:21:43 +0000 (15:21 -0500)]
Add a bit of documentation on attribute spellings that were missing.
Alina Sbirlea [Wed, 22 Jan 2020 00:56:39 +0000 (16:56 -0800)]
[LoopDeletion] Teach LoopDeletion to preserve MemorySSA if available.
If MemorySSA analysis is analysis, LoopDeletion now preserves it.
Abdurrahman Akkas [Wed, 22 Jan 2020 19:35:12 +0000 (19:35 +0000)]
[mlir] Add baseAttr to TypedArrayAttrBase.
Element type is useful in code generators but it is lost after construction.
Differential Revision: https://reviews.llvm.org/D72888
Jan Vesely [Sun, 19 Jan 2020 05:29:30 +0000 (00:29 -0500)]
AMDGPU/R600: Emit rodata in text segment
R600 relies on this behaviour.
Fixes: 6e18266aa4dd78953557b8614cb9ff260bad7c65 ('Partially revert D61491 "AMDGPU: Be explicit about whether the high-word in SI_PC_ADD_REL_OFFSET is 0"')
Fixes ~100 piglit regressions since
6e18266
Differential Revision: https://reviews.llvm.org/D72991
Aaron Ballman [Wed, 22 Jan 2020 19:20:15 +0000 (14:20 -0500)]
Add LLVM_VALUE_FUNCTION to Optional::map(); NFC
This is for future-proofing when compiling with MSVC once we drop support for 2017.
Nico Weber [Wed, 22 Jan 2020 19:04:06 +0000 (14:04 -0500)]
[gn build] reformat all build files again
Run `git ls-files '*.gn' '*.gni' | xargs llvm/utils/gn/gn.py format`
after recent fixes to formatting of comments after single-element
lists.
Saar Raz [Wed, 22 Jan 2020 18:43:38 +0000 (20:43 +0200)]
[Concepts] Fix bug when referencing function parameters in instantiated function template requires clause
Fixes bug #44613 - incorrect instantiated parameters were being added when checking instantiated function constraints
Aaron Ballman [Wed, 22 Jan 2020 18:16:19 +0000 (13:16 -0500)]
Add a comment about when we can remove this construct; NFC.
Petr Hosek [Wed, 22 Jan 2020 18:09:27 +0000 (10:09 -0800)]
[CMake][Fuchsia] Disable in-process cc1
The in-process cc1 currently breaks Goma client and therefore prevents
the use of tip-of-tree Clang with Goma, so we disable the in-process cc1
in our toolchain until this issue is resolved.
Simon Pilgrim [Wed, 22 Jan 2020 17:23:56 +0000 (17:23 +0000)]
[X86][SSE] combineExtractWithShuffle - extract(bitcast(broadcast(x))) --> x
Removes some unnecessary gpr<-->fpu traffic
David Green [Wed, 22 Jan 2020 15:59:33 +0000 (15:59 +0000)]
[ARM] Mark MVE loads/store as not having side effects
The hasSideEffect parameter is usually automatically inferred from
instruction patterns. For some of our MVE instructions, we do not have
patterns though, such as for the pre/post inc loads and stores. This
instead specifies the flag manually on the base MVE_VLDRSTR_base
tablegen class, making sure we get this correct.
This can help with scheduling multiple loads more optimally. Here I've
added a unittest as a more direct form of testing.
Differential Revision: https://reviews.llvm.org/D73117
Nico Weber [Wed, 22 Jan 2020 17:56:19 +0000 (12:56 -0500)]
Revert "[DA][TTI][AMDGPU] Add option to select GPUDA with TTI"
This reverts commit
a90a6502ab35d3c15c7d56772e409c5632ce6cfb.
Broke tests on Windows: http://lab.llvm.org:8011/builders/clang-x64-windows-msvc/builds/13808
Nico Weber [Wed, 22 Jan 2020 17:54:19 +0000 (12:54 -0500)]
Revert "[gn build] [win] produce symbolized stack frames in release builds too"
This reverts commit
fd98eccf984f203e39452da238a142f83f61d368.
Seems to have no effect, need to try it locally for a bit first.
Mehdi Amini [Wed, 22 Jan 2020 00:44:17 +0000 (00:44 +0000)]
[Flang] add some cmake code to allow for out-of-tree building of MLIR and LLVM
Differential Revision: https://reviews.llvm.org/D72418
Kostya Kortchinsky [Tue, 21 Jan 2020 22:38:30 +0000 (14:38 -0800)]
[scudo][standalone] Reduce Android region sizes to 128MB
Summary:
Unity is making irresponsible assumptions as to how clumped up memory
should be. With larger regions, we break those, resulting in errors
like:
"Using memoryadresses from more that 16GB of memory"
This is unfortunately one of those situations where we have to bend to
existing code because we doubt it's going to change any time soon.
128MB should be enough, but we could be flirting with OOMs in the
higher class sizes.
Reviewers: cferris, eugenis, hctim, morehouse, pcc
Subscribers: #sanitizers, llvm-commits
Tags: #sanitizers, #llvm
Differential Revision: https://reviews.llvm.org/D73143
Aaron Ballman [Wed, 22 Jan 2020 17:36:48 +0000 (12:36 -0500)]
Revert "Unconditionally enable lvalue function designators; NFC"
This reverts commit
968561bcdc34c7d74482fe3bb69a045abf08d2c1
Nico Weber [Wed, 22 Jan 2020 17:36:38 +0000 (12:36 -0500)]
[gn build] [win] produce symbolized stack frames in release builds too
Florian Hahn [Wed, 22 Jan 2020 17:16:40 +0000 (09:16 -0800)]
[AArch64] Don't rename registers with pseudo defs in Ld/St opt.
If the root def of for renaming is a noop-pseudo instruction like kill,
we would end up without a correct def for the renamed register, causing
miscompiles.
This patch conservatively bails out on any pseudo instruction.
This fixes https://bugs.chromium.org/p/chromium/issues/detail?id=
1037912#c70
Matt Arsenault [Sun, 12 Jan 2020 17:32:03 +0000 (12:32 -0500)]
AMDGPU/GlobalISel: Handle 16-bank LDS llvm.amdgcn.interp.p1.f16
The pattern is also mishandled by the generated matcher, so workaround
this as in the DAG path.
The existing DAG tests aren't particularly targeted to just this one
intrinsic. These also end up differing in scheduling from SGPR->VGPR
operand constraint copies.
David Tenty [Wed, 22 Jan 2020 16:09:34 +0000 (11:09 -0500)]
[NFC][XCOFF] Refactor Csect creation into TargetLoweringObjectFile
Summary:
We create a number of standard types of control sections in multiple places for
things like the function descriptors, external references and the TOC anchor
among others, so it is possible for their properties to be defined
inconsistently in different places. This refactor moves their creation and
properties into functions in the TargetLoweringObjectFile class hierarchy, where
functions for retrieving various special types of sections typically seem
to reside.
Note: There is one case in PPCISelLowering which is specific to function entry
points which we don't address since we don't have access to the TLOF there.
Reviewers: DiggerLin, jasonliu, hubert.reinterpretcast
Reviewed By: jasonliu, hubert.reinterpretcast
Subscribers: wuzish, nemanjai, hiraditya, kbarton, jsji, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72347
Stanislav Mekhanoshin [Wed, 22 Jan 2020 17:01:22 +0000 (09:01 -0800)]
Precommit NFC part of DAGCombiner change. NFC.
This is NFC part of DAGCombiner::visitEXTRACT_SUBVECTOR()
change in the D73132.
Stanislav Mekhanoshin [Wed, 22 Jan 2020 16:48:54 +0000 (08:48 -0800)]
Regenerate test/CodeGen/ARM/vext.ll. NFC.
This is to pre-commit whitespace only changes before D73132.
Matt Arsenault [Fri, 17 Jan 2020 15:49:26 +0000 (10:49 -0500)]
AMDGPU/GlobalISel: Select llvm.amdgcn.mov.dpp
This is deprecated, but easy to support.
Matt Arsenault [Fri, 17 Jan 2020 15:02:57 +0000 (10:02 -0500)]
AMDGPU/GlobalISel: Select llvm.amdgcn.mov.dpp8
Hiroshi Yamauchi [Tue, 21 Jan 2020 23:49:04 +0000 (15:49 -0800)]
[PGO][PGSO] Update BFI in CodeGenPrepare::optimizeSelectInst.
Summary:
Without the BFI update, some hot blocks are incorrectly treated as cold code.
This fixes a FDO perf regression in the TSVC benchmark from D71288.
Reviewers: davidxl
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73146
Pablo Barrio [Thu, 16 Jan 2020 11:47:37 +0000 (11:47 +0000)]
[AArch64] Add test for DWARF return address signing
Summary: Patch by LukeCheeseman and pbarrio
Reviewers: samparker, chill
Subscribers: kristof.beyls, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72835
Matt Arsenault [Wed, 22 Jan 2020 16:18:45 +0000 (11:18 -0500)]
AMDGPU: Fix element size assertion
The GlobalISel usage called this with bits, but the DAG usage was
incorrectly using bytes.
Matt Arsenault [Sat, 4 Jan 2020 16:48:00 +0000 (11:48 -0500)]
AMDGPU/GlobalISel: Keep G_BITCAST out of waterfall loop
The waterfall utility function blindly inserts a phi for every def in
the loop. We don't need this one to be preserved for every
iteration. Saves an extra phi and copy inside the loop body.
Zakk Chen [Fri, 29 Nov 2019 02:00:54 +0000 (18:00 -0800)]
[RISCV] Support ABI checking with per function target-features
1. if users don't specific -mattr, the default target-feature come
from IR attribute.
2. fixed bug and re-land this patch
Reviewers: lenary, asb
Reviewed By: lenary
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70837
Simon Pilgrim [Wed, 22 Jan 2020 15:47:59 +0000 (15:47 +0000)]
[X86][SSE] combineExtractWithShuffle - extract(bictcast(scalar_to_vector(x))) --> x
Removes some unnecessary gpr<-->fpu traffic
Matt Arsenault [Sat, 4 Jan 2020 04:13:15 +0000 (23:13 -0500)]
AMDGPU/GlobalISel: Fold add of constant into G_INSERT_VECTOR_ELT
Move the subregister base like in the extract case.
Nico Weber [Wed, 22 Jan 2020 16:00:44 +0000 (11:00 -0500)]
[gn build] (manually) port
a174f0da62f
Michał Górny [Sun, 12 Jan 2020 21:49:36 +0000 (22:49 +0100)]
[compiler-rt] [builtins] Fix clear_cache_test to work with MPROTECT
Fix clear_cache_test to work on NetBSD with PaX MPROTECT enabled, that
is when creating W+X mmaps is prohibited. Use the recommended solution:
create two mappings for the same memory area, make one of them RW, while
the other RX. Copy the function into the RW area but run it from the RX
area.
In order to implement this, I've split the pointer variables to
'write_buffer' and 'execution_buffer'. Both are separate pointers
on NetBSD, while they have the same value on other systems.
I've also split the memcpy_f() into two: new memcpy_f() that only takes
care of copying memory and discards the (known) result of memcpy(),
and realign_f() that applies ARM realignment to the given pointer.
Again, there should be no difference on non-NetBSD systems but on NetBSD
copying is done on write_buffer, while realignment on pointer
to the execution_buffer.
I have tested this change on NetBSD and Linux.
Differential Revision: https://reviews.llvm.org/D72578
Matt Arsenault [Fri, 3 Jan 2020 17:17:56 +0000 (12:17 -0500)]
AMDGPU/GlobalISel: Select G_INSERT_VECTOR_ELT
Matt Arsenault [Sat, 4 Jan 2020 01:22:01 +0000 (20:22 -0500)]
AMDGPU/GlobalISel: Fix RegBankSelect for G_INSERT_VECTOR_ELT
The result and source vector are going to be tied, so these need to be
the same bank.
The inserted value also needs to be broken down based on the result
bank, not the inserted value itself.
Marcello Maggioni [Tue, 21 Jan 2020 21:20:23 +0000 (13:20 -0800)]
[mlir] Swap use of to_vector() with lookupValues() in LLVMIRIntrinsicGen
Summary:
llvm::to_vector() accepts a Range value and not the pair of arguments
we are currently passing. Also we probably want the lowered LLVM
values in the vector, while operand_begin()/operand_end() on MLIR ops
returns MLIR types. lookupValues() seems the correct way to collect
such values.
Reviewers: rriddle, andydavis1, antiagainst, nicolasvasilache, ftynse
Subscribers: jdoerfert, mehdi_amini, jpienaar, burmako, shauheen, arpith-jacob, mgester, lucyrfox, liufengdb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73137
Matt Arsenault [Fri, 3 Jan 2020 15:07:51 +0000 (10:07 -0500)]
AMDGPU/GlobalISel: Fold constant offset vector extract indexes
Handle dynamic vector extracts that use an index that's an add of a
constant offset into moving the base subregister of the indexing
operation.
Force the add into the loop in regbankselect, which will be recognized
when selected.
Med Ismail Bennani [Wed, 22 Jan 2020 14:15:00 +0000 (15:15 +0100)]
[lldb/Target] Sort CMakeLists (NFC)
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Kazushi (Jam) Marukawa [Wed, 22 Jan 2020 15:30:35 +0000 (16:30 +0100)]
[VE] select and selectcc patterns
Summary: select and selectcc isel patterns and tests for i32/i64 and fp32/fp64.
Includes optimized selectcc patterns for fmin/fmax/maxs/mins.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D73195
Matt Arsenault [Wed, 22 Jan 2020 15:17:46 +0000 (10:17 -0500)]
AMDGPU: Fix typo
Matt Arsenault [Tue, 21 Jan 2020 00:27:21 +0000 (19:27 -0500)]
AMDGPU: Look through casted selects to constant fold bin ops
The promotion of the uniform select to i32 interfered with this fold.
Matt Arsenault [Sun, 19 Jan 2020 18:24:47 +0000 (13:24 -0500)]
AMDGPU: Do binop of select of constant fold in AMDGPUCodeGenPrepare
DAGCombiner does this, but divisions expanded here miss this
optimization. Since
67aa18f165640374cf0e0a6226dc793bbda6e74f,
divisions have been expanded here and missed out on this
optimization. Avoids test regressions in a future patch.
Matt Arsenault [Sun, 5 Jan 2020 17:22:21 +0000 (12:22 -0500)]
AMDGPU/GlobalISel: Add pre-legalize combiner pass
Just copy the AArch64 pass as-is for now, except for removing the
memcpy handling.
Aaron Ballman [Wed, 22 Jan 2020 14:53:06 +0000 (09:53 -0500)]
Unconditionally enable lvalue function designators; NFC
We previously had to guard against older MSVC and GCC versions which had rvalue
references but not support for marking functions with ref qualifiers. However,
having bumped our minimum required version to MSVC 2017 and GCC 5.1 mean we can
unconditionally enable this feature. Rather than keeping the macro around, this
replaces use of the macro with the actual ref qualifier.
Sanjay Patel [Wed, 22 Jan 2020 14:29:19 +0000 (09:29 -0500)]
[InstCombine] fneg(X + C) --> -C - X
This is 1 of the potential folds uncovered by extending D72521.
We don't seem to do this in the backend either (unless I'm not
seeing some target-specific transform).
icc and gcc (appears to be target-specific) do this transform.
Differential Revision: https://reviews.llvm.org/D73057
Kazushi (Jam) Marukawa [Wed, 22 Jan 2020 14:45:42 +0000 (15:45 +0100)]
[VE] setcc isel patterns
Summary: SETCC isel patterns and tests for i32/64 and fp32/64 comparison
Reviewers: arsenm, rengolin, craig.topper, k-ishizaka
Reviewed By: arsenm
Subscribers: merge_guards_bot, wdng, hiraditya, llvm-commits
Tags: #ve, #llvm
Differential Revision: https://reviews.llvm.org/D73171
David Green [Wed, 22 Jan 2020 13:45:16 +0000 (13:45 +0000)]
[ARM] Basic gather scatter cost model
This is a very basic MVE gather/scatter cost model, based roughly on the
code that we will currently produce. It does not handle truncating
scatters or extending gathers correctly yet, as it is difficult to tell
that they are going to be correctly extended/truncated from the limited
information in the cost function.
This can be improved as we extend support for these in the future.
Based on code originally written by David Sherwood.
Differential Revision: https://reviews.llvm.org/D73021
David Green [Wed, 22 Jan 2020 13:44:36 +0000 (13:44 +0000)]
[ARM] MVE Gather Scatter cost model tests. NFC
Sander de Smalen [Wed, 22 Jan 2020 10:42:57 +0000 (10:42 +0000)]
[AArch64][SVE] Add patterns for unpredicated load/store to frame-indices.
This patch also fixes up a number of cases in DAGCombine and
SelectionDAGBuilder where the size of a scalable vector is used in a
fixed-width context (thus triggering an assertion failure).
Reviewers: efriedma, c-rhodes, rovka, cameron.mcinally
Reviewed By: efriedma
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71215
Jay Foad [Mon, 6 Jan 2020 11:22:51 +0000 (11:22 +0000)]
[MachineScheduler] Allow clustering mem ops with complex addresses
The generic BaseMemOpClusterMutation calls into TargetInstrInfo to
analyze the address of each load/store instruction, and again to decide
whether two instructions should be clustered. Previously this had to
represent each address as a single base operand plus a constant byte
offset. This patch extends it to support any number of base operands.
The old target hook getMemOperandWithOffset is now a convenience
function for callers that are only prepared to handle a single base
operand. It calls the new more general target hook
getMemOperandsWithOffset.
The only requirements for the base operands returned by
getMemOperandsWithOffset are:
- they can be sorted by MemOpInfo::Compare, such that clusterable ops
get sorted next to each other, and
- shouldClusterMemOps knows what they mean.
One simple follow-on is to enable clustering of AMDGPU FLAT instructions
with both vaddr and saddr (base register + offset register). I've left
a FIXME in the code for this case.
Differential Revision: https://reviews.llvm.org/D71655
Matt Arsenault [Wed, 22 Jan 2020 02:35:56 +0000 (21:35 -0500)]
AMDGPU/GlobalISel: Fix RegbankSelect for llvm.amdgcn.fmul.legacy
Matt Arsenault [Sat, 18 Jan 2020 01:51:01 +0000 (20:51 -0500)]
AMDGPU/GlobalISel: Handle atomic_inc/atomic_dec
The intermediate instruction drops the extra volatile argument. We are
missing an atomic ordering on these.
Matt Arsenault [Fri, 17 Jan 2020 20:40:15 +0000 (15:40 -0500)]
AMDGPU: Fix interaction of tfe and d16
This using the wrong result register, and dropping the result entirely
for v2f16. This would fail to select on the scalar case. I believe it
was also mishandling packed/unpacked subtargets.
Jaroslav Sevcik [Wed, 22 Jan 2020 14:19:44 +0000 (15:19 +0100)]
[ASTImporter] Properly delete decls from SavedImportPaths
Summary:
We see a significant regression (~40% slower on large codebases) in expression evaluation after https://reviews.llvm.org/rL364771. A sampling profile shows the extra time is spent in SavedImportPathsTy::operator[] when called from ASTImporter::Import. I believe this is because ASTImporter::Import adds an element to the SavedImportPaths map for each decl unconditionally (see https://github.com/llvm/llvm-project/blob/
7b81c3f8793d30a4285095a9b67dcfca2117916c/clang/lib/AST/ASTImporter.cpp#L8256).
To fix this, we call SavedImportPathsTy::erase on the declaration rather than clearing its value vector. That way we do not accidentally introduce new empty elements. (With this patch the performance is restored, and we do not see SavedImportPathsTy::operator[] in the profile anymore.)
Reviewers: martong, teemperor, a.sidorin, shafik
Reviewed By: martong
Subscribers: rnkovacs, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D73166
Aaron Ballman [Wed, 22 Jan 2020 14:05:38 +0000 (09:05 -0500)]
Revert "Extend misc-misplaced-const to detect using declarations as well as typedef"
This reverts commit
ecc7dae50c41bc8a129a158ecf0ae0270126505c due to breaking bots:
http://lab.llvm.org:8011/builders/clang-x86_64-debian-fast/builds/22157
http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/43297
Matt Arsenault [Wed, 17 Jul 2019 02:37:02 +0000 (22:37 -0400)]
AMDGPU/GlobalISel: RegBankSelect interp intrinsics
Note this assumes the future use of immediates for immarg, not the
current G_CONSTANT which will be emitted.
Matt Arsenault [Sun, 12 Jan 2020 17:34:10 +0000 (12:34 -0500)]
AMDGPU: Fix missing immarg on llvm.amdgcn.interp.mov
The first operand maps to an immediate field, so this should be
immarg.
Sanjay Patel [Mon, 20 Jan 2020 18:32:55 +0000 (13:32 -0500)]
[InstCombine] add tests for fneg+fadd; NFC
Simon Pilgrim [Wed, 22 Jan 2020 13:52:26 +0000 (13:52 +0000)]
[SelectionDAG] getShiftAmountConstant - assert the type is an integer.
Simon Pilgrim [Wed, 22 Jan 2020 13:47:58 +0000 (13:47 +0000)]
Use SelectionDAG::getShiftAmountConstant(). NFCI.
Clement Courbet [Wed, 22 Jan 2020 13:40:53 +0000 (14:40 +0100)]
[llvm-mca][NFC] Regenerate tests @HEAD.
For Zen2.
Alexander Lanin [Wed, 22 Jan 2020 13:45:20 +0000 (08:45 -0500)]
Extend misc-misplaced-const to detect using declarations as well as typedef
Denis Khalikov [Wed, 22 Jan 2020 13:05:27 +0000 (08:05 -0500)]
[mlir][spirv] Add lowering for composite std.constant.
Add lowering for constant operation with ranked tensor type to
spv.constant with spv.array type.
Differential Revision: https://reviews.llvm.org/D73022
Jacques Pienaar [Tue, 21 Jan 2020 17:40:22 +0000 (09:40 -0800)]
[mlir] Enable specifying verify on OpInterface
Summary:
Add method in ODS to specify verification for operations implementing a
OpInterface. Use this with infer type op interface to verify that the
inferred type matches the return type and remove special case in
TestPatterns.
This could also have been achieved by using OpInterfaceMethod but verify
seems pretty common and it is not an arbitrary method that just happened
to be named verifyTrait, so having it be defined in special way seems
appropriate/better documenting.
Differential Revision: https://reviews.llvm.org/D73122
Simon Pilgrim [Wed, 22 Jan 2020 12:08:41 +0000 (12:08 +0000)]
[X86][SSE] combineExtractWithShuffle - pull out repeated extract index code. NFCI.
Simon Pilgrim [Wed, 22 Jan 2020 11:07:27 +0000 (11:07 +0000)]
Remove extra ';' to fix Wpedantic. NFCI.
Pavel Labath [Tue, 21 Jan 2020 16:04:39 +0000 (17:04 +0100)]
[lldb/DWARF] Remove one more auto-dwo method
Summary:
Our DWARFUnit was automatically forwarding the requests to the split
unit when looking for a DIE by offset. llvm::DWARFUnit does not do that,
and is not likely to start doing it any time soon.
This patch deletes the this logic and updates the callers to request the
correct unit instead. While doing that, I've found a bit of duplicated
code for lookup up a function and block by address, so I've extracted
that into a helper function.
Reviewers: JDevlieghere, aprantl, clayborg, jdoerfert
Subscribers: lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D73112
Thomas Preud'homme [Fri, 10 Jan 2020 16:56:07 +0000 (16:56 +0000)]
[lld/ELF] PR44498: Support input filename in double quote
Summary:
Linker scripts allow filenames to be put in double quotes to prevent
characters in filenames that are part of the linker script syntax from
having their special meaning. Case in point the * wildcard character.
Availability of double quoting filenames also allows to fix a failure in
ELF/linkerscript/filename-spec.s when the path contain a @ which the
lexer consider as a special characters and thus break up a filename
containing it. This may happens under Jenkins which createspath such as
pipeline@2.
To avoid the need for escaping GlobPattern metacharacters in filename
in double quotes, GlobPattern::create is augmented with a new parameter
to request literal matching instead of relying on the presence of a
wildcard character in the pattern.
Reviewers: jhenderson, MaskRay, evgeny777, espindola, alexshap
Reviewed By: MaskRay
Subscribers: peter.smith, grimar, ruiu, emaste, arichardson, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72517
Kerry McLaughlin [Wed, 22 Jan 2020 10:15:40 +0000 (10:15 +0000)]
[AArch64][SVE] Add intrinsic for non-faulting loads
Summary:
This patch adds the llvm.aarch64.sve.ldnf1 intrinsic, plus
DAG combine rules for non-faulting loads and sign/zero extends
Reviewers: sdesmalen, efriedma, andwar, dancgr, mgudim, rengolin
Reviewed By: sdesmalen
Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, cameron.mcinally, cfe-commits, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71698
Peter Smith [Tue, 21 Jan 2020 14:05:01 +0000 (14:05 +0000)]
[LLD][ELF][ARM] Don't apply --fix-cortex-a8 to relocatable links.
The --fix-cortex-a8 is sensitive to alignment and the precise destination
of branch instructions. These are not knowable at relocatable link time. We
follow GNU ld and the --fix-cortex-a53-843419 (D72968) by not patching the
code when there is a relocatable link.
Differential Revision: https://reviews.llvm.org/D73100
Kadir Cetinkaya [Tue, 21 Jan 2020 14:15:06 +0000 (15:15 +0100)]
[clangd] Do not duplicate TemplatedDecls in findExplicitReferences
Reviewers: hokein
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D73101
Saar Raz [Wed, 22 Jan 2020 10:16:35 +0000 (12:16 +0200)]
Revert "[Concepts] Fix bug when referencing function parameters in instantiated function template requires clause"
This temporarily reverts commit
45538b5fb280e5b2903f7924fd4fa5b07a6dd3ea which breaks a test.
Sander de Smalen [Tue, 21 Jan 2020 10:20:27 +0000 (10:20 +0000)]
Add support for (expressing) vscale.
In LLVM IR, vscale can be represented with an intrinsic. For some targets,
this is equivalent to the constexpr:
getelementptr <vscale x 1 x i8>, <vscale x 1 x i8>* null, i32 1
This can be used to propagate the value in CodeGenPrepare.
In ISel we add a node that can be legalized to one or more
instructions to materialize the runtime vector length.
This patch also adds SVE CodeGen support for VSCALE, which maps this
node to RDVL instructions (for scaled multiples of 16bytes) or CNT[HSD]
instructions (scaled multiples of 2, 4, or 8 bytes, respectively).
Reviewers: rengolin, cameron.mcinally, hfinkel, sebpop, SjoerdMeijer, efriedma, lattner
Reviewed by: efriedma
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68203
Saar Raz [Wed, 22 Jan 2020 00:03:05 +0000 (02:03 +0200)]
[Concepts] Placeholder constraints and abbreviated templates
This patch implements P1141R2 "Yet another approach for constrained declarations".
General strategy for this patch was:
- Expand AutoType to include optional type-constraint, reflecting the wording and easing the integration of constraints.
- Replace autos in parameter type specifiers with invented parameters in GetTypeSpecTypeForDeclarator, using the same logic
previously used for generic lambdas, now unified with abbreviated templates, by:
- Tracking the template parameter lists in the Declarator object
- Tracking the template parameter depth before parsing function declarators (at which point we can match template
parameters against scope specifiers to know if we have an explicit template parameter list to append invented parameters
to or not).
- When encountering an AutoType in a parameter context we check a stack of InventedTemplateParameterInfo structures that
contain the info required to create and accumulate invented template parameters (fields that were already present in
LambdaScopeInfo, which now inherits from this class and is looked up when an auto is encountered in a lambda context).
Resubmit after incorrect check in NonTypeTemplateParmDecl broke lldb.
Differential Revision: https://reviews.llvm.org/D65042
Guillaume Chatelet [Tue, 21 Jan 2020 15:13:04 +0000 (16:13 +0100)]
[Alignment][NFC] Use Align with CreateMaskedStore
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Subscribers: hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D73106
Pavel Labath [Wed, 22 Jan 2020 09:58:09 +0000 (10:58 +0100)]
[lldb] s/lldb/%lldb in two tests
%lldb is the proper substitution. Using "lldb" can cause us to execute
the system lldb instead of the one we are testing. This happens at least
in standalone builds.
Clement Courbet [Wed, 22 Jan 2020 08:33:50 +0000 (09:33 +0100)]
[llvm-exegesis] Serial snippet: Restrict the set of back-to-back instructions
Summary:
Right now when picking a back-to-back instruction at random, we might select
instructions that we do not know how to handle.
Add a ExegesisTarget hook to possibly filter instructions.
Reviewers: gchatelet
Subscribers: tschuett, mstojanovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73161