Richard Biener [Tue, 26 Oct 2021 10:31:09 +0000 (12:31 +0200)]
Unify offset and byte_offset for vect_create_addr_base_for_vector_ref
Now that both are measured in bytes we can unify the two parameters.
2021-10-26 Richard Biener <rguenther@suse.de>
* tree-vectorizer.h (vect_create_addr_base_for_vector_ref):
Remove byte_offset parameter.
(vect_create_data_ref_ptr): Likewise.
* tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref):
Likewise.
(vect_create_data_ref_ptr): Likewise.
* tree-vect-stmts.c (vectorizable_store): Adjust.
(vectorizable_load): Likewise.
Richard Biener [Mon, 25 Oct 2021 11:39:07 +0000 (13:39 +0200)]
Move negative stride bias out of dr_misalignment
This moves applying of a bias for negative stride accesses out of
dr_misalignment in favor of a more general optional offset argument.
The negative bias is now computed by get_load_store_type and applied
accordingly to determine the alignment support scheme. Likewise
the peeling/versioning code is adjusted albeit that still assumes
we'll end up with VMAT_CONTIGUOUS_DOWN or VMAT_CONTIGUOUS_REVERSE
but at least when not so (VMAT_STRIDED_SLP is one possibility) then
get_load_store_type will _not_ falsely report an aligned access but
instead an access with known misalignment.
This fixes PR96109.
2021-10-25 Richard Biener <rguenther@suse.de>
PR tree-optimization/96109
* tree-vectorizer.h (dr_misalignment): Add optional offset
parameter.
* tree-vect-data-refs.c (dr_misalignment): Likewise. Remove
offset applied for negative stride accesses.
(vect_enhance_data_refs_alignment): Compute negative stride
access offset and pass it to dr_misalignment.
* tree-vect-stmts.c (get_negative_load_store_type): Pass
negative offset to dr_misalignment.
(get_group_load_store_type): Likewise.
(get_load_store_type): Likewise.
(vectorizable_store): Remove asserts about alignment.
(vectorizable_load): Likewise.
Kewen Lin [Tue, 26 Oct 2021 09:09:38 +0000 (04:09 -0500)]
forwprop: Remove incorrect assertion [PR102897]
As PR102897 shows, there is one incorrect assertion in function
simplify_permutation, which is based on the wrong assumption that
all cases with op2_type == tgt_type are handled previously, the
proposed fix is to remove the assertion.
gcc/ChangeLog:
PR tree-optimization/102897
* tree-ssa-forwprop.c (simplify_permutation): Remove a wrong assertion.
gcc/testsuite/ChangeLog:
* gcc.dg/pr102897.c: New test.
Richard Biener [Tue, 26 Oct 2021 08:52:44 +0000 (10:52 +0200)]
Turn vect_create_addr_base_for_vector_ref offset into a byte offset
This changes the offset in elements for vect_create_addr_base_for_vector_ref
and vect_create_data_ref_ptr to an offset in bytes, easing a following
refactoring.
2021-10-26 Richard Biener <rguenther@suse.de>
* tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref):
Take offset in bytes.
(vect_create_data_ref_ptr): Likewise.
* tree-vect-loop-manip.c (get_misalign_in_elems): Multiply
offset by element size.
(vect_create_cond_for_align_checks): Likewise.
* tree-vect-stmts.c (get_negative_load_store_type): Likewise.
(vectorizable_load): Remove duplicate leftover from merge
conflict.
Tobias Burnus [Tue, 26 Oct 2021 08:53:53 +0000 (10:53 +0200)]
Fortran: Fix character(len=cst) dummies with bind(C) [PR102885]
PR fortran/102885
gcc/fortran/ChangeLog:
* trans-decl.c (gfc_conv_cfi_to_gfc): Properly handle nonconstant
character lenghts.
gcc/testsuite/ChangeLog:
* gfortran.dg/lto/bind-c-char_0.f90: New test.
Roger Sayle [Tue, 26 Oct 2021 07:33:41 +0000 (08:33 +0100)]
x86_64: Implement V1TI mode shifts/rotates by a constant
This patch provides RTL expanders to implement logical shifts and
rotates of 128-bit values (stored in vector integer registers) by
constant bit counts. Previously, GCC would transfer these values
to a pair of integer registers (TImode) via memory to perform the
operation, then transfer the result back via memory. Instead these
operations are now expanded using (between 1 and 5) SSE2 vector
instructions.
Logical shifts by multiples of 8 can be implemented using x86_64's
pslldq/psrldq instruction:
ashl_8: pslldq $1, %xmm0
ret
lshr_32:
psrldq $4, %xmm0
ret
Logical shifts by greater than 64 can use pslldq/psrldq $8, followed
by a psllq/psrlq for the remaining bits:
ashl_111:
pslldq $8, %xmm0
psllq $47, %xmm0
ret
lshr_127:
psrldq $8, %xmm0
psrlq $63, %xmm0
ret
The remaining logical shifts make use of the following idiom:
ashl_1:
movdqa %xmm0, %xmm1
psllq $1, %xmm0
pslldq $8, %xmm1
psrlq $63, %xmm1
por %xmm1, %xmm0
ret
lshr_15:
movdqa %xmm0, %xmm1
psrlq $15, %xmm0
psrldq $8, %xmm1
psllq $49, %xmm1
por %xmm1, %xmm0
ret
Rotates by multiples of 32 can use x86_64's pshufd:
rotr_32:
pshufd $57, %xmm0, %xmm0
ret
rotr_64:
pshufd $78, %xmm0, %xmm0
ret
rotr_96:
pshufd $147, %xmm0, %xmm0
ret
Rotates by multiples of 8 (other than multiples of 32) can make
use of both pslldq and psrldq, followed by por:
rotr_8:
movdqa %xmm0, %xmm1
psrldq $1, %xmm0
pslldq $15, %xmm1
por %xmm1, %xmm0
ret
rotr_112:
movdqa %xmm0, %xmm1
psrldq $14, %xmm0
pslldq $2, %xmm1
por %xmm1, %xmm0
ret
And the remaining rotates use one or two pshufd, followed by a
psrld/pslld/por sequence:
rotr_1:
movdqa %xmm0, %xmm1
pshufd $57, %xmm0, %xmm0
psrld $1, %xmm1
pslld $31, %xmm0
por %xmm1, %xmm0
ret
rotr_63:
pshufd $78, %xmm0, %xmm1
pshufd $57, %xmm0, %xmm0
pslld $1, %xmm1
psrld $31, %xmm0
por %xmm1, %xmm0
ret
rotr_111:
pshufd $147, %xmm0, %xmm1
pslld $17, %xmm0
psrld $15, %xmm1
por %xmm1, %xmm0
ret
The new test case, sse2-v1ti-shift.c, is a run-time check to confirm that
the results of V1TImode shifts/rotates by constants, exactly match the
expected results of TImode operations, for various input test vectors.
2021-10-26 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* config/i386/i386-expand.c (ix86_expand_v1ti_shift): New helper
function to expand V1TI mode logical shifts by integer constants.
(ix86_expand_v1ti_rotate): New helper function to expand V1TI
mode rotations by integer constants.
* config/i386/i386-protos.h (ix86_expand_v1ti_shift,
ix86_expand_v1ti_rotate): Prototype new functions here.
* config/i386/sse.md (ashlv1ti3, lshrv1ti3, rotlv1ti3, rotrv1ti3):
New TARGET_SSE2 expanders to implement V1TI shifts and rotations.
gcc/testsuite/ChangeLog
* gcc.target/i386/sse2-v1ti-shift.c: New test case.
Aldy Hernandez [Sat, 23 Oct 2021 06:59:24 +0000 (08:59 +0200)]
[PR testsuite/102857] Tweak ssa-dom-thread-7.c for aarch64.
First, ssa-dom-thread-7 was looking at a dump file that was not
being generated. This probably happened in the detangling of the VRP
threader from VRP, and I didn't notice because the test came back as
with UNRESOLVED instead of FAIL.
Second, aarch64 gets far more threads than other architectures (20
versus 12). The difference is sufficiently different to make the
regex awkward.
We already have special casing for aarch64 in other parts of this
test, so perhaps it's simplest to have an arch specific test
for the thread3 count.
I don't know perhaps there's a better way. I wake up with chills in
the middle of the night thinking about this test ;-).
Tested on x86-64 Linux and aarch64 Linux.
gcc/testsuite/ChangeLog:
PR testsuite/102857
* gcc.dg/tree-ssa/ssa-dom-thread-7.c: Add -fdump-tree-vrp2-stats.
Tweak for aarch64.
Aldy Hernandez [Wed, 20 Oct 2021 16:52:45 +0000 (18:52 +0200)]
Avoid threading circular paths.
The backward threader keeps a hash of visited blocks to avoid crossing
the same block twice. Interestingly, we haven't been checking it for
the final block out of the path. This may be inherited from the old
code, as it was simple enough that it didn't matter. With the
upcoming changes enabling the fully resolving threader, it gets
tripped often enough to cause wrong code to be generated.
Tested on x86-64 Linux.
gcc/ChangeLog:
* tree-ssa-threadbackward.c (back_threader::maybe_register_path):
Avoid threading circular paths.
Aldy Hernandez [Wed, 20 Oct 2021 05:29:59 +0000 (07:29 +0200)]
Attempt to resolve all incoming paths to a PHI.
The code that threads incoming paths to a PHI is duplicating what we
do generically in find_paths_to_names. This shortcoming is actually
one of the reasons we aren't threading all possible paths into a PHI.
For example, we give up after finding one threadable path, but some
PHIs have multiple threadable paths:
// x_5 = PHI <10(4), 20(5), ...>
// if (x_5 > 5)
Addressing this not only fixes the oversight, but simplifies the
PHI handling code, since we can consider the PHI fully resolved upon
return.
Interestingly, for ssa-thread-12.c the main thread everything was
hinging on was unreachable. With this patch, we call
maybe_register_path() earlier. In doing so, the solver realizes
that any path starting with 4->8 is unreachable and can be avoided.
This caused the cascade of threadable paths that depended on this
to no longer happen. Since threadable paths in thread[34] was the only
thing this test was testing, there's no longer anything to test. Neat!
Tested on x86-64 Linux.
gcc/ChangeLog:
* tree-ssa-threadbackward.c (back_threader::resolve_phi):
Attempt to resolve all incoming paths to a PHI.
(back_threader::resolve_def): Always return true for PHIs.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/pr21090.c: Adjust for threading.
* gcc.dg/tree-ssa/ssa-thread-12.c: Removed.
Aldy Hernandez [Wed, 20 Oct 2021 05:29:25 +0000 (07:29 +0200)]
Try to resolve paths in threader without looking further back.
Sometimes we can solve a candidate path without having to recurse
further back. This can mostly happen in fully resolving mode, because
we can ask the ranger what the range on entry to the path is, but
there's no reason this can't always apply. This one-liner removes
the fully-resolving restriction.
I'm tickled pink to see how many things we now get quite early
in the compilation. I actually had to disable jump threading entirely
for a few tests because the early threader was catching things
disturbingly early. Also, as Richi predicted, I saw a lot of pre-VRP
cleanups happening.
I was going to commit this as obvious, but I think the test changes
merit discussion.
We've been playing games with gcc.dg/tree-ssa/ssa-thread-11.c for quite
some time. Every time a threading pass gets smarter, we push the
check further down the pipeline. We've officially run out of dumb
threading passes to disable ;-). In the last year we've gone up from a
handful of threads, to 34 threads with the current combination of
options. I doubt this is testing anything useful anymore, so I've
removed it.
Similarly for gcc.dg/tree-ssa/ssa-dom-thread-4.c. We used to thread 3
jump threads, but they were disallowed because of loop rotation. Then
we started catching more jump threads in VRP2 threading so we tested
there. With this patch though, we triple the number of threads found
from 11 to 31. I believe this test has outlived its usefulness, and
I've removed it. Note that even though we have these outrageous
possibilities for this test, the block copier ultimately chops them
down (23 survive though).
Tested on x86-64 Linux.
gcc/ChangeLog:
* tree-ssa-threadbackward.c (back_threader::find_paths_to_names):
Always try to resolve path without looking back.
* tree-ssa-threadupdate.c (dump_jump_thread): Indidicate whether
edge is a back edge.
gcc/testsuite/ChangeLog:
* gcc.dg/graphite/scop-dsyr2k-2.c: Adjust for jump threading changes.
* gcc.dg/graphite/scop-dsyr2k.c: Same.
* gcc.dg/graphite/scop-dsyrk-2.c: Same.
* gcc.dg/graphite/scop-dsyrk.c: Same.
* gcc.dg/tree-ssa/pr20701.c: Same.
* gcc.dg/tree-ssa/pr20702.c: Same.
* gcc.dg/tree-ssa/pr21086.c: Same.
* gcc.dg/tree-ssa/pr25382.c: Same.
* gcc.dg/tree-ssa/pr58480.c: Same.
* gcc.dg/tree-ssa/ssa-vrp-thread-1.c: Same.
* gcc.dg/tree-ssa/vrp08.c: Same.
* gcc.dg/tree-ssa/vrp55.c: Same.
* gcc.dg/tree-ssa/ssa-dom-thread-7.c: Same.
* gcc.dg/tree-ssa/ssa-dom-thread-4.c: Removed.
* gcc.dg/tree-ssa/ssa-thread-11.c: Removed.
* gcc.dg/uninit-pr89230-1.c: xfail.
Kewen Lin [Tue, 26 Oct 2021 02:05:02 +0000 (21:05 -0500)]
vect: Don't update inits for simd_lane_access DRs [PR102789]
As PR102789 shows, when vectorizer does some peelings for alignment
in prologues, function vect_update_inits_of_drs would update the
inits of some drs. But as the failed case, we shouldn't update the
dr for simd_lane_access, it has the fixed-length storage mainly for
the main loop, the update can make the access out of bound and access
the unexpected element.
gcc/ChangeLog:
PR tree-optimization/102789
* tree-vect-loop-manip.c (vect_update_inits_of_drs): Do not
update inits of simd_lane_access.
GCC Administrator [Tue, 26 Oct 2021 00:16:26 +0000 (00:16 +0000)]
Daily bump.
Andrew MacLeod [Mon, 25 Oct 2021 22:04:06 +0000 (18:04 -0400)]
Move vrp_simplify_cond_using_ranges into the simplifier.
This static VRP routine does a simplification with casted conditions. Add it
to the general simplfier, and continue to invoke if from the VRP folder.
* tree-vrp.c (vrp_simplify_cond_using_ranges): Add return type and
move to vr-values.c.
(simplify_casted_conds): Move to vrp_folder class.
(execute_vrp): Call via vrp_folder now.
* vr-values.c (simplify_cond_using_ranges_1): Call simplify_casted_cond.
(simplify_using_ranges::simplify_casted_cond): Relocate from tree-vrp.c.
* vr-values.h (simplify_casted_cond): Add prototype.
Andrew MacLeod [Wed, 20 Oct 2021 17:37:29 +0000 (13:37 -0400)]
Fold all statements in Ranger VRP.
Until now, ranger VRP has only simplified statements with ranges. This patch
enables us to fold all statements.
gcc/
* tree-vrp.c (rvrp_folder::fold_stmt): If simplification fails, try
to fold anyway.
gcc/testsuite/
* gcc.dg/tree-ssa/vrp98.c: Disable evrp for vrp1 test.
* gcc.dg/tree-ssa/vrp98-1.c: New. Test for folding in evrp.
Segher Boessenkool [Mon, 25 Oct 2021 23:29:26 +0000 (23:29 +0000)]
rs6000: Fix bootstrap (libffi)
This fixes bootstrap for the current problems building libffi.
2021-10-25 Segher Boessenkool <segher@kernel.crashing.org>
libffi/
* src/powerpc/linux64.S: Enable AltiVec insns.
* src/powerpc/linux64_closure.S: Ditto.
Paul A. Clarke [Mon, 25 Oct 2021 20:17:28 +0000 (15:17 -0500)]
rs6000: Fix missing "externs" in smmintrin.h
Inline functions defined in smmintrin.h need "extern" as part of their
declaration, otherwise instances of those functions are created in the
objects which include them.
Fixes commits:
-
acd4b9103c1a30c833de4eee31fb69c3ff13cd77
-
9d352c68e8c8b642a36a6bcfc7f6b5dba11ac748
-
bd9a8737d478f7f1d01a9d5f1cc4309ffbb53103
-
5f500715438761f59de5fb992267748c5d4dc4b6
-
eaa93a0f3d9f67c8cbc1dc849ea6feba432ff412
-
29fb1e831bf1c25e4574bf2f98a9f534e5c67665
2021-10-25 Paul A. Clarke <pc@us.ibm.com>
gcc
* config/rs6000/smmintrin.h (_mm_testz_si128): Add "extern" to
function signature.
(_mm_testc_si128): Likewise.
(_mm_testnzc_si128): Likewise.
(_mm_blend_ps): Likewise.
(_mm_blendv_ps): Likewise.
(_mm_blend_pd): Likewise.
(_mm_blendv_pd): Likewise.
(_mm_ceil_pd): Likewise.
(_mm_ceil_sd): Likewise.
(_mm_ceil_ps): Likewise.
(_mm_ceil_ss): Likewise.
(_mm_floor_pd): Likewise.
(_mm_floor_sd): Likewise.
(_mm_floor_ps): Likewise.
(_mm_floor_ss): Likewise.
(_mm_minpos_epu16): Likewise.
(_mm_mul_epi32): Likewise.
(_mm_cvtepi8_epi16): Likewise.
(_mm_packus_epi32): Likewise.
(_mm_cmpgt_epi64): Likewise.
Tobias Burnus [Mon, 25 Oct 2021 18:40:13 +0000 (20:40 +0200)]
libgomp.oacc-c-c++-common/loop-gwv-2.c: Use __builtin_alloca
Some systems do not have <alloca.h> but provide alloca differently, e.g.
via stdlib.h. Do it like other testcases do and use __builtin_alloca.
libgomp/ChangeLog:
PR testsuite/102910
* testsuite/libgomp.oacc-c-c++-common/loop-gwv-2.c: Use __builtin_alloca
instead of #include <alloca.h> + alloca.
Roger Sayle [Mon, 25 Oct 2021 15:16:11 +0000 (16:16 +0100)]
Constant fold/simplify SS_ASHIFT and US_ASHIFT in simplify-rtx.c
This patch adds compile-time evaluation of signed saturating left shift
(SS_ASHIFT) and unsigned saturating left shift (US_ASHIFT) to simplify-rtx's
simplify_const_binary_operation. US_ASHIFT saturates to the maximum
unsigned value on overflow (which occurs when the shift is greater than
the leading zero count), while SS_ASHIFT saturates on overflow to the
maximum signed value for positive arguments, and the minimum signed value
for negative arguments (which occurs when the shift count is greater than
the number of leading redundant sign bits, clrsb). This suggests
some additional simplifications that this patch implements in
simplify_binary_operation_1; us_ashift:HI of 0xffff remains 0xffff
(much like any ashift of 0x0000 remains 0x0000), and ss_ashift:HI of
0x7fff remains 0x7ffff, and of 0x8000 remains 0x8000.
Conveniently the bfin backend provides instructions/built-ins that allow
this functionality to be tested. The two functions below
short stest_sat_max() { return __builtin_bfin_shl_fr1x16(10000,8); }
short stest_sat_min() { return __builtin_bfin_shl_fr1x16(-10000,8); }
previously on bfin-elf with -O2 generated:
_stest_sat_max:
nop;
nop;
R0 = 10000 (X);
R0 = R0 << 8 (V,S);
rts;
_stest_sat_min:
nop;
nop;
R0 = -10000 (X);
R0 = R0 << 8 (V,S);
rts;
With this patch, bfin-elf now generates:
_stest_sat_max:
nop;
nop;
nop;
R0 = 32767 (X);
rts;
_stest_sat_min:
nop;
nop;
nop;
R0 = -32768 (X);
rts;
2021-10-25 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* simplify-rtx.c (simplify_binary_operation_1) [SS_ASHIFT]: Simplify
shifts of the mode's smin_value and smax_value when the bit count
operand doesn't have side-effects.
[US_ASHIFT]: Likewise, simplify shifts of the mode's umax_value
when the bit count operand doesn't have side-effects.
(simplify_const_binary_operation) [SS_ASHIFT, US_ASHIFT]: Perform
compile-time evaluation of saturating left shifts with constant
arguments.
gcc/testsuite/ChangeLog
* gcc.target/bfin/ssashift-1.c: New test case.
Arnaud Charlet [Sat, 16 Oct 2021 16:58:20 +0000 (12:58 -0400)]
[Ada] Remove gnatfind and gnatxref
gcc/ada/
* gcc-interface/Make-lang.in, gcc-interface/Makefile.in: Remove
gnatfind and gnatxref.
Ed Schonberg [Tue, 14 Sep 2021 00:14:56 +0000 (20:14 -0400)]
[Ada] Spurious error on user-defined literal and operator
gcc/ada/
* sem_ch4.adb (Has_Possible_Literal_Aspects): If analysis of an
operator node fails to find a possible interpretation, and one
of its operands is a literal or a named number, assign to the
node the corresponding class type (Any_Integer, Any_String,
etc).
(Operator_Check): Call it before emitting a type error.
* sem_res.adb (Has_Applicable_User_Defined_Literal): Given a
literal and a type, determine whether the type has a
user_defined aspect that can apply to the literal, and rewrite
the node as call to the corresponding function. Most of the code
was previously in procedure Resolve.
(Try_User_Defined_Literal): Check operands of a predefined
operator that fails to resolve, and apply
Has_Applicable_User_Defined_Literal to literal operands if any,
to find if a conversion will allow the operator to resolve
properly.
(Resolve): Call the above when a literal or an operator with a
literal operand fails to resolve.
Bob Duff [Fri, 22 Oct 2021 16:00:38 +0000 (12:00 -0400)]
[Ada] Follow-on cleanups for Uint fields
gcc/ada/
* freeze.adb (Freeze_Fixed_Point_Type): Remove
previously-inserted test for Uint_0; no longer needed.
* gen_il-gen.ads: Improve comments.
* repinfo.adb (Rep_Value): Use Ubool type for B.
* repinfo.ads (Node_Ref): Use Unegative type.
(Node_Ref_Or_Val): Document that values of this type can be
No_Uint.
* exp_disp.adb (Make_Disp_Requeue_Body): Minor comment fix.
* sem_ch3.adb: Likewise.
* sem_ch8.adb: Likewise.
* sinfo-utils.adb (End_Location): End_Span can never be No_Uint,
so remove the "if No (L)" test.
* uintp.adb (Image_String): Use "for ... of" loop.
* uintp.ads (Unegative): New type for negative integers. We
give it a long name (unlike Unat and Upos) because it is rarely
used.
Etienne Servais [Tue, 19 Oct 2021 16:00:56 +0000 (18:00 +0200)]
[Ada] Change format of the ?? warning insertion sequence
gcc/ada/
* errout.adb (Skip_Msg_Insertion_Warning): Adapt and format as
Erroutc.Prescan_Message.Parse_Message_Class.
(Warn_Insertion): Adapt to new format.
* errout.ads: Update documentation.
* erroutc.adb (Get_Warning_Tag): Adapt to new format.
(Prescan_Message): Introduce Parse_Message_Class function.
(Validate_Specific_Warnings): Update ?W? to ?.w?.
* erroutc.ads: Update type and documentation.
* checks.adb (Validity_Check_Range): Update ?X? to ?.x?.
* exp_ch11.adb (Possible_Local_Raise): Update ?X? to ?.x?.
(Warn_If_No_Local_Raise): Likewise.
(Warn_If_No_Propagation): Likewise.
(Warn_No_Exception_Propagation_Active): Likewise.
* exp_ch4.adb (Expand_N_Allocator): Attach warning message to
-gnatw_a.
* exp_prag.adb (Expand_Pragma_Check): Update ?A? to ?.a?.
* exp_util.adb (Activate_Atomic_Synchronization): Update ?N? to
?.n?.
(Add_Invariant_Check): Update ?L? to ?.l?.
* freeze.adb (Check_Suspicious_Modulus): Update ?M? to ?.m?.
(Freeze_Entity): Update ?T? to ?.t?, ?Z? to ?.z?.
* par-util.adb (Warn_If_Standard_Redefinition): Update ?K? to
?.k?.
* sem_attr.adb (Min_Max): Update ?U? to ?.u?.
* sem_ch13.adb (Adjust_Record_For_Reverse_Bit_Order): Update ?V?
to ?.v?.
(Adjust_Record_For_Reverse_Bit_Order_Ada_95): Update ?V? to ?.v?.
(Component_Size_Case): Update ?S? to ?.s?.
(Analyze_Record_Representation_Clause): Update ?S? to ?.s? and
?C? to ?.c?.
(Add_Call): Update ?L? to ?.l?.
(Component_Order_Check): Attach warning message to -gnatw_r.
(Check_Component_List): Update ?H? to ?.h?.
(Set_Biased): Update ?B? to ?.b?.
* sem_ch3.adb (Modular_Type_Declaration): Update ?M? to ?.m?.
* sem_ch4.adb (Analyze_Mod): Update ?M? to ?.m?.
(Analyze_Quantified_Expression): Update ?T? to ?.t?.
* sem_ch6.adb (Check_Conformance): Attach warning message to
-gnatw_p.
(List_Inherited_Pre_Post_Aspects): Update ?L? to ?.l?.
* sem_ch7.adb (Unit_Requires_Body_Info): Update ?Y? to ?.y?.
* sem_ch8.adb (Analyze_Object_Renaming): Update ?R? to ?.r?.
* sem_prag.adb (Validate_Compile_Time_Warning_Or_Error): Attach
warning message to -gnatw_c.
* sem_res.adb (Check_Argument_Order): Update ?P? to ?.p?.
(Resolve_Comparison_Op): Update ?U? to ?.u?.
(Resolve_Range): Update ?U? to ?.u?.
(Resolve_Short_Circuit): Update ?A? to ?.a?.
(Resolve_Unary_Op): Update ?M? to ?.m?.
* sem_util.adb (Check_Result_And_Post_State): Update ?T? to ?.t?.
* sem_warn.adb (Output_Unused_Warnings_Off_Warnings): Update ?W?
to ?.w?.
* warnsw.ads: Update documentation for -gnatw_c.
Bob Duff [Thu, 21 Oct 2021 13:54:13 +0000 (09:54 -0400)]
[Ada] Fix a comment
gcc/ada/
* inline.adb (Establish_Actual_Mapping_For_Inlined_Call): Fix
comment.
Bob Duff [Wed, 20 Oct 2021 20:55:38 +0000 (16:55 -0400)]
[Ada] Fix bugs in Base_Type_Only (etc.) fields
gcc/ada/
* gen_il-gen.adb (Put_Seinfo): Generate type
Seinfo.Type_Only_Enum based on type
Gen_IL.Internals.Type_Only_Enum. Automatically generating a copy
of the type will help keep them in sync. (Note that there are
no Ada compiler packages imported into Gen_IL.) Add a Type_Only
field to Field_Descriptor, so this information is available in
the Ada compiler (as opposed to just in the Gen_IL "compiler").
(One_Comp): Add initialization of the Type_Only field of
Field_Descriptor.
* gen_il-internals.ads (Image): Image function for
Type_Only_Enum.
* atree.ads (Node_To_Fetch_From): New function to compute which
node to fetch from, based on the Type_Only aspect.
* atree.adb (Get_Field_Value): Call Node_To_Fetch_From.
* treepr.adb (Print_Entity_Field): Call Node_To_Fetch_From.
(Print_Node_Field): Assert.
* sinfo-utils.adb (Walk_Sinfo_Fields,
Walk_Sinfo_Fields_Pairwise): Asserts.
Piotr Trojanek [Mon, 11 Oct 2021 12:09:42 +0000 (14:09 +0200)]
[Ada] Simplify iteration of record components when expanding equality
gcc/ada/
* exp_ch4.adb (Expand_Composite_Equality): Fix style.
(Element_To_Compare): Simplify loop.
(Expand_Record_Equality): Adapt calls to Element_To_Compare.
Steve Baird [Fri, 15 Oct 2021 22:23:34 +0000 (15:23 -0700)]
[Ada] Relax INOX restrictions when casing on composite value.
gcc/ada/
* sem_case.adb (Composite_Case_Ops.Box_Value_Required): A new
function which takes a component type and returns a Boolean.
Returns True for the cases which were formerly forbidden as
components (these checks were formerly performed in the
now-deleted procedure
Check_Composite_Case_Selector.Check_Component_Subtype).
(Composite_Case_Ops.Normalized_Case_Expr_Type): Hoist this
function out of the Array_Case_Ops package because it has been
generalized to also do the analogous thing in the case of a
discriminated type.
(Composite_Case_Ops.Scalar_Part_Count): Return 0 if
Box_Value_Required returns True for the given type/subtype.
(Composite_Case_Ops.Choice_Analysis.Choice_Analysis.Component_Bounds_Info.
Traverse_Discrete_Parts): Return without doing anything if
Box_Value_Required returns True for the given type/subtype.
(Composite_Case_Ops.Choice_Analysis.Parse_Choice.Traverse_Choice):
If Box_Value_Required yields True for a given component type,
then check that the value of that component in a choice
expression is indeed a box (in which case the component is
ignored).
* doc/gnat_rm/implementation_defined_pragmas.rst: Update
documentation.
* gnat_rm.texi: Regenerate.
Piotr Trojanek [Tue, 19 Oct 2021 15:31:26 +0000 (17:31 +0200)]
[Ada] Update the inactive GMP variant of Big_Integers
gcc/ada/
* libgnat/a-nbnbin__gmp.adb (From_String): Fix predicate
mismatch between subprogram declaration and body.
Bob Duff [Mon, 6 Sep 2021 17:01:04 +0000 (13:01 -0400)]
[Ada] Make Declaration_Node return nondeclarations in fewer cases
gcc/ada/
* einfo-utils.adb (Declaration_Node): Avoid returning the
following node kinds: N_Assignment_Statement, N_Integer_Literal,
N_Procedure_Call_Statement, N_Subtype_Indication, and
N_Type_Conversion. Assert that the result is in N_Is_Decl or
empty.
* gen_il-gen-gen_nodes.adb (N_Is_Decl): Modify to match the
things that Declaration_Node can return.
Piotr Trojanek [Tue, 27 Jul 2021 14:06:30 +0000 (16:06 +0200)]
[Ada] Global contracts on expression functions in Ada.Strings.Superbounded
gcc/ada/
* libgnat/a-strsup.ads (Super_Length, Super_Element,
Super_Slice): Add Global contracts.
Piotr Trojanek [Fri, 8 Oct 2021 12:45:51 +0000 (14:45 +0200)]
[Ada] Simplify detection of a parent interface equality
gcc/ada/
* exp_ch3.adb (Predefined_Primitive_Bodies): Simplify detection
of existing equality operator.
Piotr Trojanek [Fri, 8 Oct 2021 12:37:52 +0000 (14:37 +0200)]
[Ada] Remove redundant guard in expansion of dispatching calls
gcc/ada/
* exp_ch3.adb (Predefined_Primitive_Bodies): Remove redundant
conditions related to interface types.
Piotr Trojanek [Thu, 15 Apr 2021 21:22:32 +0000 (23:22 +0200)]
[Ada] Do not expect execv to return 0
gcc/ada/
* adaint.c (__gnat_portable_spawn): Do not expect execv to
return 0.
(__gnat_portable_no_block_spawn): Likewise.
Ghjuvan Lacambre [Wed, 20 Oct 2021 09:56:09 +0000 (11:56 +0200)]
[Ada] Initialize variable to Empty
gcc/ada/
* sem_ch8.adb (Analyze_Subprogram_Renaming): Set New_S to Empty.
Piotr Trojanek [Tue, 15 Jun 2021 21:32:51 +0000 (23:32 +0200)]
[Ada] Reference in Unbounded_String is almost never null
gcc/ada/
* libgnat/a-strunb.ads (Unbounded_String): Reference is never
null.
* libgnat/a-strunb.adb (Finalize): Copy reference while it needs
to be deallocated.
Piotr Trojanek [Wed, 20 Oct 2021 07:46:38 +0000 (09:46 +0200)]
[Ada] Don't expect enumeration literals to be renamings
gcc/ada/
* lib-xref.adb (Get_Through_Renamings): Exit loop when an
enumeration literal is found.
Arnaud Charlet [Tue, 19 Oct 2021 16:44:17 +0000 (12:44 -0400)]
[Ada] Shutdown codepeer message
gcc/ada/
* libgnat/s-widthu.adb: Add pragma Annotate.
Javier Miranda [Sat, 4 Sep 2021 17:11:34 +0000 (13:11 -0400)]
[Ada] Ada 2022: Class-wide types and formal abstract subprograms
gcc/ada/
* sem_ch8.adb (Build_Class_Wide_Wrapper): Previous version split
in two subprograms to factorize its functionality:
Find_Suitable_Candidate, and Build_Class_Wide_Wrapper. These
routines are also placed in the new subprogram
Handle_Instance_With_Class_Wide_Type.
(Handle_Instance_With_Class_Wide_Type): New subprogram that
encapsulates all the code that handles instantiations with
class-wide types.
(Analyze_Subprogram_Renaming): Adjust code to invoke the new
nested subprogram Handle_Instance_With_Class_Wide_Type; adjust
documentation.
Bob Duff [Fri, 10 Sep 2021 15:18:47 +0000 (11:18 -0400)]
[Ada] Renamed_Or_Alias cleanup
gcc/ada/
* einfo-utils.ads, einfo-utils.adb (Alias, Set_Alias,
Renamed_Entity, Set_Renamed_Entity, Renamed_Object,
Set_Renamed_Object): Add assertions that reflect how these are
supposed to be used and what they are supposed to return.
(Renamed_Entity_Or_Object): New getter.
(Set_Renamed_Object_Of_Possibly_Void): Setter that allows N to
be E_Void.
* checks.adb (Ensure_Valid): Use Renamed_Entity_Or_Object
because this is called for both cases.
* exp_dbug.adb (Debug_Renaming_Declaration): Use
Renamed_Entity_Or_Object because this is called for both cases.
Add assertions.
* exp_util.adb (Possible_Bit_Aligned_Component): Likewise.
* freeze.adb (Freeze_All_Ent): Likewise.
* sem_ch5.adb (Within_Function): Likewise.
* exp_attr.adb (Calculate_Header_Size): Call Renamed_Entity
instead of Renamed_Object.
* exp_ch11.adb (Expand_N_Raise_Statement): Likewise.
* repinfo.adb (Find_Declaration): Likewise.
* sem_ch10.adb (Same_Unit, Process_Spec_Clauses,
Analyze_With_Clause, Install_Parents): Likewise.
* sem_ch12.adb (Build_Local_Package, Needs_Body_Instantiated,
Build_Subprogram_Renaming, Check_Formal_Package_Instance,
Check_Generic_Actuals, In_Enclosing_Instance,
Denotes_Formal_Package, Process_Nested_Formal,
Check_Initialized_Types, Map_Formal_Package_Entities,
Restore_Nested_Formal): Likewise.
* sem_ch6.adb (Report_Conflict): Likewise.
* sem_ch8.adb (Analyze_Exception_Renaming,
Analyze_Generic_Renaming, Analyze_Package_Renaming,
Is_Primitive_Operator_In_Use, Declared_In_Actual,
Note_Redundant_Use): Likewise.
* sem_warn.adb (Find_Package_Renaming): Likewise.
* sem_elab.adb (Ultimate_Variable): Call Renamed_Object instead
of Renamed_Entity.
* exp_ch6.adb (Get_Function_Id): Call
Set_Renamed_Object_Of_Possibly_Void, because the defining
identifer is still E_Void at this point.
* sem_util.adb (Function_Call_Or_Allocator_Level): Likewise.
Remove redundant (unreachable) code.
(Is_Object_Renaming, Is_Valid_Renaming): Call Renamed_Object
instead of Renamed_Entity.
(Get_Fullest_View): Call Renamed_Entity instead of
Renamed_Object.
(Copy_Node_With_Replacement): Call
Set_Renamed_Object_Of_Possibly_Void because the defining entity
is sometimes E_Void.
* exp_ch5.adb (Expand_N_Assignment_Statement): Protect a call to
Renamed_Object with Is_Object to avoid assertion failure.
* einfo.ads: Minor comment fixes.
* inline.adb: Minor comment fixes.
* tbuild.ads: Minor comment fixes.
Arnaud Charlet [Tue, 19 Oct 2021 07:40:32 +0000 (03:40 -0400)]
[Ada] Remove more uses of exception propagation during bootstrap
gcc/ada/
* sem_ch13.adb (Build_Discrete_Static_Predicate): Remove use of
exception propagation since this code is exercised during the
bootstrap.
Yannick Moy [Fri, 15 Oct 2021 13:06:34 +0000 (15:06 +0200)]
[Ada] Issue error on invalid use of Ghost inside pragma Predicate
gcc/ada/
* sem_ch13.adb (Freeze_Entity_Checks): Perform same check on
predicate expression inside pragma as inside aspect.
* sem_util.adb (Is_Current_Instance): Recognize possible
occurrence of subtype as current instance inside the pragma
Predicate.
Ghjuvan Lacambre [Mon, 18 Oct 2021 13:34:42 +0000 (15:34 +0200)]
[Ada] Fix deleted Compile_Time warnings causing crashes
gcc/ada/
* erroutc.adb (Count_Compile_Time_Pragma_Warnings): Don't count
deleted warnings.
Andrew MacLeod [Thu, 21 Oct 2021 18:48:20 +0000 (14:48 -0400)]
Initialize variable.
gcc/fortran/
* trans-decl.c (gfc_conv_cfi_to_gfc): Initialize rank to NULL_TREE.
Andrew MacLeod [Wed, 20 Oct 2021 17:41:12 +0000 (13:41 -0400)]
Always output exported ranges to a dump_file.
* gimple-range.cc (gimple_ranger::export_global_ranges): Remove check
for TDF_DETAILS.
Andrew MacLeod [Thu, 21 Oct 2021 14:58:16 +0000 (10:58 -0400)]
Tweak ranger-debug flags.
Set the 3 possible flags as all individual bits and group for options.
* flag-types.h (enum ranger_debug): Adjust values.
* params.opt (ranger_debug): Ditto.
Tamar Christina [Mon, 25 Oct 2021 14:14:04 +0000 (15:14 +0100)]
AArch64 testsuite: Force shrn-combine-*.c to use NEON.
These tests are testing Advanced SIMD codegen, so if the compiler or the
testsuite is forcing SVE they will fail.
This adds +nosve so that we always generate Advanced SIMD codegen.
gcc/testsuite/ChangeLog:
PR target/102907
* gcc.target/aarch64/shrn-combine-1.c: Disable SVE.
* gcc.target/aarch64/shrn-combine-2.c: Likewise.
* gcc.target/aarch64/shrn-combine-3.c: Likewise.
* gcc.target/aarch64/shrn-combine-4.c: Likewise.
* gcc.target/aarch64/shrn-combine-5.c: Likewise.
* gcc.target/aarch64/shrn-combine-6.c: Likewise.
* gcc.target/aarch64/shrn-combine-7.c: Likewise.
Martin Jambor [Mon, 25 Oct 2021 13:22:06 +0000 (15:22 +0200)]
sra: Fix the fix for PR 102505 (PR 102886)
I was not careful with the fix for PR 102505 and did not craft the
check to satisfy the verifier carefully, which lead to PR 102886.
(The verifier has the test structured differently and somewhat
redundantly, so I could not just copy it).
This patch fixes it. I hope it is quite obvious correction of an
oversight and so will commit it if survives bootstrap and testing on
x86_64-linux and ppc64le-linux.
Testcase for this bug is gcc.dg/tree-ssa/sra-18.c (but only on
platforms with constant pools). I will backport the two fixes
to the release branches squashed.
gcc/ChangeLog:
2021-10-22 Martin Jambor <mjambor@suse.cz>
PR tree-optimization/102886
* tree-sra.c (totally_scalarize_subtree): Fix the out of
access-condition.
Andrew Pinski [Sat, 23 Oct 2021 19:24:43 +0000 (19:24 +0000)]
Fix PR 102908: wrongly removing null pointer loads
Just like PR 100382, here we have a DCE removing a
null pointer load which is needed still.
In this case, execute_fixup_cfg removes a store (correctly)
and then removes the null load (incorrectly) due to
not checking stmt_unremovable_because_of_non_call_eh_p.
This patch adds the check in the similar way as the patch
to fix PR 100382 did.
gcc/ChangeLog:
* tree-ssa-dce.c (simple_dce_from_worklist):
Check stmt_unremovable_because_of_non_call_eh_p also
before removing the statement.
Richard Biener [Mon, 25 Oct 2021 09:33:10 +0000 (11:33 +0200)]
tree-optimization/102905 - restore re-align load for alignment peeling
Previous refactoring made the possibility of considering re-aligned
loads for unlimited cost model alignment peeling difficult so I
ditched that. Later refactoring made it easily possible again so
the following patch re-instantiates this which should fix the
observed regression on powerpc with altivec.
2021-10-25 Richard Biener <rguenther@suse.de>
PR tree-optimization/102905
* tree-vect-data-refs.c (vect_enhance_data_refs_alignment):
Use vect_supportable_dr_alignment again to determine whether
an access is supported when not aligned.
Kito Cheng [Thu, 16 Sep 2021 13:27:41 +0000 (21:27 +0800)]
RISC-V: Cost model for ZBS extension.
gcc/ChangeLog:
* config/riscv/riscv.c (riscv_rtx_costs): Handle cost model
for zbs extension.
Jim Wilson [Wed, 1 Sep 2021 16:28:47 +0000 (00:28 +0800)]
RISC-V: Implement instruction patterns for ZBS extension.
2021-10-25 Jim Wilson <jimw@sifive.com>
Kito Cheng <kito.cheng@sifive.com>
gcc/ChangeLog:
* config/riscv/bitmanip.md (shiftm1): New.
(*bset<mode>): Ditto.
(*bset<mode>_mask): Ditto.
(*bset<mode>_1): Ditto.
(*bset<mode>_1_mask): Ditto.
(*bseti<mode>): Ditto.
(*bclr<mode>): Ditto.
(*bclri<mode>): Ditto.
(*binv<mode>): Ditto.
(*binvi<mode>): Ditto.
(*bext<mode>): Ditto.
(*bexti): Ditto.
* config/riscv/predicates.md (splittable_const_int_operand):
Handle bseti.
(single_bit_mask_operand): New.
(not_single_bit_mask_operand): Ditto.
(const31_operand): Ditto.
(const63_operand): Ditto.
* config/riscv/riscv.c (riscv_build_integer_1): Handle bseti.
(riscv_output_move): Ditto.
(riscv_print_operand): Handle new operand type: T and S.
* config/riscv/riscv.h (SINGLE_BIT_MASK_OPERAND): New.
2021-10-25 Jia-Wei Chen <jiawei@iscas.ac.cn>
Shi-Hua Liao <shihua@iscas.ac.cn>
gcc/testsuite/ChangeLog:
* gcc.target/riscv/zba-slliuw.c: Apply zbs to this testcase.
* gcc.target/riscv/zbs-bclr.c: New.
* gcc.target/riscv/zbs-bext.c: Ditto.
* gcc.target/riscv/zbs-binv.c: Ditto.
* gcc.target/riscv/zbs-bset.c: Ditto.
Co-authored-by: Kito Cheng <kito.cheng@sifive.com>
Co-authored-by: Jia-Wei Chen <jiawei@iscas.ac.cn>
Co-authored-by: Shi-Hua Liao <shihua@iscas.ac.cn>
Jim Wilson [Sat, 31 Oct 2020 18:41:19 +0000 (11:41 -0700)]
RISC-V: Use li and rori to load constants.
gcc/ChangeLog:
* config/riscv/riscv.c (riscv_build_integer_1): Build integer
with rotate.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/zbb-li-rotr.c: New.
Kito Cheng [Thu, 16 Sep 2021 14:19:44 +0000 (22:19 +0800)]
RISC-V: Cost model for zbb extension.
2021-10-25 Kito Cheng <kito.cheng@sifive.com>
gcc/ChangeLog:
* config/riscv/riscv.c (riscv_extend_cost): Handle cost model
for zbb extension.
(riscv_rtx_costs): Ditto.
Jim Wilson [Tue, 31 Aug 2021 03:42:26 +0000 (11:42 +0800)]
RISC-V: Implement instruction patterns for ZBB extension.
2021-10-25 Jim Wilson <jimw@sifive.com>
Kito Cheng <kito.cheng@sifive.com>
Jia-Wei Chen <jiawei@iscas.ac.cn>
gcc/ChangeLog:
* config/riscv/bitmanip.md (bitmanip_bitwise): New.
(bitmanip_minmax): New.
(clz_ctz_pcnt): New.
(bitmanip_optab): New.
(bitmanip_insn): New.
(*<optab>_not<mode>): New.
(*xor_not<mode>): New.
(<bitmanip_optab>si2): New.
(*<bitmanip_optab>disi2): New.
(<bitmanip_optab>di2): New.
(*zero_extendhi<GPR:mode>2_bitmanip): New.
(*extend<SHORT:mode><SUPERQI:mode>2_zbb): New.
(*zero_extendhi<GPR:mode>2_zbb): New.
(rotrsi3): New.
(rotrdi3): New.
(rotrsi3_sext): New.
(rotlsi3): New.
(rotldi3): New.
(rotlsi3_sext): New.
(bswap<mode>2): New.
(<bitmanip_optab><mode>3): New.
* config/riscv/riscv.md (type): Add rotate.
(zero_extendhi<GPR:mode>2): Change to define_expand pattern.
(*zero_extendhi<GPR:mode>2): New.
(extend<SHORT:mode><SUPERQI:mode>2): Change to define_expand pattern.
(*extend<SHORT:mode><SUPERQI:mode>2): New.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/zbb-andn-orn-xnor-01.c: New.
* gcc.target/riscv/zbb-andn-orn-xnor-02.c: Ditto.
* gcc.target/riscv/zbb-min-max.c: Ditto.
* gcc.target/riscv/zbb-rol-ror-01.c: Ditto.
* gcc.target/riscv/zbb-rol-ror-02.c: Ditto.
* gcc.target/riscv/zbb-rol-ror-03.c: Ditto.
* gcc.target/riscv/zbbw.c: Ditto.
Co-authored-by: Kito Cheng <kito.cheng@sifive.com>
Co-authored-by: Jia-Wei Chen <jiawei@iscas.ac.cn>
Kito Cheng [Thu, 16 Sep 2021 14:22:41 +0000 (22:22 +0800)]
RISC-V: Cost model for zba extension.
gcc/ChangeLog:
* config/riscv/riscv.c (riscv_extend_cost): Handle cost model
for zba extension.
(riscv_rtx_costs): Ditto.
Jim Wilson [Mon, 23 Aug 2021 07:50:22 +0000 (15:50 +0800)]
RISC-V: Implement instruction patterns for ZBA extension.
2021-10-25 Jim Wilson <jimw@sifive.com>
Kito Cheng <kito.cheng@sifive.com>
Jia-Wei Chen <jiawei@iscas.ac.cn>
gcc/ChangeLog:
* config/riscv/bitmanip.md (*zero_extendsidi2_bitmanip): New.
(*shNadd): Ditto.
(*shNadduw): Ditto.
(*add.uw): Ditto.
(*slliuw): Ditto.
(riscv_rtx_costs): Ditto.
* config/riscv/riscv.md: Include bitmanip.md
(type): Add bitmanip bype.
(zero_extendsidi2): Change to define_expand pattern.
(*zero_extendsidi2_internal): New.
(zero_extendsidi2_shifted): Disable for ZBA.
2021-10-25 Kito Cheng <kito.cheng@sifive.com>
Jia-Wei Chen <jiawei@iscas.ac.cn>
gcc/testsuite/ChangeLog:
* gcc.target/riscv/zba-adduw.c: New.
* gcc.target/riscv/zba-shNadd-01.c: Ditto.
* gcc.target/riscv/zba-shNadd-02.c: Ditto.
* gcc.target/riscv/zba-shNadd-03.c: Ditto.
* gcc.target/riscv/zba-slliuw.c: Ditto.
* gcc.target/riscv/zba-zextw.c: Ditto.
Co-authored-by: Kito Cheng <kito.cheng@sifive.com>
Co-authored-by: Jia-Wei Chen <jiawei@iscas.ac.cn>
Kito Cheng [Mon, 23 Aug 2021 03:19:52 +0000 (11:19 +0800)]
RISC-V: Minimal support of bitmanip extension
2021-10-25 Kito Cheng <kito.cheng@sifive.com>
gcc/ChangeLog:
* common/config/riscv/riscv-common.c (riscv_ext_version_table):
Add zba, zbb, zbc and zbs.
(riscv_ext_flag_table): Ditto.
* config/riscv/riscv-opts.h (MASK_ZBA): New.
(MASK_ZBB): Ditto.
(MASK_ZBC): Ditto.
(MASK_ZBS): Ditto.
(TARGET_ZBA): Ditto.
(TARGET_ZBB): Ditto.
(TARGET_ZBC): Ditto.
(TARGET_ZBS): Ditto.
* config/riscv/riscv.opt (riscv_zb_subext): New.
liuhongt [Mon, 25 Oct 2021 02:51:33 +0000 (10:51 +0800)]
Simplify (_Float16) sqrtf((float) a) to .SQRT(a) when a is a _Float16 value.
Similar for sqrt/sqrtl.
gcc/ChangeLog:
PR target/102464
* match.pd: Simplify (_Float16) sqrtf((float) a) to .SQRT(a)
when direct_internal_fn_supported_p, similar for sqrt/sqrtl.
gcc/testsuite/ChangeLog:
PR target/102464
* gcc.target/i386/pr102464-sqrtph.c: New test.
* gcc.target/i386/pr102464-sqrtsh.c: New test.
Richard Biener [Mon, 25 Oct 2021 07:33:15 +0000 (09:33 +0200)]
tree-optimization/102920 - fix PHI VN with undefined args
This fixes a latent issue exposed by now allowing VN_TOP in PHI
arguments. We may only use optimistic equality when merging values on
different edges, not when merging values on the same edge - in particular
we may not choose the undef value on any edge when there's a not undef
value as well.
2021-10-25 Richard Biener <rguenther@suse.de>
PR tree-optimization/102920
* tree-ssa-sccvn.h (expressions_equal_p): Add argument
controlling VN_TOP matching behavior.
* tree-ssa-sccvn.c (expressions_equal_p): Likewise.
(vn_phi_eq): Do not optimistically match VN_TOP.
* gcc.dg/torture/pr102920.c: New testcase.
konglin1 [Tue, 19 Oct 2021 01:35:30 +0000 (09:35 +0800)]
Combine the FADD(A, FMA(B, C, 0)) to FMA(B, C, A) and combine FADD(A, FMUL(B, C)) to FMA(B, C, A).
This patch is to support transform in fast-math something like
_mm512_add_ph(x1, _mm512_fmadd_pch(a, b, _mm512_setzero_ph())) to
_mm512_fmadd_pch(a, b, x1).
And support transform _mm512_add_ph(x1, _mm512_fmul_pch(a, b))
to _mm512_fmadd_pch(a, b, x1).
gcc/ChangeLog:
* config/i386/sse.md (fma_<mode>_fadd_fmul): Add new
define_insn_and_split.
(fma_<mode>_fadd_fcmul):Likewise
(fma_<complexopname>_<mode>_fma_zero):Likewise
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx512fp16-complex-fma.c: New test.
GCC Administrator [Mon, 25 Oct 2021 00:16:18 +0000 (00:16 +0000)]
Daily bump.
John David Anglin [Sun, 24 Oct 2021 17:49:38 +0000 (17:49 +0000)]
Revise -mdisable-fpregs option and add new -msoft-mult option
The behavior of the -mdisable-fpregs is confusing in that it doesn't
disable the use of the floating-point registers in all situations.
The -msoft-float disables the use of the floating-point registers in
all situations. The Linux kernel only needs to disable use of the
xmpyu instruction to avoid using the floating-point registers.
This change revises the -mdisable-fpregs option to disable the use of
the floating-point registers in all situations. It is now equivalent
to the -msoft-float option. A new -msoft-mult option is added to
disable use of the xmpyu instruction. The libgcc library can be
compiled with the -msoft-mult option to avoid using hardware integer
multiplication.
2021-10-24 John David Anglin <danglin@gcc.gnu.org>
gcc/ChangeLog:
* config/pa/pa-d.c (pa_d_handle_target_float_abi): Don't check
TARGET_DISABLE_FPREGS.
* config/pa/pa.c (fix_range): Use MASK_SOFT_FLOAT instead of
MASK_DISABLE_FPREGS.
(hppa_rtx_costs): Don't check TARGET_DISABLE_FPREGS. Adjust
cost of hardware integer multiplication.
(pa_conditional_register_usage): Don't check TARGET_DISABLE_FPREGS.
* config/pa/pa.h (INT14_OK_STRICT): Likewise.
* config/pa/pa.md: Don't check TARGET_DISABLE_FPREGS. Check
TARGET_SOFT_FLOAT in patterns that use xmpyu instruction.
* config/pa/pa.opt (mdisable-fpregs): Change target mask to
SOFT_FLOAT. Revise comment.
(msoft-float): New option.
John David Anglin [Sun, 24 Oct 2021 16:38:58 +0000 (16:38 +0000)]
Don't use 'G' constraint in integer move patterns
The 'G' constraint only matches a float zero.
2021-10-24 John David Anglin <danglin@gcc.gnu.org>
gcc/ChangeLog:
* config/pa/pa.md: Don't use 'G' constraint in integer move patterns.
Roger Sayle [Sun, 24 Oct 2021 13:30:10 +0000 (14:30 +0100)]
[Committed] Correct testcase gcc.target/bfin/
20090914-3.c
This patch cures the testsuite failure of bfin/
20090914-3.c, which
currently FAILs on bfin-elf with "(test for excess errors)" due to:
20090914-3.c:3:1: warning: return type defaults to 'int' [-Wimplicit-int]
which is obviously not what this code was intended to test. Fixed by
turning the code into a function returning the final "fract32" result,
as simply specifying an "int" return type for main, results in the
entire function being optimized away, as the result is unused.
2021-10-24 Roger Sayle <roger@nextmovesoftware.com>
gcc/testsuite/ChangeLog
* gcc.target/bfin/
20090914-3.c: Tweak test case.
Gerald Pfeifer [Sun, 24 Oct 2021 09:19:08 +0000 (11:19 +0200)]
doc: Remove details around Itanium on GNU/Linux and Windows
gcc:
* doc/install.texi (Specific): Remove obsolete details
around GNU/Linux on Itanium.
(Specific): Remove reference to Windows for Itanium.
GCC Administrator [Sun, 24 Oct 2021 00:16:25 +0000 (00:16 +0000)]
Daily bump.
Bernhard Reutner-Fischer [Thu, 22 Apr 2021 19:47:20 +0000 (21:47 +0200)]
config/i386: Commentary typo fix
gcc/ChangeLog:
* config/i386/x86-tune-sched-bd.c (dispatch_group): Commentary
typo fix.
Jan Hubicka [Sat, 23 Oct 2021 15:44:32 +0000 (17:44 +0200)]
cleanup compute_points_to_sets
gcc/ChangeLog:
* tree-ssa-structalias.c (compute_points_to_sets): Cleanup.
H.J. Lu [Sat, 23 Oct 2021 12:40:09 +0000 (05:40 -0700)]
Move bind-c-intent-out-2.f90 to gfortran.dg/ubsan
Move bind-c-intent-out-2.f90 to gfortran.dg/ubsan for -fsanitize=undefined.
PR fortran/9262
* gfortran.dg/bind-c-intent-out-2.f90: Moved to ...
* gfortran.dg/ubsan/bind-c-intent-out-2.f90
Roger Sayle [Sat, 23 Oct 2021 09:06:06 +0000 (10:06 +0100)]
x86_64: Add insn patterns for V1TI mode logic operations.
On x86_64, V1TI mode holds a 128-bit integer value in a (vector) SSE
register (where regular TI mode uses a pair of 64-bit general purpose
scalar registers). This patch improves the implementation of AND, IOR,
XOR and NOT on these values.
The benefit is demonstrated by the following simple test program:
typedef unsigned __int128 v1ti __attribute__ ((__vector_size__ (16)));
v1ti and(v1ti x, v1ti y) { return x & y; }
v1ti ior(v1ti x, v1ti y) { return x | y; }
v1ti xor(v1ti x, v1ti y) { return x ^ y; }
v1ti not(v1ti x) { return ~x; }
For which GCC currently generates the rather large:
and: movdqa %xmm0, %xmm2
movq %xmm1, %rdx
movq %xmm0, %rax
andq %rdx, %rax
movhlps %xmm2, %xmm3
movhlps %xmm1, %xmm4
movq %rax, %xmm0
movq %xmm4, %rdx
movq %xmm3, %rax
andq %rdx, %rax
movq %rax, %xmm5
punpcklqdq %xmm5, %xmm0
ret
ior: movdqa %xmm0, %xmm2
movq %xmm1, %rdx
movq %xmm0, %rax
orq %rdx, %rax
movhlps %xmm2, %xmm3
movhlps %xmm1, %xmm4
movq %rax, %xmm0
movq %xmm4, %rdx
movq %xmm3, %rax
orq %rdx, %rax
movq %rax, %xmm5
punpcklqdq %xmm5, %xmm0
ret
xor: movdqa %xmm0, %xmm2
movq %xmm1, %rdx
movq %xmm0, %rax
xorq %rdx, %rax
movhlps %xmm2, %xmm3
movhlps %xmm1, %xmm4
movq %rax, %xmm0
movq %xmm4, %rdx
movq %xmm3, %rax
xorq %rdx, %rax
movq %rax, %xmm5
punpcklqdq %xmm5, %xmm0
ret
not: movdqa %xmm0, %xmm1
movq %xmm0, %rax
notq %rax
movhlps %xmm1, %xmm2
movq %rax, %xmm0
movq %xmm2, %rax
notq %rax
movq %rax, %xmm3
punpcklqdq %xmm3, %xmm0
ret
with this patch we now generate the much more efficient:
and: pand %xmm1, %xmm0
ret
ior: por %xmm1, %xmm0
ret
xor: pxor %xmm1, %xmm0
ret
not: pcmpeqd %xmm1, %xmm1
pxor %xmm1, %xmm0
ret
For my first few attempts at this patch I tried adding V1TI to the
existing VI and VI12_AVX_512F mode iterators, but these then have
dependencies on other iterators (and attributes), and so on until
everything ties itself into a knot, as V1TI mode isn't really a
first-class vector mode on x86_64. Hence I ultimately opted to use
simple stand-alone patterns (as used by the existing TF mode support).
2021-10-23 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* config/i386/sse.md (<any_logic>v1ti3): New define_insn to
implement V1TImode AND, IOR and XOR on TARGET_SSE2 (and above).
(one_cmplv1ti2): New define expand.
gcc/testsuite/ChangeLog
* gcc.target/i386/sse2-v1ti-logic.c: New test case.
* gcc.target/i386/sse2-v1ti-logic-2.c: New test case.
Sandra Loosemore [Sat, 23 Oct 2021 00:22:00 +0000 (17:22 -0700)]
Add testcase for PR fortran/95196
2021-10-22 José Rui Faustino de Sousa <jrfsousa@gmail.com>
Sandra Loosemore <sandra@codesourcery.com>
gcc/testsuite/
PR fortran/95196
* gfortran.dg/PR95196.f90: New.
GCC Administrator [Sat, 23 Oct 2021 00:16:26 +0000 (00:16 +0000)]
Daily bump.
Eric Gallager [Fri, 22 Oct 2021 22:24:15 +0000 (15:24 -0700)]
Add install-dvi Makefile targets.
Closes #102663
ChangeLog:
PR other/102663
* Makefile.def: Handle install-dvi target.
* Makefile.tpl: Likewise.
* Makefile.in: Regenerate.
c++tools/ChangeLog:
PR other/102663
* Makefile.in: Add dummy install-dvi target.
gcc/ChangeLog:
PR other/102663
* Makefile.in: Handle dvidir and install-dvi target.
* configure: Regenerate.
* configure.ac: Add install-dvi to target_list.
gcc/ada/ChangeLog:
PR other/102663
* gcc-interface/Make-lang.in: Allow dvi-formatted
documentation to be installed.
gcc/c/ChangeLog:
PR other/102663
* Make-lang.in: Add dummy c.install-dvi target.
gcc/cp/ChangeLog:
PR other/102663
* Make-lang.in: Add dummy c++.install-dvi target.
gcc/d/ChangeLog:
PR other/102663
* Make-lang.in: Allow dvi-formatted documentation
to be installed.
gcc/fortran/ChangeLog:
PR other/102663
* Make-lang.in: Allow dvi-formatted documentation
to be installed.
gcc/lto/ChangeLog:
PR other/102663
* Make-lang.in: Add dummy lto.install-dvi target.
gcc/objc/ChangeLog:
PR other/102663
* Make-lang.in: Add dummy objc.install-dvi target.
gcc/objcp/ChangeLog:
PR other/102663
* Make-lang.in: Add dummy objc++.install-dvi target.
gnattools/ChangeLog:
PR other/102663
* Makefile.in: Add dummy install-dvi target.
libada/ChangeLog:
PR other/102663
* Makefile.in: Add dummy install-dvi target.
libcpp/ChangeLog:
PR other/102663
* Makefile.in: Add dummy install-dvi target.
libdecnumber/ChangeLog:
PR other/102663
* Makefile.in: Add dummy install-dvi target.
libiberty/ChangeLog:
PR other/102663
* Makefile.in: Allow dvi-formatted documentation
to be installed.
Gerald Pfeifer [Fri, 22 Oct 2021 22:10:58 +0000 (00:10 +0200)]
doc: Convert mingw-w64.org links to https
gcc:
* doc/install.texi (Binaries): Convert mingw-w64.org to https.
(Specific): Ditto.
Jonathan Wakely [Fri, 22 Oct 2021 21:55:00 +0000 (22:55 +0100)]
libstdc++: Constrain std::make_any [PR102894]
std::make_any should be constrained so it can only be called if the
construction of the return value would be valid.
libstdc++-v3/ChangeLog:
PR libstdc++/102894
* include/std/any (make_any): Add SFINAE constraint.
* testsuite/20_util/any/102894.cc: New test.
Tobias Burnus [Fri, 22 Oct 2021 22:04:43 +0000 (00:04 +0200)]
Fortran: Change XFAIL to PASS
Replace dg-excess-errors by dg-error/warning and dg-prune-output for
more fine-grained output handling and to avoid XPASS.
gcc/testsuite/ChangeLog:
* gfortran.dg/associate_3.f03: Replace dg-excess-errors by
other dg-* to change XFAIL to PASS.
* gfortran.dg/binding_label_tests_4.f03: Likewise.
* gfortran.dg/block_4.f08: Likewise.
* gfortran.dg/charlen_04.f90: Likewise.
* gfortran.dg/charlen_05.f90: Likewise.
* gfortran.dg/charlen_06.f90: Likewise.
* gfortran.dg/charlen_13.f90: Likewise.
* gfortran.dg/coarray_9.f90: Likewise.
* gfortran.dg/coarray_collectives_3.f90: Likewise.
* gfortran.dg/data_invalid.f90: Likewise.
* gfortran.dg/do_4.f: Likewise.
* gfortran.dg/dollar_sym_1.f90: Likewise.
* gfortran.dg/dollar_sym_3.f: Likewise.
* gfortran.dg/fmt_tab_1.f90: Likewise.
* gfortran.dg/fmt_tab_2.f90: Likewise.
* gfortran.dg/forall_16.f90: Likewise.
* gfortran.dg/g77/970125-0.f: Likewise.
* gfortran.dg/gomp/unexpected-end.f90: Likewise.
* gfortran.dg/interface_operator_1.f90: Likewise.
* gfortran.dg/interface_operator_2.f90: Likewise.
* gfortran.dg/line_length_4.f90: Likewise.
* gfortran.dg/line_length_5.f90: Likewise.
* gfortran.dg/line_length_6.f90: Likewise.
* gfortran.dg/line_length_8.f90: Likewise.
* gfortran.dg/line_length_9.f90: Likewise.
* gfortran.dg/pr65045.f90: Likewise.
* gfortran.dg/pr69497.f90: Likewise.
* gfortran.dg/submodule_21.f08: Likewise.
* gfortran.dg/tab_continuation.f: Likewise.
* gfortran.dg/typebound_proc_2.f90: Likewise.
* gfortran.dg/warnings_are_errors_1.f90: Likewise.
Tobias Burnus [Fri, 22 Oct 2021 21:23:06 +0000 (23:23 +0200)]
Fortran: Avoid running into assert with -fcheck= + UBSAN
PR fortran/92621
gcc/fortran/
* trans-expr.c (gfc_trans_assignment_1): Add STRIP_NOPS.
gcc/testsuite/
* gfortran.dg/bind-c-intent-out-2.f90: New test.
Stafford Horne [Thu, 21 Oct 2021 13:11:27 +0000 (22:11 +0900)]
or1k: Update FPU to specify detect tininess before rounding
This was not defined in the spec and not consistent in the
implementation causing incosistent behavior. After review we have
updated the CPU implementations and proposed the spec be updated to
specific that FPU tininess checks check for tininess before roudning.
Architecture change draft:
https://openrisc.io/proposals/p18-fpu-tininess
libgcc/ChangeLog:
* config/or1k/sfp-machine.h (_FP_TININESS_AFTER_ROUNDING):
Change to 0.
Martin Liska [Fri, 22 Oct 2021 08:12:56 +0000 (10:12 +0200)]
Handle jobserver file descriptors in btest.
PR testsuite/102742
libbacktrace/ChangeLog:
* btest.c (MIN_DESCRIPTOR): New.
(MAX_DESCRIPTOR): Likewise.
(check_available_files): Likewise.
(check_open_files): Check only file descriptors that
were not available at the entry.
(main): Call check_available_files.
Sandra Loosemore [Fri, 22 Oct 2021 18:08:19 +0000 (11:08 -0700)]
Add testcase for PR fortran/94289
2021-10-22 José Rui Faustino de Sousa <jrfsousa@gmail.com>
Sandra Loosemore <sandra@codesourcery.com>
gcc/testsuite/
PR fortran/94289
* gfortran.dg/PR94289.f90: New.
Sandra Loosemore [Fri, 22 Oct 2021 02:17:50 +0000 (19:17 -0700)]
Add testcase for PR fortran/100906
2021-10-21 José Rui Faustino de Sousa <jrfsousa@gmail.com>
Sandra Loosemore <sandra@codesourcery.com>
gcc/testsuite/
PR fortran/100906
* gfortran.dg/PR100906.f90: New.
* gfortran.dg/PR100906.c: New.
Richard Biener [Fri, 22 Oct 2021 10:45:32 +0000 (12:45 +0200)]
tree-optimization/102893 - properly DCE empty loops inside infinite loops
The following fixes the test for an exit edge I put in place for
the fix for PR45178 where I somehow misunderstood how the cyclic
list works.
2021-10-22 Richard Biener <rguenther@suse.de>
PR tree-optimization/102893
* tree-ssa-dce.c (find_obviously_necessary_stmts): Fix the
test for an exit edge.
* gcc.dg/tree-ssa/ssa-dce-9.c: New testcase.
Aldy Hernandez [Tue, 19 Oct 2021 18:57:49 +0000 (20:57 +0200)]
Disregard incoming equivalences to a path when defining a new one.
The equivalence oracle creates a new equiv set at each def point,
killing any incoming equivalences, however in the path sensitive
oracle we create brand new equivalences at each PHI:
BB4:
BB8:
x_5 = PHI <y_8(4)>
Here we note that x_5 == y_8 at the end of the path.
The current code is intersecting this new equivalence with previously
known equivalences coming into the path. This is incorrect, as this
is a new definition. This patch kills any known equivalence before we
register a new one.
This hasn't caused problems so far, but upcoming changes to the
pipeline has us threading more aggressively and triggering corner
cases where this causes incorrect code.
I have tested this patch with the usual regstrap cycle. I have also
hacked a compiler comparing the old and new behavior to see if we were
previously threading paths where the decision was made due to invalid
equivalences. Luckily, there were no such paths, but there were 22
paths in a set of .ii files where disregarding incoming relations
allowed us to thread the path. This is a miniscule improvement,
but we moved a handful of thredable paths earlier in the pipeline,
which is always good.
Tested on x86-64 Linux.
Co-authored-by: Andrew MacLeod <amacleod@redhat.com>
gcc/ChangeLog:
* gimple-range-path.cc (path_range_query::compute_phi_relations):
Kill any global relations we may know before registering a new
one.
* value-relation.cc (path_oracle::killing_def): New.
* value-relation.h (path_oracle::killing_def): New.
Richard Biener [Fri, 22 Oct 2021 08:32:36 +0000 (10:32 +0200)]
bootstrap/102681 - properly CSE PHIs with default def args
The PR shows that we fail to CSE PHIs containing (different)
default definitions due to the fact on how we now handle
on-demand build of VN_INFO. The following fixes this in the
same way the PHI visitation code does.
On gcc.dg/ubsan/pr81981.c this causes one expected warning to be
elided since the uninit pass sees the change
<bb 4> [local count:
1073741824]:
# u$0_2 = PHI <u$0_5(D)(3), i_3(D)(5)>
- # cstore_11 = PHI <t$0_6(D)(3), i_3(D)(5)>
v = u$0_2;
- return cstore_11;
+ return u$0_2;
and thus only one of the conditionally uninitialized uses (the
other became dead). I have XFAILed the missing diagnostic,
I don't see a way to preserve that.
2021-10-22 Richard Biener <rguenther@suse.de>
PR bootstrap/102681
* tree-ssa-sccvn.c (vn_phi_insert): For undefined SSA args
record VN_TOP.
(vn_phi_lookup): Likewise.
* gcc.dg/tree-ssa/ssa-fre-97.c: New testcase.
* gcc.dg/ubsan/pr81981.c: XFAIL one case.
GCC Administrator [Fri, 22 Oct 2021 00:16:31 +0000 (00:16 +0000)]
Daily bump.
Jonathan Wakely [Thu, 21 Oct 2021 11:26:18 +0000 (12:26 +0100)]
libstdc++: Improve generated man pages for libstdc++
The man pages generated by Doxygen show internal header files, not the
standard headers that users actually care about. The run_doxygen script
uses the doc/doxygen/stdheader.cc program to address that, but it
doesn't work. It only tries to fix headers with underscores in the
names, which doesn't work for <bits/align.h> or <bits/fsteam.tcc>. It
isn't prepared for the strings like "bits/stl_set\&.h" that are produced
by Doxygen. It doesn't know about many headers that have been added
since it was written. And the run_doxygen script fails to use its output
correctly to modify the man pages. Additionally, run_doxygen doesn't
know about new nested namespaces like std::filesystem and std::ranges.
This change rewrites the stdheader.cc program to do a better job of
finding the right header. The run_doxygen script now uses the just-built
compiler to build stdheader.cc and actually uses its output. And the
script now knows about other nested namespaces.
The stdheader.cc program might be unnecessary if we consistently used
@headername tags in the Doxygen comments, but we don't (and probably
never will).
A problem that remains after this change is that all the free function
defined in namespace std get dumped into a single man page for std(3),
without detailed descriptions. We don't even install that std(3) page,
but remove it before installation. That means only classes are
documented in man pages (including many internal ones that should not be
publicly documented such as _Deque_base and _Tuple_impl).
libstdc++-v3/ChangeLog:
* doc/doxygen/stdheader.cc: Refactor. Use C++23. Add new
headers.
* scripts/run_doxygen: Fix post-processing of #include
directives in man pages. Use new xg++ to compile helper program.
Jonathan Wakely [Thu, 21 Oct 2021 16:44:47 +0000 (17:44 +0100)]
libstdc++: Add Doxygen comments to contents of <functional>
libstdc++-v3/ChangeLog:
* include/bits/mofunc_impl.h: Add doxygen comments.
* include/std/functional: Likewise.
Jonathan Wakely [Thu, 21 Oct 2021 16:43:34 +0000 (17:43 +0100)]
libstdc++: Suppress Doxygen docs for more implementation details
libstdc++-v3/ChangeLog:
* include/bits/alloc_traits.h: Suppress doxygen documentation.
* include/bits/allocated_ptr.h: Likewise.
* include/bits/enable_special_members.h: Likewise.
* include/bits/hashtable.h: Likewise.
* include/bits/hashtable_policy.h: Likewise.
* include/bits/uses_allocator.h: Likewise.
* include/bits/node_handle.h: Document node handles and suppress
documentation for protected members.
* include/std/any: Suppress documentation for implementation
details.
Jonathan Wakely [Thu, 21 Oct 2021 13:17:43 +0000 (14:17 +0100)]
libcody: Avoid double-free
If the listen call fails then 'goto fail' will jump to that label and
use freeaddrinfo again. Set the pointer to null to prevent that.
libcody/ChangeLog:
* netserver.cc (ListenInet6): Set pointer to null after
deallocation.
H.J. Lu [Thu, 21 Oct 2021 16:45:14 +0000 (09:45 -0700)]
x86: Document -fcf-protection requires i686 or newer
PR target/98667
* doc/invoke.texi: Document -fcf-protection requires i686 or
new.
Uros Bizjak [Thu, 21 Oct 2021 18:57:38 +0000 (20:57 +0200)]
testsuite: Adjust pr22076.c to avoid compile-time optimization [PR102840]
2021-10-21 Uroš Bizjak <ubizjak@gmail.com>
PR testsuite/102840
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr22076.c: Adjust to avoid compile time optimization.
Patrick Palka [Thu, 21 Oct 2021 16:13:35 +0000 (12:13 -0400)]
libstdc++: missing constexpr for __[nm]iter_base [PR102358]
PR libstdc++/102358
libstdc++-v3/ChangeLog:
* include/bits/stl_iterator.h (__niter_base): Make constexpr
for C++20.
(__miter_base): Likewise.
* testsuite/25_algorithms/move/constexpr.cc: New test.
Eric Botcazou [Thu, 21 Oct 2021 15:57:55 +0000 (17:57 +0200)]
Fix again PR middle-end/102764
gcc/
PR middle-end/102764
* cfgexpand.c (expand_gimple_basic_block): Robustify latest change.
Patrick Palka [Thu, 21 Oct 2021 15:55:19 +0000 (11:55 -0400)]
libstdc++: Implement P2432R1 changes for views::istream
libstdc++-v3/ChangeLog:
* include/std/ranges (istream_view): Replace this function
template with an alias template as per P2432R1.
(wistream_view): Define as per P2432R1.
(views::_Istream, views::istream): Likewise.
* testsuite/std/ranges/istream_view.cc (test07): New test.
Patrick Palka [Thu, 21 Oct 2021 15:55:16 +0000 (11:55 -0400)]
libstdc++: Implement P1739R4 changes to views::take/drop/counted
This implements P1739R4 along with the resolution for LWG 3407 which
corrects the paper's wording.
libstdc++-v3/ChangeLog:
* include/bits/ranges_util.h (views::_Drop): Forward declare.
(subrange): Befriend views::_Drop.
(subrange::_S_store_size): Declare constexpr instead of just
const, remove obsolete comment.
* include/std/ranges (views::__detail::__is_empty_view): Define.
(views::__detail::__is_basic_string_view): Likewise.
(views::__detail::__is_subrange): Likewise.
(views::__detail::__is_iota_view): Likewise.
(views::__detail::__can_take_view): Rename template parm _Tp to _Dp.
(views::_Take): Rename template parm _Tp to _Dp, make it non-deducible
and fix it to range_difference_t<_Range>. Implement P1739R4 and
LWG 3407 changes.
(views::__detail::__can_drop_view): Rename template parm _Tp to _Dp.
(views::_Drop): As with views::_Take.
(views::_Counted): Implement P1739R4 changes.
* include/std/span (__detail::__is_std_span): Rename to ...
(__detail::__is_span): ... this and turn it into a variable
template.
(__detail::__is_std_array): Turn it into a variable template.
(span::span): Adjust uses of __is_std_span and __is_std_array
accordingly.
* testsuite/std/ranges/adaptors/p1739.cc: New test.
Jonathan Wright [Fri, 15 Oct 2021 15:50:57 +0000 (16:50 +0100)]
aarch64: Remove redundant struct type definitions in arm_neon.h
These vector type definitions are an artifact from the initial commit
that added the AArch64 port.
gcc/ChangeLog:
2021-10-15 Jonathan Wright <jonathan.wright@arm.com>
* config/aarch64/arm_neon.h (__STRUCTN): Delete function
macro and all invocations.
Hongyu Wang [Thu, 21 Oct 2021 13:29:50 +0000 (21:29 +0800)]
Adjust testcase for 128/256 bit HF vector load/store
The HF vector move have been updated to align with HI vector,
adjust according testcase for _Float16 vector load and store.
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx512fp16-13.c: Adjust scan-assembler for
xmm/ymm load/store.
Andrew MacLeod [Tue, 19 Oct 2021 18:09:51 +0000 (14:09 -0400)]
Split --param=evrp-mode into evrp-mode and ranger-debug.
With Ranger being used in more than EVRP, the debug output should no longer
be tied up with the EVRP mode flag.
* doc/invoke.texi (ranger-debug): Document.
* flag-types.h (enum ranger_debug): New.
(enum evrp_mode): Remove debug values.
* gimple-range-cache.cc (DEBUG_RANGE_CACHE): Use new debug flag.
* gimple-range-gori.cc (gori_compute::gori_compute): Ditto.
* gimple-range.cc (gimple_ranger::gimple_ranger): Ditto.
* gimple-ssa-evrp.c (hybrid_folder::choose_value): Ditto.
(execute_early_vrp): Use evrp-mode directly.
* params.opt (enum evrp_mode): Remove debug values.
(ranger-debug): New.
(ranger-logical-depth): Relocate to be in alphabetical order.
Andrew MacLeod [Fri, 15 Oct 2021 16:06:27 +0000 (12:06 -0400)]
Add --param=vrp1-mode and --param=vrp2-mode.
Add 2 new params to select between VRP and RANGER to be used for each pass.
* doc/invoke.texi: (vrp1-mode, vrp2-mode): Document.
* flag-types.h: (enum vrp_mode): New.
* params.opt: (vrp1-mode, vrp2-mode): New.
* tree-vrp.c (vrp_pass_num): New.
(pass_vrp::pass_vrp): Set pass number.
(pass_vrp::execute): Choose which VRP mode to execute.
Andrew MacLeod [Fri, 15 Oct 2021 16:26:13 +0000 (12:26 -0400)]
Move ranger only VRP folder to tree-vrp.
Consolidate the RVRP folder into a single "execute_vrp" routine that mimics
the format used by the vrp1 and vrp2 passes. Relocate into the tree-vrp file.
* gimple-ssa-evrp.c (class rvrp_folder): Move to tree-vrp.c.
(execute_early_vrp): For ranger only mode, invoke ranger_vrp.
* tree-vrp.c (class rvrp_folder): Relocate here.
(execute_ranger_vrp): New.
* tree-vrp.h (execute_ranger_vrp): Export.
Martin Liska [Thu, 14 Oct 2021 12:57:18 +0000 (14:57 +0200)]
options: Fix variable tracking option processing.
PR debug/102585
PR bootstrap/102766
gcc/ChangeLog:
* opts.c (finish_options): Process flag_var_tracking* options
here as they can be adjusted by optimize attribute.
Process also flag_syntax_only and flag_gtoggle.
* toplev.c (process_options): Remove it here.
* common.opt: Make debug_nonbind_markers_p as PerFunction
attribute as it depends on optimization level.
gcc/testsuite/ChangeLog:
* gcc.dg/pr102585.c: New test.