platform/upstream/llvm.git
3 years ago[NFC][CoroSplit] Directly use Function::getFunctionType()
Arthur Eubanks [Mon, 13 Sep 2021 04:33:55 +0000 (21:33 -0700)]
[NFC][CoroSplit] Directly use Function::getFunctionType()

3 years ago[IndVars] Break backedge and replace PHIs if loop exits on 1st iteration
Max Kazantsev [Mon, 13 Sep 2021 04:29:33 +0000 (11:29 +0700)]
[IndVars] Break backedge and replace PHIs if loop exits on 1st iteration

Implement TODO in optimizeLoopExits. Now if we have proved that some loop exit
is taken on 1st iteration, we make all branches in the following exiting blocks
always branch out of the loop and their conditions simplified away.

Patch by Dmitry Makogon!

Differential Revision: https://reviews.llvm.org/D108910
Reviewed By: lebedev.ri

3 years ago[IndVars] Replace PHIs if loop exits on 1st iteration
Max Kazantsev [Mon, 13 Sep 2021 03:48:42 +0000 (10:48 +0700)]
[IndVars] Replace PHIs if loop exits on 1st iteration

This is a part of D108910.
We replace all loop PHIs with values coming from the loop preheader if
we proved that backedge is never taken.

Patch by Dmitry Makogon!

Differential Revision: https://reviews.llvm.org/D109596
Reviewed By: lebedev.ri

3 years ago[NFC] Directly use OpenMPIRBuilder::Ident instead of IdentPtr->getPointerElementType()
Arthur Eubanks [Mon, 13 Sep 2021 03:45:14 +0000 (20:45 -0700)]
[NFC] Directly use OpenMPIRBuilder::Ident instead of IdentPtr->getPointerElementType()

3 years ago[PowerPC] [NFC] Add Big-Endian checks for existing MMA tests
Ahsan Saghir [Mon, 13 Sep 2021 00:39:35 +0000 (19:39 -0500)]
[PowerPC] [NFC] Add Big-Endian checks for existing MMA tests

This patch adds Big-Endian checks for the existing MMA test cases.
It also changes the target for these test cases to pwr10.

Reviewed By: #powerpc, nemanjai

Differential Revision: https://reviews.llvm.org/D109126

3 years ago[Attributor][FIX] AACallEdges, fix propagation error.
Kuter Dinel [Sun, 12 Sep 2021 23:41:54 +0000 (02:41 +0300)]
[Attributor][FIX] AACallEdges, fix propagation error.

This patch fixes a error made in 2cc6f7c8e108. That patch
added a call site position but there was a small error with the way
the presence of a unknown call edge was being propagated from call site
to function. This patch fixes that error. This error was effecting some
AMDGPU tests.

3 years ago[NFC] Avoid using pointee types in PPCISelLowering
Arthur Eubanks [Mon, 13 Sep 2021 00:36:46 +0000 (17:36 -0700)]
[NFC] Avoid using pointee types in PPCISelLowering

A cmpxchg's new value type is the same as the pointer operand's pointee type.

3 years ago[RISCV] Initial support .insn directive for the assembler.
Craig Topper [Sun, 12 Sep 2021 20:45:52 +0000 (13:45 -0700)]
[RISCV] Initial support .insn directive for the assembler.

This allows for a custom encoding to be emitted. It can also be
used with inline assembly to allow the custom instruction to be
register allocated like other instructions.

I initially started from SystemZ's implementation, but some of
the formats allow operands to be specified in multiple ways so I
had to add support for matching different operand class lists for
the same format. That implementation is a simplified version of
what is emitted by tablegen for regular instructions.

I've left out the compressed formats. And I haven't supported the
named opcodes like LUI or OP_IMM_32. Those can be added in future
patches.

Documentation can be found here https://sourceware.org/binutils/docs-2.37/as/RISC_002dV_002dFormats.html

Reviewed By: jrtc27, MaskRay

Differential Revision: https://reviews.llvm.org/D108602

3 years ago[Attributor] AAFunctionReachability, Handle CallBase Reachability.
Kuter Dinel [Tue, 20 Jul 2021 21:42:47 +0000 (00:42 +0300)]
[Attributor] AAFunctionReachability, Handle CallBase Reachability.

This patch makes it possible to query callbase reachability
(Can a callbase reach a function Fn transitively).
The patch moves the reachability query handling logic to a member class,
this class will have more users within the AA once we add other function
reachability queries.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D106402

3 years ago[Attributor] Create a call site position for AACalledges
Kuter Dinel [Sun, 12 Sep 2021 03:02:51 +0000 (06:02 +0300)]
[Attributor] Create a call site position for AACalledges

This patch adds a call site position for AACallEdges, this
allows us to ask questions about which functions a specific
`CallBase` might call.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D106208

3 years ago[NFC][SVE] Precommit tests for adr instruction
Usman Nadeem [Sun, 12 Sep 2021 22:06:28 +0000 (15:06 -0700)]
[NFC][SVE] Precommit tests for adr instruction

Change-Id: I8148481a5ce3b721113327cc9b684f091cae5a8d

3 years ago[VPlan] Fix crash caused by not updating all users properly.
Florian Hahn [Sun, 12 Sep 2021 16:53:40 +0000 (17:53 +0100)]
[VPlan] Fix crash caused by not updating all users properly.

Users of VPValues are managed in a vector, so we need to be more
careful when iterating over users while updating them. For now, just
copy them.

Fixes 51798.

3 years ago[CGP] Support opaque pointers in address mode fold
Nikita Popov [Sun, 12 Sep 2021 15:30:40 +0000 (17:30 +0200)]
[CGP] Support opaque pointers in address mode fold

Rather than inspecting the pointer element type, use the access
type of the load/store/atomicrmw/cmpxchg.

In the process of doing this, simplify the logic by storing the
address + type in MemoryUses, rather than an Instruction + Operand
pair (which was then used to fetch the address).

3 years ago[Scalar] Use make_early_inc_range (NFC)
Kazu Hirata [Sun, 12 Sep 2021 15:17:18 +0000 (08:17 -0700)]
[Scalar] Use make_early_inc_range (NFC)

3 years ago[InstCombine] remove casts from splat-a-bit pattern
Sanjay Patel [Sun, 12 Sep 2021 13:18:14 +0000 (09:18 -0400)]
[InstCombine] remove casts from splat-a-bit pattern

https://alive2.llvm.org/ce/z/_AivbM

This case seems clear since we can reduce instruction count
and avoid an intermediate type change, but we might want to
use mask-and-compare for other sequences.

Currently, we can generate more instructions on some related
patterns by trying to use bit-hacks instead of mask+cmp, so
something is not behaving as expected.

3 years ago[WebAssembly] Convert to new "dylink.0" section format
Sam Clegg [Fri, 10 Sep 2021 11:21:28 +0000 (07:21 -0400)]
[WebAssembly] Convert to new "dylink.0" section format

This format is based on sub-sections (like the "linking" and "name"
sections) and is therefore easier to extend going forward.

spec change: https://github.com/WebAssembly/tool-conventions/pull/170
binaryen change: https://github.com/WebAssembly/binaryen/pull/4141
wabt change:  https://github.com/WebAssembly/wabt/pull/1707
emscripten change: https://github.com/emscripten-core/emscripten/pull/15019

Differential Revision: https://reviews.llvm.org/D109595

3 years ago[AArch64] Regenerate some test checks. NFC
David Green [Sun, 12 Sep 2021 11:13:29 +0000 (12:13 +0100)]
[AArch64] Regenerate some test checks. NFC

This regenerates some of the tests that had very-close-to-updated check
line already, in order to make them more maintainable.

3 years ago[OpenMP][MLIR] Add a conversion pattern for the master op
Kiran Chandramohan [Sun, 12 Sep 2021 10:13:14 +0000 (10:13 +0000)]
[OpenMP][MLIR] Add a conversion pattern for the master op

The conversion pattern is particularly useful for conversion of
block arguments in the master op.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D109610

3 years ago[Clang][AVR] Fix definitions on AVR target
Mara Sophie Grosch [Sat, 11 Sep 2021 17:26:32 +0000 (19:26 +0200)]
[Clang][AVR] Fix definitions on AVR target

Fix definitions for MCUs xmega16a4u and xmega128a4u to match avr-libc

Differential Revision: https://reviews.llvm.org/D109653

3 years ago[ORC] Temporarily remove the lljit-with-remote-debugging test.
Lang Hames [Sun, 12 Sep 2021 08:52:30 +0000 (18:52 +1000)]
[ORC] Temporarily remove the lljit-with-remote-debugging test.

This is broken now that llvm-jitlink-executor uses SimpleRemoteEPC.

The example will be updated to use SimpleRemoteEPC in a future commit.

3 years ago[ORC] Add bootstrap symbols to ExecutorProcessControl.
Lang Hames [Sun, 12 Sep 2021 08:38:57 +0000 (18:38 +1000)]
[ORC] Add bootstrap symbols to ExecutorProcessControl.

Bootstrap symbols are symbols whose addresses may be required to bootstrap
the rest of the JIT. The bootstrap symbols map generalizes the existing
JITDispatchInfo class provide an arbitrary map of symbol names to addresses.

The JITDispatchInfo class will be replaced by bootstrap symbols with reserved
names in upcoming commits.

3 years ago[ORC] Add OrcTargetProcess dependency on LLVM_PTHREAD_LIB
Lang Hames [Sun, 12 Sep 2021 08:17:06 +0000 (18:17 +1000)]
[ORC] Add OrcTargetProcess dependency on LLVM_PTHREAD_LIB

3 years ago[ORC] Add OrcShared dependency on LLVM_PTHREAD_LIB
Lang Hames [Sun, 12 Sep 2021 06:02:02 +0000 (16:02 +1000)]
[ORC] Add OrcShared dependency on LLVM_PTHREAD_LIB

3 years ago[ORC] Fix missing std::move
Lang Hames [Sun, 12 Sep 2021 05:27:19 +0000 (15:27 +1000)]
[ORC] Fix missing std::move

3 years ago[ORC] Fix out-of-range comparison errors.
Lang Hames [Sun, 12 Sep 2021 04:47:20 +0000 (14:47 +1000)]
[ORC] Fix out-of-range comparison errors.

3 years ago[ORC] Fix missing '&' in definition of deleted move-assignment.
Lang Hames [Sun, 12 Sep 2021 04:45:46 +0000 (14:45 +1000)]
[ORC] Fix missing '&' in definition of deleted move-assignment.

3 years ago[gn build] Port bb72f073808a
LLVM GN Syncbot [Sun, 12 Sep 2021 04:32:13 +0000 (04:32 +0000)]
[gn build] Port bb72f073808a

3 years agoRe-apply bb27e456435 and 5629afea910 with fixes.
Lang Hames [Sat, 11 Sep 2021 09:07:16 +0000 (19:07 +1000)]
Re-apply bb27e456435 and 5629afea910 with fixes.

This reapplies bb27e4564355243e479cab40885d6e0f7f640572 (SimpleRemoteEPC
support) and 2269a941a450a0d395161cfb792be58870b2875b (#include <mutex>
fix) with further fixes to support building with LLVM_ENABLE_THREADS=Off.

3 years ago[Vectorize] Fix "unused variable" warnings
Kazu Hirata [Sat, 11 Sep 2021 19:06:42 +0000 (12:06 -0700)]
[Vectorize] Fix "unused variable" warnings

3 years ago[clang] Enable the special enable_if_t diagnostics for libc++'s __enable_if_t as...
Arthur O'Dwyer [Wed, 8 Sep 2021 13:07:34 +0000 (09:07 -0400)]
[clang] Enable the special enable_if_t diagnostics for libc++'s __enable_if_t as well.

This comes from lengthy discussion between Quuxplusone and ldionne over on D108216.
Right now, libc++ uses a "SCARY metaprogramming" version of _EnableIf that bypasses
all of Clang's clever diagnostic stuff and thus produces bad diagnostics. My recent
benchmarks ( https://quuxplusone.github.io/blog/2021/09/04/enable-if-benchmark/ )
have determined that the SCARYness is not buying us any speedup; therefore we are
happy to drop it and go back to using the standard std::enable_if for all our
SFINAE needs. However, we don't want to type out typename std::enable_if<X>::type
all over the library; we want to use an alias template. And we can't use
std::enable_if_t because we need a solution that works in C++11, and we do not
provide std::enable_if_t in C++11.

Therefore, D109435 switches us from SCARY `_EnableIf` to a normal `__enable_if_t`
(at least in C++11 mode, and possibly everywhere for consistency).
Simultaneously, this Clang patch enables the good diagnostics for `__enable_if_t`.
We don't need to enable good diagnostics for `_EnableIf` because the name
`_EnableIf` has only ever been used for the SCARY version where the good diagnostics
don't trigger anyway.

(Btw, this existing code is all sorts of broken, theoretically speaking.
I filed https://bugs.llvm.org/show_bug.cgi?id=51696 about it last week.
So if someone wants to use this PR as an excuse to go down the rabbit hole
and fix it for real, that would be cool too.)

Differential Revision: https://reviews.llvm.org/D109411

3 years ago[libcxxabi] NFC: fix incorrect indentation of braces
Zhouyi Zhou [Sat, 11 Sep 2021 18:39:24 +0000 (13:39 -0500)]
[libcxxabi] NFC: fix incorrect indentation of braces

Some functions in cxa_exception_storage.cpp have incorrect indentation
of braces; fix them.
Original patch by Zhouyi Zhou <zhouzhouyi@gmail.com>

Also, remove a line of commented-out (and no-longer-possible-to-compile)
code. That thread-safe-static initialization of `init` was replaced
with the call to pthread_once directly above it, back in 2012.

Differential Revision: https://reviews.llvm.org/D109408

3 years ago[AArch64] Regenerate some test checks. NFC
David Green [Sat, 11 Sep 2021 18:39:28 +0000 (19:39 +0100)]
[AArch64] Regenerate some test checks. NFC

This regenerates some of the tests that had very-close-to-updated check
line already, in order to make them more maintainable.

3 years ago[LAA] Pass access type to getPtrStride()
Nikita Popov [Sat, 11 Sep 2021 17:00:37 +0000 (19:00 +0200)]
[LAA] Pass access type to getPtrStride()

Pass the access type to getPtrStride(), so it is not determined
from the pointer element type. Many cases still fetch the element
type at a higher level though, so this only partially addresses
the issue.

3 years ago[llvm-shlib] Fix the i686 MSVC triple check for listing symbols to export in LLVM...
Martin Storsjö [Thu, 9 Sep 2021 08:19:55 +0000 (08:19 +0000)]
[llvm-shlib] Fix the i686 MSVC triple check for listing symbols to export in LLVM-C.dll

https://reviews.llvm.org/D47381 / eb46c95c3e7aeba4d183ca614fe238067eddf97f
changed the triples set up by GetHostTriple.cmake for i686 MSVC
from i686-pc-win32 to i686-pc-windows-msvc without changing
the corresponding condition in llvm-shlib.

Since then, the 32 bit x86 build of LLVM-C.dll has contained no
exported symbols at all.

Differential Revision: https://reviews.llvm.org/D109493

3 years ago[InstCombine] update code/test comments; NFC
Sanjay Patel [Sat, 11 Sep 2021 14:52:00 +0000 (10:52 -0400)]
[InstCombine] update code/test comments; NFC

Follow-up for post-commit suggestion on:
28afaed691a0a7ca46bb9f64fac11

The comments were partly copied from the original
code, but not updated to match the new code.

3 years ago[ARM] Support neon.vld auto-upgrade with opaque pointers
Nikita Popov [Sat, 11 Sep 2021 14:33:19 +0000 (16:33 +0200)]
[ARM] Support neon.vld auto-upgrade with opaque pointers

This code manually constructs the intrinsic name, so we need to
use p0 instead of p0i8 in opaque pointer mode.

3 years ago[GlobalOpt] Use make_early_inc_range (NFC)
Kazu Hirata [Sat, 11 Sep 2021 14:23:21 +0000 (07:23 -0700)]
[GlobalOpt] Use make_early_inc_range (NFC)

3 years ago[InstCombine] fold sub of min/max intrinsics with invertible ops
Sanjay Patel [Sat, 11 Sep 2021 13:18:46 +0000 (09:18 -0400)]
[InstCombine] fold sub of min/max intrinsics with invertible ops

This is a translation of the existing code to handle the intrinsics
and another step towards D98152.

https://alive2.llvm.org/ce/z/jA7eBC

This pattern is already handled by underlying folds if there are
less uses, so the minimal tests in this case have extra uses.

The larger cmyk tests show the motivation - when combined with
other folds, we invert a larger sequence and eliminate 'not' ops.

3 years ago[LLDB] Skip TestDyldLaunchLinux.py on Arm/Linux
Muhammad Omair Javaid [Sat, 11 Sep 2021 11:18:20 +0000 (16:18 +0500)]
[LLDB] Skip TestDyldLaunchLinux.py on Arm/Linux

TestDyldLaunchLinux.py has been recently added and is failing on LLDB
Arm/Linux buildbot. I am marking it skip till I come back and look at
it in more detail.

3 years ago[BitcodeReader] Delay select until all constants resolved
guopeilin [Sat, 11 Sep 2021 10:50:30 +0000 (18:50 +0800)]
[BitcodeReader] Delay select until all constants resolved

Like the shuffle, we should treat the select delayed so that
all constants can be resolved.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D109053

3 years ago[X86][SLM] Fix PSAD/MPSAD uops, latency and throughput
Simon Pilgrim [Sat, 11 Sep 2021 10:11:37 +0000 (11:11 +0100)]
[X86][SLM] Fix PSAD/MPSAD uops, latency and throughput

Noticed while trying to improve generic reduction costs via the D103695 helper script. Confirmed with Intel AoM / Agner / InstLatX64.

3 years ago[X86][SLM] Fix HADD/HSUB uops, latency and throughput
Simon Pilgrim [Tue, 7 Sep 2021 21:30:21 +0000 (22:30 +0100)]
[X86][SLM] Fix HADD/HSUB uops, latency and throughput

Noticed while trying to improve generic reduction costs via the D103695 helper script. Confirmed with Intel AoM / Agner / InstLatX64.

3 years ago[X86][SLM] Swap LoadLat and LoadUOps in the SLMWriteResPair<> helper. NFC.
Simon Pilgrim [Tue, 7 Sep 2021 20:51:52 +0000 (21:51 +0100)]
[X86][SLM] Swap LoadLat and LoadUOps in the SLMWriteResPair<> helper. NFC.

We set the LoadUOps argument a lot more frequently that LoadLat, by swapping them we can simplify a number of declarations.

3 years ago[X86] Support *_set1_pch(Float16 _Complex h)
Wang, Pengfei [Sat, 11 Sep 2021 09:45:30 +0000 (17:45 +0800)]
[X86] Support *_set1_pch(Float16 _Complex h)

Reviewed By: LuoYuanke

Differential Revision: https://reviews.llvm.org/D109487

3 years ago[gn build] Port 2269a941a450
LLVM GN Syncbot [Sat, 11 Sep 2021 09:02:52 +0000 (09:02 +0000)]
[gn build] Port 2269a941a450

3 years agoRevert 5629afea910 and bb27e456435 while I look into bot failures.
Lang Hames [Sat, 11 Sep 2021 08:58:30 +0000 (18:58 +1000)]
Revert 5629afea910 and bb27e456435 while I look into bot failures.

This reverts commit 5629afea9109d3b72064cbe70e1ca91ffb9dc0a2 ("[ORC] Add missing
include."), and bb27e4564355243e479cab40885d6e0f7f640572 ("[ORC] Add
SimpleRemoteEPC: ExecutorProcessControl over SPS + abstract transport.").

The SimpleRemoteEPC patch currently assumes availability of threads, and needs
to be rewritten with LLVM_ENABLE_THREADS guards.

3 years ago[gn build] Port bb27e4564355
LLVM GN Syncbot [Sat, 11 Sep 2021 08:51:51 +0000 (08:51 +0000)]
[gn build] Port bb27e4564355

3 years ago[ORC] Add missing include.
Lang Hames [Sat, 11 Sep 2021 08:51:16 +0000 (18:51 +1000)]
[ORC] Add missing include.

3 years ago[ORC] Add SimpleRemoteEPC: ExecutorProcessControl over SPS + abstract transport.
Lang Hames [Tue, 7 Sep 2021 23:24:45 +0000 (09:24 +1000)]
[ORC] Add SimpleRemoteEPC: ExecutorProcessControl over SPS + abstract transport.

SimpleRemoteEPC is an ExecutorProcessControl implementation (with corresponding
new server class) that uses ORC SimplePackedSerialization (SPS) to serialize and
deserialize EPC-messages to/from byte-buffers. The byte-buffers are sent and
received via a new SimpleRemoteEPCTransport interface that can be implemented to
run SimpleRemoteEPC over whatever underlying transport system (IPC, RPC, network
sockets, etc.) best suits your use case.

The SimpleRemoteEPCServer class provides executor-side support. It uses a
customizable SimpleRemoteEPCServer::Dispatcher object to dispatch wrapper
function calls to prevent the RPC thread from being blocked (a problem in some
earlier remote-JIT server implementations). Almost all functionality (beyond the
bare basics needed to bootstrap) is implemented as wrapper functions to keep the
implementation simple and uniform.

Compared to previous remote JIT utilities (OrcRemoteTarget*,
OrcRPCExecutorProcessControl), more consideration has been given to
disconnection and error handling behavior: Graceful disconnection is now always
initiated by the ORC side of the connection, and failure at either end (or in
the transport) will result in Errors being delivered to both ends to enable
controlled tear-down of the JIT and Executor (in the Executor's case this means
"as controlled as the JIT'd code allows").

The introduction of SimpleRemoteEPC will allow us to remove other remote-JIT
support from ORC (including the legacy OrcRemoteTarget* code used by lli, and
the OrcRPCExecutorProcessControl and OrcRPCEPCServer classes), and then remove
ORC RPC itself.

The llvm-jitlink and llvm-jitlink-executor tools have been updated to use
SimpleRemoteEPC over file descriptors. Future commits will move lli and other
tools and example code to this system, and remove ORC RPC.

3 years agoFix python 2-vs-3 issues in add_new_check.py and rename_check.py
Matt Beardsley [Sat, 11 Sep 2021 07:52:47 +0000 (09:52 +0200)]
Fix python 2-vs-3 issues in add_new_check.py and rename_check.py

As of this commit:
  https://github.com/llvm/llvm-project/commit/307b1fdd

If either of those scripts are invoked with python 2, neither works due to:
  "TypeError: write() argument 1 must be unicode, not str"

And if rename_check.py is invoked with python 3:
  "ValueError: binary mode doesn't take an encoding argument"
(referring to `with io.open(filename, 'wb', encoding='utf8') as f:`), and

Another issue in rename_check.py in python 2:
  "TypeError: list object is not an iterator"
(referring to `next(filter( ... os.listdir(old_module_path)))`)

(so, rename_check doesn't work with either 2 or 3, and add_new_check
doesn't work with 2, but does work with 3)

I ran these steps to test both python versions:
(manually - appears to be the "status quo" for these files)

  python3 clang-tools-extra/clang-tidy/add_new_check.py readability ggggg
  python3 clang-tools-extra/clang-tidy/rename_check.py readability-ggggg readability-hhhhh

  git checkout HEAD -- clang-tools-extra/clang-tidy/readability/CMakeLists.txt clang-tools-extra/clang-tidy/readability/ReadabilityTidyModule.cpp clang-tools-extra/docs/ReleaseNotes.rst clang-tools-extra/docs/clang-tidy/checks/list.rst
  rm -f clang-tools-extra/clang-tidy/readability/GggggCheck.cpp clang-tools-extra/clang-tidy/readability/GggggCheck.h clang-tools-extra/docs/clang-tidy/checks/readability-ggggg.rst clang-tools-extra/test/clang-tidy/checkers/readability-ggggg.cpp clang-tools-extra/clang-tidy/readability/HhhhhCheck.cpp clang-tools-extra/clang-tidy/readability/HhhhhCheck.h clang-tools-extra/docs/clang-tidy/checks/readability-hhhhh.rst

  python2 clang-tools-extra/clang-tidy/add_new_check.py readability ggggg
  python2 clang-tools-extra/clang-tidy/rename_check.py readability-ggggg readability-hhhhh

  git checkout HEAD -- clang-tools-extra/clang-tidy/readability/CMakeLists.txt clang-tools-extra/clang-tidy/readability/ReadabilityTidyModule.cpp clang-tools-extra/docs/ReleaseNotes.rst clang-tools-extra/docs/clang-tidy/checks/list.rst
  rm -f clang-tools-extra/clang-tidy/readability/GggggCheck.cpp clang-tools-extra/clang-tidy/readability/GggggCheck.h clang-tools-extra/docs/clang-tidy/checks/readability-ggggg.rst clang-tools-extra/test/clang-tidy/checkers/readability-ggggg.cpp clang-tools-extra/clang-tidy/readability/HhhhhCheck.cpp clang-tools-extra/clang-tidy/readability/HhhhhCheck.h clang-tools-extra/docs/clang-tidy/checks/readability-hhhhh.rst

Reviewed By: kbobyrev

Differential Revision: https://reviews.llvm.org/D109127

3 years ago[AArch64][GlobalISel] Select full-fp16 s16 G_FCONSTANT as a constant pool load
Jessica Paquette [Mon, 30 Aug 2021 23:36:47 +0000 (16:36 -0700)]
[AArch64][GlobalISel] Select full-fp16 s16 G_FCONSTANT as a constant pool load

When we have full-fp16 support, we should (manually select) s16 G_FCONSTANT to
a constant pool load.

Add support for that to `emitLoadFromConstantPool` + the existing constant
selection code.

Also tidy up the constant selection code a little. There were some out-of-date
comments + some dead code.

Differential Revision: https://reviews.llvm.org/D108957

3 years ago[llvm-cov] Add error for invalid -path-equivalence format
Keith Smiley [Wed, 1 Sep 2021 05:35:44 +0000 (22:35 -0700)]
[llvm-cov] Add error for invalid -path-equivalence format

Differential Revision: https://reviews.llvm.org/D109042

3 years ago[JITLink] Working memory shouldn't be subject to alignment constraints.
Lang Hames [Wed, 8 Sep 2021 12:30:08 +0000 (22:30 +1000)]
[JITLink] Working memory shouldn't be subject to alignment constraints.

Refactors copyBlockContentToWorkingMemory to use offsets rather than direct
pointers to working memory. This simplifies the problem of maintaining
alignments between blocks in working memory, without requiring the working
memory itself to be aligned.

3 years ago[ORC] Fix missing newline in debugging output.
Lang Hames [Tue, 7 Sep 2021 11:41:39 +0000 (21:41 +1000)]
[ORC] Fix missing newline in debugging output.

3 years ago[ORC] Merge LLVMSPSSerializers.h into SimplePackedSerialization.h.
Lang Hames [Mon, 6 Sep 2021 00:02:56 +0000 (10:02 +1000)]
[ORC] Merge LLVMSPSSerializers.h into SimplePackedSerialization.h.

Since the ORC runtime and LLVM are no longer sharing SPS code (the ORC runtime
has its own copy) there is no reason to keep these separate.

3 years ago[ORC] Use EPC for EPCGeneric MemoryAccess / JITLinkMemoryManager construction.
Lang Hames [Sun, 5 Sep 2021 08:29:05 +0000 (18:29 +1000)]
[ORC] Use EPC for EPCGeneric MemoryAccess / JITLinkMemoryManager construction.

This allows these classes to be created during EPC construction, before an
ExecutionSession is available.

3 years agoRevert "Revert "[AArch64][SVE][InstCombine] Canonicalize aarch64_sve_dup_x intrinsic...
Usman Nadeem [Sat, 11 Sep 2021 00:57:29 +0000 (17:57 -0700)]
Revert "Revert "[AArch64][SVE][InstCombine] Canonicalize aarch64_sve_dup_x intrinsic to IR splat operation""

This reverts commit eee7d225ded98f42d37c05ec292bbb18560ce06b.
Effectively relanding 98c37247d81dfc967ecc49eee7a15612b6510f67
after fixing the failing tests.

Change-Id: I5d7461aeb820a2d5f1895457d824a8de4d316ee5

3 years agonullptr initialize variables, spotted on msan bots.
Eric Christopher [Sat, 11 Sep 2021 01:10:16 +0000 (18:10 -0700)]
nullptr initialize variables, spotted on msan bots.

3 years ago[docs] Improve description of LLVM_BUILD_TESTS
Keith Smiley [Thu, 2 Sep 2021 00:20:13 +0000 (17:20 -0700)]
[docs] Improve description of LLVM_BUILD_TESTS

This makes it clear that this only has an effect if you use the all
build target.

Differential Revision: https://reviews.llvm.org/D109113

3 years agoRecognize namespaced all_image_infos symbol name from dyld
Jason Molenda [Fri, 10 Sep 2021 23:56:48 +0000 (16:56 -0700)]
Recognize namespaced all_image_infos symbol name from dyld

In macOS 12, the symbol name for the dyld_all_image_infos struct
in dyld has a namespace qualifier.  Search for it without qualification,
then with qualification when doing a by-name search.  (lldb will
only search for it by name when loading a user process Mach-O corefile)

rdar://76270013

3 years ago[clang-format] Restrict the special handling for K&R C to C/C++
owenca [Fri, 10 Sep 2021 08:03:01 +0000 (01:03 -0700)]
[clang-format] Restrict the special handling for K&R C to C/C++

Commits 58494c856a15f6bc614546e1, and 0fc27ef19670 added special
handlings for K&R C function definitions and caused some
JavaScript/TypeScript regressions which were addressed in D107267,
D108538, and D108620. This patch would have prevented these known
regressions and will fix any unknown ones.

Differential Revision: https://reviews.llvm.org/D109582

3 years ago[OpenMP] Add flag for setting debug in the offloading device
Joseph Huber [Thu, 9 Sep 2021 20:40:59 +0000 (16:40 -0400)]
[OpenMP] Add flag for setting debug in the offloading device

This patch introduces the flags `-fopenmp-target-debug` and
`-fopenmp-target-debug=` to set the value of a global in the device.
This will be used to enable or disable debugging features statically in
the device runtime library.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D109544

3 years ago[OpenMP] Add more verbose remarks for runtime folding
Joseph Huber [Fri, 10 Sep 2021 20:17:54 +0000 (16:17 -0400)]
[OpenMP] Add more verbose remarks for runtime folding

We peform runtime folding, but do not currently emit remarks when it is
performed. This is because it comes from the runtime library and is
beyond the users control. However, people may still wish to view  this
and similar information easily, so we can enable this behaviour using a
special flag to enable verbose remarks.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D109627

3 years ago[lldb] Remove unused typedefs from lldb-forward.h
Alex Langford [Fri, 10 Sep 2021 20:37:39 +0000 (13:37 -0700)]
[lldb] Remove unused typedefs from lldb-forward.h

3 years ago[OpenMP][libomptarget] Add __tgt_target_return_t enum for __tgt_target_XXX return int
Ye Luo [Mon, 6 Sep 2021 05:55:30 +0000 (00:55 -0500)]
[OpenMP][libomptarget] Add __tgt_target_return_t enum for __tgt_target_XXX return int

The defintion of OFFLOAD_SUCCESS and OFFLOAD_FAIL used in plugin APIs and libomptarget public APIs are not consistent.
Create __tgt_target_return_t for libomptarget public APIs.

Differential Revision: https://reviews.llvm.org/D109304

3 years agoReapply "[OpenMP] Group side-effects to improve guarding efficiency"
Johannes Doerfert [Fri, 10 Sep 2021 19:09:10 +0000 (14:09 -0500)]
Reapply "[OpenMP] Group side-effects to improve guarding efficiency"

This reapplies ca134c3963d310c2868f08c211011d610b4eefb5, effectively
reverting commit d2f206e0afeba2b08a42903cfb8ad97a7de8a92c.

Minor test changes to make the test pass.

3 years agoReapply "[GlobalOpt][FIX] Do not embed initializers into AS!=0 globals""
Johannes Doerfert [Fri, 10 Sep 2021 18:44:41 +0000 (13:44 -0500)]
Reapply "[GlobalOpt][FIX] Do not embed initializers into AS!=0 globals""

This reapplies commit 7dbba3376f633cabcf4df568bc9ca95f44a35203, or, put
differently, this reverts commit d9a8d20827dcddad831751bc38ff178e70f0b2f5.

The test now requires the amdgpu and nvptx backend explicitly as it
won't work without properly.

3 years ago[mlir][tosa] Add shape inference for tosa.while
Rob Suderman [Fri, 27 Aug 2021 02:21:29 +0000 (19:21 -0700)]
[mlir][tosa] Add shape inference for tosa.while

Tosa.while shape inference requires repeatedly running shape inference across
the body of the loop until the types become static as we do not know the number
of iterations required by the loop body. Once the least specific arguments are
known they are propagated to both regions.

To determine the final end type, the least restrictive types are determined
from all yields.

Differential Revision: https://reviews.llvm.org/D108801

3 years ago[ARC] Improve code generated for i32 ADDC/ADDE and SUBC/SUBE
Mark Schimmel [Fri, 10 Sep 2021 20:01:51 +0000 (13:01 -0700)]
[ARC] Improve code generated for i32 ADDC/ADDE and SUBC/SUBE
This change improves the code generated for long long addition and subtraction

Differential Revision: https://reviews.llvm.org/D109615

3 years agoRevert "[AArch64][SVE][InstCombine] Canonicalize aarch64_sve_dup_x intrinsic to IR...
Usman Nadeem [Fri, 10 Sep 2021 20:01:48 +0000 (13:01 -0700)]
Revert "[AArch64][SVE][InstCombine] Canonicalize aarch64_sve_dup_x intrinsic to IR splat operation"

This reverts commit 98c37247d81dfc967ecc49eee7a15612b6510f67.

3 years ago[AArch64][SVE][InstCombine] Canonicalize aarch64_sve_dup_x intrinsic to IR splat...
Usman Nadeem [Fri, 10 Sep 2021 19:22:40 +0000 (12:22 -0700)]
[AArch64][SVE][InstCombine] Canonicalize aarch64_sve_dup_x intrinsic to IR splat operation

Differential Revision: https://reviews.llvm.org/D109118

Change-Id: I47adc1984a54bea02bf5a0a767b765afe7e16aa3

3 years ago[clang][deps] Move tests to the Clang subdirectory
Jan Svoboda [Fri, 10 Sep 2021 19:36:49 +0000 (21:36 +0200)]
[clang][deps] Move tests to the Clang subdirectory

3 years ago[InstCombine] add tests for sub of min/max intrinsics; NFC
Sanjay Patel [Fri, 10 Sep 2021 17:01:45 +0000 (13:01 -0400)]
[InstCombine] add tests for sub of min/max intrinsics; NFC

3 years ago[OpenMP] Check OpenMP assumptions on call-sites as well
Joseph Huber [Fri, 10 Sep 2021 18:11:18 +0000 (14:11 -0400)]
[OpenMP] Check OpenMP assumptions on call-sites as well

This patch adds functionality to check assumption attributes on call
sites as well.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D109376

3 years ago[OpenMP] Make CUDA math library functions SPMD amenable
Joseph Huber [Mon, 30 Aug 2021 23:52:48 +0000 (19:52 -0400)]
[OpenMP] Make CUDA math library functions SPMD amenable

This patch adds the SPMD amenable assumption to the CUDA math library
defintions in Clang. Previously these functions would block SPMD
execution on the device because they're intrinsic calls into the library
and can't be calculated. These functions don't have side-effects so they
are safe to execute in SPMD mode.

Depends on D105937

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D108958

3 years ago[libc] Add extension functions fedisableexcept, feenableexcept and fegetexcept.
Siva Chandra Reddy [Thu, 9 Sep 2021 19:11:54 +0000 (19:11 +0000)]
[libc] Add extension functions fedisableexcept, feenableexcept and fegetexcept.

Reviewed By: michaelrj

Differential Revision: https://reviews.llvm.org/D109613

3 years ago[hwasan] Do not instrument accesses to uninteresting allocas.
Florian Mayer [Thu, 9 Sep 2021 09:09:26 +0000 (10:09 +0100)]
[hwasan] Do not instrument accesses to uninteresting allocas.

This leads to a statistically significant improvement when using -hwasan-instrument-stack=0: https://bit.ly/3AZUIKI.
When enabling stack instrumentation, the data appears gets better but not statistically significantly so. This is consistent
with the very moderate improvements I have seen for stack safety otherwise, so I expect it to improve when the underlying
issue of that is resolved.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D108457

3 years ago[Sanitizers] intercept netent, protoent and mincore on FreeBSD.
David Carlier [Fri, 10 Sep 2021 18:23:14 +0000 (19:23 +0100)]
[Sanitizers] intercept netent, protoent and mincore on FreeBSD.
netent on Linux in addition as well.

Reviewd By: vitalybuka

Differential Revision: https://reviews.llvm.org/D109287

3 years ago[stack-safety] Allow to determine safe accesses.
Florian Mayer [Fri, 10 Sep 2021 08:49:07 +0000 (09:49 +0100)]
[stack-safety] Allow to determine safe accesses.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D109503

3 years ago[clang] Fix typo in test from a723310b4
Nico Weber [Fri, 10 Sep 2021 18:13:42 +0000 (14:13 -0400)]
[clang] Fix typo in test from a723310b4

We want the driver-level flag here, else the test passes for the wrong reasons.
See comments on https://reviews.llvm.org/D99901.

3 years ago[CodeGen, Target] Use pred_empty and succ_empty (NFC)
Kazu Hirata [Fri, 10 Sep 2021 18:11:31 +0000 (11:11 -0700)]
[CodeGen, Target] Use pred_empty and succ_empty (NFC)

3 years ago[lldb] Add support for debugging via the dynamic linker.
Rumeet Dhindsa [Fri, 10 Sep 2021 17:59:31 +0000 (10:59 -0700)]
[lldb] Add support for debugging via the dynamic linker.

This patch adds support for shared library load when the executable is
called through ld.so.

Differential Revision:https://reviews.llvm.org/D108061

3 years ago[clang] `aligned_alloc` allocation function specifies alignment in first arg, manifes...
Roman Lebedev [Fri, 10 Sep 2021 17:20:10 +0000 (20:20 +0300)]
[clang] `aligned_alloc` allocation function specifies alignment in first arg, manifest that knowledge

Mainly, if a constant value was passed as an alignment,
then we correctly annotate the alignment of the returned value
of @aligned_alloc. And if it wasn't constant,
then we also don't loose that, but emit an assumption.

3 years ago[NFCI][clang] Move allocation alignment manifestation for malloc-like into Sema from...
Roman Lebedev [Fri, 10 Sep 2021 16:35:38 +0000 (19:35 +0300)]
[NFCI][clang] Move allocation alignment manifestation for malloc-like into Sema from Codegen

... so that it happens right next to `AddKnownFunctionAttributesForReplaceableGlobalAllocationFunction()`,
which is good for consistency.

3 years ago[NFC][clang] Improve test coverage for alignment manifestation on aligned allocation...
Roman Lebedev [Fri, 10 Sep 2021 16:35:31 +0000 (19:35 +0300)]
[NFC][clang] Improve test coverage for alignment manifestation on aligned allocation functions

3 years ago[AArch64ISelLowering] Fix null pointer access in performSVEAndCombine.
Huihui Zhang [Fri, 10 Sep 2021 17:18:04 +0000 (10:18 -0700)]
[AArch64ISelLowering] Fix null pointer access in performSVEAndCombine.

When combining 'and' of an unsigned unpack and shuffle instruction,
bail early if shuffle is not constructed from a constant integer.

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D109556

3 years ago[openmp][amdgpu] Update SupportAndFAQ docs
Jon Chesterfield [Fri, 10 Sep 2021 17:35:29 +0000 (18:35 +0100)]
[openmp][amdgpu] Update SupportAndFAQ docs

3 years ago[AggressiveInstCombine] Add `udiv` and `urem` instrs to TruncInstCombine DAG
Anton Afanasyev [Tue, 7 Sep 2021 10:16:55 +0000 (13:16 +0300)]
[AggressiveInstCombine] Add `udiv` and `urem` instrs to TruncInstCombine DAG

Add `udiv` and `urem` instructions to the DAG post-dominated by `trunc`,
allowing TruncInstCombine to reduce bitwidth of expressions containing these
instructions. It is sufficient to require that all truncated bits of both
operands are zeros: https://alive2.llvm.org/ce/z/yiithn
(`urem` case is identical).

Differential Revision: https://reviews.llvm.org/D109515

3 years ago[Test][AggressiveInstCombine] Add test for `udiv` and `urem`
Anton Afanasyev [Thu, 9 Sep 2021 13:52:24 +0000 (16:52 +0300)]
[Test][AggressiveInstCombine] Add test for `udiv` and `urem`

Precommit test for D109515

3 years agoRevert "[OpenMP] Group side-effects to improve guarding efficiency"
Johannes Doerfert [Fri, 10 Sep 2021 17:24:00 +0000 (12:24 -0500)]
Revert "[OpenMP] Group side-effects to improve guarding efficiency"

This reverts commit ca134c3963d310c2868f08c211011d610b4eefb5.

There seems to be a problem with the tests, investigating now:
  https://lab.llvm.org/buildbot/#/builders/61/builds/14574

3 years agoRevert "[GlobalOpt][FIX] Do not embed initializers into AS!=0 globals"
Johannes Doerfert [Fri, 10 Sep 2021 17:23:08 +0000 (12:23 -0500)]
Revert "[GlobalOpt][FIX] Do not embed initializers into AS!=0 globals"

This reverts commit 7dbba3376f633cabcf4df568bc9ca95f44a35203.

There seems to be a problem with the tests, investigating now:
  https://lab.llvm.org/buildbot/#/builders/61/builds/14574

3 years ago[OpenMP][Docs] Remove old/outdated webpage
Johannes Doerfert [Mon, 23 Aug 2021 21:55:14 +0000 (16:55 -0500)]
[OpenMP][Docs] Remove old/outdated webpage

This should have happened a long time ago, now that openmp.llvm.org
redirects to openmp.llvm.org/docs we completely switched over to the
sphinx documentation page instead.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D108588

3 years ago[OpenMP] Encode `omp [...] assume[...]` assumptions with `omp[x]` prefix
Johannes Doerfert [Tue, 13 Jul 2021 20:35:58 +0000 (15:35 -0500)]
[OpenMP] Encode `omp [...] assume[...]` assumptions with `omp[x]` prefix

Since these assumptions are coming from OpenMP it makes sense to mark
them as such in the generic IR encoding. Standardized assumptions will
be named
  omp_ASSUMPTION_NAME
and extensions will be named
  ompx_ASSUMPTION_NAME
which is the OpenMP 5.2 syntax for "extensions" of any kind.

This also matches what the OpenMP-Opt pass expects.

Summarized,
  #pragma omp [...] assume[s] no_parallelism
now generates the same IR assumption annotation as
  __attribute__((assume("omp_no_parallelism")))

Reviewed By: jhuber6

Differential Revision: https://reviews.llvm.org/D105937

3 years ago[GlobalOpt][FIX] Do not embed initializers into AS!=0 globals
Johannes Doerfert [Thu, 2 Sep 2021 19:12:22 +0000 (14:12 -0500)]
[GlobalOpt][FIX] Do not embed initializers into AS!=0 globals

Not all address spaces support initializers for globals and we can
therefore not set them without checking if they are allowed. This
patch adds a hook into TTI to check if an AS allows non-undef
initializers. We disable it for all but address space 0 by default,
NVPTX and AMDGPU targets allow all but address space 3.

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D109337

3 years ago[OpenMP] Group side-effects to improve guarding efficiency
Johannes Doerfert [Wed, 11 Aug 2021 05:03:42 +0000 (00:03 -0500)]
[OpenMP] Group side-effects to improve guarding efficiency

When we guard side-effects as part of SPMDzation we do it for
consecutive instructions that need guarding. This patch will try to
reorder guarded side-effects in a block to decrease the number of
guarded regions we need. It does not use any smarts, e.g., alias
analysis, to move side-effects over non-interfering reads. Instead,
it only moves side-effects downwards to the next guarded side-effect
if there was nothing in between that could have possibly be affected.

Reviewed By: ggeorgakoudis

Differential Revision: https://reviews.llvm.org/D109070

3 years ago[ARM] Remove unused tblgen arguments. NFC
David Green [Fri, 10 Sep 2021 17:03:54 +0000 (18:03 +0100)]
[ARM] Remove unused tblgen arguments. NFC

As per D109359, this removes or makes use of some of the existing unused
NEON and base ARM tblgn arguments.

3 years ago[CallLowering] Support opaque pointers
Nikita Popov [Fri, 10 Sep 2021 16:13:08 +0000 (18:13 +0200)]
[CallLowering] Support opaque pointers

Always use the byval/inalloca/preallocated type (which is required
nowadays), don't fall back on the pointer element type.

This requires adding Function::getParamPreallocatedType() to
mirror the CallBase API, so that the templated code can work with
both.

3 years ago[IR] Remove unused parameter (NFC)
Nikita Popov [Fri, 10 Sep 2021 16:15:40 +0000 (18:15 +0200)]
[IR] Remove unused parameter (NFC)

3 years ago[RISCV] Enable CGP to sink splat operands of Add/Sub/Mul/Shl/LShr/AShr
Craig Topper [Fri, 10 Sep 2021 16:03:59 +0000 (09:03 -0700)]
[RISCV] Enable CGP to sink splat operands of Add/Sub/Mul/Shl/LShr/AShr

LICM may have pulled out a splat, but with .vx instructions we
can fold it into an operation.

This patch enables CGP to reverse the LICM transform and move the
splat back into the loop.

I've started with the commutable integer operations and shifts, but we can
extend this with more operations in future patches.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D109394

3 years ago[RISCV] Teach vsetvli insertion that stores don't use the policy bits in vtype.
Craig Topper [Thu, 9 Sep 2021 22:17:51 +0000 (15:17 -0700)]
[RISCV] Teach vsetvli insertion that stores don't use the policy bits in vtype.

This can avoid a vsetvl after a tail undisturbed operation.

Differential Revision: https://reviews.llvm.org/D109549