Mike Blumenkrantz [Sat, 12 Dec 2020 06:45:29 +0000 (01:45 -0500)]
zink: create separate vk image/buffer objects for shader image use
the STORAGE_TEXEL and STORAGE_IMAGE bits can't be accurately applied due
to opengl allowing all resources to be used everywhere, so instead we can
create a separate object on demand which is used only by shaders and gets
extra barriers inferred along with the base object to avoid desync whenever
it is used
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9788>
Mike Blumenkrantz [Mon, 30 Nov 2020 17:36:24 +0000 (12:36 -0500)]
zink: break out barrier struct initializing into helper funcs
make this and the no-op handling reusable for future extension
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9788>
Mike Blumenkrantz [Mon, 30 Nov 2020 17:27:24 +0000 (12:27 -0500)]
zink: reorder barrier util functions to set up barrier struct before batch
no functional changes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9788>
Mike Blumenkrantz [Thu, 24 Dec 2020 01:15:22 +0000 (20:15 -0500)]
zink: make descriptor state invalidate public
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9788>
Mike Blumenkrantz [Sat, 12 Dec 2020 05:40:19 +0000 (00:40 -0500)]
zink: break out image/buffer create info structs into helper funcs
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9788>
Mike Blumenkrantz [Thu, 10 Dec 2020 21:49:13 +0000 (16:49 -0500)]
zink: fix format support detection for storage texel buffers and shader images
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9788>
Mike Blumenkrantz [Fri, 27 Nov 2020 14:47:10 +0000 (09:47 -0500)]
zink: reset all fences when waiting on batch state
at this point we know all the states are available, so we can shortcut
future state-finding
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9787>
Mike Blumenkrantz [Fri, 27 Nov 2020 14:37:24 +0000 (09:37 -0500)]
zink: stall when we start getting a lot of uncompleted batches
temporary oom handling, though it's unrealistic for this to be hit
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9787>
Mike Blumenkrantz [Mon, 29 Mar 2021 01:27:44 +0000 (21:27 -0400)]
zink: use correct surface ref function for context destroy
the regular surface reference function can never be used in the driver
if it is possible that a surface may be destroyed, as this may reference
a previously-destroyed context
Fixes:
92a5ea13fcd ("zink: implement a global framebuffer cache")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9787>
Mike Blumenkrantz [Wed, 16 Dec 2020 17:02:51 +0000 (12:02 -0500)]
zink: only do shader updates when relevant stages are dirty
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9792>
Mike Blumenkrantz [Mon, 22 Mar 2021 19:45:37 +0000 (15:45 -0400)]
lavapipe: fix array texture region copies
these need to use different struct members for copying array textures
the buffer2image variants are already doing the right thing
Fixes:
b38879f8c5f ("vallium: initial import of the vulkan frontend")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9761>
Mike Blumenkrantz [Mon, 22 Mar 2021 19:34:18 +0000 (15:34 -0400)]
zink: also fix image buffer layer copying
this differs based on image type
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9759>
Mike Blumenkrantz [Mon, 22 Mar 2021 19:16:06 +0000 (15:16 -0400)]
zink: fix handling for image types in resource_copy_region hook
different image types are supposed to use different members of this struct
to indicate layer copies, and this can't necessarily be inferred by checking
array_size
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9759>
Mike Blumenkrantz [Fri, 26 Mar 2021 18:04:16 +0000 (14:04 -0400)]
lavapipe: remove lvp_descriptor_update_template::descriptor_set_layout
this wasn't used and caused crashes when running with validation enabled
due to violating spec:
This parameter is ignored if templateType is not VK_DESCRIPTOR_UPDATE_TEMPLATE_TYPE_DESCRIPTOR_SET
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9861>
Mike Blumenkrantz [Fri, 26 Mar 2021 12:09:26 +0000 (08:09 -0400)]
lavapipe: ignore templateType when descriptor template isn't for push descriptors
spec compliance requires this and validation may crash without it
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9853>
Gert Wollny [Sat, 27 Mar 2021 16:42:04 +0000 (17:42 +0100)]
r600/sfn: make allocate_temp_register private to valuepool
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9874>
Gert Wollny [Sat, 27 Mar 2021 16:41:34 +0000 (17:41 +0100)]
r600/sfn: use get_temp_vec4 directly when fetching
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9874>
Gert Wollny [Sat, 27 Mar 2021 16:41:02 +0000 (17:41 +0100)]
r600/sfn: clean up value pool interface usage in emit_stream
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9874>
Gert Wollny [Sat, 27 Mar 2021 16:40:28 +0000 (17:40 +0100)]
r600/sfn: clean up multi-sample texture load
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9874>
Gert Wollny [Sat, 27 Mar 2021 16:15:03 +0000 (17:15 +0100)]
r600/sfn: remove find_msb lowering in driver
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9874>
Gert Wollny [Mon, 22 Mar 2021 07:18:52 +0000 (08:18 +0100)]
r600/sfn: force dual source blend output handling in some cases
If an output has a dual source index > 0 then we need to emit both
outputs, even if the number of outputs is larger than the number
of active outputs.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9874>
Gert Wollny [Sun, 21 Mar 2021 22:43:23 +0000 (23:43 +0100)]
r600/sfn: remove old deref code
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9874>
Gert Wollny [Sun, 21 Mar 2021 21:45:06 +0000 (22:45 +0100)]
r600/sfn: lowered FS output IO
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9874>
Gert Wollny [Sun, 21 Mar 2021 19:48:19 +0000 (20:48 +0100)]
r600/sfn: lower VS IO and drop old deref code
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9874>
Gert Wollny [Sun, 21 Mar 2021 18:50:02 +0000 (19:50 +0100)]
r600/sfn: drop the local register mep
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9874>
Gert Wollny [Sun, 21 Mar 2021 17:50:36 +0000 (18:50 +0100)]
r600/sfn: switch assembler creation to use visitor
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9874>
Gert Wollny [Mon, 15 Mar 2021 08:22:38 +0000 (09:22 +0100)]
r600/sfn: fix some formatting
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9874>
Gert Wollny [Sun, 14 Mar 2021 16:05:24 +0000 (17:05 +0100)]
r600/sfn: remove extra parameter from alu assemebly emission
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9874>
Gert Wollny [Tue, 2 Feb 2021 12:45:50 +0000 (13:45 +0100)]
r600/sfn: Add skelton for visitor pattern
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9874>
Gert Wollny [Sun, 21 Mar 2021 16:48:12 +0000 (17:48 +0100)]
r600/sfn: Make some value pool functions private
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9874>
Rob Clark [Sun, 21 Mar 2021 18:08:14 +0000 (11:08 -0700)]
util/primconvert: Handle indirect and multi-draw
Indirect handling was completely missing. And even though we have to
emulate multi-draw, this pushes it out of the fast/hot path in the
driver's draw_vbo()
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9742>
Rob Clark [Sun, 21 Mar 2021 17:37:40 +0000 (10:37 -0700)]
freedreno: Don't handle multi-draw in indirect case
num_draws is only applicable to direct draws, so we can simplify things
a bit.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9742>
Rob Clark [Sun, 21 Mar 2021 17:14:10 +0000 (10:14 -0700)]
virgl: Use util_draw_multi() helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9742>
Rob Clark [Sun, 21 Mar 2021 17:13:04 +0000 (10:13 -0700)]
v3d: Use util_draw_multi() helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9742>
Rob Clark [Sun, 21 Mar 2021 17:12:01 +0000 (10:12 -0700)]
vc4: Use util_draw_multi() helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9742>
Rob Clark [Sun, 21 Mar 2021 17:09:57 +0000 (10:09 -0700)]
tegra: Use util_draw_multi() helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9742>
Rob Clark [Sun, 21 Mar 2021 17:08:59 +0000 (10:08 -0700)]
svga: Use util_draw_multi() helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9742>
Rob Clark [Sun, 21 Mar 2021 17:08:00 +0000 (10:08 -0700)]
softpipe: Use util_draw_multi() helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9742>
Rob Clark [Sun, 21 Mar 2021 17:05:57 +0000 (10:05 -0700)]
r600: Use util_draw_multi() helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9742>
Rob Clark [Sun, 21 Mar 2021 17:04:07 +0000 (10:04 -0700)]
r300: Use util_draw_multi() helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9742>
Rob Clark [Sun, 21 Mar 2021 17:01:43 +0000 (10:01 -0700)]
nouveau: Use util_draw_multi() helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9742>
Rob Clark [Sun, 21 Mar 2021 16:59:16 +0000 (09:59 -0700)]
llvmpipe: Use util_draw_multi() helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9742>
Rob Clark [Sun, 21 Mar 2021 16:58:29 +0000 (09:58 -0700)]
lima: Use util_draw_multi() helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9742>
Rob Clark [Sun, 21 Mar 2021 16:57:17 +0000 (09:57 -0700)]
iris: Use util_draw_multi() helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9742>
Rob Clark [Sun, 21 Mar 2021 16:52:48 +0000 (09:52 -0700)]
i915: Use util_draw_multi() helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9742>
Rob Clark [Sun, 21 Mar 2021 16:51:14 +0000 (09:51 -0700)]
etnaviv: Use util_draw_multi() helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9742>
Rob Clark [Sun, 21 Mar 2021 16:49:08 +0000 (09:49 -0700)]
d3d12: Use util_draw_multi() helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9742>
Rob Clark [Sat, 27 Mar 2021 16:24:00 +0000 (09:24 -0700)]
freedreno/a6xx: Fix obsolete comment
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9864>
Rob Clark [Fri, 26 Mar 2021 20:49:49 +0000 (13:49 -0700)]
freedreno/a6xx: Fix indirect+patches draws
Without TC, we'd get draw->count==0.. which is obviously not correct.
With TC we get random garbage for draw->count. Which turns into
exciting things like trying to allocate multi-gigabyte buffers for
tess param/factor buffers.
But we can just tell the CP to split up large tess draws, and put an
upper bound on the tess param/factor buffer sizes.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9864>
Rob Clark [Sat, 27 Mar 2021 18:17:40 +0000 (11:17 -0700)]
ci: Disable panfrost t760
The runners appear to be down at the moment.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9872>
Tapani Pälli [Fri, 26 Mar 2021 09:20:03 +0000 (11:20 +0200)]
intel/common: disable batch decoder on Android platform
when building with Meson. It requires libexpat that is not available
on Android and we want to avoid it.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9848>
Gert Wollny [Sat, 13 Mar 2021 11:06:33 +0000 (12:06 +0100)]
r600: Handle negate of second operator in TGSI_OPCODE_UADD
nir_to_tgsi lowers nir_op_isub to UADD and the negate source mod
on the second operator. Since r600 doesn't support source mods
for integers but support SUB_INT we switch the opcode and clear the
negate flag.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9579>
Erik Faye-Lund [Fri, 26 Mar 2021 15:34:48 +0000 (16:34 +0100)]
zink: remove no-longer-needed clipdist1 patching
Since the last round of enhanced layout packing, it seems like this code
is no longer needed. This allows us to use the HANDLE_EMIT_BUILTIN()
macro, which simplifies things further.
It would have been incorrect anyway, because it's the only code that
uses the location directly as an index. All other locations multiplies
it by four first.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9860>
Mauro Rossi [Sat, 27 Mar 2021 00:50:16 +0000 (01:50 +0100)]
android: amd/addrlib: define endianess to build
Fixes the following building error:
In file included from external/mesa/src/amd/addrlib/src/gfx9/gfx9addrlib.cpp:36:
external/mesa/src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:43:2: error: "BIGENDIAN_CPU or LITTLEENDIAN_CPU must be defined"
^
NOTE: Android ABI specifies Little Endian for arm and x86 targets
Fixes:
3616e02ef3ee ("amd/addrlib: define endianess differently")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9869>
Mike Blumenkrantz [Fri, 26 Mar 2021 11:20:28 +0000 (07:20 -0400)]
zink: ci updates
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9852>
Mike Blumenkrantz [Fri, 26 Mar 2021 11:16:47 +0000 (07:16 -0400)]
lavapipe: stop tracking draw start/count on rendering state
this is garbage data for indirect draws and irrelevant for the rest
Fixes:
448e60314ae ("lavapipe: add transform feedback support")
Fixes:
1cd455b17b7 ("gallium: extend draw_vbo to support multi draws")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9852>
Eric Anholt [Thu, 25 Feb 2021 00:06:05 +0000 (16:06 -0800)]
freedreno/a6xx: Use the frontend userclip lowering.
This ends up being way more piglit-conformant than our backend lowering.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9815>
Eric Anholt [Wed, 24 Mar 2021 21:04:52 +0000 (14:04 -0700)]
nir: Update clip_distance_array_size in clip lowering.
If we've added the array, then we should update the info. This is the
value that gallium drivers setting !PIPE_CAP_CLIP_PLANES have to use in
place of rasterizer->clip_planes_enabled.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9815>
Lionel Landwerlin [Fri, 26 Mar 2021 08:54:49 +0000 (10:54 +0200)]
intel/nullhw: fix build
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4507
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9849>
Lionel Landwerlin [Fri, 26 Mar 2021 14:50:08 +0000 (16:50 +0200)]
gitlab-ci: fix vulkan build layer enabling
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
54fe5b0482df0f ("meson: switch vulkan layer to list of choices")
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9858>
Bas Nieuwenhuizen [Fri, 18 Sep 2020 12:22:59 +0000 (14:22 +0200)]
radv: Enable DCC for image stores on GFX10.
Since image stores can now compress and we can't track image stores
this also stops using predication for DCC decompression.
In GFX10 this was benchmarked to be faster. For GFX10.3 the microbenchmarks
are not as possible though I haven't tested any games, so this is not enabled
there yet.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6796>
Bas Nieuwenhuizen [Mon, 5 Oct 2020 02:31:36 +0000 (04:31 +0200)]
radv: Use 8x8 meta compute workgroups.
For 16x16 we get 4 16x4 waves, which is bad for DCC image stores.
The workgroup size doesn't really matter for speed, the important
part is the number of waves, which should stay constant here.
(Though some optimization would be nice, but out of scope for this
patch)
The compute DCC compress shader still uses 16x16 due to functional
requirements (and we're sure it won't write with DCC compression ...)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6796>
Alejandro Piñeiro [Thu, 25 Mar 2021 12:30:55 +0000 (13:30 +0100)]
v3dv: define a default attribute values with float type
We are providing a BO with the default attribute values for the
GL_SHADER_STATE_RECORD, that contains 16 vec4. Such default value for
each vec4 is (0, 0, 0, 1). As the attribute format could be int or
float, the "1" value needs to take into account the attribute format.
But in the practice, the most common case is all floats. So we create
one default attribute values BO assuming that all attributes will be
floats, and we store it at v3dv_device and only create a new one if a
int format type is defined. That allows to reduce the amount of BOs
needed.
Note that we could still try to reduce the amount of BOs used by the
pipelines if we create a bigger BO, and we just play with the
offsets. But as mentioned, that's not the usual, and would add an
extra complexity,so it is not a priority right now.
This makes the following test passing when disabling the pipeline
cache support:
dEQP-VK.api.object_management.max_concurrent.graphics_pipeline
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9845>
Tony Wasserka [Fri, 12 Mar 2021 10:13:51 +0000 (11:13 +0100)]
aco/isel: Add documentation for (u)int64->f16 conversion
The upper 32 bits are truncated before converting, which still produces
correct results since they never meaningfully contribute to the result.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9597>
Tony Wasserka [Tue, 16 Mar 2021 09:52:39 +0000 (10:52 +0100)]
aco/isel: Fix large inputs being truncated in int32->f16 conversions
The previous code produced incorrect results for inputs outside the
range [INT16_MIN, INT16_MAX].
A problematic case is e.g. i2f16 32768, which previously would be
converted to -32768.0 instead of returning the exactly representable
floating point result.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9597>
Tony Wasserka [Fri, 12 Mar 2021 10:25:06 +0000 (11:25 +0100)]
aco/isel: Add documentation and asserts for convert_int
This function has evolved to be a generic helper function used throughout
the file, so having those assumptions written down explicitly and document
unsupported edge cases should help prevent incorrect use.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9597>
Tony Wasserka [Mon, 22 Mar 2021 16:10:05 +0000 (17:10 +0100)]
aco/isel: Don't request sign extension when truncating signed integers
This doesn't change semantics but allows us to reject this potentially
ambiguous configuration in convert_int in a later change.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9597>
Tony Wasserka [Mon, 15 Mar 2021 11:26:51 +0000 (12:26 +0100)]
aco/isel: Fix i64/u64->float32 conversion for large inputs
Previously, inputs such as 0x100000000 would have their upper 32-bits
ignored despite being representable by 32-bit floats.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9597>
Tony Wasserka [Wed, 10 Mar 2021 11:07:43 +0000 (12:07 +0100)]
aco/isel: Don't emit unsupported i16<->f16 conversion opcodes on GFX6/7
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes:
b86305bb573 ("nir/algebraic: collapse conversion opcodes (many patterns)")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4357
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9597>
Erik Faye-Lund [Fri, 26 Mar 2021 13:22:01 +0000 (14:22 +0100)]
zink: tighten emitted image spir-v caps
We might only need to emit a read or write cap for a given image. This
could provide the Vulkan driver with the chance to optimize things
slightly.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9855>
Samuel Pitoiset [Tue, 16 Mar 2021 09:27:05 +0000 (10:27 +0100)]
radv: report that degenerated triangles are not culled
I don't think the hw culls these primitives and NGG culling isn't
yet a thing. This also matches PAL.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9691>
Simon Ser [Thu, 18 Mar 2021 20:47:05 +0000 (21:47 +0100)]
Revert "egl: Don't add hardware device if there is no render node v2."
This reverts commit
5743a36b2b32a91eaf82c8d109932fe4fea01233.
Now that _eglAddDevice is always called with the correct software
hint, no need to bail out if the device doesn't have a render node.
On split render/display SoCs, the DRM device won't have a render
node, yet rendering is hardware-accelerated (via kmsro).
Signed-off-by: Simon Ser <contact@emersion.fr>
Fixes:
5743a36b2b32 ("egl: Don't add hardware device if there is no render node v2.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4178
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9697>
Simon Ser [Thu, 25 Mar 2021 17:42:06 +0000 (18:42 +0100)]
egl: only take render nodes into account when listing DRM devices
We don't want to expose an EGL device for a display-only DRM devices
(like VKMS). For these DRM devices we have a separate software-rendering
device (the first in the list, always present).
There is a similar check in _eglAddDRMDevice, however it will be
removed in a future commit to allow split render/display devices
to be properly added. We can't figure out whether we're on a split
render/display system before loading the driver.
Signed-off-by: Simon Ser <contact@emersion.fr>
Fixes:
5743a36b2b32 ("egl: Don't add hardware device if there is no render node v2.")
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9697>
Simon Ser [Thu, 18 Mar 2021 20:48:44 +0000 (21:48 +0100)]
egl: fix software flag in _eglAddDevice call on DRM
On the EGL DRM platform, call _eglAddDevice with the software flag
set if GBM has loaded a software driver. This allows _eglAddDevice
to make the difference between llvmpipe and kmsro.
This is important on split render/display SoCs: we don't want to
advertise EGL_MESA_device_software on these systems.
Completely drop disp->Options.ForceSoftware, because GBM is
responsible for choosing software rendering and doesn't take this
hint into account.
Signed-off-by: Simon Ser <contact@emersion.fr>
Fixes:
5743a36b2b32 ("egl: Don't add hardware device if there is no render node v2.")
References: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4178
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9697>
Pierre-Eric Pelloux-Prayer [Wed, 24 Mar 2021 21:46:24 +0000 (22:46 +0100)]
mesa/st: fix lower_tex_src_plane in multiple samplers scenario
"plane[0].i32" is the plane being lowered, it's not the sampler we're looking
for.
It worked when there's a single sampler because, eg for NV12, plane[0].i32 for
the UV plane would be 1 and the added ":uv" sampler would also land at binding
point 1.
Fixes:
079e5f73d72 ("mesa/st: rewrite src var when lowering tex_src_plane")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9812>
Boris Brezillon [Thu, 25 Mar 2021 09:24:27 +0000 (10:24 +0100)]
panfrost: Get rid of panfrost_pool_alloc()
This one is no longer used.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9827>
Boris Brezillon [Thu, 25 Mar 2021 09:22:32 +0000 (10:22 +0100)]
panfrost: Use the descriptor allocators where appropriate
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9827>
Boris Brezillon [Thu, 25 Mar 2021 09:39:17 +0000 (10:39 +0100)]
panfrost: Emit surface descriptors with pan_pack()
Now that we have surface descriptors defined in midgard.xml we can use
pan_pack() to emit them.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9827>
Boris Brezillon [Thu, 25 Mar 2021 09:18:35 +0000 (10:18 +0100)]
panfrost: Define the Surface and Surface-with-stride descriptors
Right now the code manipulates mali_ptr, but having surface descriptors
properly defined will allow us to use the descriptors allocator when
allocating a midgard texture.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9827>
Boris Brezillon [Thu, 25 Mar 2021 09:20:53 +0000 (10:20 +0100)]
panfrost: Provide various helpers to simplify descriptor allocation
Got the alignment wrong a few times, so I figured it would be good to
have helpers that take care of the alignment requirements based on
the midgard.xml definitions.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9827>
Boris Brezillon [Thu, 25 Mar 2021 09:16:26 +0000 (10:16 +0100)]
panfrost: Specify descriptor alignment requirements
Once we have that in place, we can provide macros to simplify descriptor
allocation.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9827>
Boris Brezillon [Thu, 25 Mar 2021 09:13:30 +0000 (10:13 +0100)]
pan/gen_pack: Parse alignment requirements
This will help us simplify descriptor allocation.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9827>
Iago Toral Quiroga [Wed, 24 Mar 2021 10:30:24 +0000 (11:30 +0100)]
broadcom/compiler: try to fill up delay slots after a thrsw
The way we handle thrsw instructions is that we try to merge them
back into previously scheduled instructions to fill up its delay
slots. This is generally safe, because the thrsw won't happen until
after the delay slots, so we are not really changing the execution
order of the instructions and we just need to make sure we don't
violate a few specific restrictions.
If we have not managed to fill up all delay slots after doing this,
then we emit as many NOPs as needed to fill them. This is to ensure
that we don't schedule an instruction that needs to execute after the
thread switch before the thread switch happens. However, doing this
can lead to inefficient code, since some times the instructions we
schedule after a thrsw are indepdent of the thrsw and could be safely
executed in its delay slots.
This change removes the fixed NOP emission after a thrsw to fill
delay slots and instead adds code to ensure that our instruction
scheduling is aware of when it is scheduling instructions in the
delay slots of a previous thrsw to avoid selecting conflicting
instructions.
The only case were we still emit fixed NOPs is for the thread end that
we emit to terminate the program after scheduling all instructions
because we can't end the instruction stream before the thread end
is properly executed.
total instructions in shared programs:
13691004 ->
13648140 (-0.31%)
instructions in affected programs: 4345951 -> 4303087 (-0.99%)
helped: 19645
HURT: 652
Instructions are helped.
total max-temps in shared programs: 2319317 -> 2318687 (-0.03%)
max-temps in affected programs: 10510 -> 9880 (-5.99%)
helped: 532
HURT: 9
Max-temps are helped.
total sfu-stalls in shared programs: 31752 -> 32354 (1.90%)
sfu-stalls in affected programs: 840 -> 1442 (71.67%)
helped: 7
HURT: 467
Sfu-stalls are HURT.
total inst-and-stalls in shared programs:
13722756 ->
13680494 (-0.31%)
inst-and-stalls in affected programs: 4335590 -> 4293328 (-0.97%)
helped: 19453
HURT: 758
Inst-and-stalls are helped.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9825>
Iago Toral Quiroga [Wed, 24 Mar 2021 09:36:10 +0000 (10:36 +0100)]
broadcom/compiler: add a v3d_qpu_writes_accum helper
We have helpers to check if an instruction writes to specific
accumulators. This one will check if it writes any of the general
purpose accumulators, which will come in handy in a follow-up
patch.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9825>
Kenneth Graunke [Fri, 26 Mar 2021 01:18:17 +0000 (18:18 -0700)]
Half-revert "gallium/dri2: Pass the resource that corresponds to the plane"
This reverts the resource_get_param changes from Tomeu's commit
ab7744b280184d623cf5a67a50880bf871d8c6db. It breaks every single
program run on iris (such as wflinfo -a gl -p glx).
iris's I915_FORMAT_MOD_Y_TILED_CCS modifier reports two planes - one for
the main surface, and a second one for the CCS surface. However, there
is only one underlying pipe_resource. We only use pipe_resource::next
for modifier information when importing buffers from elsewhere; there is
no res->next for internally allocated resources created with modifiers.
resource_get_param() is not supposed to chase res->next pointers. The
hook is intended to take the base image, and the plane, as parameters.
The driver can then walk its own data structures however it sees fit
in order to find the appropriate plane, rather than enforcing a linked
list of resources.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9847>
Marek Olšák [Wed, 17 Mar 2021 20:29:51 +0000 (16:29 -0400)]
amd: update addrlib
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9668>
Marek Olšák [Wed, 17 Mar 2021 20:51:04 +0000 (16:51 -0400)]
amd/addrlib: define endianess differently
This removes a Mesa-specific change.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9668>
Marek Olšák [Wed, 17 Mar 2021 20:37:47 +0000 (16:37 -0400)]
amd/addrlib: prevent defining regparm differently
Define it in meson, so addrlib won't define it.
This is adding back the addrlib original code.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9668>
Marek Olšák [Wed, 17 Mar 2021 21:03:07 +0000 (17:03 -0400)]
amd/addrlib: add back the incorrect original DCC checking
This reduces Mesa-specific changes.
is_dcc_supported_by_CB() should protect against getting there.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9668>
Iván Briano [Thu, 18 Mar 2021 23:53:08 +0000 (16:53 -0700)]
anv: use helper function to get the buffer size
This ensures we get a properly aligned size for the buffer so we don't
trip over HW limits for push constants.
Closes #3703
Fixes dEQP-VK.robustness.image_robustness.push.* on HSW
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9699>
Iván Briano [Wed, 24 Mar 2021 22:23:16 +0000 (15:23 -0700)]
anv: move buffer size alignment into helper function
And use ANV_UBO_ALIGNMENT for it instead of a magic number.
This increases the alignment to 64B, but that ought to be good for
everyone.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9699>
Vasily Khoruzhick [Thu, 25 Mar 2021 18:16:23 +0000 (11:16 -0700)]
lima: compute nir_sha1 for shader key even if disk cache is disabled
We're using it for in-memory cache as well, so it needs to be computed
unconditionally.
Fixes:
bf09ba538595 ("lima: implement shader disk cache")
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9838>
Lionel Landwerlin [Mon, 11 Nov 2019 21:45:17 +0000 (23:45 +0200)]
intel: Add null hw layer
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2832>
Lionel Landwerlin [Mon, 11 Nov 2019 21:01:23 +0000 (23:01 +0200)]
meson: switch vulkan layer to list of choices
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2832>
Jason Ekstrand [Thu, 25 Mar 2021 18:07:17 +0000 (13:07 -0500)]
anv: Align inline uniform data to ANV_UBO_ALIGNMENT
If we're going to have a #define for UBO alignments, it's probably a
good idea to make sure everything is aligned to that. This increases
the alignment from 32B to 64B but that shouldn't hurt anyone.
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9837>
Kenneth Graunke [Thu, 25 Mar 2021 18:36:58 +0000 (11:36 -0700)]
intel: Fix release build breakage
We missed changing one instance of debug_flag to debug_enabled in a
release-only ifdef branch.
Fixes:
758eb18c6f2 ("intel/compiler: Make vec4 generator take debug_enabled as a parameter")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9839>
Danylo Piliaiev [Tue, 16 Mar 2021 17:48:30 +0000 (19:48 +0200)]
turnip: clamp to zero negative upper left corner of viewport
We cannot send negative viewport coordinates to the hardware,
so clamp them since negative min.x/y is valid per spec.
The negative origin still counts in calculations of guardband.
Fixes crash in 3DMark's "Sling Shot Extreme" test.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9629>
Matt Turner [Thu, 25 Mar 2021 02:46:39 +0000 (22:46 -0400)]
ci: Use CI_PROJECT_ROOT_NAMESPACE
Currently, the template in e.g. .gitlab-ci/deqp-runner.sh containing
See https://$CI_PROJECT_NAMESPACE.pages.freedesktop.org/-/...
will print an invalid URL. Copied from .gitlab-ci/piglit/run.sh which
already uses CI_PROJECT_ROOT_NAMESPACE in its template.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9821>
Erik Faye-Lund [Thu, 25 Mar 2021 09:22:31 +0000 (10:22 +0100)]
docs: Add 21.0.0 hashes
This was missed from the normal 21.0.0 release MR, so here's the hash
added retroactively.
Acked-by: Dylan Baker <dylan.c.baker@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9826>
Eric Anholt [Wed, 24 Mar 2021 23:21:00 +0000 (16:21 -0700)]
ci/freedreno: Mark a630 as flaky on arb_draw_indirect-transform-feedback
This looks like a new one. Unclear cause -- appeared in a large branch
with potential impact, but I had also been doing TF work around that time.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9819>