nir: Add lowering for fround_even on r300.

When we put NIR in the compiler stack for r300, indirect addressing broke
for gallium nine.  DX's array indirects round the float value, so the DX
shader gets mapped to a TGSI "ARR ADDR[0] src.x" instruction.  Translating
that to NIR maps to r0[f2i32(fround(src.x))].  While we might hope that in
translation back using nir-to-tgsi after optimization we would recognize
the construct and emit ARR again, that's going to be error prone (think
"what if src.x is in a NIR register?") so we need a fallback plan.  r300
will be able to handle this lowering, so get it in place first to fix the
regression.

Fixes: #6297
Fixes: 7d2ea9b0edef ("r300: Request NIR shaders from mesa/st and use NIR-to-TGSI.")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15870>

Revert "egl/wayland: deprecate drm_handle_format() and drm_handle_capabilities()"

Commit af1ee8e010441f8f2ed8c77065b159652a4ac9fe dropped support to
wl_drm, as we thought that most compositors from active projects were
already supporting zwp_linux_dmabuf_v1.

But that's not true, so revert this commit in order to give these
projects a longer transition period.

Note that we didn't add back the support to GEM name API, and that was
on purpose.

Signed-off-by: Leandro Ribeiro <leandro.ribeiro@collabora.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15822>

panfrost: Stop overallocating compressed textures

The line stride uses the number of bytes in the entire block, so both
the width and height need to be reduced for compressed textures so
that the surface stride is calculated correctly.

Fixes: 051d62cf041 ("panfrost: Add a pan_image_layout_init() helper")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6286
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15989>

docs/panfrost: Document drm-shim usage

Document how to build and use Panfrost's drm-shim implementation. I hope by
documenting this process, other Mesa developers are better able to test
Panfrost. In particular, this allows developers without Mali hardware to run
shader-db for any Mali target, which may be useful for debugging regressions
from common NIR changes.

drm-shim is not a substitute for testing against real hardware.

Special thanks to Emma Anholt and Icecream95 for building this infrastructure.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15930>

panfrost: Rework PAN_GPU_ID mechanism

Originally, PAN_GPU_ID was checked in the driver itself. I added the mechanism
to run Bifrost shader-db on my Midgard laptop. There was no drm-shim support at
this point, and this was a reasonable stop gap at the time.

Nowadays, we have a competent drm-shim implementation, which wholly replaces
this use case. So PAN_GPU_ID is only useful for drm-shim. Let's pull the code
into drm-shim and get it out of the driver. This allows NDEBUG drm-shim builds
to work properly.

While we're at it, the default emulated GPU is changed from Mali-T860 to
Mali-G52. This reflects our shifting development priorities.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Suggested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15930>

panfrost: Dirty track batch masks

Since 5d187e9cade ("panfrost: Add helpers to set batch masks"), we have common
helpers to set the colour and depth/stencil batch masks. Rather than set the
masks in various Midgard/Bifrost specific paths, set them generically based on
the finer dirty tracking. This lets us share the logic with Valhall.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15956>

panfrost: Rework dirty tracking for Valhall

Midgard aggregates a large amount of state into its renderer state descriptor.
Our current dirty tracking reflects this, with a single RENDERER dirty flag.
That won't work well on Valhall, which splits out orthogonal state into
independent descriptors (a blend descriptor, a depth/stencil descriptor, and so
on). To prepare for Valhall support, this patch moves the driver to finer dirty
tracking.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15956>

docs/panfrost: Document u-interleaved tiling

The optimized routine documented the tiling format together with the software
algorithm. The reference implementation wants the tiling format alone
documented. Let's break out the high level documentation into somewhere
centrally accessible, and refocus the comments in the optimized file on the
optimization.

This documentation is linked bidirectionally with both implementations, so it
should be easy to find.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15803>

panfrost: Unit test u-interleaved tiling routines

These are complex and not used in all dEQP paths. They're also easy to unit
test, so add some tests to prevent regressions.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15803>

panfrost: Document arguments to tiling routines

The exact semantics of these routines are subtle, although they match what
Gallium wants. We're about to add unit tests. Add some comments that make it
obvious what it is we expect these routines to do. (In particular, it's not a
general region-of-interest copy, it's a region-of-interest of the tiled image
and the entire linear staging image.)

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15803>

panfrost: Assert alignment in tiling routine

We depend on this invariant implicitly. Make that dependence explicit so we
don't get confused and add broken unit tests.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15803>

panfrost: Allow tiling all texture targets

Now that tiled access to 3D textures works, we can enable tiling on all texture
targets. In particular, this adds tiling support for cube maps, arrays, and 3D
textures. Previously, these would usually fall back to linear, which is hard on
the caches.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15803>

panfrost: Only tile for 2D dimensions

1D textures (Nx1 or 1xN) do not benefit from tiling. Don't try, it's a waste.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Suggested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15803>

panfrost: Implement tiled 3D resource access

We need to access each layer separately. This is a simple generalization of the
existing tiled 2D resource access code.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15803>

panfrost: Only handle 2D in should_linear_convert

The tiled->linear conversion mechanism is meant for 2D and doesn't handle tiled
+ 3D. This use case is not expected application behaviour, it's not worth the
complexity to try to handle.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15803>

panfrost: Remove bpp check for tiling

All pixel formats are now tileable.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15803>

panfrost: Add 48-bit and 96-bit tiling routines

Thanks to our macros and some type trickery, our generic tiling routines are
type-generic. So we just need to add 48-bit and 96-bit texel types to tile. Note
we only support power-of-two bit sizes in the specialized tile routines for the
sake of replacing a multiplication with a shift.

With this change, all pixel formats supported in Panfrost are tileable.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15803>

radv: always use nir_lower_io_lower_64bit_to_32

Our I/O lowering doesn't handle 64-bit TCS stores and TES loads which use
several slots. Because of the large stride between slots, we have to split
the load so that there's a single load_buffer_amd/store_buffer_amd
intrinsic for each slot.

Our I/O lowering also sometimes creates nir_op_pack_64_2x32 after
nir_lower_alu_to_scalar.

Fixes KHR-GL45.gpu_shader_fp64.fp64.varyings with Zink
(https://gitlab.freedesktop.org/mesa/mesa/-/issues/6276)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15863>

ac/nir: fix 64-bit NGG GS output stores

I don't know why this was here. The DIV_ROUND_UP ensures that it's always
at least 1 and the MIN2 ensures that it's never greater than 1.

Fixes some KHR-Single-GL46.enhanced_layouts.varying_* tests with zink:
https://gitlab.freedesktop.org/mesa/mesa/-/issues/6301

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15863>

gallium: fix unused symbols warnings

fixes: d760a915

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15840>

nir/opcodes: fisfinite32 should return bool32

Otherwise constant-folding will fold it to 0/1 instead of 0/~0.

Fixes: 330e28155f79 ("nir: add 32-bit bool of fisfinite")
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15984>

nir,microsoft: Move scale_fdiv into a common NIR pass

While we're at it, convert to nir_shader_instructions_pass() to get rid
of some boilerplate and get metadata correct.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15983>

intel/compiler: Set lower_fisnormal

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15985>

radv: use inot(a) instead of ine(a, true)/ieq(a, false)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15854>

radv: use nir_op_imm helpers

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15854>

radv: use radv_meta_build_nir_vs_generate_vertices() more

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15854>

radv: initialize meta shader options earlier

We might need this for NIR builders.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15854>

radv: remove unnecessary align_mul/offset initialization

Since af51efe195b, these builders fill these in with scalar alignment if
not provided.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15854>

nir/builder: add nir_{ine,ibfe,ubfe}_imm() helper

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15854>

nir/gather_info: fix system_value_read for rt/mesh system values

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: c7eaf030687 ("radv: use shader_info::system_values_read")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15952>

ac/nir: properly handle large global access constant offsets

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: 61ac5acca3b ("radv,ac/nir: lower global access to _amd global access intrinsics")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6321
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15951>

anv: use shadow surface for stencil input attachment on gfx7

This fixes a number of tests like :
  dEQP-VK.renderpass*.suballocation.multisample.s8_uint.*
  dEQP-VK.renderpass*.suballocation.multisample.separate_stencil_usage.d24_unorm_s8_uint.*.test_stencil
  dEQP-VK.renderpass*.suballocation.multisample.d24_unorm_s8_uint.*
  dEQP-VK.renderpass*.suballocation.multisample.d32_sfloat_s8_uint.*

Because the driver asserts when generating RENDER_SURFACE_STATE with a
8 Valign value for stencil buffer (only 2 & 4 are supported).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12670>

radv: add support for VkShaderModuleCreateInfo as pNext

With VK_EXT_graphics_pipeline_library, modules can be passed via the
pNext of VkpipelineShaderStageCreateInfo.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15926>

radv: add support for independent descriptor set layouts

With VK_EXT_graphics_pipeline_library, pipeline layouts created with
VK_PIPELINE_LAYOUT_CREATE_INDEPENDENT_SETS_BIT_EXT might contain NULL
descriptor sets.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15926>

radv: fix enabling adjust_frag_coord_z and apply per-pipeline

Fossilize always enables all supported extensions, that means that
adjust_frag_coord_z would always be enabled on RDNA2, even if the
application doesn't enable it. The pipeline key would then be different
and precompilation wouldn't work. Move this per-pipeline since we can
know if VRS will be used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15444>

nouveau/nir: Allow up to 6 nested joins

This matches what the tgsi path does and doesn't regress any tests. (For
comparison, unlimited join nesting does regress tests in deqp and piglit)

Fixes graphical artifacts from stack overflows in
https://www.shadertoy.com/view/Xds3zN
with nir on kepler

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15597>

microsoft/compiler: Fix when using a shadow sampler more than once

Reusing the shadow sampler's variable causes problems when the sampler
is used more than once. The remaining `deref_var`s will be using the
wrong type.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14988>

microsoft/compiler: Add support for unnamed ubos

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14988>

microsoft/compiler: Fix for arrays of 1 element

The DXIL validator doesn't like dynamic indexing into resources if the
resource was not declared as an array type. This commit makes it so that
we always generate array resource types if the original type was
declared as an array instead, not just when the number of elements is
greater than 1.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14988>

microsoft/spirv_to_dxil: Add pass to lower dynamic accesses on ubo[1]

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14988>

zink: nv ci update

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15957>

zink: radv baseline fix

typo

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15957>

ci/virgl: Add piglit and GL4.3 testing to the virpipe path.

This will be helpful in regression-testing the nir-to-tgsi transition, and
with the big runners at google we have plenty of capacity to do it.

I dropped the GL3.0-3.2 caselists because GL4.3 should be a superset of
them.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15158>

zink: unset PIPE_CAP_TEXRECT

this isn't supported by vulkan, and though it can be implicitly converted
to 2d in the driver, this still leaves validation spam

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15895>

mesa/st: set normalized coords for RECT samplers if rects are unsupported

the shaders will never see these, so set the expected value for 2D

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15895>

nir/lower_tex: fix rect queries with lower_rect set

queries still need the sampler_dim changed

Fixes: 682e14d3eae ("nir: lower_tex: Don't normalize coordinates for TXF with RECT")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15895>

Revert "ci: Disable Google's lab"

This reverts commit 8506c2b7ee447faabcda7c4b123717d6e375ee9c.  Network
admins say the fixed things, and we see the runners phoning home again.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15936>

clc: Declare LLVMContexts on the stack

This prevents more use-after-free errors.  Passing them around using
std::unique_ptr ensures that the LLVMContext gets destroyed but doesn't
ensure destruction order.  Declaring it on the stack ensures that the
context doesn't get destroyed until right before the the function
returns which is after any other LLVM stuff is destroyed.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15937>

clc: Rework logging a bit

First, separate out the LLVM context logging to make it take a
clc_logger instead of passing in a string stream.  Currently, the LLVM
context may outlive the string stream which we assign which may lead to
use-after-free errors.  Second, use a separate string stream for clang
diagnosticl logging which we intentionally declare before the compiler
so the compiler can't outlive it.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15937>

clc: Only initialize LLVM once

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15937>

clc: initialise one more llvm stage

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15937>

clc: add simple llvm initialise API

This just calls some of the LLVM init functions in a common place

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15937>

aco: fix disassembly of SMEM with both SGPR and constant offset

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15890>

radv: use shader_info::system_values_read

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15343>

radv: use shader_info::outputs_written/per_primitive_outputs for VS outputs

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15343>

radv: use shader_info::inputs_read/outputs_written for FS IO

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15343>

radv: use shader_info::gs::active_stream_mask

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15343>

radv: use shader_info::writes_memory

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15343>

dzn: Make sure sampler heaps don't contain more than 2048 samplers

The spec says "The maximum number of samplers in a shader visible
descriptor heap is 2048.". Let's make sure we follow this rule
in dozen.

Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15884>

dzn: Skip binding entries with zero descriptors

D3D12 doesn't like empty descriptor ranges, so let's skip those
at set layout creation time.

Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15884>

nouveau/nir: Don't try to emit OP_FMA pre-nvc0.

The TGSI backend avoids TGSI_OPCODE_FMA (and thus OP_FMA) pre-nvc0,
replacing it with TGSI_OPCODE_MAD in that case.

Noticed when looking at native-NIR stats and finding that load
optimization wasn't taking place on the unsupported opcode.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15543>

virgl: Extend integer write out output fix to all non-move integers ops

The host virglrenderer can only handle moves to integer outputs, all
ALU opt that create integer outputs are created with extra code to convert
to float for the temporaries, and this breaks the output write
handling.

Fixes:
  spec@arb_sample_shading@builtin-gl-sample-mask *
  spec@arb_sample_shading@builtin-gl-sample-mask-simple *

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15921>

radv: exclude PRIMITIVE_{COUNT,INDICES} from the per-vertex output mask

They should be excluded for the primitive and vertex output masks.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15918>

clc: Use stringstream for printing spirv errors

The type of the spv_position_t components can differ across platforms,
it's simpler to just let C++ overloading handle it.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15437>

docs: truncate new_features.txt

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15935>

VERSION: bump to 22.2-devel for next cycle

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15935>

radv: use load_shared2_amd/store_shared2_amd

fossil-db (Sienna Cichlid):
Totals from 376 (0.23% of 162293) affected shaders:
MaxWaves: 9620 -> 9596 (-0.25%); split: +0.08%, -0.33%
Instrs: 207533 -> 203901 (-1.75%); split: -1.76%, +0.01%
CodeSize: 1130904 -> 1106420 (-2.16%); split: -2.17%, +0.01%
VGPRs: 14016 -> 14120 (+0.74%); split: -0.34%, +1.08%
Latency: 2143281 -> 2132212 (-0.52%); split: -0.56%, +0.05%
InvThroughput: 389116 -> 387990 (-0.29%); split: -0.34%, +0.05%
VClause: 4483 -> 4485 (+0.04%); split: -0.11%, +0.16%
SClause: 5780 -> 5778 (-0.03%); split: -0.17%, +0.14%
Copies: 15319 -> 15331 (+0.08%); split: -0.53%, +0.61%
Branches: 5561 -> 5563 (+0.04%)
PreSGPRs: 11776 -> 11775 (-0.01%)
PreVGPRs: 11393 -> 11497 (+0.91%); split: -0.13%, +1.04%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13778>

ac/llvm: implement load_shared2_amd/store_shared2_amd

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13778>

aco: implement load_shared2_amd/store_shared2_amd

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13778>

aco: handle read2st64/write2st64 in optimizer

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13778>

aco: fix signedness of DS_instruction::offset0/1

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13778>

nir/opt_load_store_vectorize: create load_shared2_amd/store_shared2_amd

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13778>

nir/opt_load_store_vectorize: fix broken indentation

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13778>

nir: add load_shared2_amd and store_shared2_amd

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13778>

radv: Fix barriers with cp dma

We need to wait for cp dma if VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT are set.

Closes: #5911
Fixes: 4b9bc4791b5 ("radv: only sync CP DMA for transfer operations or bottom pipe")

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15933>

aco: remove register hints entirely

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15408>

aco: remove occurences of VCC hint

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15408>

aco: make program->needs_vcc independent of VCC hints

Totals from 5 (0.00% of 135048) affected shaders: (GFX9)
SGPRs: 208 -> 160 (-23.08%)
CodeSize: 2700 -> 2692 (-0.30%)
Instrs: 533 -> 531 (-0.38%)
Latency: 41688 -> 41680 (-0.02%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15408>

aco/ra: omit VCC affinity on VOPC_SDWA for GFX9+

VOPC_SDWA can also use arbitrary SGPR pairs on GFX9+.

Totals from 5607 (4.16% of 134913) affected shaders: (GFX10.3)
CodeSize: 42470760 -> 42452988 (-0.04%)
Instrs: 7943174 -> 7942883 (-0.00%)
Latency: 102887029 -> 102886305 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 20454456 -> 20454338 (-0.00%); split: -0.00%, +0.00%
Copies: 376818 -> 376865 (+0.01%); split: -0.00%, +0.01%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15408>

aco/ra: create VCC-affinities during RA

instead of using register hints.

Totals from 88367 (65.50% of 134913) affected shaders: (GFX10.3)
CodeSize: 322492184 -> 322252912 (-0.07%); split: -0.08%, +0.01%
Instrs: 60615809 -> 60541260 (-0.12%); split: -0.12%, +0.00%
Latency: 557067980 -> 557009210 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 109676757 -> 109674804 (-0.00%); split: -0.00%, +0.00%
SClause: 1939703 -> 1939924 (+0.01%); split: -0.01%, +0.02%
Copies: 4557567 -> 4487530 (-1.54%); split: -1.54%, +0.00%
Branches: 1941123 -> 1937453 (-0.19%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15408>

aco/ra: only use VCC if program->needs_vcc == true

A future commit will make VCC register assignment independent
from register hints. Up to GFX9, VCC can alternatively be used
as regular SGPR, so prevent overlap.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15408>

anv: stop using old entrypoint/struct/enum names for 1.3

v2: More replacements

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15920>

nir_to_tgsi: Do the required cleanup for nir_opt_find_array_copies().

If we made a copy deref, then we need to do dead-write elimination for the
pervious writes or we'll just emit the same copy deref again next time
around.  And, at the end of the opt loop, we need to lower copy derefs
because later passes (locals_to_regs, notably) depend on it.

Fixes infinite opt loop on fs-function-inout-array with virgl on NTT.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15899>

iris: More gracefully fail in resource_from_user_memory

rusticl (and clover) would like to get a graceful fail here so they can
fall back to a shadow copy instead of us asserting.  We also start
rejecting arrayed surface because isl doesn't allow selecting a QPitch
yet.  Even if it did, QPitch is horribly restrictive, even for linear
surfaces, that it likely wouldn't be that useful.

Fixes: e81f3edf76b0 ("iris: Allow userptr on 1D and 2D images")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15903>

zink: set optimal tiling on swapchain images

this otherwise breaks kopper

fixes #6294

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15928>

dzn: Add CI target for vulkan driver

A custom branch of `deqp` is used to have proper results when
crashing. See:

https://github.com/KhronosGroup/VK-GL-CTS/issues/311

A custom branch of `deqp-runner` with Windows support is also
used until the changes are merged into the main repository.

The `api`, `info`, `draw`, `query-pool` and `memory` test cases are
executed for now.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15742>

dzn: Add a debug flag to enable D3D12 debug layer

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15742>

pvr: Implement vkCreateQueryPool() and vkDestroyQueryPool().

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15880>

pvr: Add pvrsrvkm visibility test heap.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15880>

pvr: Add core count info and pvr_device_runtime_info.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15880>

v3dv: Add emulated timeline semaphore support

This is trivial thanks to the emulated timelines provided in common
code.  "Real" timeline semaphores which can be shared across processes
will require kernel support.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15704>

v3dv: Use the core version property helpers

vulkaninfo is the same before and after.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15704>

v3dv: Use the core version feature helpers

vulkaninfo is the same before and after.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15704>

v3dv: Switch to the common submit framework

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15704>

v3dv: Always wait on last_job_syncs if job->serialize

Even if we're the first job on some queue, there may be no wait
semaphores but we still need to ensure things happen in-order.  (See
the "Implicit Synchronization Guarantees" section of the Vulkan spec.)
The client can submit back-to-back command buffers with no semaphores
between them and it needs to adt the same as if there were a semaphore.
If job->serialize is set because of a barrier or something, we still
need to synchronize across HW queues by waiting on last_job_syncs.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15704>

v3dv: Add a condition variable for queries

In order to properly wait for a query to be complete, we need to first
wait for the end query job to flush through on the queue.  Since query
end is always handled on the CPU, we can do this with a condition
variable.  The 2s timeout is taken from ANV.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15704>

v3dv: Use util/os_time helpers

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15704>

v3dv: Switch to the common device lost tracking

Vulkan requires that, once the device has been lost, you keep returning
VK_ERROR_DEVICE_LOST.  We've got tracking for this in common code; it
just needs to be wired up.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15704>

v3dv: Destroy the device mutex on the teardown path

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15704>

v3dv: Don't use pthread functions on c11 mutexes

This only works because c11/threads.h is typedeffing the c11 stuff to
ptrheads.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15704>