Add SPI Driver to HPE GXP Architecture

Merge series from nick.hawkins@hpe.com <nick.hawkins@hpe.com>:

The GXP supports 3 separate SPI interfaces to accommodate the system
flash, core flash, and other functions. The SPI engine supports variable
clock frequency, selectable 3-byte or 4-byte addressing and a
configurable x1, x2, and x4 command/address/data modes. The memory
buffer for reading and writing ranges between 256 bytes and 8KB. This
driver supports access to the core flash and bios part.

MAINTAINERS: add spi support to GXP

Add the spi driver and dt-binding documentation

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
Link: https://lore.kernel.org/r/20220728161459.7738-6-nick.hawkins@hpe.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: dt-bindings: add documentation for hpe,gxp-spifi

Create documentation for the hpe,gxp-spifi binding to support access to
the SPI parts

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220728161459.7738-3-nick.hawkins@hpe.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: spi-gxp: Add support for HPE GXP SoCs

The GXP supports 3 separate SPI interfaces to accommodate the system
flash, core flash, and other functions. The SPI engine supports variable
clock frequency, selectable 3-byte or 4-byte addressing and a
configurable x1, x2, and x4 command/address/data modes. The memory
buffer for reading and writing ranges between 256 bytes and 8KB. This
driver supports access to the core flash and bios part.

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
Link: https://lore.kernel.org/r/20220728161459.7738-2-nick.hawkins@hpe.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: a3700: support BE for AC5 SPI driver

Signed-off-by: Noam <lnoam@marvell.com>
Tested-by: Raz Adashi <raza@marvell.com>
Reviewed-by: Raz Adashi <raza@marvell.com>
Signed-off-by: Vadym Kochan <vadym.kochan@plvision.eu>
Link: https://lore.kernel.org/r/20220726130038.20995-1-vadym.kochan@plvision.eu
Signed-off-by: Mark Brown <broonie@kernel.org>

spi/panel: dt-bindings: drop CPHA and CPOL from common properties

The spi-cpha and spi-cpol properties are device specific and should be
accepted only if device really needs them.  Drop them from common
spi-peripheral-props.yaml schema, mention in few panel drivers which use
them and include instead in the SPI controller bindings.  The controller
bindings will provide CPHA/CPOL type validation and one place for
description.  Each device schema must list the properties if they are
applicable.

Suggested-by: Jonathan Cameron <jic23@kernel.org>
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220722191539.90641-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: bcm2835: enable shared interrupt support

BCM2711 shares an interrupt betweem 5 SPI interfaces (0, 3, 4, 5 & 6).
Another interrupt is shared between SPI1, SPI2 and UART1, which also
affects BCM2835/6/7. Acting on an interrupt intended for another
interface ought to be harmless (although potentially inefficient), but
it can cause this driver to crash - presumably because some critical
state is not ready.

Add a test to the spi-bcm2835 interrupt service routine that
interrupts are enabled on this interface to avoid the crash and
improve efficiency.

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Link: https://github.com/raspberrypi/linux/issues/5048
Suggested-by: https://github.com/boe-pi
Co-developed-by: Phil Elwell <phil@raspberrypi.com>
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://lore.kernel.org/r/20220719105305.3076354-1-mkl@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: dt-bindings: spi-controller: correct example indentation

Example DTS mixed two with four-space indentation.  Preferred is four
spaces, for readability.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220722190910.76865-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: npcm-fiu: add Arbel NPCM8XX support

Merge series from Tomer Maimon <tmaimon77@gmail.com>:

This patch set adds Arbel NPCM8XX Flash Interface Unit (FIU) support to FIU NPCM
driver and modify direct read dummy configuration.

NPCM8XX FIU supports four controllers.

The NPCM FIU driver tested on NPCM845 evaluation board.

spi: dt-bindings: qcom,spi-geni-qcom: allow three interconnects

Recent Qualcomm Geni SPI nodes, e.g. on SM8450, come also with three
interconnects.  This fixes dtbs_check warnings like:

  sm8450-qrd.dtb: spi@a98000: interconnects: [[46, 1, 0, 46, 4, 0], [47, 2, 0, 48, 12, 0], [49, 1, 0, 50, 1, 0]] is too long
  sm8450-qrd.dtb: spi@a98000: interconnect-names: ['qup-core', 'qup-config', 'qup-memory'] is too long

Fixes: 5bdcae1fe1c5 ("spi: dt-bindings: qcom,spi-geni-qcom: convert to dtschema")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220720163841.7283-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: npcm-fiu: Add NPCM8XX support

Adding FIU NPCM8XX support to NPCM FIU driver.
NPCM8XX FIU supports four controllers.

As part of adding NPCM8XX support:
- Add NPCM8XX specific compatible string.
- Using an internal burst configuration register instead of a GCR
  register.
- Support FIU1 controller.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/r/20220718081146.256070-4-tmaimon77@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>

dt-binding: spi: Add npcm845 compatible to npcm-fiu document

Add a compatible string and description for Nuvoton BMC NPCM845 FIU.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/r/20220718081146.256070-3-tmaimon77@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: npcm-fiu: Modify direct read dummy configuration

Modify NPCM BMC FIU direct read dummy configuration that according
spi-mem direct read function.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/r/20220718081146.256070-2-tmaimon77@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: atmel: remove #ifdef CONFIG_{PM, SLEEP}

Remove #ifdef CONFIG_PM, #ifdef CONFIG_PM_SLEEP and use
SYSTEM_SLEEP_PM_OPS() and RUNTIME_PM_OPS() macros instead which allows
getting also rid of __maybe_unused in the code.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220718071052.1707858-1-claudiu.beznea@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: dt-bindings: Add compatible for MediaTek MT8188

This commit adds dt-binding documentation of spi bus for MediaTek MT8188
SoC platform.

Signed-off-by: Johnson Wang <johnson.wang@mediatek.com>
Link: https://lore.kernel.org/r/20220715120114.4243-1-johnson.wang@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: dt-bindings: mediatek,spi-mtk-nor: Update bindings for nor flash

The spi-mtk-nor controller of mt8173, mt8186 and mt8192 have their
DT data. They don't use mt8173 as fallback.

Using the fallback of mt8186 to enables the controllers to support
mt8188.

Not all of spi-mtk-nor controller need interrupt property, so we
don't mark interrupt as required.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Link: https://lore.kernel.org/r/20220715115443.4154-1-allen-kh.cheng@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: dt-bindings: atmel,at91rm9200-spi: convert to json-schema

Convert SPI DT binding for Atmel/Microchip SoCs to json-schema.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220713132908.175026-1-sergiu.moga@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>

Add support for Intel Thunder Bay SPI controller

Merge series from nandhini.srikandan@intel.com <nandhini.srikandan@intel.com>:

This patch enables support for DW SPI on Intel Thunder Bay.  This patch
set also enables master mode for latest Designware SPI versions.  The
driver is tested on Keem Bay and Thunder Bay evaluation board.

spi: microchip-core: fix and cleanups

Merge series from Yang Yingliang <yangyingliang@huawei.com>:

Patch #1 fix a UAF in mchp_corespi_remove().
Patch #2 and #3 some cleanups to simpify code.

spi: tegra20-slink: fix UAF in tegra_slink_remove()

After calling spi_unregister_master(), the refcount of master will
be decrease to 0, and it will be freed in spi_controller_release(),
the device data also will be freed, so it will lead a UAF when using
'tspi'. To fix this, get the master before unregister and put it when
finish using it.

Fixes: 26c863418221 ("spi: tegra20-slink: Don't use resource-managed spi_register helper")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20220713094024.1508869-1-yangyingliang@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: Fix simplification of devm_spi_register_controller

This reverts commit 59ebbe40fb51 ("spi: simplify
devm_spi_register_controller").

If devm_add_action() fails in devm_add_action_or_reset(),
devm_spi_unregister() will be called, it decreases the
refcount of 'ctlr->dev' to 0, then it will cause uaf in
the drivers that calling spi_put_controller() in error path.

Fixes: 59ebbe40fb51 ("spi: simplify devm_spi_register_controller")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20220712135504.1055688-1-yangyingliang@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: microchip-core: switch to use dev_err_probe()

Switch to use dev_err_probe() to simpify error path.

Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20220713025657.3524506-4-yangyingliang@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: microchip-core: switch to use devm_spi_alloc_master()

Switch to use devm_spi_alloc_master() to simpify error path.

Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20220713025657.3524506-3-yangyingliang@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: microchip-core: fix UAF in mchp_corespi_remove()

When using devm_spi_register_master(), the unregister function will
be called in devres_release_all() which is called after ->remove(),
so remove spi_unregister_master() andspi_master_put().

Fixes: 9ac8d17694b6 ("spi: add support for microchip fpga spi controllers")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20220713025657.3524506-2-yangyingliang@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: dw: Add support for Intel Thunder Bay SPI controller

Add support for Intel Thunder Bay SPI controller, which uses DesignWare
DWC_ssi core and also add common init function for both Keem Bay and
Thunder Bay.

Signed-off-by: Nandhini Srikandan <nandhini.srikandan@intel.com>
Acked-by: Serge Semin <fancer.lancer@gmail.com>
Link: https://lore.kernel.org/r/20220713042223.1458-5-nandhini.srikandan@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: dw: Add support for master mode selection for DWC SSI controller

Add support to select the controller mode as master mode by setting Bit 31
of CTRLR0 register. This feature is supported for controller versions above
v1.02.

Signed-off-by: Nandhini Srikandan <nandhini.srikandan@intel.com>
Acked-by: Serge Semin <fancer.lancer@gmail.com>
Link: https://lore.kernel.org/r/20220713042223.1458-4-nandhini.srikandan@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: Add bindings for Intel Thunder Bay SOC

Add documentation for SPI controller in Intel Thunder Bay SoC.

Signed-off-by: Nandhini Srikandan <nandhini.srikandan@intel.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Link: https://lore.kernel.org/r/20220713042223.1458-3-nandhini.srikandan@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: dw: Fix IP-core versions macro

Add the missing underscore in IP version macro to avoid compilation issue.
The macro is used for IP version comparison in the current patchset.

Fixes: 2cc8d9227bbb ("spi: dw: Introduce Synopsys IP-core versions interface")
Signed-off-by: Nandhini Srikandan <nandhini.srikandan@intel.com>
Acked-by: Serge Semin <fancer.lancer@gmail.com>
Link: https://lore.kernel.org/r/20220713042223.1458-2-nandhini.srikandan@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: remove duplicate parameters check in acpi_spi_add_resource()

The acpi_spi_add_resource() is never called with ctrl == NULL and
index == -1. The only caller already performs the check. Hence
remove the duplication from the acpi_spi_add_resource().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20220709000709.35622-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: propagate error code to the caller of acpi_spi_device_alloc()

Since acpi_spi_device_alloc() has been designed to return an error
pointer we may now properly propagate error codes to the caller of
it. It helps debugging a lot.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20220709000709.35622-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: Return deferred probe error when controller isn't yet available

If the controller is not available, it might be in the future and
we would like to re-probe the peripheral again. For that purpose
return deferred probe.

BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=215993
Fixes: 87e59b36e5e2 ("spi: Support selection of the index of the ACPI Spi Resource before alloc")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20220709212956.25530-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: AMD SPI controller driver bug fix and cleanups

Merge series from Cristian Ciocaltea <cristian.ciocaltea@collabora.com>:

This patch series addresses an issue in the spi-amd driver and, while
there, performs some additional cleanups, like simplifying the error
handling in the probe function and removing an unused struct member.

For improving code readability, it also adds some kernel-doc comments.

spi: amd: Add struct and enum kernel-doc comments

Provide documentation comments in the kernel-doc format
for enum amd_spi_versions and struct amd_spi.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20220706100626.1234731-6-cristian.ciocaltea@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: amd: Drop io_base_addr member from struct amd_spi

The io_base_addr member of struct amd_spi is not referenced anywhere
in the driver implementation and there is no indication that it could
be used in the future, hence drop it.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20220706100626.1234731-5-cristian.ciocaltea@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: amd: Make use of dev_err_probe()

Simplify the error handling in probe function by switching from
dev_err() to dev_err_probe().

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20220706100626.1234731-4-cristian.ciocaltea@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: amd: Make use of devm_spi_alloc_master()

Make use of the devm variant of spi_alloc_master() in order to cleanup
and simplify the error handling in the probe function by getting rid
of the goto statements.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20220706100626.1234731-3-cristian.ciocaltea@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: amd: Limit max transfer and message size

Enabling the SPI CS35L41 audio codec driver for Steam Deck [1]
revealed a problem with the current AMD SPI controller driver
implementation, consisting of an unrecoverable system hang.

The issue can be prevented if we ensure the max transfer size
and the max message size do not exceed the FIFO buffer size.

According to the implementation of the downstream driver, the
AMD SPI controller is not able to handle more than 70 bytes per
transfer, which corresponds to the size of the FIFO buffer.

Hence, let's fix this by setting the SPI limits mentioned above.

[1] https://lore.kernel.org/r/20220621213819.262537-1-cristian.ciocaltea@collabora.com

Reported-by: Anastasios Vacharakis <vacharakis@o2mail.de>
Fixes: bbb336f39efc ("spi: spi-amd: Add AMD SPI controller driver support")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20220706100626.1234731-2-cristian.ciocaltea@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: dt-bindings: zynqmp-qspi: add missing 'required'

During the conversion the bindings lost list of required properties.

Fixes: c58db2abb19f ("spi: convert Xilinx Zynq UltraScale+ MPSoC GQSPI bindings to YAML")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220704130618.199231-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: dt-bindings: cadence: add missing 'required'

During the conversion the bindings lost list of required properties.

Fixes: aa7968682a2b ("spi: convert Cadence SPI bindings to YAML")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220704130618.199231-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: dt-bindings: dw-apb-ssi: update spi-{r,t}x-bus-width

Most users of dw-apb-ssi use spi-{r,t}x-bus-width of 1, however the
Canaan k210 is wired up for a width of 4.
Quoting Serge:
The modern DW APB SSI controllers of v.4.* and newer also support the
enhanced SPI Modes too (Dual, Quad and Octal). Since the IP-core
version is auto-detected at run-time there is no way to create a
DT-schema correctly constraining the Rx/Tx SPI bus widths.
/endquote

As such, drop the restriction on only supporting a bus width of 1.

Link: https://lore.kernel.org/all/20220620205654.g7fyipwytbww5757@mobilestation/
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Tested-by: Niklas Cassel <niklas.cassel@wdc.com>
Link: https://lore.kernel.org/r/20220629184343.3438856-5-mail@conchuod.ie
Signed-off-by: Mark Brown <broonie@kernel.org>

Fix some coding style issues

Merge series from David Jander <david@protonic.nl>:

This series fixes some coding style issues. No functional change.

spi: spi.c: Remove redundant else block

Reported-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: David Jander <david@protonic.nl>
Link: https://lore.kernel.org/r/20220629142519.3985486-4-david@protonic.nl
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: spi.c: Fix comment style

Capitalize first word in comment where appropriate and add
parentheses to function names.

Reported-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: David Jander <david@protonic.nl>
Link: https://lore.kernel.org/r/20220629142519.3985486-3-david@protonic.nl
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: spi.c: White-space fix in __spi_pump_messages()

Reported-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: David Jander <david@protonic.nl>
Link: https://lore.kernel.org/r/20220629142519.3985486-2-david@protonic.nl
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: pxa2xx: Add support for Intel Meteor Lake-P

Add support for LPSS SPI on Intel Meteor Lake-P. It has three
controllers each having two chip selects.

This squashes a fix from Ap, Kamal <kamal.ap@intel.com> fixing incorrect
PCI ID of 3rd controller.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20220630073305.632850-1-jarkko.nikula@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi support for Exynos Auto v9 SoC

Merge series from Chanho Park <chanho61.park@samsung.com>:

Add to support Exynos Auto v9 SoC's spi. By supporting USI(Universal
Serial Interface) mode, the SoC can support up to 12 spi ports. Thus, we
need to increase MAX_SPI_PORTS from 6 to 12. The spi of the SoC can
support loopback mode unlike previous exynos SoCs. To separate the
feature, we need to add .has_loopback to the s3c64xx_spi_port_config.
Furthermore, it uses 4 as the default internal clock divider. We also
need to clk_div field of the structure and assign "2" as the default
value to the existing SoC's port config.
Device tree definitions of exynosautov9-spi will be added in separated
patchset to include usi(i2c/uart/spi) nodes all together.

spi: intel: Add support for Intel Meteor Lake-P SPI serial flash

Intel Meteor Lake-P has the same SPI serial flash controller as Alder
Lake-P. Add Meteor Lake-P PCI ID to the driver list of supported
devices.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20220629113403.79942-1-mika.westerberg@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: s3c64xx: define exynosautov9 compatible

Define "samsung,exynosautov9-spi" for Exynos Auto v9's spi.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Andi Shyti <andi@etezian.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20220629102304.65712-4-chanho61.park@samsung.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: s3c64xx: add spi port configuration for Exynos Auto v9 SoC

Add exynosautov9 spi port configuration. It supports up to 12 spis so
MAX_SPI_PORTS should be increased from 6 to 12.
It has DIV_4 as the default internal clock divider and an internal
loopback mode to run a loopback test.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Andi Shyti <andi@etezian.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20220629102304.65712-5-chanho61.park@samsung.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: s3c64xx: support custom value of internal clock divider

Modern exynos SoCs such as Exynos Auto v9 have different internal clock
divider, for example "4". To support this internal value, this adds
clk_div of the s3c64xx_spi_port_config and assign "2" as the default
value to existing s3c64xx_spi_port_config.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Andi Shyti <andi@etezian.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220629102304.65712-3-chanho61.park@samsung.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: s3c64xx: support loopback mode

Modern exynos SoCs can support self loopback mode via setting BIT(3) of
MODE_CFG register. Previous SoCs don't have the bit so we need to add
has_loopback field in the s3c64xx_spi_port_config. Exynos Auto v9 SoC
has the bit and it will define the field to "true".
When it is set, SPI_LOOP mode will be marked.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Andi Shyti <andi@etezian.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20220629102304.65712-2-chanho61.park@samsung.com
Signed-off-by: Mark Brown <broonie@kernel.org>

Optimize spi_sync path

Merge series from David Jander <david@protonic.nl>:

These patches optimize the spi_sync call for the common case that the
worker thread is idle and the queue is empty. It also opens the
possibility to potentially further optimize the async path also, since
it doesn't need to take into account the direct sync path anymore.

As an example for the performance gain, on an i.MX8MM SoC with a SPI CAN
controller attached (MCP2518FD), the time the interrupt line stays
active (which corresponds roughly with the time it takes to send 3
relatively short consecutive spi_sync messages) is reduced from 98us to
only 72us by this patch.

A note about message ordering:

This patch series should not change the behavior of message ordering when
coming from the same context. This means that if a client driver issues
one or more spi_async() messages immediately followed by a spi_sync()
message in the same context, it can still rely on these messages being
sent out in the order they were fired.

spi: s3c64xx: move dma_release_channel to unprepare

This fixes the sequence of dma_release_channel.
Since commit f52b03c70744 ("spi: s3c64xx: requests spi-dma channel only
during data transfer"),
dma_release_channel has been located in the s3c64xx_spi_transfer_one
but this makes invalid return of can_dma callback.
__spi_unmap_msg will check whether the request is requested by dma or
not via can_dma callback. When it is calling to check it, the channels
will be already released at the end of s3c64xx_spi_transfer_one so the
callback function will return always "false". So, they can't be unmapped
from __spi_unmap_msg call. To fix this, we need to add
unprepare_transfer_hardware callback and move the dma_release_channel
from s3c64xx_spi_transfer_one to there.

Fixes: f52b03c70744 ("spi: s3c64xx: requests spi-dma channel only during data transfer")
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20220627013845.138350-1-chanho61.park@samsung.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: synquacer: Add missing clk_disable_unprepare()

Add missing clk_disable_unprepare() in synquacer_spi_resume().

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Guo Mengqi <guomengqi3@huawei.com>
Link: https://lore.kernel.org/r/20220624005614.49434-1-guomengqi3@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: opportunistically skip ctlr->cur_msg_completion

There are only a few drivers that do not call
spi_finalize_current_message() in the context of transfer_one_message(),
and even for those cases the completion ctlr->cur_msg_completion is not
needed always. The calls to complete() and wait_for_completion() each
take a spin-lock, which is costly. This patch makes it possible to avoid
those calls in the big majority of cases, by introducing two flags that
with the help of ordering via barriers can avoid using the completion
safely. In case of a race with the context calling
spi_finalize_current_message(), the scheme errs on the safe side and takes
the completion.
The impact of this patch is worth the effort: On a i.MX8MM SoC, the time
the SPI bus is idle between two consecutive calls to spi_sync(), is
reduced from 19.6us to 16.8us... roughly 15%.

Signed-off-by: David Jander <david@protonic.nl>
Link: https://lore.kernel.org/r/20220621061234.3626638-12-david@protonic.nl
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: Ensure the io_mutex is held until spi_finalize_current_message()

This patch introduces a completion that is completed in
spi_finalize_current_message() and waited for in
__spi_pump_transfer_message(). This way all manipulation of ctlr->cur_msg
is done with the io_mutex held and strictly ordered:
__spi_pump_transfer_message() will not return until
spi_finalize_current_message() is done using ctlr->cur_msg, and its
calling context is only touching ctlr->cur_msg after returning.
Due to this, we can safely drop the spin-locks around ctlr->cur_msg.

Signed-off-by: David Jander <david@protonic.nl>
Link: https://lore.kernel.org/r/20220621061234.3626638-11-david@protonic.nl
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: Set ctlr->cur_msg also in the sync transfer case

Some drivers rely on this to point to the currently processed message, so
set this here also.

Signed-off-by: David Jander <david@protonic.nl>
Link: https://lore.kernel.org/r/20220621061234.3626638-10-david@protonic.nl
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: Remove unneeded READ_ONCE for ctlr->busy flag

Now this flag is written entirely in the mutex, so no need for READ_ONCE

Signed-off-by: David Jander <david@protonic.nl>
Link: https://lore.kernel.org/r/20220621061234.3626638-9-david@protonic.nl
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: Remove the now unused ctlr->idling flag

The ctlr->idling flag is never checked now, so we don't need to set it
either.

Signed-off-by: David Jander <david@protonic.nl>
Link: https://lore.kernel.org/r/20220621061234.3626638-8-david@protonic.nl
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: Remove check for idling in __spi_pump_messages()

Since the whole idling transition is locked by the io_mutex now, there is
no need to check this flag anymore.

Signed-off-by: David Jander <david@protonic.nl>
Link: https://lore.kernel.org/r/20220621061234.3626638-7-david@protonic.nl
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: Remove check for controller idling in spi sync path

Now that the idling flag is wholly behind the io_mutex, this broken piece
of code can be safely removed.

Signed-off-by: David Jander <david@protonic.nl>
Link: https://lore.kernel.org/r/20220621061234.3626638-6-david@protonic.nl
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: __spi_pump_messages: Consolidate spin_unlocks to goto target

Signed-off-by: David Jander <david@protonic.nl>
Link: https://lore.kernel.org/r/20220621061234.3626638-5-david@protonic.nl
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: Lock controller idling transition inside the io_mutex

This way, the spi sync path does not need to deal with the idling
transition.

Signed-off-by: David Jander <david@protonic.nl>
Link: https://lore.kernel.org/r/20220621061234.3626638-4-david@protonic.nl
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: Don't use the message queue if possible in spi_sync

The interaction with the controller message queue and its corresponding
auxiliary flags and variables requires the use of the queue_lock which is
costly. Since spi_sync will transfer the complete message anyway, and not
return until it is finished, there is no need to put the message into the
queue if the queue is empty. This can save a lot of overhead.

As an example of how significant this is, when using the MCP2518FD SPI CAN
controller on a i.MX8MM SoC, the time during which the interrupt line
stays active (during 3 relatively short spi_sync messages), is reduced
from 98us to 72us by this patch.

Signed-off-by: David Jander <david@protonic.nl>
Link: https://lore.kernel.org/r/20220621061234.3626638-3-david@protonic.nl
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: Move ctlr->cur_msg_prepared to struct spi_message

This enables the possibility to transfer a message that is not at the
current tip of the async message queue.
This is in preparation of the next patch(es) which enable spi_sync messages
to skip the queue altogether.

Signed-off-by: David Jander <david@protonic.nl>
Link: https://lore.kernel.org/r/20220621061234.3626638-2-david@protonic.nl
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: mpc52xx-psc: Switch to using core message queue

We deprecated open coding of the transfer queue back in 2017 so it's high
time we finished up converting drivers to use the standard message queue
code. The mpc52xx-psc driver is fairly straightforward so convert to use
transfer_one_message(), it looks like the driver would be a good fit for
transfer_one() with a little bit of updating but this smaller change seems
safer.

The driver seems like a good candidate for transfer_one() but the chip
select function is actually doing rather more than just updating the chip
select and both transfer_one() and transfer_one_message() are current APIs
so leave that refactoring for another day, ideally by someone with the
hardware.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220613121946.136193-1-broonie@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: sh: Switch to using core message queue

We deprecated open coding of the transfer queue back in 2017 so it's high
time we finished up converting drivers to use the standard message queue
code. The SH driver is fairly straightforward so convert to use
transfer_one_message(), it looks like the driver would be a good fit for
transfer_one() with a little bit of updating but this smaller change seems
safer.

I'm not actually clear how the driver worked robustly previously, it
clears SSA and CR1 when queueing a transfer which looks like it would
interfere with any running transfer. This clearing has been moved to the
start of the message transfer function.

I'm also unclear how exactly the chip select is managed with this driver.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220610154649.1707851-1-broonie@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: dt-bindings: samsung: Add Exynos4210 SPI

Document samsung,exynos4210-spi compatible which is already used on
several Exynos SoCs.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20220626112838.19281-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: dw: Add deferred DMA-channels setup support

Currently if the source DMA device isn't ready to provide the channels
capable of the SPI DMA transfers, the DW SSI controller will be registered
with no DMA support. It isn't right since all what the driver needs to do
is to postpone the probe procedure until the DMA device is ready. Let's
fix that in the framework of the DWC SSI generic DMA implementation. First
we need to use the dma_request_chan() method instead of the
dma_request_slave_channel() function, because the later one is deprecated
and most importantly doesn't return the failure cause but the
NULL-pointer. Second we need to stop the DW SSI controller probe procedure
if the -EPROBE_DEFER error is returned on the DMA initialization. The
procedure will resume later when the channels are ready to be requested.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20220624210623.6383-1-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: s3c64xx: constify fsd_spi_port_config

All struct s3c64xx_spi_port_config should be const.

Fixes: 4ebb15a15799 ("spi: s3c64xx: Add spi port configuration for Tesla FSD SoC")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220627094541.95166-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: fsi: Increase timeout and ensure status is checked

Only timeout after at least one iteration of checking the
status registers. In addition, increase the transfer timeout
to 1 second.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20220623140547.71762-1-eajames@linux.ibm.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: topcliff-pch: Use core message validation

The topcliff-pch driver requires TX and RX buffers on all transfers, open
coding checks for this. Remove those open coded checks and instead rely on
the core functionality, which has the added bonus that it will fix up any
transfers submitted by drivers as needed rather than erroring out.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220615174138.4060912-1-broonie@kernel.org

spi: microchip-core: fix passing zero to PTR_ERR warning

It is possible that the error case for devm_clk_get() returns NULL,
in which case zero will be passed to PTR_ERR() as shown by the Smatch
static checker warning:
drivers/spi/spi-microchip-core.c:557 mchp_corespi_probe()
warn: passing zero to 'PTR_ERR'

Remove the NULL check and carry on with a dummy clock in case of an
error. To avoid a potential div zero, abort calculating clkgen if
clk_get_rate(spi->clk) is zero.

Fixes: 9ac8d17694b6 ("spi: add support for microchip fpga spi controllers")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/linux-spi/20220615091633.GI2168@kadam/
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20220615142028.2991915-1-conor.dooley@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: core: Fix error code in spi_register_controller()

Return -ENOMEM if the allocation fails.  Don't return success.

Fixes: 6598b91b5ac3 ("spi: spi.c: Convert statistics to per-cpu u64_stats_t")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/Yqh6bdNYO2XNhPBa@kili
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: microchip-core: fix potentially incorrect return from probe

If platform_get_irqi() returns 0, the error case will be triggered but
probe() will return 0 rather than an error. Ape the other drivers using
this pattern and return -ENXIO.

Reported-by: Yang Li <yang.lee@linux.alibaba.com>
Link: https://lore.kernel.org/linux-spi/20220609055533.95866-2-yang.lee@linux.alibaba.com/
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Fixes: 9ac8d17694b6 ("spi: add support for microchip fpga spi controllers")
Link: https://lore.kernel.org/r/20220614065809.1969177-1-conor.dooley@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: tegra quad: Add Tegra Grace features

Merge series from Krishna Yarlagadda <kyarlagadda@nvidia.com>:

Add multiple chip select lines supported on Tegra 241

spi: spidev_test: Warn when the mode is not the requested mode

Print a warning if the device mode doesn't match the requested mode.
The user doesn't enter the mode in hex so it isn't obvious when
setting the mode succeeds that the mode isn't the requested mode.  The
kernel logs a message, it will be more visible if the test also prints
a warning.  I was testing --quad, which is unsupported, but doesn't
cause the mode request to fail.

Signed-off-by: David Fries <David@Fries.net>
Link: https://lore.kernel.org/r/YqbNnSGtWHe/GG7w@spacedout.fries.net
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: s3c64xx: set pointers to null using NULL rather than 0

There are pointers being set to null using use. Use NULL instead.

Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220612203428.2754823-1-colin.i.king@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: micro: fix unreasonable clk_prepare_enable() on error in mchp_corespi_probe()

Fix the unreasonable clk_prepare_enable() with clk_disable_unprepare()
before return from mchp_corespi_probe() in the error handling case.

Signed-off-by: Peng Wu <wupeng58@huawei.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20220611021117.40494-1-wupeng58@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: dt-bindings: Add compatible for Tegra241 QSPI

Add new compatible for Tegra241 QSPI controller which has
multiple chip select lines.

Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Link: https://lore.kernel.org/r/20220607114659.54314-4-kyarlagadda@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: dt-bindings: split peripheral prods

Move peripheral properties for Tegra QSPI controller to
nvidia,tegra210-quad-peripheral-props.yaml and add reference
to spi-peripheral-props.yaml file.

Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Link: https://lore.kernel.org/r/20220607114659.54314-3-kyarlagadda@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: tegra210-quad: Multi-cs support

Tegra Grace and later chips can support upto 4 chip select lines
for QUAD SPI. Added new compatible for Tegra Grace.

Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Link: https://lore.kernel.org/r/20220607114659.54314-2-kyarlagadda@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: atmel-quadspi: add runtime pm support

Merge series from Claudiu Beznea <claudiu.beznea@microchip.com>:

The following series adds runtime PM support for atmel-quadspi driver.
clk_disable()/clk_enable() is called on proper
runtime_suspend()/runtime_resume() ops. Along with it 2 minor cleanups
were added (patches 2/3, 3/3).

spi: Fix per-cpu stats access on 32 bit systems

On 32 bit systems, the following kernel BUG is hit:

BUG: using smp_processor_id() in preemptible [00000000] code: swapper/0/1
caller is debug_smp_processor_id+0x18/0x24
CPU: 1 PID: 1 Comm: swapper/0 Not tainted 5.19.0-rc1-00001-g6ae0aec8a366 #181
Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
Backtrace:
 dump_backtrace from show_stack+0x20/0x24
 r7:81024ffd r6:00000000 r5:81024ffd r4:60000013
 show_stack from dump_stack_lvl+0x60/0x78
 dump_stack_lvl from dump_stack+0x14/0x1c
 r7:81024ffd r6:80f652de r5:80bec180 r4:819a2500
 dump_stack from check_preemption_disabled+0xc8/0xf0
 check_preemption_disabled from debug_smp_processor_id+0x18/0x24
 r8:8119b7e0 r7:81205534 r6:819f5c00 r5:819f4c00 r4:c083d724
 debug_smp_processor_id from __spi_sync+0x78/0x220
 __spi_sync from spi_sync+0x34/0x4c
 r10:bb7bf4e0 r9:c083d724 r8:00000007 r7:81a068c0 r6:822a83c0 r5:c083d724
 r4:819f4c00
 spi_sync from spi_mem_exec_op+0x338/0x370
 r5:000000b4 r4:c083d910
 spi_mem_exec_op from spi_nor_read_id+0x98/0xdc
 r10:bb7bf4e0 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:82358040
 r4:819f7c40
 spi_nor_read_id from spi_nor_detect+0x38/0x114
 r7:82358040 r6:00000000 r5:819f7c40 r4:819f7c40
 spi_nor_detect from spi_nor_scan+0x11c/0xbec
 r10:bb7bf4e0 r9:00000000 r8:00000000 r7:c083da4c r6:00000000 r5:00010101
 r4:819f7c40
 spi_nor_scan from spi_nor_probe+0x10c/0x2d0
 r10:bb7bf4e0 r9:bb7bf4d0 r8:00000000 r7:819f4c00 r6:00000000 r5:00000000
 r4:819f7c40

per-cpu access needs to be guarded against preemption.

Fixes: 6598b91b5ac3 ("spi: spi.c: Convert statistics to per-cpu u64_stats_t")
Reported-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: David Jander <david@protonic.nl>
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220609121334.2984808-1-david@protonic.nl
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: sifive: add PM callbacks to support suspend/resume

The patch has been tested on Unmatched using pm_test. The Unmatched board
uses SD over SPI and it was tested by initiating S2RAM cycles for all
devices while reading/writing files at the same time. We found no dropped
connection to the card or corrupted filesystem during test cycles.

Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
Link: https://lore.kernel.org/r/20220610074459.3261383-2-andy.chiu@sifive.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: atmel-quadspi: align condition to parenthesis

Align condition to parenthesis.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220609084246.1795419-4-claudiu.beznea@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: atmel-quadspi: use pm_ptr()

Use pm_ptr() for atmel_quadspi_pm_ops.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220609084246.1795419-3-claudiu.beznea@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: atmel-quadspi: add runtime pm support

Add runtime PM support for atmel-quadspi which will disable/enable
QSPI clocks on proper runtime_suspend/runtime_resume ops.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220609084246.1795419-2-claudiu.beznea@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: Return true/false (not 1/0) from bool function

Return boolean values ("true" or "false") instead of 1 or 0 from bool
function.

As reported by coccicheck:
./drivers/spi/spi-s3c64xx.c:385:9-10: WARNING: return of 0/1 in function
's3c64xx_spi_can_dma' with return type bool

Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220609071250.59509-1-yang.lee@linux.alibaba.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: fix platform_no_drv_owner.cocci warning

Remove .owner field if calls are used which set it automatically.

Eliminate the following coccicheck warning:
./drivers/spi/spi-microchip-core.c:624:3-8: No need to set .owner here.
The core will do it.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Link: https://lore.kernel.org/r/20220609055533.95866-1-yang.lee@linux.alibaba.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: <linux/spi/spi.h>: Add missing documentation for struct members

Fixes these "make htmldocs" warnings:

include/linux/spi/spi.h:82: warning: Function parameter or member 'syncp' not described in 'spi_statistics'
include/linux/spi/spi.h:213: warning: Function parameter or member 'pcpu_statistics' not described in 'spi_device'
include/linux/spi/spi.h:676: warning: Function parameter or member 'pcpu_statistics' not described in 'spi_controller'

Fixes: 6598b91b5ac3 ("spi: spi.c: Convert statistics to per-cpu u64_stats_t")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: David Jander <david@protonic.nl>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20220608153309.2899565-1-david@protonic.nl
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: s3c64xx: Fix spelling mistake "hannel" -> "channel"

There is a spelling mistake in a dev_err message. Fix it.

Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220608081912.2083086-1-colin.i.king@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>

Add support for PolarFire SoC's spi controllers

Merge series from Conor Dooley <conor.dooley@microchip.com>:

Add support for the PolatFire SoC SPI controller, the DT binding was
added previously.

ASoC: dt-bindings: renesas,rz-ssi: Document RZ/G2UL SoC

Document RZ/G2U2L SSI bindings. RZ/G2UL SSI is identical to one found
on the RZ/G2L SoC. No driver changes are required as generic compatible
string "renesas,rz-ssi" will be used as a fallback.

While at it add a '.' at the end of dmas description for the first cell.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20220607124231.3248-1-biju.das.jz@bp.renesas.com
Signed-off-by: Mark Brown <broonie@kernel.org>

MAINTAINERS: add spi to PolarFire SoC entry

Add the newly introduced spi driver to the existing PolarFire SoC entry.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20220607073833.2331539-3-conor.dooley@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: add support for microchip fpga spi controllers

Add a driver for Microchip FPGA SPI controllers, specifically
supporting the "hard" controllers on PolarFire SoC.

Co-developed-by: Daire McNamara <daire.mcnamara@microchip.com>
Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20220607073833.2331539-2-conor.dooley@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: stm32-qspi: Remove unused parameters

Merge series from patrice.chotard@foss.st.com <patrice.chotard@foss.st.com>:

This series cleans up spi-stm32-qspi driver by removing unused parameters

spi: spi-ti-qspi: Support per-transfer and per-slave speed_hz settings

The spi-ti-qspi driver initializes its spi clock by the
spi-max-frequency property from the controller node, and ignores
per-transfer (and per-slave) speed_hz settings.

Isolate clock settings out from ti_qspi_setup() and call it from
ti_qspi_start_transfer_one() and ti_qspi_exec_mem_op(), using
per-transfer speed_hz and per-slave max_speed_hz settings.

Also drop spi_max_frequency from struct ti_qspi and use spi_master's
max_speed_hz.

Signed-off-by: Atsushi Nemoto <atsushi.nemoto@sord.co.jp>
Link: https://lore.kernel.org/r/20220519.084604.966119051165023533.atsushi.nemoto@sord.co.jp
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: spi.c: Convert statistics to per-cpu u64_stats_t

This change gives a dramatic performance improvement in the hot path,
since many costly spin_lock_irqsave() calls can be avoided.

On an i.MX8MM system with a MCP2518FD CAN controller connected via SPI,
the time the driver takes to handle interrupts, or in other words the time
the IRQ line of the CAN controller stays low is mainly dominated by the
time it takes to do 3 relatively short sync SPI transfers. The effect of
this patch is a reduction of this time from 136us down to only 98us.

Suggested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David Jander <david@protonic.nl>
Link: https://lore.kernel.org/r/20220524091808.2269898-1-david@protonic.nl
Signed-off-by: Mark Brown <broonie@kernel.org>

spi: dt-bindings: Move 'rx-sample-delay-ns' to spi-peripheral-props.yaml

SPI bus per device properties must be defined in spi-peripheral-props.yaml
for unevaluatedProperties checks to work correctly on device nodes.

This has the side effect of promoting 'rx-sample-delay-ns' to be a
common property, but functionally it's no different if it was defined in
a Synopsys specific schema file.

Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220525210053.2488756-1-robh@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>