rusticl/mem: fix Mem::copy_rect

The old code was kinda bogus as we mapped at (0, 0, 0), but then didn't
take the origin into account when specifiying the size of the access.

Just offset properly instead.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22449>

rusticl: rework CLVec helper function to calculate bounds

We kinda need three things:
1. offset of a point in linear memory
2. size of access for a region
3. a mix of both

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22449>

anv: disable reset query pools using blorp opt on MTL

This optimization causes some MTL tests to run forever. Not
yet sure why. Disabling optimization until we have a fix.

Reviewed-by: Mark Janes <markjanes@swizzler.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22373>

ci/crocus: Update checksum for STK.

Rendering is still fine, stable checksum for the last 3 runs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22348>

zink: Avoid infinite loop finding no var in update_so_info.

Fixes timeouts in CI for
spec@glsl-1.50@execution@interface-blocks-api-access-members where we've
got a GS with SO outputs and no vars declared, by asserting that something
has gone horribly wrong instead.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22348>

nir: Add more system values for lowering XFB

Add more system values for XFB. This should be good enough for lowering GL3.1 +
transform_feedback2 + transform_feedback3. More will probably be needed for
geom/tess but that will be easier to work with when I'm actually bringing up
geom/tess. At any rate, we're splitting out XFB from the rasterization pipeline
and since XFB happens only in the last shader pre-rasterization stage, VS+XFB is
an orthogonal problem from e.g. VS+GS+XFB. Yeah, the combinatorics suck.

These will be used by Asahi, and hopefully eventually Panfrost.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22123>

d3d12: Use u_default_get_sample_position

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Suggested-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22383>

freedreno: Use u_default_get_sample_position

Verified by hand to produce the same results.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22383>

panfrost: Use u_default_get_sample_position

The Mali sample positions are the standard sample positions.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22383>

zink: Use u_default_get_sample_position

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22383>

gallium: Add u_default_get_sample_position

ctx->get_sample_position doesn't change what it returns based on the programmed
positions, it's just supposed to return the defaults. For most (all?) hardware,
those are the Vulkan standard sample positions. In bf9a1e0a4be ("zink: add a
pipe_context::get_sample_position hook"), Mike wondered why there wasn't a
common implementation. So here's one to fix that :~)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22383>

iris: Set priority to Xe engines

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22172>

iris: Implement batch_check_for_reset() in Xe kmd backend

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22172>

iris: Create, destroy and replace Xe engines

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22172>

iris: Move iris_batch i915 specific variables to union

Saves some bytes when Xe kmd fields are added and makes easier to
spot places that are misusing i915 variables.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22172>

iris: Initialize batch screen in iris_init_batch()

The comment to initialize screen earlier not valid anymore so we can
initialize it with the rest of batch fields.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22172>

iris: Move i915 batch destroy logic to iris_i915_destroy_batch()

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22172>

zink: Some return values of malloc should be checked

Signed-off-by: xurui <xurui@kylinos.cn>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22328>

radv: fix detecting FMASK_DECOMPRESS/DCC_DECOMPRESS meta pipelines

With the on_demand shaders feature, meta pipelines are only created
when they are used, otherwise they are NULL. Though, inside secondary
cmdbuffers, the graphics pipeline might be also NULL. In this specific
case, radv_is_{dcc,fmask}_decompress_pipeline() would return
TRUE because these pipelines are NULL too...

This fixes flakes with tests that use secondary cmdbuffers with
TC-compat images.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22440>

docs: reset new_features.txt

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22455>

VERSION: bump to 23.2

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22455>

ac,aco: move gfx10 ngg prim count zero workaround to nir

To simplify both llvm and aco backend and remove unnecessary
workaround code where prim count is known to be not zero.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22381>

intel/compiler: use intel_needs_workaround for Wa_14012437816

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22437>

intel/fs: use intel_needs_workaround for Wa_22013689345

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22437>

ci/rustfmt: make sure to only check each file once

rustfmt has some magic that follows files (I'm guessing), making files get
checked multiple times with `*.rs`, so let's limit ourselves to `lib.rs`.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22321>

ci/android: Make armv8's arch aarch64 instead of arm.

Per [1], arm is for 32-bit.

For an upcoming change, we need to detect AArch64 specifically.
Specifying arm in the cross file will result in the wrong build script
behavior.

[1]: https://mesonbuild.com/Reference-tables.html#cpu-families

Reviewed-by: Helen Koike <helen.koike@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22418>

zink: remove a fixed validation error for ci

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22453>

rusticl/program: rework source code tracking

For the CL spec it really matters how a program object was created. We
never really cared all that much, but it didn't support the corner case of
having an empty string as the OpenCL C source code.

Enums feel like the more Rust way to do this kind of stuff anyway.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>

rusticl/program: extract common code of compile and build

The code wasn't all the same, but the build version was wrong, e.g. the
compile flags specified need to be stored even on error.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>

rusticl/program: validate the SPIR-V when created from IL

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8771
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>

clc: add clc_validate_spirv

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>

rusticl/program: make IL programs look closer to CLC ones

We want to validate the actual passed in SPIR-V, but we can only report
errors back on build/compile time. So instead of storing the initial IL
in the devices `ProgramBuild` objects, just store it on the Program
instead. This also simplifies setting spec constants as this is only valid
on program directly created from IL and not e.g. linked ones.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>

rusticl/program: allow dumping compilation logs through RUSTICL_DEBUG

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>

rusticl/platform: move device initialization to the platform

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>

rusticl/platform: move getter into the type

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>

rusticl/platform: rename _cl_platform_id to Platform

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>

rusticl: split platform into core and api parts

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>

radv: cleanup after splitting radv_pipeline.c

I moved to many things to radv_pipeline_graphics.c without checking.

Fixes: 7783b7f6977 ("radv: split radv_pipeline.c into radv_pipeline_{compute,graphics}.c")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22441>

r600: Alpha to coverage dithering on Evergreen+

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22384>

pan/decode: Print compute job payloads

Noticed while debugging OpenCL. I think this was fallout from the CSF decode
rework?

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22228>

panfrost: Allocate shared memory in OpenCL

In OpenCL, we can have no shader-defined shared memory but some dispatch-time
variable memory. This is not reflected in ss->info.wls_size, so check the right
variable instead so we allocate the appropriate memory.

Fixes page faults accessing shared memory with Rusticl, e.g. in the vstore_local
test.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22228>

pan/bi: Use nir_lower_mem_access_bit_sizes

OpenCL can generate large loads and stores that we can't support, so we need to
lower. We can load/store up to 128-bits in a single go. We currently only handle
up to 32-bit components in the load and no more than vec4, so we split up
accordingly.

It's not clear to me what the requirements are for alignment on Valhall, so we
conservatively generate aligned access, at worst there's a performance penalty
in those cases. I think unaligned access is suppoerted, but likely with a
performance penalty of its own? So in the absence of hard data otherwise, let's
just use natural alignment.

Oddly, this shaves off a tiny bit of ALU in a few compute shaders on Valhall,
all in gfxbench. Seems to just be noise from the RA lottery.

total instructions in shared programs: 2686768 -> 2686756 (<.01%)
instructions in affected programs: 584 -> 572 (-2.05%)
helped: 6
HURT: 0
Instructions are helped.

total cvt in shared programs: 14644.33 -> 14644.14 (<.01%)
cvt in affected programs: 5.77 -> 5.58 (-3.25%)
helped: 6
HURT: 0

total quadwords in shared programs: 1455320 -> 1455312 (<.01%)
quadwords in affected programs: 56 -> 48 (-14.29%)
helped: 1
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22228>

pan/bi: Respect swizzles for more vector ops

We need to respect the ALU swizzle, this takes a vector. Fixes incorrect
pack_64_2x32 translation hit when wiring up lower_mem_access_bit_sizes for
OpenCL.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22228>

pan/bi: Lower swizzles for 8-bit CSEL

With OpenCL we can generate stuff like CSEL.u32.eq r0.b0000, we need to handle
it when lowering swizzles.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22228>

anv: add utrace tracking of frame boundaries

Based on vkQueuePresentKHR calls. It just helps spotting the beginning
end of a frame in perfetto when apps are using 3/4 command buffers per
frame.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22276>

intel/ds: add a new timeline row for frames

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22276>

anv: exclude performance queries from blorp clears

The query buffer contains a batch to implement the multi pass
replay/accumulation of results. So we can't clear it with a memset.

An optimization for later would be to move the batches to the very end
of the query buffer so we can clear the query data without touching
the batches.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4dc7256bf962 ("anv: reset query pools using blorp")
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22421>

ac/nir/ngg: Don't store primitive IDs from culled primitives.

Primitive export used the gs_accepted variable after culling,
so we overwrote this variable after vertex compaction to make
sure not to hang the GPU.

This had an unintended side effect when storing the primitive ID
to LDS on GS threads: the LDS store was done even on threads whose
triangle was culled; potentially causing issues.

As a fix, create a separate boolean variable that remembers
which invocations need to export a primitive; and don't store
the primitive ID to LDS when gs_accepted is false.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8805
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22424>

frontends/va: disable skip_frame_enable in vaapi interface.

skip_frame_enable is for preventing overshooting in some cases,
however the tests in FW were broken, and the output result shows
the functionality has not completed yet, which is the reason
this should be disabled at the moment until it has been fully
verified.

Cc: mesa-stable
Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8178

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22428>

wsi: remove get_sorted_vk_formats duplication

Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/commit/37a8b2d12ea97775b725172d1f89c1bd59fc98cf
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8727

Signed-off-by: Oleksii Bozhenko oleksii.bozhenko@globallogic.com
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22337>

wsi: add rgb_component_bits_are_equal

Signed-off-by: Oleksii Bozhenko oleksii.bozhenko@globallogic.com
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22337>

zink: handle swapchain handoffs around makecurrent

when a new resource is created for an extant swapchain, the existing
acquire (if any) should be transferred to the resource to ensure
expected behavior

this should be enough to fix piglit's glx-make-current

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22431>

zink: track per-image swapchain layouts

this is important for handing off the swapchain between resources
on makecurrent since a context that is made not-current will have its
swapchain resources destroyed while the swapchain persists

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22431>

radv: Reserve space for fast clear related writes.

Fixes: 9ee67467c9e ("radv: predicate cmask eliminate when using DCC.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>

radv: Reserve space for updating DCC metadata.

Fixes: 9ee67467c9e ("radv: predicate cmask eliminate when using DCC.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>

radv: Reserve space in si_cs_emit_cache_flush.

Fixes: 4c6f83006d4 ("radv: Synchronization for task shaders.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>

radv: Reserve space in conditional rendering functions.

Fixes: e45ba51ea45 ("radv: add support for VK_EXT_conditional_rendering")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>

radv: Reserve space in various streamout functions.

Fixes: b4eb029062a ("radv: implement VK_EXT_transform_feedback")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>

radv: Reserve space in framebuffer emission.

In the execute secondary scenario nothing else does it for us.

Fixes: 203f60ebf2f ("radv: emit framebuffer state from primary if secondary doesn't inherit it")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>

aco/tests: add missing dependency on generated header

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8820
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22442>

etnaviv: Fix regression from if_uses change.

Flipped the condition in the conversion.

Fixes: 7f6491b76d51 ("nir: Combine if_uses with instruction uses")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22430>

aco, radv: Remove redundant enable_mrt_output_nan_fixup from PS epilog info.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21935>

aco, radv: Remove "key" from aco_compiler_options.

aco_compiler_options::key is a leftover from when aco used
the radv_pipeline_key struct, but aco_compiler_options::key was
never actually used as a cache key.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21935>

aco: Remove setup_*_variables and add setup_lds_size instead.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21935>

radv: Don't hardcode LDS granularity in gfx9_get_gs_info.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21935>

ac, aco, radv: Clarify LDS size on GFX6, and NGG shaders.

This information was wrong in some places, let's fix it now.

GFX6:
The GPU has 64KB LDS, but only 32KB is usable by a workgroup.

NGG:
There was some misinformation about NGG only being able to
address 32 KB LDS, it turns out this is actually not true
and it can address the full 64K.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21935>

zink: eliminate implicit feedback loops on rp begin

in a scenario like:
* bind fb
* clear
* bind fb attachment as sampler
* begin rp
* draw
* end rp
* flush
* bind new fs
* begin rp
* draw

the first draw will have an implicit feedback loop, but the second one will not
need a feedback loop. since no samplers or attachments are changed between
draws, however, the feedback loop will remain active for successive renderpasses,
which is problematic since the shader part of the driver (zink_update_barriers)
attempts to eliminate these same feedback loops, leading to layout desync

instead, add handling to attachment prep here to eliminate feedback loops
in the event that an attachment can be switched from a write layout to a read layout

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22423>

zink: pre-convert attachment id to attachment idx

this is a little simpler and allows reuse

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22423>

zink: break out feedback loop pipeline state flagging for reuse

no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22423>

zink: remove redundant 'blitting' check in zink_prep_fb_attachment()

this is a return conditional 2 lines above

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22423>

radv: fix pipeline creation feedback with imported graphics libs

Stages imported from graphics pipeline libraries are defined as
additional entries in the order they were imported. This is similar
to raytracing libraries.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22288>

zink: do not use sampled-image for buffers

In SPIR-V 1.6, sampled images with buffer dimensionality was disallowed.

The sampler that GLSL provides for buffer-textures is useless, and can
simply be ignored. So let's not treat them as samplers any more.

Fixes: bd816084c6a ("zink: enable spir-v 1.6 for vulkan 1.3")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8808
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22407>

radv: split radv_pipeline.c into radv_pipeline_{compute,graphics}.c

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21811>

loader: Add Xe KMD support

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22425>

iris: Handle Xe syncronization with syncobjs

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22425>

iris: Add function to close gem bos

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22425>

anv: Fix vm bind of imported buffers

Imported buffers may be created in a device with different
memory alignment and this can cause vm bind to fail because bo
size can be smaller than the calculated vm bind range using the
importer device memory alignment.

So here adding actual_size to anv_bo, this will be set with the actual
size of the bo allocated by kmd for bos allocate in the current device.
For other bo the lseek or the Vulkan API size will be used.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22219>

freedreno/a6xx: Allow z24s8 format casts

Allow UBWC format casts between z24s8/x24s8/z24x8.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8816
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22427>

freedreno/a5xx: add SP clock control register

Add GPMU_GPMU_SP_CLOCK_CONTROL register. Duplicated GPGMU is not a typo,
vendor kernel names it A5XX_GPMU_GPMU_SP_CLOCK_CONTROL.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22429>

freedreno/a5xx: reorder GPMU registers

Severeal GPMU registers were places out of the order. Move them to be
ordered proprely.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22429>

Uprev Piglit to 355ad6bcb2cb3d9e030b7c6eef2b076b0dfb4d63

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22325>

radv/ci: remove one RT test from the expected failures on RDNA3

It does pass.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22413>

dzn: Handle mismatches in bound descriptor set vs pipeline layout

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22420>

iris: Hack around gbm_gralloc stride restrictions

gbm_bo_map returns a stride for the mapping, which may differ from the
stride of the underlying BO.  Drivers may implement mappings via staging
blits, returning a map of a temporary resource instead.  That temporary
may have fewer stride restrictions (i.e. it isn't used for display), and
thus be more tightly packed, saving memory.

However, gbm_gralloc has a design flaw where after calling gbm_bo_map,
it asserts that the stride exactly matches the original BO's stride:

   assert(stride == gbm_bo_get_stride(bo));

This is a bad assumption, as the GBM API returns a stride explicitly
precisely because it -can- differ.  But, this would require significant
changes to gbm_gralloc to fix.  So, to work around it, we add a driver
hack for Android-only that forces staging maps of any external BO to use
the original resource's stride.

This should fix issues with mapping cursor planes and SW media codec
uploads on Android-x86.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7974
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22156>

iris: Extend resource creation helpers to allow for explicit strides

We'll want to create temporary staging images with explicit strides
in the next commit.  This extends iris_resource_create_with_modifiers
to have an explicit row_pitch_B parameter (0 continues to mean "let
ISL pick one").

Because resource_create_with_modifiers() is a driver hook, we can't
just add a parameter, so unfortunately we gain another wrapper layer.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22156>

zink: fix GPL lib leaking

this was improperly added into the conditional for removing a prog from the
ctx hash when it had no relation to that code, leading to refcount
leaks that ended up leaking the whole thing

Fixes: 487ac6dbd60 ("zink: implement cross-program pipeline library sharing")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22397>

zink: free GPL input/output libs on context destroy to avoid leaking

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22397>

d3d12: Fix buffer reference leak for SO count staging buffer

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22417>

rusticl: enable radeonsi

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19232>

radeonsi: use default float mode for CL

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19232>

radeonsi: implement get_compute_state_info

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19232>

zink: unroll array loop when copying vars for passthrough shaders

wildcard derefs aren't supported in ntv

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22376>

d3d12: Video processor to only promote resources to permanent residency when there is work to be flushed

This fixes some cases where flush is called from the app without work being scheduled before, causing d3d12_promote_to_permanent_residency
to be called with garbage pointers/arguments.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22415>

vulkan: Sanitize pSampleMask in CmdSetSampleMaskEXT

ms.sample_mask is only 16b, while VkSampleMask is 32b and it is allowed
to have all of them set even if maximum 16 samples are supported.

E.g. happens with Zink running supertuxkart:
 supertuxkart: ../../../source/mesa/src/vulkan/runtime/vk_graphics_state.c:2346: vk_common_CmdSetSampleMaskEXT: Assertion `(dyn)->ms.sample_mask == (*pSampleMask)' failed.

  vk_common_CmdSetSampleMaskEXT (commandBuffer=0x5556e903f0, samples=VK_SAMPLE_COUNT_1_BIT, pSampleMask=0x5556819ccc) at vk_graphics_state.c:2346
  zink_draw<(zink_multidraw)1, (zink_dynamic_state)5, true, false> (...) at zink_draw.cpp:639
  zink_draw_vbo<(zink_multidraw)1, (zink_dynamic_state)5, true> (...) at zink_draw.cpp:922

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22360>

zink: block oom flushes during unordered blits

this is broken beyond space and time

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22412>

radv/amdgpu: Place secondary CS without IB2 in non-WC GTT.

When using a secondary CS without IB2, we have to memcpy the
contents into the primary CS. Use these flags to improve perf
by preventing memcpy from VRAM.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>

radv/amdgpu: Extract radv_amdgpu_cs_bo_create function.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>

radv/amdgpu: Add bool is_secondary argument to cs_create function.

Also save is_secondary to the CS object.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>

radv: Allow task/mesh shaders with RADV_DEBUG=noibs.

The new submit code path should now be able to handle gang submit
even when chaining is not enabled.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>

radv/amdgpu: Respect maximum number of submitted IBs per IP type.

In a gang submit, the maximum number of IBs is per IP type,
and is different for each queue. Let's respect that.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>