platform/upstream/llvm.git
4 years ago[PowerPC] Fix fold-frame-offset-using-rr.mir typos in checks to fix issue reported...
Simon Pilgrim [Wed, 8 Apr 2020 16:17:44 +0000 (17:17 +0100)]
[PowerPC] Fix fold-frame-offset-using-rr.mir typos in checks to fix issue reported on D77354

Extra spaces, copy+paste duplicates and missing test name check

4 years ago[RDA] Try to fix build (NFC)
Nikita Popov [Wed, 8 Apr 2020 16:13:24 +0000 (18:13 +0200)]
[RDA] Try to fix build (NFC)

fuchsia-x86_64-linux builder fails with:

/b/fuchsia-x86_64-linux/llvm.src/llvm/include/llvm/ADT/TinyPtrVector.h:85:15:
error: no matching conversion for C-style cast from 'nullptr_t' to 'llvm::ReachingDef'
    RHS.Val = (EltTy)nullptr;

Let's see whether adding an explicit nullptr_t constructor helps.

4 years agoFastISel: Partially use Register
Matt Arsenault [Wed, 8 Apr 2020 14:57:11 +0000 (10:57 -0400)]
FastISel: Partially use Register

Doesn't try to convert the cases that depend on generated code.

4 years agoCodeGen: Use Register more in CallLowering
Matt Arsenault [Wed, 8 Apr 2020 14:49:37 +0000 (10:49 -0400)]
CodeGen: Use Register more in CallLowering

Some of these MCPhysReg uses should probably be MCRegister, but right
now this would require more invasive changes.

4 years agoCodeGen: Use Register in MachineBasicBlock
Matt Arsenault [Wed, 8 Apr 2020 14:40:26 +0000 (10:40 -0400)]
CodeGen: Use Register in MachineBasicBlock

4 years agoCodeGen: Use Register in TargetLowering
Matt Arsenault [Wed, 8 Apr 2020 14:29:30 +0000 (10:29 -0400)]
CodeGen: Use Register in TargetLowering

4 years ago[AMDGPU] Refresh fmin_legacy.ll checks to fix issue reported on D77354
Simon Pilgrim [Wed, 8 Apr 2020 16:05:14 +0000 (17:05 +0100)]
[AMDGPU] Refresh fmin_legacy.ll checks to fix issue reported on D77354

Some of the condition codes had inverted since this was generated

4 years ago[TimePasses] Small fix in "-time-passes" flag that makes it more stable
Kirill Naumov [Fri, 27 Mar 2020 18:38:32 +0000 (18:38 +0000)]
[TimePasses] Small fix in "-time-passes" flag that makes it more stable

Adds StringMap for TimingData.

Differential Revision: https://reviews.llvm.org/D76946
Reviewed By: fedor.sergeev

4 years ago[MLIR][Vector] Update ShapeCastOp folder to use producer-consumer value forwarding.
Andy Davis [Wed, 8 Apr 2020 15:39:48 +0000 (08:39 -0700)]
[MLIR][Vector] Update ShapeCastOp folder to use producer-consumer value forwarding.

Summary:
Update ShapeCastOp folder to use producer-consumer value forwarding.
Support is added for tracking sub-vectors through trivial shape cast operations,
where the sub-vector shape is preserved across shape cast operations and only
leading ones are added or removed.
Support is preserved for cancelling shape cast operations.
One unit test is added and two are updated.

Reviewers: aartbik, nicolasvasilache

Reviewed By: aartbik, nicolasvasilache

Subscribers: frgossen, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, liufengdb, Joonsoo, grosul1, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77253

4 years ago[RDA] Use TinyPtrVector to store reaching defs (NFCI)
Nikita Popov [Sun, 5 Apr 2020 15:59:57 +0000 (17:59 +0200)]
[RDA] Use TinyPtrVector to store reaching defs (NFCI)

RDA currently uses SmallVector<int, 1> to store reaching definitions.
A SmallVector<int, 1> is 24 bytes large, and X86 currently has
164 register units, which means we need 3936 bytes per block.
If you have a large function with 1000 blocks, that's already 4MB.

A large fraction of these reg units will not have any reaching defs
(say, those corresponding to zmm registers), and many will have just
one. A TinyPtrVector serves this use-case much better, as it only
needs 8 bytes per register if it has 0 or 1 reaching defs.

As the name implies, TinyPtrVector is designed to work with pointers,
so we need to add some boilerplate to treat our reaching def integers
as pointers, using an appropriate encoding. We need to keep the low
bit free for tagging, and make sure at least one bit is set to
distinguish the null pointer.

Differential Revision: https://reviews.llvm.org/D77513

4 years ago[PowerPC][AIX] Enable passing byval formal arguments in multiple registers.
Sean Fertile [Tue, 24 Mar 2020 17:17:22 +0000 (13:17 -0400)]
[PowerPC][AIX] Enable passing byval formal arguments in multiple registers.

Any or all the argument registers can be used to pass a byval formal
argument, with the limitation that the argument must fit in the
available registers (ie: is not split between registers and stack).

Differential Revision: https://reviews.llvm.org/D76902

4 years ago[ARM] Fix thumb1_return_sequence typo in check to fix issue reported on D77354
Simon Pilgrim [Wed, 8 Apr 2020 15:00:32 +0000 (16:00 +0100)]
[ARM] Fix thumb1_return_sequence typo in check to fix issue reported on D77354

4 years ago[libunwind] Fix incorrect lit substitutions in tests
Louis Dionne [Wed, 8 Apr 2020 14:48:22 +0000 (10:48 -0400)]
[libunwind] Fix incorrect lit substitutions in tests

The LIT substitutions used in libunwind are the same as those from
libc++, and we forgot to update the libunwind tests after the libc++
substitutions started being delimited by braces.

4 years ago[ARM] Fix misched-int-basic-thumb2.mir typo in check to fix issue reported on D77354
Simon Pilgrim [Wed, 8 Apr 2020 14:48:18 +0000 (15:48 +0100)]
[ARM] Fix misched-int-basic-thumb2.mir typo in check to fix issue reported on D77354

4 years ago[Fixed Point] Add triples to test cases.
Bevin Hansson [Wed, 8 Apr 2020 14:28:31 +0000 (16:28 +0200)]
[Fixed Point] Add triples to test cases.

This was causing some test failures.

4 years ago[AARCH64][GISEL] arm64-fallback.ll - Refresh remarks to fix issue reported on D77354
Simon Pilgrim [Wed, 8 Apr 2020 14:28:41 +0000 (15:28 +0100)]
[AARCH64][GISEL] arm64-fallback.ll - Refresh remarks to fix issue reported on D77354

4 years ago[DSE,MSSA] Add additional test cases for multi-path elimination (NFC).
Florian Hahn [Wed, 8 Apr 2020 14:23:58 +0000 (15:23 +0100)]
[DSE,MSSA] Add additional test cases for multi-path elimination (NFC).

This adds additional test cases for more scenarios and also with objects
that are accessible after the functions return and allocas.

4 years ago[X86] Fix x86-header-warnings.c test not detecting regressions as intended.
Pierre Gousseau [Wed, 8 Apr 2020 14:15:39 +0000 (15:15 +0100)]
[X86] Fix x86-header-warnings.c test not detecting regressions as intended.

Use -verify -fsyntax-only and expected-no-diagnostics as
recommended by Paul.

Reviewed By: probinson

Differential Revision: https://reviews.llvm.org/D77393

4 years ago[MemorySSA] invariant-groups.ll - add missing check to fix issue reported on D77354
Simon Pilgrim [Wed, 8 Apr 2020 14:17:48 +0000 (15:17 +0100)]
[MemorySSA] invariant-groups.ll - add missing check to fix issue reported on D77354

4 years ago[DSE.MSSA] Only use callCapturesBefore for calls.
Florian Hahn [Wed, 8 Apr 2020 13:22:43 +0000 (14:22 +0100)]
[DSE.MSSA] Only use callCapturesBefore for calls.

callCapturesBefore always returns ModRef , if UseInst isn't a call. As
we only call it if we already know Mod is set, this only destroys the
Must bit for non-calls.

4 years ago[DSE,MSSA] Hoist getMemoryAccess call (NFC).
Florian Hahn [Wed, 8 Apr 2020 13:17:48 +0000 (14:17 +0100)]
[DSE,MSSA] Hoist getMemoryAccess call (NFC).

4 years ago[llvm-exegesis] Fix build with !HAS_LIBPFM.
Clement Courbet [Wed, 8 Apr 2020 14:01:24 +0000 (16:01 +0200)]
[llvm-exegesis] Fix build with !HAS_LIBPFM.

Fixes 9fb871866e2b.

4 years ago[CodeExtractor] Fix typo in check label to fix issue reported on D77354
Simon Pilgrim [Wed, 8 Apr 2020 13:59:01 +0000 (14:59 +0100)]
[CodeExtractor] Fix typo in check label to fix issue reported on D77354

4 years ago[MLIR] Fix more gcc-5 build issues from D77528
Uday Bondhugula [Wed, 8 Apr 2020 13:41:43 +0000 (19:11 +0530)]
[MLIR] Fix more gcc-5 build issues from D77528

820c420d4e1c630b5ead285917c6ecdd2f5092ad did not really fix all build
issues by D77528. This gets rid of two unnecessary 'using' declarations.

Differential Revision: https://reviews.llvm.org/D77726

4 years ago[DWARFLinker][dsymutil] followup for 88c2137b6d49f88186d0957a4e2d8030a3967334
Alexey Lapshin [Wed, 8 Apr 2020 12:21:21 +0000 (15:21 +0300)]
[DWARFLinker][dsymutil] followup for 88c2137b6d49f88186d0957a4e2d8030a3967334

That patch is a followup for "Move DwarfStreamer into DWARFLinker".
It fixes build with LLVM_LINK_LLVM_DYLIB.

4 years ago[llvm-exegesis][NFC] Let the pfm::Counter own the PerfHelper.
Clement Courbet [Wed, 8 Apr 2020 12:37:38 +0000 (14:37 +0200)]
[llvm-exegesis][NFC] Let the pfm::Counter own the PerfHelper.

A perf helper is always only ever cretaed to be checked for validity
then passed as Counter ctor argument, never to be touched again.
Its lifetime should outlive that of the counter, and there is never any
reason to have two different counters of top of the perf helper.
Make sure these assumptions always hold by making the Counter consume the
PerfHelper.

4 years ago[Parser] Improve diagnostic and error recovery when C++ keywords are used as identifiers.
Haojian Wu [Wed, 8 Apr 2020 13:08:48 +0000 (15:08 +0200)]
[Parser] Improve diagnostic and error recovery when C++ keywords are used as identifiers.

Summary:
Previously, clang emitted a less-usefull diagnostic and didnt recover
well when the keywords is used as identifier in function paramter.

```
void foo(int case, int x); // previously we drop all parameters after
`int case`.
```

Reviewers: sammccall

Reviewed By: sammccall

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77633

4 years ago[PowerPC][Future] Add Support For Functions That Do Not Use A TOC.
Stefan Pintilie [Wed, 8 Apr 2020 13:07:35 +0000 (08:07 -0500)]
[PowerPC][Future] Add Support For Functions That Do Not Use A TOC.

On PowerPC most functions require a valid TOC pointer.

This is the case because either the function itself needs to use this
pointer to access the TOC or because other functions that are called
from that function expect a valid TOC pointer in the register R2.
The main exception to this is leaf functions that do not access the TOC
since they are guaranteed not to need a valid TOC pointer.

This patch introduces a feature that will allow more functions to not
require a valid TOC pointer in R2.

Differential Revision: https://reviews.llvm.org/D73664

4 years ago[libc++] Explicitly specify that we use libc++abi in Apple's cache
Louis Dionne [Wed, 8 Apr 2020 13:03:58 +0000 (09:03 -0400)]
[libc++] Explicitly specify that we use libc++abi in Apple's cache

4 years ago[LangRef] update text for shufflevector
Sanjay Patel [Wed, 8 Apr 2020 13:01:01 +0000 (09:01 -0400)]
[LangRef] update text for shufflevector

D72467 updated the shufflevector instruction to include a constant mask
rather than a mask operand. The LangRef text was vague enough to still
make sense, but it is better to update here too, so there's no confusion
about valid mask values. The text here is adapted from the documentation
code comments for "class ShuffleVectorInst".

Differential Revision: https://reviews.llvm.org/D77396

4 years ago[InstCombine] exclude bitcast of ppc_fp128 in icmp signbit fold
Sanjay Patel [Wed, 8 Apr 2020 12:54:28 +0000 (08:54 -0400)]
[InstCombine] exclude bitcast of ppc_fp128 in icmp signbit fold

Based on the post-commit comments for rG0f56bbc, there might
be a problem with this transform:

(bitcast (fpext/fptrunc X)) to iX) < 0 --> (bitcast X to iY) < 0

...and the ppc_fp128 data type, so conservatively bypass if we
are bitcasting a ppc_fp128.

We might be able to account for endian or other differences to
enable this for PowerPC again if that is useful.

Differential Revision: https://reviews.llvm.org/D77642

4 years ago[libTooling] Simplify the representation of Transformer's RewriteRules.
Yitzhak Mandelbaum [Fri, 3 Apr 2020 17:10:51 +0000 (13:10 -0400)]
[libTooling] Simplify the representation of Transformer's RewriteRules.

Summary:
This revision simplifies the representation of edits in rewrite rules. The
simplified form is more general, allowing the user more flexibility in building
custom edit specifications.

The changes extend the API, without changing the signature of existing
functions. So this only risks breaking users that directly accessed the
`RewriteRule` struct.

Reviewers: gribozavr2

Subscribers: jfb, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77419

4 years ago[AST] Compress the FixedPointSemantics type better.
Bevin Hansson [Thu, 23 Jan 2020 08:16:31 +0000 (09:16 +0100)]
[AST] Compress the FixedPointSemantics type better.

Reviewers: rjmccall, leonardchan, bjope

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D73257

4 years ago[CodeGen] Emit IR for compound assignment with fixed-point operands.
Bevin Hansson [Wed, 8 Jan 2020 13:01:30 +0000 (14:01 +0100)]
[CodeGen] Emit IR for compound assignment with fixed-point operands.

Reviewers: rjmccall, leonardchan

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D73184

4 years ago[CodeGen] Emit IR for fixed-point unary operators.
Bevin Hansson [Wed, 8 Jan 2020 10:12:55 +0000 (11:12 +0100)]
[CodeGen] Emit IR for fixed-point unary operators.

Reviewers: rjmccall, leonardchan

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D73183

4 years ago[CodeGen] Emit IR for fixed-point multiplication and division.
Bevin Hansson [Tue, 19 Nov 2019 12:15:06 +0000 (13:15 +0100)]
[CodeGen] Emit IR for fixed-point multiplication and division.

Reviewers: rjmccall, leonardchan

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D73182

4 years ago[llvm-exegesis][NFC] Remove dead code.
Clement Courbet [Wed, 8 Apr 2020 12:17:57 +0000 (14:17 +0200)]
[llvm-exegesis][NFC] Remove dead code.

4 years ago[compiler-rt] Don't use __libc_stack_end on ARM
Ilya Leoshkevich [Wed, 8 Apr 2020 12:25:20 +0000 (14:25 +0200)]
[compiler-rt] Don't use __libc_stack_end on ARM

Summary:
Commit b684c1a50f70 ("Add a `Symbolizer::GetEnvP()` method that allows
symbolizer implementations to customise the environment of the
symbolizer binary.") exposed a latent ARM issue, and that broke

http://lab.llvm.org:8011/builders/clang-cmake-thumbv7-full-sh

This coincided with breakage caused by my commit 5f5fb56c68e4
("[compiler-rt] Intercept the uname() function"), so I had to
investigate.

The issue is that GetArgsAndEnv does not work on ARM: there glibc's
_start overwrites argc value stored at __libc_start_end, breaking the
existing argv/envp parsing logic.

Fix by inferring argc from argv.

Reviewers: eugenis, vitalybuka

Reviewed By: eugenis

Subscribers: dberris, kristof.beyls, danielkiss, #sanitizers, delcypher

Tags: #sanitizers

Differential Revision: https://reviews.llvm.org/D77400

4 years ago[clangd] Add missing GoToStmt in FindTarget.
Haojian Wu [Wed, 8 Apr 2020 09:03:50 +0000 (11:03 +0200)]
[clangd] Add missing GoToStmt in FindTarget.

Summary: so that go-to-def on label can work.

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77715

4 years ago[AMDGPU] Regenerate vector-extract-insert test checks to fix issue reported on D77354
Simon Pilgrim [Wed, 8 Apr 2020 12:18:32 +0000 (13:18 +0100)]
[AMDGPU] Regenerate vector-extract-insert test checks to fix issue reported on D77354

4 years ago[AMDGPU] Regenerate si-annotate-cfg-loop-assert test checks to fix issue reported...
Simon Pilgrim [Wed, 8 Apr 2020 12:08:52 +0000 (13:08 +0100)]
[AMDGPU] Regenerate si-annotate-cfg-loop-assert test checks to fix issue reported on D77354

4 years ago[clangd] Support dexp -c "some command"
Sam McCall [Tue, 7 Apr 2020 13:26:42 +0000 (15:26 +0200)]
[clangd] Support dexp -c "some command"

Summary:
It runs one command and exits.
See D77385 for motivation.

Reviewers: mnauw, kbobyrev

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77645

4 years ago[ELF][test] Add reproduce test for dependent libraries
Andrew Ng [Tue, 7 Apr 2020 20:47:38 +0000 (21:47 +0100)]
[ELF][test] Add reproduce test for dependent libraries

Differential Revision: https://reviews.llvm.org/D77659

4 years ago[clangd] Fix a crash bug in AddUsing tweak around template handling.
Adam Czachorowski [Wed, 8 Apr 2020 11:42:10 +0000 (13:42 +0200)]
[clangd] Fix a crash bug in AddUsing tweak around template handling.

Summary:
The crash happened on cases like:
template<typename TT> using one = two::three<T^T>;
because we tried to call getName() on getBaseTypeIdentifier(), which can
be nullptr.

Ideally we would support this use case as well, but for now not crashing
will do.

Reviewers: sammccall

Reviewed By: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77656

4 years ago[MLIR] Fix gcc-5 build failure cause by D77528
Uday Bondhugula [Wed, 8 Apr 2020 11:55:16 +0000 (17:25 +0530)]
[MLIR] Fix gcc-5 build failure cause by D77528

 Fix gcc-5 build failure cause by D77528

Differential Revision: https://reviews.llvm.org/D77719

4 years ago[LLD][ELF][ARM] Implement ARM pc-relative relocations for ADR and LDR
Peter Smith [Sat, 4 Apr 2020 16:15:19 +0000 (17:15 +0100)]
[LLD][ELF][ARM] Implement ARM pc-relative relocations for ADR and LDR

The R_ARM_ALU_PC_G0 and R_ARM_LDR_PC_G0 relocations are used by the
ADR and LDR pseudo instructions, and are the basis of the group
relocations that can load an arbitrary constant via a series of add, sub
and ldr instructions.

The relocations need to be obtained via the .reloc directive.

R_ARM_ALU_PC_G0 is much more complicated as the add/sub instruction uses
a modified immediate encoding of an 8-bit immediate rotated right by an
even 4-bit field. This means that the range of representable immediates
is sparse. We extract the encoding and decoding functions for the modified
immediate from llvm/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h as
this header file is not accessible from LLD. Duplication of code isn't
ideal, but as these are well-defined mathematical functions they are
unlikely to change.

Differential Revision: https://reviews.llvm.org/D75349

4 years ago[X86][SSE] Combine PTEST(AND(X,Y),AND(X,Y)) -> PTEST(X,Y) and ANDN equivalents
Simon Pilgrim [Wed, 8 Apr 2020 11:04:58 +0000 (12:04 +0100)]
[X86][SSE] Combine PTEST(AND(X,Y),AND(X,Y)) -> PTEST(X,Y) and ANDN equivalents

Tests derived from PR42035 examples

4 years ago[clangd] show layout info when hovering on a class/field definition.
Sam McCall [Fri, 3 Apr 2020 01:07:10 +0000 (03:07 +0200)]
[clangd] show layout info when hovering on a class/field definition.

Summary:
This triggers only on the definition itself, not on references (probably too
noisy). Inspecting the definition seems like a decent hint for being interested
in layout.

Reviewers: kadircet

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77355

4 years ago[DebugInfo][NFC] Early-exit when analyzing for single-location variables
Jeremy Morse [Wed, 8 Apr 2020 11:24:13 +0000 (12:24 +0100)]
[DebugInfo][NFC] Early-exit when analyzing for single-location variables

This is a performance patch that hoists two conditions in DwarfDebug's
validThroughout to avoid a linear-scan of all instructions in a block. We
now exit early if validThrougout will never return true for the variable
location.

The first added clause filters for the two circumstances where
validThroughout will return true. The second added clause should be
identical to the one that's deleted from after the linear-scan.

Differential Revision: https://reviews.llvm.org/D77639

4 years ago[ELF][AArch64] Add R_AARCH64_PLT32 relocation type.
Peter Smith [Mon, 6 Apr 2020 21:21:39 +0000 (22:21 +0100)]
[ELF][AArch64] Add R_AARCH64_PLT32 relocation type.

The R_AARCH64_PLT32 relocation type will be documented in the next release
of ELF for the 64-bit Arm Architecture. It is being added in draft state
for the benefit of the position independent vtable feature.

R_AARCH64_PLT32 is very similar to R_AARCH64_PREL32. The intention is to
provide a signed 32-bit integer representing an offset from the place
to a function.
- It relocates 32-bit data
- The expression is S + A - P
- The overflow check for the expression is -2^31 <= X < 2^31
- The relocation generates Thunks/Veneers/Stubs and PLT entries as per
  R_AArch64_CALL26
- If the symbol S is an undefined weak the ABI does not define its value.

The ABI defines a code for ilp32 for completeness, I have added the code
but have only added to the existing reloc-types-elf-aarch64.text as there
is no ilp32 equivalent.

Differential Revision: https://reviews.llvm.org/D77647

4 years ago[X86][MC] Support enhanced relaxation for branch align
Shengchen Kan [Tue, 7 Apr 2020 04:27:45 +0000 (12:27 +0800)]
[X86][MC] Support enhanced relaxation for branch align

Summary:
Since D75300 has been landed, I want to support enhanced relaxation when we need to align branches and allow prefix padding. "Enhanced Relaxtion" means we allow an instruction that could not be traditionally relaxed to be emitted into RelaxableFragment so that we increase its length by adding prefixes for optimization.

The motivation is straightforward, RelaxFragment is mostly for relative jumps and we can not increase the length of jumps when we need to align them, so if we need to achieve D75300's purpose (reducing the bytes of nops) when need to align jumps, we have to make more instructions "relaxable".

Reviewers: reames, MaskRay, craig.topper, LuoYuanke, jyknight

Reviewed By: reames

Subscribers: hiraditya, llvm-commits, annita.zhang

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76286

4 years ago[IfConversion] Disallow TrueBB == FalseBB for valid diamonds
Mikael Holmen [Wed, 8 Apr 2020 09:58:26 +0000 (11:58 +0200)]
[IfConversion] Disallow TrueBB == FalseBB for valid diamonds

Summary:
This fixes PR45302.

Previously the case

     BB1
     / \
    |   |
   TBB FBB
    |   |
     \ /
     BB2

was treated as a valid diamond also when TBB and FBB was the same basic
block. This then lead to a failed assertion in IfConvertDiamond.

Since TBB == FBB is quite a degenerated case of a diamond, we now
don't treat it as a valid diamond anymore, and thus we will avoid the
trouble of making IfConvertDiamond handle it correctly.

Reviewers: efriedma, kparzysz

Reviewed By: efriedma

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D77651

4 years ago[ARM][MVE] Optimise offset addresses of gathers/scatters
Anna Welker [Wed, 8 Apr 2020 10:43:55 +0000 (11:43 +0100)]
[ARM][MVE] Optimise offset addresses of gathers/scatters

This patch adds an analysis of the offset addresses used by gathers
and scatters to the MVEGatherScatterLowering pass to find
multiplications and additions that are loop invariant and thus can
be moved into the loop preheader, avoiding to execute them each time.

Differential Revision: https://reviews.llvm.org/D76681

4 years ago[LoopLoadElim] Add test showing that LoopLoadElim doesn't work correctly with new PM
Max Kazantsev [Wed, 8 Apr 2020 10:22:53 +0000 (17:22 +0700)]
[LoopLoadElim] Add test showing that LoopLoadElim doesn't work correctly with new PM

4 years ago[GlobalISel] combine trunc(trunc) pattern
Dominik Montada [Mon, 23 Mar 2020 11:58:55 +0000 (12:58 +0100)]
[GlobalISel] combine trunc(trunc) pattern

Summary:
Legalization can introduce the trunc(trunc) pattern. This can cause
problems if one of these intermediate truncs is not legal.
Combine truncs of this pattern, if the resulting trunc is legal.

Reviewers: arsenm, aemerson, dsanders

Reviewed By: arsenm

Subscribers: jvesely, wdng, nhaehnle, rovka, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76601

4 years ago[llvm-objdump] Fix unstable disassembly output for sections with same address
James Henderson [Tue, 7 Apr 2020 10:51:26 +0000 (11:51 +0100)]
[llvm-objdump] Fix unstable disassembly output for sections with same address

When two sections shared the same address, the disassembly code was
using pointer values when sorting (see the SectionRef less than
operator). Since those values aren't guaranteed to have a specific
order, this meant the disassembly code would sometimes change which
section to pick when finding symbols targeted by calls in fully linked
objects.

This change fixes the non-determinism, so that the same section is
always picked. This might have a negative impact in that now a section
without any symbol might be picked over a section with symbols, but this
will be addressed in a later commit.

Fixes https://bugs.llvm.org/show_bug.cgi?id=45411.

Reviewed by: grimar, MaskRay

Differential Revision: https://reviews.llvm.org/D77640

4 years ago[MLIR] Add support to use aligned_alloc to lower AllocOp from std to llvm
Uday Bondhugula [Mon, 6 Apr 2020 07:40:20 +0000 (13:10 +0530)]
[MLIR] Add support to use aligned_alloc to lower AllocOp from std to llvm

Support to recognize and deal with aligned_alloc was recently added to
LLVM's TLI/MemoryBuiltins and its various optimization passes. This
revision adds support for generation of aligned_alloc's when lowering
AllocOp from std to LLVM. Setting 'use-aligned_alloc=1' will lead to
aligned_alloc being used for all heap allocations. An alignment and size
that works with the constraints of aligned_alloc is chosen.

Using aligned_alloc is preferable to "using malloc and adjusting the
allocated pointer to align for indexing" because the pointer access
arithmetic done for the latter only makes it harder for LLVM passes to
deal with for analysis, optimization, attribute deduction, and rewrites.

Differential Revision: https://reviews.llvm.org/D77528

4 years ago[Analyzer][StreamChecker] Introduction of stream error handling.
Balázs Kéri [Wed, 8 Apr 2020 06:52:24 +0000 (08:52 +0200)]
[Analyzer][StreamChecker] Introduction of stream error handling.

Summary:
Store the error flags (EOF or error) of a stream.
Support the functions feof, ferror, clearerr.
Added a test checker for setting the error flags.

Reviewers: Szelethus, NoQ, Charusso, baloghadamsoftware, xazax.hun

Reviewed By: Szelethus

Subscribers: steakhal, ASDenysPetrov, rnkovacs, xazax.hun, baloghadamsoftware, szepet, a.sidorin, mikhail.ramalho, Szelethus, donat.nagy, dkrupp, gamesh411, Charusso, martong, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D75682

4 years ago[GlobalISel] Combine sext([sz]ext) -> [sz]ext, zext(zext) -> zext
Dominik Montada [Wed, 1 Apr 2020 09:20:15 +0000 (11:20 +0200)]
[GlobalISel] Combine sext([sz]ext) -> [sz]ext, zext(zext) -> zext

Summary:
Combine sext(zext x) to (zext x) since the sign-bit is 0
after the zero-extension.

Combine sext(sext x) to (sext x) and ext(zext x) to (zext x)
since the intermediate step is not needed.

Reviewers: arsenm, volkan, aemerson, aditya_nandakumar

Reviewed By: arsenm

Subscribers: jvesely, wdng, nhaehnle, rovka, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77210

4 years ago[MLIR] Add missing colon after CHECKs.
Christian Sigg [Wed, 8 Apr 2020 06:59:59 +0000 (08:59 +0200)]
[MLIR] Add missing colon after CHECKs.

Reviewers: herhut

Reviewed By: herhut

Subscribers: mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, liufengdb, Joonsoo, grosul1, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77709

4 years ago[GlobalISel] support narrow G_IMPLICIT_DEF for DstSize % NarrowSize != 0
Dominik Montada [Mon, 23 Mar 2020 11:30:55 +0000 (12:30 +0100)]
[GlobalISel] support narrow G_IMPLICIT_DEF for DstSize % NarrowSize != 0

Summary:
When narrowing G_IMPLICIT_DEF where the original size is not a multiple
of the narrow size, emit a smaller G_IMPLICIT_DEF and use G_ANYEXT.

To prevent a potential endless loop in the legalizer, the condition
to combine G_ANYEXT(G_IMPLICIT_DEF) is changed from isInstUnsupported
to !isInstLegal, since in this case the combine is only valid if
consequent legalization of the newly combined G_IMPLICIT_DEF does not
introduce G_ANYEXT due to narrowing.

Although this legalization for G_IMPLICIT_DEF would also be valid for
the general case, it actually caused a lot of code regressions when
tried due to superfluous COPYs and combines not getting hit anymore.

Reviewers: dsanders, aemerson, volkan, arsenm, aditya_nandakumar

Reviewed By: arsenm

Subscribers: jvesely, nhaehnle, kerbowa, wdng, rovka, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76598

4 years ago[clangd] Destroy context before resetting CurrentReq
Kadir Cetinkaya [Tue, 7 Apr 2020 19:07:44 +0000 (21:07 +0200)]
[clangd] Destroy context before resetting CurrentReq

Summary:
Our tests stash callbacks into request context and rely on it being
invoked before threads going idle.

Reviewers: sammccall

Subscribers: ilya-biryukov, javed.absar, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77671

4 years ago[clangd] Fix broken assertion
Kadir Cetinkaya [Tue, 7 Apr 2020 18:08:55 +0000 (20:08 +0200)]
[clangd] Fix broken assertion

Summary:
This assertion was bad. It will show up once we start running preamble
thread async. Think about the following case:

- Update 1
    builds a preamble, and an AST. Caches the AST.
- Update 2
    Invalidates the cache, preamble hasn't changed.
- Update 3
    Invalidates the cache, preamble hasn't changed
- Read
    builds AST using preamble v1, and caches it.
    preamble for v2 gets build, cache isn't invalidated since preamble is same.
    generateDiags tries to reuse cached AST but latest version is 3 not 2, so
    assertion fails.

Reviewers: sammccall

Subscribers: ilya-biryukov, javed.absar, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77664

4 years ago[VE] Simplify definitions of uimm6 and simm7
Kazushi (Jam) Marukawa [Wed, 8 Apr 2020 07:52:46 +0000 (09:52 +0200)]
[VE] Simplify definitions of uimm6 and simm7

Summary: To prepare continuous changes, simplify uimm6 and simm7 operands.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D77700

4 years agoAdd missing hyphens
Austin Conlon [Tue, 7 Apr 2020 06:36:49 +0000 (23:36 -0700)]
Add missing hyphens

4 years ago[DebugInfo] Fix reading DWARFv5 type units in DWP.
Igor Kudrin [Mon, 6 Apr 2020 14:29:22 +0000 (21:29 +0700)]
[DebugInfo] Fix reading DWARFv5 type units in DWP.

In DWARFv5, type units are stored in .debug_info sections, along with
compilation units, and they are distinguished by the unit_type field
in the header, not by the name of the section. It is impossible to
associate the correct index section of a DWP file with the unit before
the unit's header is read. This patch fixes reading DWARFv5 type units
by parsing the header first and then applying the index entry according
to the actual unit type.

Differential Revision: https://reviews.llvm.org/D77552

4 years ago[lit] Print slowest tests and time histogram before result groups
Julian Lettner [Fri, 22 Nov 2019 21:49:51 +0000 (13:49 -0800)]
[lit] Print slowest tests and time histogram before result groups

4 years ago[lit] Improve test summary output
Julian Lettner [Thu, 28 Feb 2019 06:29:00 +0000 (22:29 -0800)]
[lit] Improve test summary output

This change aligns the test summary output along the longest
category label.  We also properly align test counts.

Before:
```
Testing Time: 10.30s
  Unsupported Tests  : 1
  Expected Passes    : 30
```

After:
```
Testing Time: 10.29s
  Unsupported Tests:  1
  Expected Passes  : 30
```

4 years ago[gn build] Port f85ae058f58
LLVM GN Syncbot [Wed, 8 Apr 2020 04:48:03 +0000 (04:48 +0000)]
[gn build] Port f85ae058f58

4 years ago[AMDGPU] Expand vector trunc stores from i16 to i8
Stanislav Mekhanoshin [Tue, 7 Apr 2020 23:43:00 +0000 (16:43 -0700)]
[AMDGPU] Expand vector trunc stores from i16 to i8

Differential Revision: https://reviews.llvm.org/D77693

4 years ago[OpenMP] Provide math functions in OpenMP device code via OpenMP variants
Johannes Doerfert [Sat, 28 Mar 2020 01:36:30 +0000 (20:36 -0500)]
[OpenMP] Provide math functions in OpenMP device code via OpenMP variants

For OpenMP target regions to piggy back on the CUDA/AMDGPU/... implementation of math functions,
we include the appropriate definitions inside of an `omp begin/end declare variant match(device={arch(nvptx)})` scope.
This way, the vendor specific math functions will become specialized versions of the system math functions.
When a system math function is called and specialized version is available the selection logic introduced in D75779
instead call the specialized version. In contrast to the code path we used so far, the system header is actually included.
This means functions without specialized versions are available and so are macro definitions.

This should address PR42061, PR42798, and PR42799.

Reviewed By: ye-luo

Differential Revision: https://reviews.llvm.org/D75788

4 years ago[OpenMP] Specialize OpenMP calls after template instantiation
Johannes Doerfert [Sun, 29 Mar 2020 20:56:15 +0000 (15:56 -0500)]
[OpenMP] Specialize OpenMP calls after template instantiation

As with regular calls, we want to specialize a call that went through
template instantiation if it has an applicable OpenMP declare variant.

Reviewed By: erichkeane, mikerice

Differential Revision: https://reviews.llvm.org/D77290

4 years ago[OpenMP] Add match_{all,any,none} declare variant selector extensions.
Johannes Doerfert [Fri, 3 Apr 2020 16:29:53 +0000 (11:29 -0500)]
[OpenMP] Add match_{all,any,none} declare variant selector extensions.

By default, all traits in the OpenMP context selector have to match for
it to be acceptable. Though, we sometimes want a single property out of
multiple to match (=any) or no match at all (=none). We offer these
choices as extensions via
  `implementation={extension(match_{all,any,none})}`
to the user. The choice will affect the entire context selector not only
the traits following the match property.

The first user will be D75788. There we can replace
```
  #pragma omp begin declare variant match(device={arch(nvptx64)})
  #define __CUDA__

  #include <__clang_cuda_cmath.h>

  // TODO: Hack until we support an extension to the match clause that allows "or".
  #undef __CLANG_CUDA_CMATH_H__

  #undef __CUDA__
  #pragma omp end declare variant

  #pragma omp begin declare variant match(device={arch(nvptx)})
  #define __CUDA__

  #include <__clang_cuda_cmath.h>

  #undef __CUDA__
  #pragma omp end declare variant
```
with the much simpler
```
  #pragma omp begin declare variant match(device={arch(nvptx, nvptx64)}, implementation={extension(match_any)})
  #define __CUDA__

  #include <__clang_cuda_cmath.h>

  #undef __CUDA__
  #pragma omp end declare variant
```

Reviewed By: mikerice

Differential Revision: https://reviews.llvm.org/D77414

4 years ago[OpenMP] Try to find an existing base for `omp begin/end declare variant`
Johannes Doerfert [Wed, 1 Apr 2020 22:07:10 +0000 (17:07 -0500)]
[OpenMP] Try to find an existing base for `omp begin/end declare variant`

If we have a function definition in `omp begin/end declare variant` it
is a specialization of a base function with the same name and
"compatible" type. Before, we just created a declaration for the base.
With this patch we try to find an existing declaration first and only
create a new one if we did not find any with a compatible type. This is
preferable as we can tolerate slight mismatches, especially if the
specialized version is "more constrained", e.g., constexpr.

Reviewed By: mikerice

Differential Revision: https://reviews.llvm.org/D77252

4 years ago[mlir][Linalg] Use subview instead of linalg.slice in Promotion.cpp
Nicolas Vasilache [Wed, 8 Apr 2020 03:49:08 +0000 (23:49 -0400)]
[mlir][Linalg] Use subview instead of linalg.slice in Promotion.cpp

This revision removes the reliance of Promotion on `linalg.slice` which is meant
for the rank-reducing case.

Differential Revision: https://reviews.llvm.org/D77676

4 years ago[OpenMP] "UnFix" last layering problem with FrontendOpenMP
Johannes Doerfert [Wed, 8 Apr 2020 03:44:43 +0000 (22:44 -0500)]
[OpenMP] "UnFix" last layering problem with FrontendOpenMP

It seems one target was missed in D77666 which kept some bots red [0].

[0] http://lab.llvm.org:8011/builders/clang-ppc64le-linux-multistage/builds/12079/steps/build%20stage%201/logs/stdio

4 years agoKeep output file after successful execution of mlir-opt
Lukas Sommer [Wed, 8 Apr 2020 03:24:08 +0000 (03:24 +0000)]
Keep output file after successful execution of mlir-opt

Invoke `keep()` on the output file of `mlir-opt` in case the invocation of `MlirOptMain` was successful, to make sure the output file is not deleted on exit from `mlir-opt`.
Fixes a similar problem in `standalone-opt` from the example for an out-of-tree, standalone MLIR dialect.

This revision also adds a missing parameter to the invocation of `MlirOptMain` in `standalone-opt`.

Differential Revision: https://reviews.llvm.org/D77643

4 years ago[JumpThreading] NFC: Simplify ComputeValueKnownInPredecessorsImpl
Kazu Hirata [Wed, 8 Apr 2020 00:41:50 +0000 (17:41 -0700)]
[JumpThreading] NFC: Simplify ComputeValueKnownInPredecessorsImpl

Summary:
ComputeValueKnownInPredecessorsImpl is the main folding mechanism in
JumpThreading.cpp.  To avoid potential infinite recursion while
chasing use-def chains, it uses:

  DenseSet<std::pair<Value *, BasicBlock *>> &RecursionSet

to keep track of Value-BB pairs that we've processed.

Now, when ComputeValueKnownInPredecessorsImpl recursively calls
itself, it always passes BB as is, so the second element is always BB.

This patch simplifes the function by dropping "BasicBlock *" from
RecursionSet.

Reviewers: wmi, efriedma

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77699

4 years ago[lit] Print slowest test first when timing tests
Julian Lettner [Wed, 8 Apr 2020 01:18:33 +0000 (18:18 -0700)]
[lit] Print slowest test first when timing tests

lit supports `--time-tests` which will report the 20 slowest tests and
print a nice histogram for test times.  This change prints this list and
the histogram rows by decreasing test times.  After all, we are most
interested in the slowest tests.

4 years ago[lit] Improve consistency when printing test results
Julian Lettner [Thu, 28 Feb 2019 05:46:04 +0000 (21:46 -0800)]
[lit] Improve consistency when printing test results

4 years agoRevert "[ObjC generics] Fix not inheriting type bounds in categories/extensions."
Volodymyr Sapsai [Wed, 8 Apr 2020 00:41:30 +0000 (17:41 -0700)]
Revert "[ObjC generics] Fix not inheriting type bounds in categories/extensions."

This reverts commit a8c8b627f23f204fb621bd2a8c495cfc8bc16ae7. It causes
intermittent

    Clang :: SemaObjC/parameterized_classes_subst.m

test failures on various bots.

4 years agoReset more globalMemCounters.
Dan Albert [Tue, 7 Apr 2020 23:29:13 +0000 (16:29 -0700)]
Reset more globalMemCounters.

Reviewers: EricWF, #libc

Reviewed By: EricWF, #libc

Subscribers: broadwaylamb, libcxx-commits

Tags: #libc

Differential Revision: https://reviews.llvm.org/D77681

4 years ago[gn build] Port 1adeeabb79a
LLVM GN Syncbot [Tue, 7 Apr 2020 23:30:51 +0000 (23:30 +0000)]
[gn build] Port 1adeeabb79a

4 years ago[NFC] Clean up uses of LoadInst constructor.
Eli Friedman [Tue, 7 Apr 2020 23:25:52 +0000 (16:25 -0700)]
[NFC] Clean up uses of LoadInst constructor.

4 years ago[ManualDWARFIndex] Remove dead code, in preparation for moving this function.
Davide Italiano [Tue, 7 Apr 2020 23:27:29 +0000 (16:27 -0700)]
[ManualDWARFIndex] Remove dead code, in preparation for moving this function.

4 years agoAdd MIR-level debugify with only locations support for now
Daniel Sanders [Fri, 3 Apr 2020 23:18:45 +0000 (16:18 -0700)]
Add MIR-level debugify with only locations support for now

Summary:
Re-used the IR-level debugify for the most part. The MIR-level code then
adds locations to the MachineInstrs afterwards based on the LLVM-IR debug
info.

It's worth mentioning that the resulting locations make little sense as
the range of line numbers used in a Function at the MIR level exceeds that
of the equivelent IR level function. As such, MachineInstrs can appear to
originate from outside the subprogram scope (and from other subprogram
scopes). However, it doesn't seem worth worrying about as the source is
imaginary anyway.

There's a few high level goals this pass works towards:
* We should be able to debugify our .ll/.mir in the lit tests without
  changing the checks and still pass them. I.e. Debug info should not change
  codegen. Combining this with a strip-debug pass should enable this. The
  main issue I ran into without the strip-debug pass was instructions with MMO's and
  checks on both the instruction and the MMO as the debug-location is
  between them. I currently have a simple hack in the MIRPrinter to
  resolve that but the more general solution is a proper strip-debug pass.
* We should be able to test that GlobalISel does not lose debug info. I
  recently found that the legalizer can be unexpectedly lossy in seemingly
  simple cases (e.g. expanding one instr into many). I have a verifier
  (will be posted separately) that can be integrated with passes that use
  the observer interface and will catch location loss (it does not verify
  correctness, just that there's zero lossage). It is a little conservative
  as the line-0 locations that arise from conflicts do not track the
  conflicting locations but it can still catch a fair bit.

Depends on D77439, D77438

Reviewers: aprantl, bogner, vsk

Subscribers: mgorny, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77446

4 years ago[VE] Migrate to the getMachineMemOperand overload using llvm::Align
Fangrui Song [Tue, 7 Apr 2020 23:04:39 +0000 (16:04 -0700)]
[VE] Migrate to the getMachineMemOperand overload using llvm::Align

Just delete the deprecated overload because nothing uses it.

4 years ago[mlir][AsmFormat] Avoid invalidating the iterator when verifying attributes
River Riddle [Tue, 7 Apr 2020 22:51:42 +0000 (15:51 -0700)]
[mlir][AsmFormat] Avoid invalidating the iterator when verifying attributes

Summary: 'it' may get invalidated when recursing into optional groups. This revision refactors the inner loop to avoid the need to compare the iterator after invalidation.

Differential Revision: https://reviews.llvm.org/D77686

4 years agoCodeGen: More conversions to use Register
Matt Arsenault [Tue, 7 Apr 2020 21:28:53 +0000 (17:28 -0400)]
CodeGen: More conversions to use Register

4 years ago[ThinLTO] Drop dso_local if a GlobalVariable satisfies isDeclarationForLinker()
Fangrui Song [Sun, 16 Feb 2020 01:23:18 +0000 (17:23 -0800)]
[ThinLTO] Drop dso_local if a GlobalVariable satisfies isDeclarationForLinker()

dso_local leads to direct access even if the definition is not within this compilation unit (it is
still in the same linkage unit). On ELF, such a relocation (e.g. R_X86_64_PC32) referencing a
STB_GLOBAL STV_DEFAULT object can cause a linker error in a -shared link.

If the linkage is changed to available_externally, the dso_local flag should be dropped, so that no
direct access will be generated.

The current behavior is benign, because -fpic does not assume dso_local
(clang/lib/CodeGen/CodeGenModule.cpp:shouldAssumeDSOLocal).
If we do that for -fno-semantic-interposition (D73865), there will be an
R_X86_64_PC32 linker error without this patch.

Reviewed By: tejohnson

Differential Revision: https://reviews.llvm.org/D74751

4 years ago[VE] Adapt aa26dd985848364df01d3f8f0f3eaccfd5ee80dc and 2481f26ac3f228cc085d4d68ee72d...
Fangrui Song [Tue, 7 Apr 2020 22:41:04 +0000 (15:41 -0700)]
[VE] Adapt aa26dd985848364df01d3f8f0f3eaccfd5ee80dc and 2481f26ac3f228cc085d4d68ee72dadc07afa48f

4 years agoRevert "Don't expose unavailable cstdio functions."
Dan Albert [Tue, 7 Apr 2020 22:36:44 +0000 (15:36 -0700)]
Revert "Don't expose unavailable cstdio functions."

Broke builders that emit different diagnostics. e.g.:

error: 'warning' diagnostics seen but not expected:
  Line 13: alias declarations are a C++11 extension
  Line 20: alias declarations are a C++11 extension

This reverts commit ff87813715ec32741ce230dd37c13d0ae6673f9c.

4 years ago[MLIR] Add note for file-line numbers in tablegen errors for assembly formats
Stephen Neuendorffer [Sun, 5 Apr 2020 05:54:35 +0000 (22:54 -0700)]
[MLIR] Add note for file-line numbers in tablegen errors for assembly formats

Error messages for the custom assembly format are difficult to understand
because there are no line numbers.  This happens because the assembly format
is parsed as a standalone line, separate from it's parent file, with no useful
location information.  Fixing this properly probably requires quite a bit
of invasive plumbing through the SourceMgr, similar to how included files
are handled

This proposal is a less invasive short term solution.  When generating an
error message we generate an additional note which at least properly describes
the operation definition the error occured in, if not the actual line number
of the assemblyFormat definition.

A typical message is like:

error: type of operand #0, named 'operand', is not buildable and a buildable type cannot be inferred
  $operand type($result) attr-dict
  ^
/src/llvm-project/mlir/test/mlir-tblgen/op-format-spec.td:296:1: note: in custom assembly format for this operation
def ZCoverageInvalidC : TestFormat_Op<"variable_invalid_c", [{
^
note: suggest adding a type constraint to the operation or adding a 'type($operand)' directive to the custom assembly format
  $operand type($result) attr-dict
  ^

Differential Revision: https://reviews.llvm.org/D77488

4 years ago[MLIR] Cleanup mlir-tblgen error messages for custom assembly formats.
Stephen Neuendorffer [Sat, 4 Apr 2020 01:17:51 +0000 (18:17 -0700)]
[MLIR] Cleanup mlir-tblgen error messages for custom assembly formats.

The messages are somewhat cryptic, since they are not complete sentences,
include lots of ambiguous words, like 'format' which are hard to parse,
and include names from the users code which may, or may not make sense in
the context of the message.  Start to clean this up and provide some
guidance for fixes.

Also, add a test for one of the messages which didn't have a test at all.

Differential Revision: https://reviews.llvm.org/D77449

4 years agoDon't expose unavailable cstdio functions.
Dan Albert [Tue, 7 Apr 2020 22:02:15 +0000 (15:02 -0700)]
Don't expose unavailable cstdio functions.

Summary: These aren't available on Android in all configurations.

Reviewers: EricWF, mclow.lists, #libc, ldionne

Reviewed By: EricWF, #libc, ldionne

Subscribers: broadwaylamb, dexonsmith, ldionne, krytarowski, libcxx-commits

Tags: #libc

Differential Revision: https://reviews.llvm.org/D76093

4 years ago[libunwind] Fix UB in EHHeaderParser::findFDE
Jorge Gorbe Moya [Tue, 7 Apr 2020 21:44:42 +0000 (14:44 -0700)]
[libunwind] Fix UB in EHHeaderParser::findFDE

When the EHHeaderInfo object filled by decodeEHHdr has fde_count == 0,
findFDE does the following:

- sets low = 0 and len = hdrInfo.fde_count as a preparation to start a
  binary search
- because len is 0, the binary search loop is skipped
- the code still tries to find a table entry at
  hdrInfo.table + low * tableEntrySize, and decode it.

This is wrong when fde_count is 0, and trying to decode a table entry
that isn't there will lead to reading garbage offsets and can cause
segfaults.

Differential Revision: https://reviews.llvm.org/D77679

4 years ago[OPENMP]Do not capture global marked as shared in OpenMP region.
Alexey Bataev [Tue, 7 Apr 2020 21:14:59 +0000 (17:14 -0400)]
[OPENMP]Do not capture global marked as shared in OpenMP region.

No need to capture the global variable marked as shared in the OpenMP
region, the original variable can be used.

4 years agoRecommit [SampleFDO] Add flag for partial profile.
Wei Mi [Fri, 3 Apr 2020 18:57:36 +0000 (11:57 -0700)]
Recommit [SampleFDO] Add flag for partial profile.

Fix the error of show-prof-info.test on some platforms without zlib.

The common profile usage is to collect profile from a target and then use the profile to guide the optimized build for the same target. There are some cases that no profile can be collected for a target. In those cases, although no full profile is available, it is possible to have some partial profile collected from other targets to optimize common libraries and utilities. A flag is needed to tell the partial profile from the full profile apart, so compiler can use different strategy for them.

Differential Revision: https://reviews.llvm.org/D77426

4 years ago[AMDGPU] Implement copyPhysReg for 16 bit subregs
Stanislav Mekhanoshin [Fri, 28 Feb 2020 23:48:46 +0000 (15:48 -0800)]
[AMDGPU] Implement copyPhysReg for 16 bit subregs

Differential Revision: https://reviews.llvm.org/D74937

4 years ago[mlir][Pass] Update the documentation for the declarative pass specification
River Riddle [Tue, 7 Apr 2020 21:21:18 +0000 (14:21 -0700)]
[mlir][Pass] Update the documentation for the declarative pass specification

The pass tablegen backend now generates base classes instead of utilities, so this revision updates the documentation to reflect that.