Faiz Abbas [Thu, 20 Jun 2019 09:37:20 +0000 (15:07 +0530)]
ARM: dts: am574x-idk: Add pinmuxes for mmc1 and mmc2
Sync with kernel dts by adding pinmuxes for mmc1 and mmc2. This fixes an
issue where mmc2 (eMMC) was coming up in HS52 mode instead of the
highest DDR52 mode.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Faiz Abbas [Thu, 20 Jun 2019 09:37:19 +0000 (15:07 +0530)]
ARM: dts: dra7-mmc-iodelay: Add a new pinctrl group for clk line without pullup
During a short period when the bus voltage is switched from 3.3v to 1.8v,
(to enumerate UHS mode), the mmc module is disabled and the mmc IO lines
are kept in a state according to the programmed pad mux pull type.
According to 4.2.4.2 Timing to Switch Signal Voltage in "SD Specifications
Part 1 Physical Layer Specification Version 5.00 February 22, 2016", the
host should hold CLK low for at least 5ms.
In order to keep the card line low during voltage switch, the pad mux of
mmc1_clk line should be configured to pull down.
Add a new pinctrl group for clock line without pullup to be used in boards
where mmc1_clk line is not connected to an external pullup.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Lokesh Vutla [Thu, 13 Jun 2019 04:59:57 +0000 (10:29 +0530)]
configs: j721e_evm_a72: Add initial support
Add initial defconfig support for J721e that runs on A72.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Add MAINTAINERS entry]
Signed-off-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Thu, 13 Jun 2019 04:59:56 +0000 (10:29 +0530)]
configs: j721e_evm_r5: Add initial support
Add initial defconfig support for J721e that runs on R5.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Add MAINTAINERS file]
Signed-off-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Thu, 13 Jun 2019 04:59:55 +0000 (10:29 +0530)]
arm: dts: k3-j721e: Add r5 specific dt support
Add initial support for dt that runs on r5.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Lokesh Vutla [Thu, 13 Jun 2019 04:59:54 +0000 (10:29 +0530)]
arm: dts: k3-j721e: Add initial support for common processor board
Common Processor board is the baseboard that has most of the actual connectors,
power supply etc. A SOM (System on Module) is plugged on to the common
processor board and this contains the SoC, PMIC, DDR and basic highspeed
components necessary for functionality. Add initial dt support for this
common processor board.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Thu, 13 Jun 2019 04:59:53 +0000 (10:29 +0530)]
arm: dts: ti: Add Support for J721E SoC
Add initial SoC definition for J721E SoC.
Kernel dts posted here:
https://lore.kernel.org/lkml/
20190522161921.20750-1-nm@ti.com/
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Thu, 13 Jun 2019 04:59:52 +0000 (10:29 +0530)]
dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721E
Add pinctrl macros for J721E SoC. These macro definitions are
similar to that of AM6, but adding new definitions to avoid
any naming confusions in the soc dts files.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Faiz Abbas [Thu, 13 Jun 2019 04:59:51 +0000 (10:29 +0530)]
mmc: am654_sdhci: Separate J721E compatible into 8bit and 4bit versions
The j721e 4 bit instances don't have a hard DLL and therefore don't need
any DLL related configurations. Split the compatibles into an 8 bit and a
4 bit one. Add a private flags field which can be used to check if the
DLL is present and don't register the set_ios_post callback for the 4 bit
compatible instances.
Also update the compatibles in k3-j721e-main.dtsi to avoid breaking boot
with the new compatibles.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Suman Anna [Thu, 13 Jun 2019 04:59:50 +0000 (10:29 +0530)]
board: ti: j721e: Enable fixing up msmc sram node
Create a ft_board_setup() api that gets called as part of
DT fixup before jumping to kernel. In this ft_board_setup()
call fdt_fixup_msmc_ram that update msmc sram node.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Thu, 13 Jun 2019 04:59:49 +0000 (10:29 +0530)]
board: ti: j721e: Add board support for j721e evm
Add board specific initialization for j721e evm
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Suman Anna [Thu, 13 Jun 2019 04:59:48 +0000 (10:29 +0530)]
armv8: K3: j721e: Add custom MMU support
The A72 U-Boot code loads and boots a number of remote processors
including the C71x DSP, both the C66_0 and C66_1 DSPs, and the various
Main R5FSS Cores. Change the memory attributes for the DDR regions used
by the remote processors so that the cores can see and execute the
proper code.
A separate table based on the current AM65x table is added for J721E SoCs,
since the number of remote processors and their DDR usage will be different
between the two SoC families.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Thu, 13 Jun 2019 04:59:47 +0000 (10:29 +0530)]
armv7R: K3: j721e: Load SYSFW binary and config from boot media
Use the System Firmware (SYSFW) loader framework to load and start
the SYSFW as part of the J721E early initialization sequence. While
at it also initialize the MCU_UART0 pinmux as it is used by SYSFW
to print diagnostic messages.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Thu, 13 Jun 2019 04:59:46 +0000 (10:29 +0530)]
armv7R: K3: j721e: Shut down R5 core after ATF startup on A72
Populate the release_resources_for_core_shutdown() api with
shutting down r5 cores so that it will by called just after
jumping to ATF.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Thu, 13 Jun 2019 04:59:45 +0000 (10:29 +0530)]
armv7R: K3: j721e: Store boot index from ROM
Obtain the boot index as left behind by the device boot ROM and store
it in scratch pad SRAM for later use before it may get overwritten.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Andreas Dannenberg [Thu, 13 Jun 2019 04:59:44 +0000 (10:29 +0530)]
armv7R: K3: j721e: Unlock all applicable control MMR registers
To access various control MMR functionality the registers need to
be unlocked. Do that for all control MMR regions in the MCU and MAIN
domains. We may want to go back later and limit the unlocking that's
being done.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Lokesh Vutla [Thu, 13 Jun 2019 04:59:43 +0000 (10:29 +0530)]
armv7R: K3: j721e: Add support for boot device detection
J721E allows for booting from primary or backup boot media.
Both media can be chosen individually based on switch settings.
ROM looks for a valid image in primary boot media, if not found
then looks in backup boot media. In order to pass this boot media
information to boot loader, ROM stores a value at a particular
address. Add support for reading this information and determining
the boot media correctly.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Lokesh Vutla [Thu, 13 Jun 2019 04:59:42 +0000 (10:29 +0530)]
arm: K3: j721e: Add basic support for J721E SoC definition
The J721E SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration to enable lower system costs
of automotive applications such as infotainment, cluster, premium
Audio, Gateway, industrial and a range of broad market applications.
This SoC is designed around reducing the system cost by eliminating
the need of an external system MCU and is targeted towards ASIL-B/C
certification/requirements in addition to allowing complex software
and system use-cases.
Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, three clusters of lockstep
capable dual Cortex-R5F MCUs, Deep-learning Matrix Multiply Accelerator(MMA),
C7x floating point Vector DSP, Two C66x floating point DSPs.
* 3D GPU PowerVR Rogue 8XE GE8430
* Vision Processing Accelerator (VPAC) with image signal processor and Depth
and Motion Processing Accelerator (DMPAC)
* Two Gigabit Industrial Communication Subsystems (ICSSG), each with dual
PRUs and dual RTUs
* Two CSI2.0 4L RX plus one CSI2.0 4L TX, one eDP/DP, One DSI Tx, and
up to two DPI interfaces.
* Integrated Ethernet switch supporting up to a total of 8 external ports in
addition to legacy Ethernet switch of up to 2 ports.
* System MMU (SMMU) Version 3.0 and advanced virtualisation
capabilities.
* Upto 4 PCIe-GEN3 controllers, 2 USB3.0 Dual-role device subsystems,
16 MCANs, 12 McASP, eMMC and SD, UFS, OSPI/HyperBus memory controller, QSPI,
I3C and I2C, eCAP/eQEP, eHRPWM, MLB among other peripherals.
* Two hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
management.
* Configurable L3 Cache and IO-coherent architecture with high data throughput
capable distributed DMA architecture under NAVSS
* Centralized System Controller for Security, Power, and Resource
Management (DMSC)
See J721E Technical Reference Manual (SPRUIL1, May 2019)
for further details: http://www.ti.com/lit/pdf/spruil1
Add base support for J721E SoC
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Lokesh Vutla [Fri, 7 Jun 2019 13:55:59 +0000 (19:25 +0530)]
remoteproc: k3_rproc: Rename to ti_k3_arm64_rproc
k3_rproc driver is specifically meant for controlling an arm64
core using TISCI protocol. So rename the driver, Kconfig symbol,
compatible and functions accordingly.
While at it drop this remoteproc selection for a53 defconfig.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Fri, 7 Jun 2019 13:55:58 +0000 (19:25 +0530)]
remoteproc: k3_rproc: Update the driver to use ti_sci_proc helpers
Update the k3_rproc driver to use the generic ti_sci_proc helper
apis which simplifies the driver a bit.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Fri, 7 Jun 2019 13:55:57 +0000 (19:25 +0530)]
remoteproc: tisci: add TI-SCI processor control helper functions
Texas Instruments' K3 generation SoCs has specific modules/register
spaces used for configuring the various aspects of a remote processor.
These include power, reset, boot vector and other configuration features
specific to each compute processor present on the SoC. These registers
are managed by the System Controller such as DMSC on K3 AM65x SoCs.
The Texas Instrument's System Control Interface (TI-SCI) Message Protocol
is used to communicate to the System Controller from various compute
processors to invoke specific services provided by the firmware running
on the System Controller.
Add a common processor control interface header file that can be used by
multiple remoteproc drivers. The helper functions within this header file
abstract the various TI SCI protocol ops for the remoteproc drivers, and
allow them to request the System Controller to be able to program and
manage various remote processors on the SoC. The common macros required
by the R5 remoteproc driver were also added. The remoteproc drivers are
expected to manage the life-cycle of their ti_sci_proc_dev local
structures.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Lokesh Vutla [Fri, 7 Jun 2019 13:55:56 +0000 (19:25 +0530)]
cmd: remoteproc: Allow list command to print the probed devices
'rproc list' is currently allowed only after probing all the
available remoteproc devices. Given that 'rproc init' is updated
to probe and initialize devices individually, allow the 'rproc list'
command to print all probed devices at any point.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Fri, 7 Jun 2019 13:55:55 +0000 (19:25 +0530)]
cmd: remoteproc: Add support for initializing devices individually
'rproc init' does the probe and initialization of all the available
remoteproc devices in the system. This doesn't allow the flexibility
to initialize the remote cores needed as per use case. In order
to provide flexibility, update 'rproc init' command to accept one
more parameter with rproc id which when passed initializes only
that specific core. If no id is passed, command will initializes
all the cores which is compatible with the existing behaviour.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Fri, 7 Jun 2019 13:54:47 +0000 (19:24 +0530)]
arm: dts: k3-am654: Update power-domains property for each node
Update the power-domain-cells to 2 and add the permissions
to each node. Mark the following nodes accessed by r5 as shared:
- DDR node
- main uart 0
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Fri, 7 Jun 2019 13:54:46 +0000 (19:24 +0530)]
power: domain: ti_sci_power_domains: Add support for exclusive and shared access
TISCI protocol supports for enabling the device either with exclusive
permissions for the requesting host or with sharing across the hosts.
There are certain devices which are exclusive to Linux context and
there are certain devices that are shared across different host contexts.
So add support for getting this information from DT by increasing
the power-domain cells to 2.
For keeping the DT backward compatibility intact, defaulting the
device permissions to set the exclusive flag set. In this case the
power-domain-cells is 1.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Fri, 7 Jun 2019 13:54:45 +0000 (19:24 +0530)]
dt-bindings: ti_sci_pm_domains: Add support for exclusive and shared access
TISCI protocol supports for enabling the device either with exclusive
permissions for the requesting host or with sharing across the hosts.
There are certain devices which are exclusive to Linux context and
there are certain devices that are shared across different host contexts.
So add support for getting this information from DT by increasing
the power-domain cells to 2.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Fri, 7 Jun 2019 13:54:44 +0000 (19:24 +0530)]
power-domain: Add private data to power domain
Certain drivers want to attach private data corresponding to each
power domain. This data might be specific be to the drvier. So add
a priv entry into the power_domain structure.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Fri, 7 Jun 2019 13:54:43 +0000 (19:24 +0530)]
armv7R: k3: Release all the exclusive devices
Release all the exclusive devices held by SPL.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Fri, 7 Jun 2019 13:54:42 +0000 (19:24 +0530)]
armv7R: K3: am654: Shut down R5 core after ATF startup on A53
Rather than simply parking the R5 core in WFE after starting up ATF
on A53 instead use SYSFW API to properly shut down the R5 CPU cores
as well as associated timer resources that were pre-allocated. This
allows software further downstream to properly and gracefully bring
the R5 cores back online if desired.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Fri, 7 Jun 2019 13:54:41 +0000 (19:24 +0530)]
firmware: ti_sci: Add a command for releasing all exclusive devices
Any host while requesting for a device can request for its exclusive
access. If an exclusive permission is obtained then it is the host's
responsibility to release the device before the software entity on
the host completes its execution. Else any other host's request for
the device will be nacked. So add a command that releases all the
exclusive devices that is acquired by the current host. This should
be used with utmost care and can be called only at the end of the
execution.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Fri, 7 Jun 2019 13:54:40 +0000 (19:24 +0530)]
firmware: ti_sci: Add processor shutdown API method
Add and expose a new processor shutdown API that wraps the two TISCI
messages involved in initiating a core shutdown. The API will first
queue a message to have the DMSC wait for a certain processor boot
status to happen followed by a message to trigger the actual shutdown-
with both messages being sent without waiting or requesting for a
response. Note that the processor shutdown API call will need to be
followed up by user software placing the respective core into either
WFE or WFI mode.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Lokesh Vutla [Fri, 7 Jun 2019 13:54:39 +0000 (19:24 +0530)]
firmware: ti_sci: Allow for device shared and exclusive requests
Sysfw provides an option for requesting exclusive access for a
device using the flags MSG_FLAG_DEVICE_EXCLUSIVE. If this flag is
not used, the device is meant to be shared across hosts. Once a device
is requested from a host with this flag set, any request to this
device from a different host will be nacked by sysfw. Current tisci
driver enables this flag for every device requests. But this may not
be true for all the devices. So provide a separate commands in driver
for exclusive and shared device requests.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tom Rini [Thu, 25 Jul 2019 19:02:36 +0000 (15:02 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-net
- DaVinci emac DM work
- NXP driver work
- macb updates for RISC-V
Emmanuel Vadot [Fri, 19 Jul 2019 20:26:38 +0000 (22:26 +0200)]
net: sun8i_emac: Test the correct phy
H3/H5 can either use the internal phy or an external one.
Before getting clock and resets for the internal phy,
test that we are using it because otherwise it break emac
when using an external phy.
Tested-on: OrangePi PC2 (H5)
Fixes:
2348453c41 (net: sun8i_emac: Add EPHY CLK and RESET support)
Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Bartosz Golaszewski [Wed, 24 Jul 2019 08:12:07 +0000 (10:12 +0200)]
net: davinci_emac: convert to using the driver model
Now that we removed all legacy boards selecting TI_EMAC we can
completely convert the driver code to using the driver model.
This patch also updates all remaining users of davinci_emac.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Tested-by: Adam Ford <aford173@gmail.com> #am3517-evm & da850-evm
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Anup Patel [Wed, 24 Jul 2019 04:09:44 +0000 (04:09 +0000)]
riscv: sifive: fu540: Sync-up config header with RISC-V QEMU support
We typically use same set of distro images (yocto, debian, fedora, etc.)
on both QEMU RISC-V virt machine and SiFive Unleashed board.
With growing kernel and ramdisk images, we need to re-adjust default
U-Boot environment variables. The config header for QEMU RISC-V virt
machine has been already updated to handle bigger kernel and ramdisk
images hence this patch updates SiFive FU540 config header accordingly.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Tested-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Anup Patel [Wed, 24 Jul 2019 04:09:37 +0000 (04:09 +0000)]
net: macb: Fix check for little-endian system in gmac_configure_dma()
Instead of depending on CONFIG_SYS_LITTLE_ENDIAN, we check at runtime
whether underlying system is little-endian or big-endian. This way
we are not dependent on any U-Boot specific OR compiler specific macro
to check system endianness.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Anup Patel [Wed, 24 Jul 2019 04:09:32 +0000 (04:09 +0000)]
net: macb: Extend MACB driver for SiFive Unleashed board
The SiFive MACB ethernet has a custom TX_CLK_SEL register to select
different TX clock for 1000mbps vs 10/100mbps.
This patch adds SiFive MACB compatible string and extends the MACB
ethernet driver to change TX clock using TX_CLK_SEL register for
SiFive MACB.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Jianchao Wang [Thu, 18 Jul 2019 21:30:01 +0000 (00:30 +0300)]
Add support for the NXP LS1021A-TSN board
The LS1021A-TSN is a development board built by VVDN/Argonboards in
partnership with NXP.
It features the LS1021A SoC and the first-generation SJA1105T Ethernet
switch for prototyping implementations of a subset of IEEE 802.1 TSN
standards.
Supported boot media: microSD card (via SPL), QSPI flash.
Rev. A of the board uses a Spansion S25FL512S_256K serial flash, which
is 64 MB in size and has an erase sector size of 256KB (therefore,
flashing the RCW would erase part of U-Boot).
Rev. B and C of the board use a Spansion S25FL256S1 serial flash, which
is only 32 MB in size but has an erase sector size of 64KB (therefore
the RCW image can be flashed without erasing U-Boot).
To avoid the problems above, the U-Boot base address has been selected
at 0x100000 (the start of the 5th 256KB erase sector), which works for
all board revisions. Actually 0x40000 would have been enough, but
0x100000 is common for all Layerscape devices.
eTSEC3 is connecting directly to SJA1105 via an RGMII fixed-link, but
SJA1105 is currently not supported by uboot. Therefore, eTSEC3 is
disabled.
Signed-off-by: Xiaoliang Yang <xiaoliang.yang_1@nxp.com>
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Jianchao Wang <jianchao.wang@nxp.com>
Signed-off-by: Changming Huang <jerry.huang@nxp.com>
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
[Vladimir] Code taken from https://github.com/openil/u-boot (which
itself is mostly copied from ls1021a-iot) and adapted with the following
changes:
- Add a008850 errata workaround
- Converted eTSEC, MMC to DM to avoid all build warnings
- Plugged in distro boot feature, including support for extlinux.conf
- Added defconfig for QSPI boot
- Added the board/freescale/ls1021atsn/README.rst for initial setup
- Increased CONFIG_SYS_MONITOR_LEN so that the SPL malloc pool does not
get overwritten during copying of the u-boot.bin payload from MMC to
DDR.
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Vladimir Oltean [Thu, 18 Jul 2019 21:30:00 +0000 (00:30 +0300)]
configs: ls1021atwr: Fix distro_bootcmd for QSPI boot
Due to a typo, "run qspi_bootcmd" and "env exists secureboot" got
concatenated instead of being separated by a semicolon.
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Bin Meng [Thu, 18 Jul 2019 21:29:59 +0000 (00:29 +0300)]
arm: ls1021atwr: Convert to use driver model TSEC driver
Now that we have added driver model support to the TSEC driver,
convert ls1021atwr board to use it.
This depends on previous DM series for ls1021atwr:
http://patchwork.ozlabs.org/patch/561855/
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
[Vladimir] Made the following changes:
- Added 'status = "disabled";' for all Ethernet ports in ls1021a.dtsi
- Fixed the confusion between the SGMII/TBI PCS for enet0 and enet1 -
a mistake ported over from Linux. Each SGMII PCS lies on the private
MDIO bus of the interface (and the RGMII enet2 has no SGMII PCS).
- Added CONFIG_DM_ETH to all ls1021atwr_* defconfigs
- Completely removed non-DM_ETH support from ls1021atwr
- Changed "compatible" string from "fsl,tsec-mdio" to "fsl,etsec2-mdio"
and from "fsl,tsec" to "fsl,etsec2" to match Linux
Vladimir Oltean [Thu, 18 Jul 2019 21:29:58 +0000 (00:29 +0300)]
net: tsec: Change compatible strings to match Linux
In the case of the tsec network driver, so far there has been no
mainline user of DM_ETH where the DT bindings get used.
In the case of the mdio bus, it looks like the "fsl,tsec-mdio" string
was made up for the documentation, but there is no mainline code that
parses the "compatible" property anyway.
In both cases, there are no DT blobs that contain the old strings.
So change the documentation to "fsl,etsec2" for the Ethernet ports and
"fsl,etsec2-mdio" for the MDIO buses, which are strings that Linux also
uses, at least for LS1021A. More compatible strings can be added once
other (PowerPC) SoCs are migrated to DM_ETH.
The current ls1021a.dtsi doesn't match what was documented for the MDIO
buses anyway (the "compatible" is "gianfar" currently). This will be
fixed in the next patch.
Fixes:
69a00875e3db ("doc: dt-bindings: Describe Freescale TSEC ethernet controller")
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Vladimir Oltean [Thu, 18 Jul 2019 21:29:57 +0000 (00:29 +0300)]
net: tsec: Common handling of MAC station address for DM_ETH
In tsec_init, the MAC address is retrieved from 2 different structures
depending on whether DM_ETH is enabled or not.
But since the field name is the same inside both structures, we can
conditionally define the structure of the correct type and simplify the
assignments.
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Vladimir Oltean [Thu, 18 Jul 2019 21:29:56 +0000 (00:29 +0300)]
net: tsec: Make errors visible
This replaces debug() calls with printf() so that it is immediately
obvious from the console that something is wrong.
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Vladimir Oltean [Thu, 18 Jul 2019 21:29:55 +0000 (00:29 +0300)]
net: tsec: Reverse Christmas tree notation
This is a cosmetic patch that reorders variable definitions in the
inverse order of their line length, where possible.
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Vladimir Oltean [Thu, 18 Jul 2019 21:29:54 +0000 (00:29 +0300)]
net: tsec: Fix offset of MDIO registers for DM_ETH
By convention, the eTSEC MDIO controller nodes are defined in DT at
0x2d24000 and 0x2d50000, but actually U-Boot does not touch the
interrupt portion of the register map (MDIO_IEVENTM, MDIO_IMASKM,
MDIO_EMAPM).
That leaves only the MDIO bus registers (MDIO_MIIMCFG, MDIO_MIIMCOM,
MDIO_MIIMADD, MDIO_MIIMADD, MDIO_MIIMCON, MDIO_MIIMSTAT) which start at
the 0x520 offset.
So shift the DT-defined register map by the offset of MDIO_MIIMCFG when
mapping the MDIO bus registers.
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Vladimir Oltean [Thu, 18 Jul 2019 21:29:53 +0000 (00:29 +0300)]
net: tsec: Refactor the readout of the tbi-handle property
The point of this patch is to eliminate the use of the locally-defined
"reg" variable (which interferes with next patch) and simplify the
fallback to the default CONFIG_SYS_TBIPA_VALUE in case "tbi-handle" is
missing.
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Ramon Fried [Sun, 14 Jul 2019 15:25:14 +0000 (18:25 +0300)]
net/macb: increase RX buffer size for GEM
Macb Ethernet controller requires a RX buffer of 128 bytes. It is
highly sub-optimal for Gigabit-capable GEM that is able to use
a bigger DMA buffer. Change this constant and associated macros
with data stored in the private structure.
RX DMA buffer size has to be multiple of 64 bytes as indicated in
DMA Configuration Register specification.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Ramon Fried [Tue, 16 Jul 2019 19:04:36 +0000 (22:04 +0300)]
net: macb: apply sane DMA configuration
DMA configuration was heavily dependent on the HW
defaults, add function to properly set the required
fields, including the new dma_burst_length.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Ramon Fried [Tue, 16 Jul 2019 19:04:35 +0000 (22:04 +0300)]
net: macb: add dma_burst_length config
GEM support higher DMA burst writes/reads than the default (4).
add configuration structure with dma burst length so it could be
applied later to DMA configuration.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Ramon Fried [Tue, 16 Jul 2019 19:04:34 +0000 (22:04 +0300)]
net: macb: add support for SGMII phy interface
This patch adds support for the sgmii phy interface,
available only to DM users, dictated by current driver
design.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Ramon Fried [Tue, 16 Jul 2019 19:04:33 +0000 (22:04 +0300)]
net: macb: use bit access macro from header file
macb.h provides macros for reading/setting bitfields,
in macb registers and descriptors. use that instead
of redefining them in the source file.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Ramon Fried [Tue, 16 Jul 2019 19:04:32 +0000 (22:04 +0300)]
net: macb: add support for faster clk rates
add support for clock rates higher than 2.4Mhz
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Ramon Fried [Tue, 16 Jul 2019 19:03:00 +0000 (22:03 +0300)]
net: macb: sync header definitions as taken from Linux
Few registers and bits were added by Cadence and
they were not updated in the headers.
Take the latest definitions as defined in Linux
header (5.1) that also includes some comments
about existing registers.
One register was improperly named (UR), fix that.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Alex Marginean [Tue, 16 Jul 2019 08:21:18 +0000 (11:21 +0300)]
doc: bindings: Add binding for register driven MDIO muxes
This binding documents two properties that describe the registers used to
perform MUX selection.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Alex Marginean [Tue, 16 Jul 2019 08:21:17 +0000 (11:21 +0300)]
drivers: net: driver for MDIO muxes controlled over I2C
This driver is used for MDIO muxes driven over I2C. This is currently
used on Freescale LS1028A QDS board, on which the physical MDIO MUX is
controlled by an on-board FPGA which in turn is configured through I2C.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Goldschmidt [Mon, 15 Jul 2019 19:53:05 +0000 (21:53 +0200)]
net: designware: use 'phy_connect' instead of open coded
Using 'phy_connect' instead of 'phy_find_by_mask' and 'phy_connect_dev'
both deduplicates code and adds support for 'fixed-link'.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Alex Marginean [Mon, 15 Jul 2019 08:48:47 +0000 (11:48 +0300)]
drivers: net: fsl_enetc: add support for SGMII 2500
SGMII 2500 as supported on NXP SoCs requires AN to be disabled, handle
this case in the enetc sgmii init code.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Alex Marginean [Wed, 3 Jul 2019 09:11:44 +0000 (12:11 +0300)]
configs: ls1028a: enable networking options in rdb, qds defconfig
Enables ethernet, MDIO, PHY drivers for LS1028A RDB and QDS.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Alex Marginean [Wed, 3 Jul 2019 09:11:43 +0000 (12:11 +0300)]
arm: dts: ls1028a updates for network interfaces
Defines LS1028A RDB SGMII port, QDS RGMII port.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Alex Marginean [Wed, 3 Jul 2019 09:11:42 +0000 (12:11 +0300)]
drivers: net: apply serdes configuration for ENETC Ethernet interfaces
Ethernet interfaces using serial protocols go through the serdes block
integrated in the SoC. This is accessed over dedicated internal MDIOs
which are part of the Ethernet PCI functions. Set up serdes at _start,
along with other protocol specific port/MAC configuration.
MDIO code is shared with enetc_mdio, read/write functions are exported
from fsl_enetc_mdio for this reason.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Alex Marginean [Wed, 3 Jul 2019 09:11:41 +0000 (12:11 +0300)]
drivers: net: add NXP ENETC MDIO driver
Adds a driver for the MDIO interface currently integrated in LS1028A SoC.
This MDIO interface is shared by multiple ethernet interfaces and is
presented as a stand-alone PCI function on the SoC ECAM.
Ethernet has a functional dependency on MDIO, for simplicity there is a
single config option for both.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Alex Marginean [Wed, 3 Jul 2019 09:11:40 +0000 (12:11 +0300)]
drivers: net: add NXP ENETC ethernet driver
Adds a driver for NXP ENETC ethernet controller currently integrated in
LS1028A. ENETC is a fairly straight-forward BD ring device and interfaces
are presented as PCI EPs on the SoC ECAM.
Signed-off-by: Catalin Horghidan <catalin.horghidan@nxp.com>
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Alex Marginean [Wed, 3 Jul 2019 09:11:39 +0000 (12:11 +0300)]
include: configs: ls1028a: set SYS_RX_ETH_BUFFER to 8
LS1028A ethernet interfaces work with at least 8 BDs, set number of buffers
to match that.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Tom Rini [Wed, 24 Jul 2019 15:29:47 +0000 (11:29 -0400)]
gitlab-ci: Update Docker image to xenial-
20190720-24Jul2019 tag
- Add in lzma-alone for current binman tests
- Update to Ubuntu's xenial-
20190720 tag (latest).
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Wed, 24 Jul 2019 17:14:56 +0000 (13:14 -0400)]
gitlab-ci: Add pyelftools to the binman testsuite section
We need pyelftools here to run rather than skip some tests.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Wed, 24 Jul 2019 20:24:50 +0000 (16:24 -0400)]
Merge tag 'dm-pull-24jul19-take3' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm
Minor driver-model fixes and tweaks
A few device-tree fixes
Binman support for extracting files from an image
Anatolij Gustschin [Sun, 14 Jul 2019 19:11:01 +0000 (21:11 +0200)]
dm: device: make power domain calls optional
Reduce power domain calls when CONFIG_POWER_DOMAIN is disabled.
With gcc v8.2, this change saves 104 bytes.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Baruch Siach [Thu, 11 Jul 2019 09:57:41 +0000 (12:57 +0300)]
buildman: fix invocation examples typos
Also, make command line example indentation consistent.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Sekhar Nori [Thu, 11 Jul 2019 09:00:24 +0000 (14:30 +0530)]
clk: initialize clk->data when using default xlate
Right now when using clk_of_xlate_default(), clk->data
remains un-initialized because clk_get_bulk() does not
initialize memory on allocation of clock structure.
This can cause problems when data is used to match if
two clocks pointers are exactly the same underlying
clocks, for example.
Fix it by initializing clk->data to 0.
Suggested-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Baruch Siach [Thu, 11 Jul 2019 08:23:44 +0000 (11:23 +0300)]
dm: uclass: fix comment copy/paste error
The uclass_next_device() routine continues a previously started device
iteration. Change the description that is copied from
uclass_first_device().
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Tue, 9 Jul 2019 00:49:29 +0000 (02:49 +0200)]
common: fdt_support: Add missing cpu_to_fdt32() to fdt_pci_dma_ranges()
The fdt_pci_dma_ranges() cannot work on e.g. ARM, since the DT entries
endianness is not adjusted at all. Fix this.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Bin Meng [Fri, 5 Jul 2019 16:23:18 +0000 (09:23 -0700)]
dm: Fix parameter description of dev_read_name()
The comments of dev_read_name() wrongly describe "node" as its
parameter.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 5 Jul 2019 16:23:17 +0000 (09:23 -0700)]
dm: core: Set correct "status" value for a node
Per device tree spec, "status" property can have a value of "okay",
or "disabled", but not "disable".
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 5 Jul 2019 16:23:16 +0000 (09:23 -0700)]
dm: core: Call clk_set_defaults() during probe() only for a valid ofnode
Without a valid ofnode, it's meaningless to call clk_set_defaults()
to process various properties.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 5 Jul 2019 16:23:15 +0000 (09:23 -0700)]
dm: timer: Skip device that does not have a valid ofnode in pre_probe()
It is possible that a timer device has a null ofnode, hence there is
no need to further parse DT for the clock rate.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Thu, 27 Jun 2019 07:39:57 +0000 (16:39 +0900)]
fdt: make fdt_get_base_address() return OF_BAD_ADDR when "reg" not found
Currently, fdt_get_base_address() returns 0 if the "reg" property is
missing. Since 0 is a valid value, it is not suitable for the error
handling. Return OF_BAD_ADDR instead.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 8 Jul 2019 20:25:53 +0000 (14:25 -0600)]
binman: Add a test for nested and aligned sections
Current test coverage is likely sufficient for the logic used to place
sections in the image. However it seems useful to add a test specifically
for nested sections, since these could have some unusual interactions.
Add a new test for this and aligned sections. This test failed before the
refactor to drop the bsection.py file (Section class), but passes now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Jul 2019 20:25:52 +0000 (14:25 -0600)]
binman: Add an 'extract' command
It is useful to be able to extract all binaries from the image, or a
subset of them. Add a new 'extract' command to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Jul 2019 20:25:51 +0000 (14:25 -0600)]
binman: Support reading from CBFS entries
CBFS is a bit like a section but with a custom format. Provide the list of
entries and the compression type to binman so that it can extract the data
from the CBFS, just like any other part of the image.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Jul 2019 20:25:50 +0000 (14:25 -0600)]
binman: Allow reading an entry from an image
It is useful to be able to extract entry contents from an image to see
what is inside. Add a simple function to read the contents of an entry,
decompressing it by default.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Jul 2019 20:25:49 +0000 (14:25 -0600)]
binman: Allow for logging information to be displayed
Binman generally operates silently but in some cases it is useful to see
what Binman is actually doing at each step. Enable some logging output
with different logging levels selectable via the -v flag.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Jul 2019 20:25:48 +0000 (14:25 -0600)]
binman: Support listing an image
Add support for listing the entries in an image. This relies on the image
having an FDT map.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Jul 2019 20:25:47 +0000 (14:25 -0600)]
binman: Convert Image to a subclass of Entry
When support for sections (and thus hierarchical images) was added to
binman, the decision was made to create a new Section class which could
be used by both Image and an Entry_section class. The decision between
using inheritance and composition was tricky to make, but in the end it
was decided that Image was different enough from Entry that it made sense
to put the implementation of sections in an entirely separate class. It
also has the advantage that core Image code does have to rely on an entry
class in the etype directory.
This work was mostly completed in commit:
8f1da50ccc "binman: Refactor much of the image code into 'section'
As a result of this, the Section class has its own version of things like
offset and size and these must be kept in sync with the parent
Entry_section class in some cases.
In the last year it has become apparent that the cost of keeping things in
sync is larger than expected, since more and more code wants to access
these properties.
An alternative approach, previously considered and rejected, now seems
better.
Adjust Image to be a subclass of Entry_section. Move the code from Section
(in bsection.py) to Entry_section and delete Section. Update all tests
accordingly.
This requires substantial changes to Image. Overall the changes reduce
code size by about 240 lines. While much of that is just boilerplate from
Section, there are quite a few functions in Entry_section which now do not
need to be overiden from Entry. This suggests the change is beneficial
even without further functionality being added.
A side benefit is that the properties of sections are now consistent with
other entries. This fixes a problem in testListCmd() where some properties
are missing for sections.
Unfortunately this is a very large commit since it is not feasible to do
the migration piecemeal. Given the substantial tests available and the
100% code coverage of binman, we should be able to do this safely.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Jul 2019 20:25:46 +0000 (14:25 -0600)]
binman: Support reading an image into an Image object
It is possible to read an Image, locate its FDT map and then read it into
the binman data structures. This allows full access to the entries that
were written to the image. Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Jul 2019 20:25:45 +0000 (14:25 -0600)]
binman: Support locating an image header
Add support for locating an image header in an image.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Jul 2019 20:25:44 +0000 (14:25 -0600)]
binman: Support locating an FDT map
Add support for locating an image's Fdt map which is used to determine
the contents and structure of the image.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Jul 2019 20:25:43 +0000 (14:25 -0600)]
binman: Allow listing the entries in an image
It is useful to be able to summarise all the entries in an image, e.g. to
display this to this user. Add a new ListEntries() method to Entry, and
set up a way to call it through the Image class.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Jul 2019 20:25:42 +0000 (14:25 -0600)]
binman: Detect bad CBFS file types
Detect when an unknown or unsupported file type is specified and report
an error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Jul 2019 20:25:41 +0000 (14:25 -0600)]
binman: Support FDT update for CBFS
It is useful to add the CBFS file information (offset, size, etc.) into
the FDT so that the layout is complete. Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Jul 2019 20:25:40 +0000 (14:25 -0600)]
binman: Use the cbfs memlen field only for uncompressed length
The purpose of this badly named field is a bit ambiguous. Adjust the code
to use it only to store the uncompressed length of a file, leaving it set
to None if there is no compression used. This makes it easy to see if the
value in this field is relevant / useful.
Also set data_len for compressed fields, since it should be the length of
the compressed data, not the uncompressed data.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Jul 2019 20:25:39 +0000 (14:25 -0600)]
binman: Provide the actual data address for cbfs files
At present a file with no explicit CBFS offset is placed in the next
available location but there is no way to find out where it ended up.
Update and rename the get_data() function to provide this information.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Jul 2019 20:25:38 +0000 (14:25 -0600)]
binman: Allow device-tree entries to be compressed
At present the logic skips the blob class' handling of compression, so
this is not supported with device tree entries. Fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Jul 2019 20:25:37 +0000 (14:25 -0600)]
binman: Allow entries to expand after packing
Add support for detecting entries that change size after they have already
been packed, and re-running packing when it happens.
This removes the limitation that entry size cannot change after
PackEntries() is called.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Jul 2019 20:25:36 +0000 (14:25 -0600)]
binman: Add a control for post-pack entry expansion
We plan to support changing the size of entries after they have been
packed. For now it will always be enabled. But to aid testing of both
cases (in the event that we want to add a command-line flag, for example),
add a setting to control it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Jul 2019 20:25:35 +0000 (14:25 -0600)]
binman: Add a return value to ProcessContentsUpdate()
At present if this function tries to update the contents such that the
size changes, it raises an error. We plan to add the ability to change
the size of entries after packing is completed, since in some cases it is
not possible to determine the size in advance.
An example of this is with a compressed device tree, where the values
of the device tree change in SetCalculatedProperties() or
ProcessEntryContents(). While the device tree itself does not change size,
since placeholders for any new properties have already bee added by
AddMissingProperties(), we cannot predict the size of the device tree
after compression. If a value changes from 0 to 0x1234 (say), then the
compressed device tree may expand.
As a first step towards supporting this, make ProcessContentsUpdate()
return a value indicating whether the content size is OK. For now this is
always True (since otherwise binman raises an error), but later patches
will adjust this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Jul 2019 20:25:34 +0000 (14:25 -0600)]
binman: Call ProcessUpdateContents() consistently
SetContents() should only be called to set the contents of an entry from
within the ObtainContents() call, since it has no guard against increasing
the size of the contents, thus triggering incorrect operation.
Change all such calls to use ProcessUpdateContents() instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Jul 2019 20:25:33 +0000 (14:25 -0600)]
binman: Fix up ProcessUpdateContents error and comments
This function raises an exception with its arguments around the wrong way
so the message is incorrect. Fix this as well as a few minor comment
problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Jul 2019 20:25:32 +0000 (14:25 -0600)]
binman: Allow easy importing of entry modules
At present entry modules can only be accessed using Entry.Lookup() or
Entry.Create(). Most of the time this is fine, but sometimes a module
needs to provide constants or helper functions useful to other modules.
It is easier in this case to use 'import'.
Add an __init__ file to permit this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Jul 2019 20:25:31 +0000 (14:25 -0600)]
binman: Drop an unused arg in Entry.Lookup()
The first argument is not used. Remove it.
Signed-off-by: Simon Glass <sjg@chromium.org>