external/binutils.git
8 years agoPass a NULL pointer as the last argument to find_pc_partial_function.
John Baldwin [Sat, 11 Jun 2016 15:15:09 +0000 (08:15 -0700)]
Pass a NULL pointer as the last argument to find_pc_partial_function.

gdb/ChangeLog:

* tui/tui-stack.c (tui_show_frame_info): Fix type mismatch.

8 years agoInitialize 'ra' to zero to avoid uninitialized use.
John Baldwin [Sat, 11 Jun 2016 14:26:09 +0000 (07:26 -0700)]
Initialize 'ra' to zero to avoid uninitialized use.

If the instruction in this case does not include an RA field, then 'ra'
is used uninitialized.  Use the same idiom used elsewhere in this file of
initializing ra to zero before check for an RA field.

gdb/ChangeLog:

* rs6000-tdep.c (ppc_process_record_op31): Initialize ra.

8 years agoChange the size field of MSP430_Opcode_Decoded to a plain integer.
John Baldwin [Sat, 11 Jun 2016 14:20:02 +0000 (07:20 -0700)]
Change the size field of MSP430_Opcode_Decoded to a plain integer.

The size field was defined as an instance of an enum, but existing code
treats the size field as a plain integer containing a bit count.

include/ChangeLog:

* opcode/msp430-decode.h (MSP430_Size): Remove.
(Msp430_Opcode_Decoded): Change type of size to int.

8 years agoUse correct enum type for do_elf_stt_common.
John Baldwin [Sat, 11 Jun 2016 13:09:06 +0000 (06:09 -0700)]
Use correct enum type for do_elf_stt_common.

binutils/ChangeLog:

* objcopy.c (do_elf_stt_common): Use correct type.

8 years agoCheck R_*_IRELATIVE in x86 reloc_type_class
H.J. Lu [Tue, 14 Jun 2016 17:18:26 +0000 (10:18 -0700)]
Check R_*_IRELATIVE in x86 reloc_type_class

elf_{i386|x86_64}_reloc_type_class should return reloc_class_ifunc for
R_386_IRELATIVE/R_X86_64_IRELATIVE relocations.  There is no need to
check symbol type for STN_UNDEF symbol index.

* elf32-i386.c (elf_i386_reloc_type_class): Check R_386_IRELATIVE.
Don't check symbol type for STN_UNDEF symbol index.
* elf64-x86-64.c (elf_x86_64_reloc_type_class): Check
R_X86_64_IRELATIVE.  Don't check symbol type for STN_UNDEF symbol
index.

8 years agoFix elf_x86_64_reloc_type_class
H.J. Lu [Tue, 14 Jun 2016 16:21:00 +0000 (09:21 -0700)]
Fix elf_x86_64_reloc_type_class

8 years ago[ARC] Add ldbit for nps
Graham Markall [Mon, 13 Jun 2016 08:03:05 +0000 (09:03 +0100)]
[ARC] Add ldbit for nps

This commit adds the ldbit instruction for the NPS-400. The ldbit
instruction uses the same encoding as the ld instruction, but sets
the ZZ field to 11 (which is a reserved setting), and sets the AA
field to 1 or 2 for the x2 and x4 flags respectively.

8 years ago[ARC] Add deep packet inspection instructions for nps
Graham Markall [Thu, 9 Jun 2016 07:38:34 +0000 (08:38 +0100)]
[ARC] Add deep packet inspection instructions for nps

With the exception of ldbit, this commit adds implementations of
all DPI instructions for the NPS-400. These instructions are:

- hash / hash.p[0-3]
- tr
- utf8
- e4by
- addf

8 years ago[ARC] Add arithmetic and logic instructions for nps
Graham Markall [Fri, 3 Jun 2016 09:48:49 +0000 (10:48 +0100)]
[ARC] Add arithmetic and logic instructions for nps

This commit completes the implementation of arithmetic and logic
instructions for the NPS-400. These instructions are:

- calcbsd / calcbxd
- calckey / calcxkey
- mxb / imxb
- addl, subl, orl, andl, xorl
- andab / orab
- lbdsize
- bdlen
- csms, csma, cbba
- zncv
- hofs

8 years agoFix compile time warning building gas for the NDS32 with gcc v6.1.1
Nick Clifton [Tue, 14 Jun 2016 12:51:10 +0000 (13:51 +0100)]
Fix compile time warning building gas for the NDS32 with gcc v6.1.1

gas * config/tc-nds32.c (nds32_get_align): Avoid left shifting a
signed constant.

8 years agoFix feature checks based on ARM architecture value
Thomas Preud'homme [Tue, 14 Jun 2016 11:02:53 +0000 (12:02 +0100)]
Fix feature checks based on ARM architecture value

2016-06-14  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
* elf32-arm.c (using_thumb_only): Force review of arch check logic for
new architecture.
(using_thumb2): Try Tag_THUMB_ISA_use first and check
for exact arch value then.  Force review of arch check logic for new
architecture.
(arch_has_arm_nop): Update and fix arch check logic.  Force review of
that logic for new architecture.
(arch_has_thumb2_nop): Remove.
(elf32_arm_tls_relax): Use using_thumb2 instead of above function.
(elf32_arm_final_link_relocate): Likewise but using thumb2.

8 years agoFormatting fixes.
Alan Modra [Tue, 14 Jun 2016 03:55:21 +0000 (13:25 +0930)]
Formatting fixes.

* ldbuildid.c: Formatting.
* ldcref.c: Formatting.
* ldctor.c: Formatting.
* ldemul.c: Formatting.
* ldexp.c: Formatting.
* ldfile.c: Formatting.
* ldlang.c: Formatting.
* ldmain.c: Formatting.
* ldwrite.c: Formatting.

8 years agoDelete bfd_my_archive macro
Alan Modra [Tue, 14 Jun 2016 03:54:37 +0000 (13:24 +0930)]
Delete bfd_my_archive macro

Many more places use abfd->my_archive rather than bfd_my_archive (abfd),
so let's make the code consistently use the first idiom.

bfd/
* bfd-in.h (bfd_my_archive): Delete.
* bfd-in2.h: Regenerate.
binutils/
* ar.c: Expand uses of bfd_my_archive.
* size.c: Likewise.
ld/
* ldlang.c: Expand uses of bfd_my_archive.
* ldmain.c: Likewise.
* ldmisc.c: Likewise.
* plugin.c: Likewise.

8 years agoSet my_archive for thin archives
Alan Modra [Tue, 14 Jun 2016 03:42:00 +0000 (13:12 +0930)]
Set my_archive for thin archives

LTO plugin support in plugin_maybe_claim wants to close the IR bfd
after replacing it with the recompiled object, but can't do so for
archive elements due to various pointers that access the archive bfd.
Thin archives have the same problem.  They too cannot have their
element bfds closed.

PR ld/20241
bfd/
* archive.c (open_nested_file): Set my_archive.
* bfd.c (_bfd_default_error_handler <%B>): Exclude archive file name
for thin archives.
* bfdio.c (bfd_tell): Don't adjust origin for thin archives.
(bfd_seek): Likewise.
* bfdwin.c (bfd_get_file_window): Likewise.
* cache.c (cache_bmmap): Likewise.
(bfd_cache_lookup_worker): Don't look in my_archive for thin archives.
* mach-o.c (bfd_mach_o_follow_dsym): Don't open my_archive for
thin archives.
* plugin.c (try_claim): Likewise.
* xcofflink.c (xcoff_link_add_dynamic_symbols): Use import path of
file within thin archive, not the archive.
binutils/
* bucomm.c (bfd_get_archive_filename): Return file name within thin
archive.
ld/
* ldmain.c (add_archive_element): Just print file name of file within
thin archives.
* ldmisc.c (vfinfo): Likewise.
* plugin.c (plugin_object_p): Open file within thin archives.
(plugin_maybe_claim): Expand comment.

8 years agoAutomatic date update in version.in
GDB Administrator [Tue, 14 Jun 2016 00:00:19 +0000 (00:00 +0000)]
Automatic date update in version.in

8 years agoAdd .got.plt to testsuite/script_test_2.t
H.J. Lu [Mon, 13 Jun 2016 18:14:57 +0000 (11:14 -0700)]
Add .got.plt to testsuite/script_test_2.t

The .got.plt section must be placed right after the .got section.
Otherwise, GOT offset will be wrong.

PR gold/20246
* testsuite/script_test_2.t: Add .got.plt after .got.

8 years agoAdd the GOT base for GOT32 relocs against IFUNC
H.J. Lu [Mon, 13 Jun 2016 18:06:10 +0000 (11:06 -0700)]
Add the GOT base for GOT32 relocs against IFUNC

Add the GOT base for R_386_GOT32/R_386_GOT32X relocations against IFUNC
symbols if there is no base register and disallow them for PIC.

bfd/

PR ld/20244
* elf32-i386.c (elf_i386_relocate_section): Add the .got.plt
section address for R_386_GOT32/R_386_GOT32X relocations against
IFUNC symbols if there is no base register and return error for
PIC.

ld/

PR ld/20244
* testsuite/ld-i386/i386.exp: Run pr20244-2a, pr20244-2b,
pr20244-2c and pr20244-2d.
* testsuite/ld-i386/no-plt.exp: Run pr20244-3a and pr20244-3b.
* testsuite/ld-i386/pr20244-2.s: New file.
* testsuite/ld-i386/pr20244-2a.d: Likewise.
* testsuite/ld-i386/pr20244-2b.d: Likewise.
* testsuite/ld-i386/pr20244-2c.d: Likewise.
* testsuite/ld-i386/pr20244-2d.d: Likewise.
* testsuite/ld-i386/pr20244-3a.c: Likewise.
* testsuite/ld-i386/pr20244-3b.S: Likewise.
* testsuite/ld-i386/pr20244-3c.S: Likewise.
* testsuite/ld-i386/pr20244-3d.S: Likewise.

8 years agoAdd 2 i386 tests to call IFUNC functions via GOT
H.J. Lu [Mon, 13 Jun 2016 16:27:12 +0000 (09:27 -0700)]
Add 2 i386 tests to call IFUNC functions via GOT

bfd/

* elf32-i386.c (elf_i386_relocate_section): Simplify IFUNC
GOT32 adjustment for static executables.

ld/

2016-06-13  H.J. Lu  <hongjiu.lu@intel.com>

* testsuite/ld-i386/i386.exp: Run ifunc-1a and ifunc-1b.
* testsuite/ld-i386/ifunc-1a.c: New file.
* testsuite/ld-i386/ifunc-1b.S: Likewise.
* testsuite/ld-i386/ifunc-1c.S: Likewise.
* testsuite/ld-i386/ifunc-1d.S: Likewise.

8 years agoMIPS/GAS: Don't convert RELA JALR relocations on R6
Maciej W. Rozycki [Mon, 13 Jun 2016 15:52:42 +0000 (16:52 +0100)]
MIPS/GAS: Don't convert RELA JALR relocations on R6

Revert an inadvertent change to make RELA JALR relocations
section-relative on MIPS R6 targets made with commit 7361da2c952e ("Add
support for MIPS R6.").  There is no need to make this a special case
and the comment introduced with the said change clearly indicates this
was not intended.

gas/
* config/tc-mips.c (mips_fix_adjustable): Don't convert RELA
JALR relocations on R6.
* testsuite/gas/mips/jal-svr4pic-local.d: New test.
* testsuite/gas/mips/mips1@jal-svr4pic-local.d: New test.
* testsuite/gas/mips/r3000@jal-svr4pic-local.d: New test.
* testsuite/gas/mips/micromips@jal-svr4pic-local.d: New test.
* testsuite/gas/mips/jal-svr4pic-local-n32.d: New test.
* testsuite/gas/mips/micromips@jal-svr4pic-local-n32.d: New
test.
* testsuite/gas/mips/jal-svr4pic-local-n64.d: New test.
* testsuite/gas/mips/micromips@jal-svr4pic-local-n64.d: New
test.
* testsuite/gas/mips/jal-svr4pic-local.s: New test source.
* testsuite/gas/mips/jal-svr4pic-local-newabi.s: New test
source.
* testsuite/gas/mips/mips.exp: Run the new tests.

8 years agoMIPS/BFD: Update outdated comment about o32 R_MIPS_PC32 reloc support
Maciej W. Rozycki [Mon, 13 Jun 2016 15:29:00 +0000 (16:29 +0100)]
MIPS/BFD: Update outdated comment about o32 R_MIPS_PC32 reloc support

Complement:

commit b47468a6dbd1b54c44c2edc0f7db64a073d894ea
Author: Catherine Moore <clm@redhat.com>
Date:   Mon May 6 15:25:45 2013 +0000

and the return of support for R_MIPS_PC32 there.

bfd/
* elf32-mips.c (elf_mips_gnu_pcrel32): Update comment.

8 years ago[ARC] Fix condition.
Claudiu Zissulescu [Mon, 13 Jun 2016 15:44:48 +0000 (17:44 +0200)]
[ARC] Fix condition.

bfd/
2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>

* elf32-arc.c (elf_arc_relocate_section): Fixed condition.

8 years agogdb: Use UNSUPPORTED not XFAIL for unsupported target features
Andrew Burgess [Wed, 8 Jun 2016 09:12:56 +0000 (10:12 +0100)]
gdb: Use UNSUPPORTED not XFAIL for unsupported target features

If a target does not support making function calls from GDB then in a
number of test files, we currently report an XFAIL and skip some, or all
of the tests.  This commit changes the XFAIL to an UNSUPPORTED as this
seems more appropriate in these cases.

Some of the tests used bug ID 2416 to be reported in the XFAIL.  In the
current GDB bugzilla bug 2416 has nothing to do with calling target
functions from GDB.

gdb/testsuite/ChangeLog:

* gdb.base/call-ar-st.exp: Report unsupported rather than xfail
for unsupported target features.
* gdb.base/call-rt-st.exp: Likewise.
* gdb.base/call-sc.exp: Likewise.
* gdb.base/call-signal-resume.exp: Likewise.
* gdb.base/call-strs.exp: Likewise.
* gdb.base/callexit.exp: Likewise.
* gdb.base/callfuncs.exp: Likewise.
* gdb.base/nodebug.exp: Likewise.
* gdb.base/printcmds.exp: Likewise.
* gdb.base/ptype.exp: Likewise.
* gdb.base/structs.exp: Likewise.
* gdb.base/unwindonsignal.exp: Likewise.
* gdb.cp/gdb2495.exp: Likewise.
* gdb.cp/templates.exp: Likewise.
* gdb.cp/virtfunc.exp: Likewise.
* gdb.threads/hand-call-in-threads.exp: Likewise.
* gdb.threads/interrupted-hand-call.exp: Likewise.
* gdb.threads/thread-unwindonsignal.exp: Likewise.

8 years ago[ARC] XFAIL S-Records tests for both little and big endian ARC target.
Cupertino Miranda [Wed, 8 Jun 2016 08:36:19 +0000 (10:36 +0200)]
[ARC] XFAIL S-Records tests for both little and big endian ARC target.

ld/
2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>

* testsuite/ld-srec/srec.exp: Changed to XFAIL on both little and
big endian ARC targets.

8 years ago[ARC] Fixes related to reordering of .got and .got.plt
Cupertino Miranda [Thu, 26 May 2016 14:00:08 +0000 (16:00 +0200)]
[ARC] Fixes related to reordering of .got and .got.plt

- Correctly solved relocations on the .got header.
- This bug arrised from enabling RELRO (-z combreloc).
  Because the .got and .got.plt sections were split in new linker
  scripts the header is no longer part of sgotplt contents.
  Changed the patch to sgot contents instead.
- Latest fix to .got header relocs.

bfd/
2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>

* elf32-arc.c (elf_arc_finish_dynamic_sections): Changed.

8 years ago[ARC] General bug fixes
Cupertino Miranda [Fri, 20 May 2016 10:06:17 +0000 (12:06 +0200)]
[ARC] General bug fixes

Fail safe for trying to reloc GOT and PLT on non dynamic linker.  Fix
issue with dynamic relocs not being generated with -pie.  Removed some
structures that were not being used.  Fixed typo changing RELENT to
RELAENT.  Fix for all SECTOFF relocations.

bfd/
2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>

* elf32-arc.c (arc_local_data, arc_local_data): Removed.
(SECTSTART): Changed.
(elf_arc_relocate_section): Fixed mistake in PIE related
condition.
(elf_arc_size_dynamic_sections): Changed DT_RELENT to DT_RELAENT.

8 years ago[ARC] Generate DT_RELACOUNT.
Cupertino Miranda [Tue, 17 May 2016 10:15:41 +0000 (12:15 +0200)]
[ARC] Generate DT_RELACOUNT.

bfd/
2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>

* elf32-arc.c (elf32_arc_reloc_type_class): Defined function to
enable support for "-z combreloc" and DT_RELACOUNT.
(elf_backend_reloc_type_class): Likewise

8 years agoFix compile time warning about a redundant comparison in an assertion statement.
Nick Clifton [Mon, 13 Jun 2016 13:22:21 +0000 (14:22 +0100)]
Fix compile time warning about a redundant comparison in an assertion statement.

* gdbtypes.c (replace_type): Fix assertion.

8 years agoAccept vulcan as a cpu name for the AArch64 port of GAS.
Virendra Pathak [Mon, 13 Jun 2016 13:17:31 +0000 (14:17 +0100)]
Accept vulcan as a cpu name for the AArch64 port of GAS.

       * config/tc-aarch64.c (aarch64_cpus): Add Broadcom Vulcan.
        * doc/c-aarch64.texi: Document that vulcan is a valid processor
name.

8 years agoFix compile time warning messages building with gcc v6.1.1
Nick Clifton [Mon, 13 Jun 2016 09:49:26 +0000 (10:49 +0100)]
Fix compile time warning messages building with gcc v6.1.1

etc * texi2pod.pl: Escape curly braces, whilst searching for keyword
strong.

gas * config/tc-arm.c: For non-ELF based targets skip ARM feature sets
that are not supported.

* config/tc-arc.c (md_apply_fix): Avoid left shifting a signed
constant.
* config/tc-cr16.c (check_range): Likewise.
* config/tc-nios2.c (nios2_check_overflow): Likewise.

8 years agoAutomatic date update in version.in
GDB Administrator [Mon, 13 Jun 2016 00:00:15 +0000 (00:00 +0000)]
Automatic date update in version.in

8 years agoUpdate x86-64 no-PLT tests for x32
H.J. Lu [Sun, 12 Jun 2016 14:28:58 +0000 (07:28 -0700)]
Update x86-64 no-PLT tests for x32

X32 has different output formats for readelf and objdump as well as a
different conversion of load symbol address via GOT.

* testsuite/ld-x86-64/libno-plt-1b.dd: Updated for x32.
* testsuite/ld-x86-64/libno-plt-1b.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1a.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1a.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1b.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1b.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1c.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1c.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1d.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1e.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1e.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1f.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1f.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1g.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1g.rd: Likewise.

8 years agoSubtract GOT base only with a base register
H.J. Lu [Sun, 12 Jun 2016 03:44:24 +0000 (20:44 -0700)]
Subtract GOT base only with a base register

When relocating R_386_GOT32 in "op $0, bar@GOT", we shouldn't subtract
GOT base without a base register and we should disallow it without a
base register for PIC.

bfd/

PR ld/20244
* elf32-i386.c (elf_i386_relocate_section): When relocating
R_386_GOT32, return error without a base register for PIC and
subtract the .got.plt section address only with a base register.

ld/

PR ld/20244
* testsuite/ld-i386/i386.exp: Run pr20244-1a and pr20244-1b.
* testsuite/ld-i386/pr20244-1.s: New file.
* testsuite/ld-i386/pr20244-1a.d: Likewise.
* testsuite/ld-i386/pr20244-1b.d: Likewise.
* testsuite/ld-i386/pr20244-1c.d: Likewise.

8 years agoAutomatic date update in version.in
GDB Administrator [Sun, 12 Jun 2016 00:00:17 +0000 (00:00 +0000)]
Automatic date update in version.in

8 years agoAdd support for .MIPS.abiflags and .gnu.attributes sections.
Vladimir Radosavljevic [Fri, 10 Jun 2016 22:50:13 +0000 (15:50 -0700)]
Add support for .MIPS.abiflags and .gnu.attributes sections.

elfcpp/
* elfcpp.h (SHT_MIPS_ABIFLAGS): New enum constant.
* mips.h (EF_MIPS_FP64, EF_MIPS_NAN2008): New enum constants for
processor-specific flags.
(E_MIPS_MACH_5900): New enum constant for machine variant.
(AFL_REG_NONE, AFL_REG_32, AFL_REG_64, AFL_REG_128): New enum
constants.
(AFL_ASE_DSP, AFL_ASE_DSPR2, AFL_ASE_EVA, AFL_ASE_MCU,
AFL_ASE_MDMX, AFL_ASE_MIPS3D, AFL_ASE_MT, AFL_ASE_SMARTMIPS,
AFL_ASE_VIRT, AFL_ASE_MSA, AFL_ASE_MIPS16, AFL_ASE_MICROMIPS,
AFL_ASE_XPA): Likewise.
(AFL_EXT_XLR, AFL_EXT_OCTEON2, AFL_EXT_OCTEONP,
AFL_EXT_LOONGSON_3A, AFL_EXT_OCTEON, AFL_EXT_5900, AFL_EXT_4650,
AFL_EXT_4010, AFL_EXT_4100, AFL_EXT_3900, AFL_EXT_10000,
AFL_EXT_SB1, AFL_EXT_4111, AFL_EXT_4120, AFL_EXT_5400,
AFL_EXT_5500, AFL_EXT_LOONGSON_2E, AFL_EXT_LOONGSON_2F,
AFL_EXT_OCTEON3): Likewise.
(Tag_GNU_MIPS_ABI_FP, Tag_GNU_MIPS_ABI_MSA): Likewise.
(Val_GNU_MIPS_ABI_FP_ANY, Val_GNU_MIPS_ABI_FP_DOUBLE,
Val_GNU_MIPS_ABI_FP_SINGLE, Val_GNU_MIPS_ABI_FP_SOFT,
Val_GNU_MIPS_ABI_FP_OLD_64,Val_GNU_MIPS_ABI_FP_XX,
Val_GNU_MIPS_ABI_FP_64, Val_GNU_MIPS_ABI_FP_64A,
Val_GNU_MIPS_ABI_FP_NAN2008, Val_GNU_MIPS_ABI_MSA_ANY,
Val_GNU_MIPS_ABI_MSA_128): Likewise.
(AFL_FLAGS1_ODDSPREG): New enum constant.
gold/
* mips.cc (struct Mips_abiflags): New struct.
(Mips_relobj::Mips_relobj): Initialize attributes_section_data_
and abiflags_.
(Mips_relobj::~Mips_relobj): Delete object pointed by
attributes_section_data_.
(Mips_relobj::abiflags): New method.
(Mips_relobj::attributes_section_data): Likewise.
(Mips_relobj::attributes_section_data_): New data member.
(Mips_relobj::abiflags_): Likewise.
(class Mips_output_section_abiflags): New class.
(Target_mips::Target_mips): Initialize attributes_section_data_,
abiflags_ and has_abiflags_section_.
(Target_mips::do_should_include_section): Don't emit input
.MIPS.abiflags sections to output .MIPS.abiflags.
(Target_mips::Mips_mach): Add new enum constants.
(Target_mips::mips_isa_ext_mach): New method.
(Target_mips::mips_isa_ext): Likewise.
(Target_mips::update_abiflags_isa): Likewise.
(Target_mips::infer_abiflags): Likewise.
(Target_mips::create_abiflags): Likewise.
(Target_mips::fp_abi_string): Likewise.
(Target_mips::select_fp_abi): Likewise.
(Target_mips::merge_obj_attributes): Likewise.
(Target_mips::merge_obj_abiflags): Likewise.
(Target_mips::level_rev): Likewise.
(Target_mips::merge_obj_e_flags): Rename from
merge_processor_specific_flags. Remove dyn_obj argument,
call update_abiflags_isa when needed, compare NaN encodings and
compare FP64 state.
(Target_mips::add_machine_extensions): Add two machine extensions
and fix one.
(Target_mips::attributes_section_data_): New data member.
(Target_mips::abiflags_): Likewise.
(Target_mips::has_abiflags_section_): Likewise.
(Mips_relobj::do_read_symbols): Read .gnu.attributes and
.MIPS.abiflags sections if they exists.
(Target_mips::elf_mips_mach): Add E_MIPS_MACH_5900 and
E_MIPS_MACH_OCTEON3 support.
(Target_mips::do_adjust_elf_header): Setup EI_ABIVERSION flag.
(Target_mips::do_finalize_sections): Merge .gnu.attributes and
.MIPS.abiflags sections from input. Create these sections if
needed.
(Target_mips::elf_mips_mach_name): Add E_MIPS_MACH_5900 and
E_MIPS_MACH_OCTEON3 support, and change strings for
E_MIPS_MACH_LS2E, E_MIPS_MACH_LS2F and E_MIPS_MACH_LS3A just
to match bfd.

8 years agosparc-coff writing uninitialized memory
Alan Modra [Sat, 11 Jun 2016 05:19:49 +0000 (14:49 +0930)]
sparc-coff writing uninitialized memory

sparc-coff has a 20 byte symbol entry with an extra field, but neglects
to initialize the field.  Fix that.

* coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.

8 years agoUse size_t rather than bfd_size_type
Alan Modra [Sat, 11 Jun 2016 07:52:55 +0000 (17:22 +0930)]
Use size_t rather than bfd_size_type

I noticed when writing _bfd_elf_strtab_save/restore that size_t would
be better than bfd_size_type for a number of things in elf-strtab.c.
Using a 64-bit bfd_size_type on a 32-bit host doesn't make much sense
for array sizes and indices.

* elf-strtab.c (struct strtab_save): Use size_t for "size".
(struct elf_strtab_hash): Likewise for "size" and "alloced".
(_bfd_elf_strtab_init): Formatting.
(_bfd_elf_strtab_add): Return size_t rather than bfd_size_type.
(_bfd_elf_strtab_addref): Take size_t idx param.
(_bfd_elf_strtab_delref, _bfd_elf_strtab_refcount): Likewise.
(_bfd_elf_strtab_offset): Likewise.
(_bfd_elf_strtab_clear_all_refs): Use size_t idx.
(_bfd_elf_strtab_save): Use size_t "idx" and "size" vars.
(_bfd_elf_strtab_restore, _bfd_elf_strtab_emit): Similarly.
(_bfd_elf_strtab_finalize): Similarly.
* elf-bfd.h (_bfd_elf_strtab_add): Update prototypes.
(_bfd_elf_strtab_addref, _bfd_elf_strtab_delref): Likewise.
(_bfd_elf_strtab_refcount, _bfd_elf_strtab_offset): Likewise.
* elf.c (bfd_elf_get_elf_syms): Calculate symbol buffer size
using bfd_size_type.
(bfd_section_from_shdr): Delete amt.
(_bfd_elf_init_reloc_shdr): Likewise.
(_bfd_elf_link_assign_sym_version): Likewise.
(assign_section_numbers): Use size_t reloc_count.
* elflink.c (struct elf_symbuf_head): Use size_t "count".
(bfd_elf_link_record_dynamic_symbol): Use size_t for some vars.
(elf_link_is_defined_archive_symbol): Likewise.
(elf_add_dt_needed_tag): Likewise.
(elf_finalize_dynstr): Likewise.
(elf_link_add_object_symbols): Likewise.
(bfd_elf_size_dynamic_sections): Likewise.
(elf_create_symbuf): Similarly.
(bfd_elf_match_symbols_in_sections): Likewise.
(elf_link_swap_symbols_out): Likewise.
(elf_link_check_versioned_symbol): Likewise.
(bfd_elf_gc_record_vtinherit): Likewise.
(bfd_elf_gc_common_finalize_got_offsets): Likewise.

8 years agoAutomatic date update in version.in
GDB Administrator [Sat, 11 Jun 2016 00:00:19 +0000 (00:00 +0000)]
Automatic date update in version.in

8 years agoFix problems emitting MIPS .reginfo section.
Vladimir Radosavljevic [Fri, 10 Jun 2016 22:32:33 +0000 (15:32 -0700)]
Fix problems emitting MIPS .reginfo section.

gold/
* mips.cc (Mips_relobj::Mips_relobj): Initialize
has_reginfo_section_.
(Mips_relobj::has_reginfo_section_): New data member.
(Mips_relobj::has_reginfo_section): New method.
(class Mips_output_section_reginfo): Change base class to
Output_section_data, and set masks of the output .reginfo section
in constructor.
(Mips_output_section_reginfo::as_mips_output_section_reginfo):
Remove.
(Mips_output_section_reginfo::set_masks): Likewise.
(Mips_output_section_reginfo::set_final_data_size): Likewise.
(Mips_output_section_reginfo::do_print_to_mapfile): New method.
(Target_mips::do_make_output_section): Remove.
(Mips_relobj::do_read_symbols): Set has_reginfo_section_ to true
if the object contains a .reginfo section.
(Target_mips::do_finalize_sections): Create a .reginfo output
section if needed.

8 years agoConstify arch_type and friends
Tom Tromey [Mon, 6 Jun 2016 14:06:15 +0000 (08:06 -0600)]
Constify arch_type and friends

While working on the Rust support, I happened to notice that arch_type
and related functions take "char *" arguments, where "const char *"
would be more correct.  This patch fixes this oversight.  Tested by
rebuilding.

2016-06-10  Tom Tromey  <tom@tromey.com>

* gdbtypes.c (arch_type, arch_integer_type, arch_character_type)
(arch_boolean_type, arch_float_type, arch_complex_type)
(arch_flags_type, append_flags_type_field)
(append_flags_type_flag, arch_composite_type)
(append_composite_type_field_raw)
(append_composite_type_field_aligned)
(append_composite_type_field): Make "name" parameter const.
* gdbtypes.h (arch_type, arch_integer_type, arch_character_type)
(arch_boolean_type, arch_float_type, arch_complex_type)
(append_composite_type_field, append_composite_type_field_aligned)
(append_composite_type_field_raw, arch_flags_type)
(append_flags_type_field, append_flags_type_flag): Constify.

8 years agoFix PR rust/20110
Tom Tromey [Wed, 18 May 2016 23:22:30 +0000 (17:22 -0600)]
Fix PR rust/20110

PR rust/20110 concerns the type of an integer constant that is too
large for "i32", the default integer type.  This patch changes the
type of such a constant to i64.  This is important because such values
are often addresses, so truncating them by default is unfriendly.

Built and regtested on x86-64 Fedora 23.

2016-06-10  Tom Tromey  <tom@tromey.com>

PR rust/20110:
* rust-exp.y (lex_number): Don't truncate large numbers to i32.

2016-06-10  Tom Tromey  <tom@tromey.com>

PR rust/20110:
* gdb.rust/expr.exp: Add test for integer constant larger than
i32.

8 years agoFix rust-exp handling in makefile
Tom Tromey [Sat, 4 Jun 2016 16:21:01 +0000 (10:21 -0600)]
Fix rust-exp handling in makefile

I noticed that the rust-exp handling in the Makefile differed from
that of other .y files.  I believe I noticed this by seeing a stray
"rm" in the build log.

This patch changes the Makefile to bring the rust-exp handling in line
with that of other .y files.

2016-06-10  Tom Tromey  <tom@tromey.com>

* Makefile.in (COMMON_OBS): Remove rust-exp.o.
(YYFILES): Add rust-exp.c.
(YYOBJ): Add rust-exp.o.
(local-maintainer-clean): Remove rust-exp.c.

8 years agoS/390: Dump unknown instructions according to their length.
Andreas Krebbel [Fri, 10 Jun 2016 11:40:48 +0000 (13:40 +0200)]
S/390: Dump unknown instructions according to their length.

Unknown instructions are currently just dumped as .long 1234.  On
S/390 we can do a bit better since the instruction length is encoded
in the opcode.  That way also unknown instructions can be skipped
according to their real length.  That way we can continue correctly
after that instruction.  However, there are also some drawbacks with
that behavior when dumping data.  So for now that behavior is only
enabled for text section but even there it might mess things up when
having a literal pool embedded in the code.  Therefore I've left the
feature disabled by default and have added the -Minsnlength option to
enable it explicitely.

opcodes/ChangeLog:

2016-06-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

* s390-dis.c (option_use_insn_len_bits_p): New file scope
variable.
(init_disasm): Handle new command line option "insnlength".
(print_s390_disassembler_options): Mention new option in help
output.
(print_insn_s390): Use the encoded insn length when dumping
unknown instructions.

8 years agoFortran: Testsuite, non-local references in nested functions.
Bernhard Heckel [Fri, 10 Jun 2016 09:16:49 +0000 (11:16 +0200)]
Fortran: Testsuite, non-local references in nested functions.

Non-local references in nested functions are usually implemented
by using DWARF static link. This feature was added
with commit 63e43d3aedb8b1112899c2d0ad74cbbee687e5d6
(DWARF: handle non-local references in nested functions) but
a testcase was missing in Fortran.

2016-06-10  Bernhard Heckel  <bernhard.heckel@intel.com>

gdb/Testsuite/Changelog:
* gdb.fortran/nested-funcs.exp: New.
* gdb.fortran/nested-funcs.f90: New.

8 years agoAdd negative repeat count to 'x' command
Toshihito Kikuchi [Fri, 10 Jun 2016 05:47:42 +0000 (22:47 -0700)]
Add negative repeat count to 'x' command

This change adds support for specifying a negative repeat count to
all the formats of the 'x' command to examine memory backward.
A new testcase 'examine-backward' is added to cover this new feature.

Here's the example output from the new feature:

<format 'i'>
(gdb) bt
#0  Func1 (n=42, p=0x40432e "hogehoge") at main.cpp:5
#1  0x00000000004041fa in main (argc=1, argv=0x7fffffffdff8) at main.cpp:19
(gdb) x/-4i 0x4041fa
  0x4041e5 <main(int, char**)+11>: mov   %rsi,-0x10(%rbp)
  0x4041e9 <main(int, char**)+15>: lea   0x13e(%rip),%rsi
  0x4041f0 <main(int, char**)+22>: mov   $0x2a,%edi
  0x4041f5 <main(int, char**)+27>: callq 0x404147

<format 'x'>
(gdb) x/-4xw 0x404200
0x4041f0 <main(int, char**)+22>: 0x00002abf 0xff4de800 0x76e8ffff 0xb8ffffff
(gdb) x/-4
0x4041e0 <main(int, char**)+6>:  0x7d8910ec 0x758948fc 0x358d48f0 0x0000013e

gdb/ChangeLog:

* NEWS: Mention that GDB now supports a negative repeat count in
the 'x' command.
* printcmd.c (decode_format): Allow '-' in the parameter
"string_ptr" to accept a negative repeat count.
(find_instruction_backward): New function.
(read_memory_backward): New function.
(integer_is_zero): New function.
(find_string_backward): New function.
(do_examine): Use new functions to examine memory backward.
(_initialize_printcmd): Mention that 'x' command supports a negative
repeat count.

gdb/doc/ChangeLog:

* gdb.texinfo (Examining Memory): Document negative repeat
count in the 'x' command.

gdb/testsuite/ChangeLog:

* gdb.base/examine-backward.c: New file.
* gdb.base/examine-backward.exp: New file.

8 years agoAdd myself as a write-after-approval GDB maintainer
Toshihito Kikuchi [Fri, 10 Jun 2016 04:59:04 +0000 (21:59 -0700)]
Add myself as a write-after-approval GDB maintainer

gdb/ChangeLog:

* MAINTAINERS (Write After Approval): Add Toshihito Kikuchi.

8 years agoAutomatic date update in version.in
GDB Administrator [Fri, 10 Jun 2016 00:00:18 +0000 (00:00 +0000)]
Automatic date update in version.in

8 years agoAdd missing ChangeLog entries
H.J. Lu [Thu, 9 Jun 2016 23:54:58 +0000 (16:54 -0700)]
Add missing ChangeLog entries

8 years agoPR python/19819 - remove unused globals from py-xmethods.c
Tom Tromey [Thu, 9 Jun 2016 16:43:01 +0000 (10:43 -0600)]
PR python/19819 - remove unused globals from py-xmethods.c

PR python/19819 concerns some unused global variables in
py-xmethods.c.  This patch deletes the unused globals.

Tested by rebuilding.

2016-06-09  Tom Tromey  <tom@tromey.com>

PR python/19819:
* python/py-xmethods.c (invoke_method_name)
(py_get_result_type_method_name, py_invoke_method_name): Remove.
(gdbpy_initialize_xmethods): Don't initialize
py_invoke_method_name, py_get_result_type_method_name.

8 years agoFix compilation error in mips.cc with some versions of GCC.
Artemiy Volkov [Thu, 9 Jun 2016 18:39:57 +0000 (11:39 -0700)]
Fix compilation error in mips.cc with some versions of GCC.

gold/
* mips.cc (Mips_output_data_got::do_write): Add missing template
args via typedef.

8 years agoFix PR 20221 - adjust syms and relocs only if relax shrunk section.
Denis Chertykov [Thu, 9 Jun 2016 16:17:43 +0000 (19:17 +0300)]
Fix PR 20221 - adjust syms and relocs only if relax shrunk section.

This patch fixes an edge case in linker relaxation that causes symbol
values to be computed incorrectly in the presence of align directives
in input source code.

bfd/
* elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust syms
and relocs only if shrinking occurred.

ld/
* testsuite/ld-avr/avr-prop-5.d: New.
* testsuite/ld-avr/avr-prop-5.s: New.

8 years agoPrint symbol names in comments for LDS/STS disassembly.
Denis Chertykov [Thu, 9 Jun 2016 16:00:57 +0000 (19:00 +0300)]
Print symbol names in comments for LDS/STS disassembly.

This patch adds default data address space origin (0x800000) to the symbol addresses.
when disassemble lds/sts instructions. So that symbol names shall be printed in comments
for lds/sts instructions disassemble.

ld/
* testsuite/ld-avr/lds-mega.d: New test.
* testsuite/ld-avr/lds-mega.s: New test source.
* testsuite/ld-avr/lds-tiny.d: New test.
* testsuite/ld-avr/lds-tiny.s: New test source.

opcodes/
* avr-dis.c (avr_operand): Add default data address space origin (0x800000) to the
address and set as symbol address for LDS/ STS immediate operands.

8 years agosparc: add missing comment about hyperprivileged register operands
Jose E. Marchesi [Wed, 8 Jun 2016 20:46:22 +0000 (13:46 -0700)]
sparc: add missing comment about hyperprivileged register operands

include/ChangeLog:

2016-06-08  Jose E. Marchesi  <jose.marchesi@oracle.com>

* opcode/sparc.h: Add missing documentation for hyperprivileged
registers in rd (%) and rs1 ($).

8 years ago[AARCH64][GAS] Fix two -Wstack-usage warnings.
Renlin Li [Thu, 9 Jun 2016 09:08:08 +0000 (10:08 +0100)]
[AARCH64][GAS] Fix two -Wstack-usage warnings.

Warning triggerd by gcc 5 with -O0 flag.
error: stack usage might be unbounded [-Werror=stack-usage=]

gas/

2016-06-08  Renlin Li  <renlin.li@arm.com>

* config/tc-aarch64.c (print_operands): Substitute size.
(output_operand_error_record): Likewise.

8 years agoAutomatic date update in version.in
GDB Administrator [Thu, 9 Jun 2016 00:00:15 +0000 (00:00 +0000)]
Automatic date update in version.in

8 years agoi386: Test external function reference without PLT
H.J. Lu [Wed, 8 Jun 2016 19:41:50 +0000 (12:41 -0700)]
i386: Test external function reference without PLT

To call an external function, the direct branch to the PLT entry can be
replaced by an indirect branch via the GOT slot, which is similar to the
first instruction in the PLT slot.  Instead using the PLT slot as function
address, the function address is retrieved from the GOT slot.  The
R_386_GOT32X relocation can be used to compute the address of the symbol’s
GOT entry without base register when PIC is disabled.  In non-PIC
executable,

call/jmp *func@GOT

should be used for indirect branch via the GOT slot and

movl func@GOT, %eax

should be used to load function address.  Unlike PIC case, no register
is needed to access GOT.  If linker determines the function is defined
locally, it converts indirect branch via the GOT slot to direct branch
with a nop prefix and converts load via the GOT slot to load immediate
or lea.

* testsuite/ld-i386/libno-plt-1b.dd: New file.
* testsuite/ld-i386/libno-plt-1b.rd: Likewise.
* testsuite/ld-i386/no-plt-1a.dd: Likewise.
* testsuite/ld-i386/no-plt-1a.rd: Likewise.
* testsuite/ld-i386/no-plt-1b.dd: Likewise.
* testsuite/ld-i386/no-plt-1b.rd: Likewise.
* testsuite/ld-i386/no-plt-1c.dd: Likewise.
* testsuite/ld-i386/no-plt-1c.rd: Likewise.
* testsuite/ld-i386/no-plt-1d.dd: Likewise.
* testsuite/ld-i386/no-plt-1d.rd: Likewise.
* testsuite/ld-i386/no-plt-1e.dd: Likewise.
* testsuite/ld-i386/no-plt-1e.rd: Likewise.
* testsuite/ld-i386/no-plt-1f.dd: Likewise.
* testsuite/ld-i386/no-plt-1f.rd: Likewise.
* testsuite/ld-i386/no-plt-1g.dd: Likewise.
* testsuite/ld-i386/no-plt-1g.rd: Likewise.
* testsuite/ld-i386/no-plt-1h.dd: Likewise.
* testsuite/ld-i386/no-plt-1h.rd: Likewise.
* testsuite/ld-i386/no-plt-1i.dd: Likewise.
* testsuite/ld-i386/no-plt-1i.rd: Likewise.
* testsuite/ld-i386/no-plt-1j.dd: Likewise.
* testsuite/ld-i386/no-plt-1j.rd: Likewise.
* testsuite/ld-i386/no-plt-check1a.S: Likewise.
* testsuite/ld-i386/no-plt-check1b.S: Likewise.
* testsuite/ld-i386/no-plt-extern1a.S: Likewise.
* testsuite/ld-i386/no-plt-extern1b.S: Likewise.
* testsuite/ld-i386/no-plt-func1.c: Likewise.
* testsuite/ld-i386/no-plt-main1.c: Likewise.
* testsuite/ld-i386/no-plt.exp: Likewise.

8 years agoUpdate test name
H.J. Lu [Wed, 8 Jun 2016 19:27:32 +0000 (12:27 -0700)]
Update test name

* testsuite/ld-x86-64/tls.exp (run_cc_link_tests): Update test
name.

8 years agoSupport i386 TLS code sequences without PLT
H.J. Lu [Wed, 8 Jun 2016 18:59:47 +0000 (11:59 -0700)]
Support i386 TLS code sequences without PLT

We can generate i386 TLS code sequences for general and local dynamic
models without PLT, which uses indirect call via GOT:

call *___tls_get_addr@GOT(%reg)

where EBX register isn't required as GOT base, instead of direct call:

call ___tls_get_addr[@PLT]

which requires EBX register as GOT base.

Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.

For general dynamic model, 7-byte lea instruction before call instruction
is replaced by 6-byte one to make room for indirect call.  For local
dynamic model, we simply use 5-byte indirect call.

TLS linker optimization is updated to recognize new instruction patterns.
For local dynamic model to local exec model transition, we generate
a 6-byte lea instruction as nop, instead of a 1-byte nop plus a 4-byte
lea instruction.  Since linker may convert

call ___tls_get_addr[@PLT]

to

addr32 call ____tls_get_addr

when producing static executable, both patterns are recognized.

bfd/

* elf64-i386.c (elf_i386_link_hash_entry): Add tls_get_addr.
(elf_i386_link_hash_newfunc): Initialize tls_get_addr to 2.
(elf_i386_check_tls_transition): Check indirect call and direct
call with the addr32 prefix for general and local dynamic models.
Set the tls_get_addr feild.
(elf_i386_convert_load_reloc): Always use addr32 prefix for
indirect ___tls_get_addr call via GOT.
(elf_i386_relocate_section): Handle GD->LE, GD->IE and LD->LE
transitions with indirect call and direct call with the addr32
prefix.

ld/

* testsuite/ld-i386/i386.exp: Run libtlspic2.so, tlsbin2,
tlsgd3, tlsld2, tlsgd4, tlspie3a, tlspie3b and tlspie3c.
* testsuite/ld-i386/pass.out: New file.
* testsuite/ld-i386/tls-def1.c: Likewise.
* testsuite/ld-i386/tls-gd1.S: Likewise.
* testsuite/ld-i386/tls-ld1.S: Likewise.
* testsuite/ld-i386/tls-main1.c: Likewise.
* testsuite/ld-i386/tls.exp: Likewise.
* testsuite/ld-i386/tlsbin2-nacl.rd: Likewise.
* testsuite/ld-i386/tlsbin2.dd: Likewise.
* testsuite/ld-i386/tlsbin2.rd: Likewise.
* testsuite/ld-i386/tlsbin2.sd: Likewise.
* testsuite/ld-i386/tlsbin2.td: Likewise.
* testsuite/ld-i386/tlsbinpic2.s: Likewise.
* testsuite/ld-i386/tlsgd3.dd: Likewise.
* testsuite/ld-i386/tlsgd3.s: Likewise.
* testsuite/ld-i386/tlsgd4.d: Likewise.
* testsuite/ld-i386/tlsgd4.s: Likewise.
* testsuite/ld-i386/tlsld2.s: Likewise.
* testsuite/ld-i386/tlspic2-nacl.rd: Likewise.
* testsuite/ld-i386/tlspic2.dd: Likewise.
* testsuite/ld-i386/tlspic2.rd: Likewise.
* testsuite/ld-i386/tlspic2.sd: Likewise.
* testsuite/ld-i386/tlspic2.td: Likewise.
* testsuite/ld-i386/tlspic3.s: Likewise.
* testsuite/ld-i386/tlspie3.s: Likewise.
* testsuite/ld-i386/tlspie3a.d: Likewise.
* testsuite/ld-i386/tlspie3b.d: Likewise.
* testsuite/ld-i386/tlspie3c.d: Likewise.

8 years agoSupport any relocation order
H.J. Lu [Wed, 8 Jun 2016 17:10:56 +0000 (10:10 -0700)]
Support any relocation order

* testsuite/ld-x86-64/no-plt-1a.rd: Support any relocation order.
* testsuite/ld-x86-64/no-plt-1b.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1c.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1d.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1e.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1f.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1g.rd: Likewise.
* testsuite/ld-x86-64/no-plt.exp: Fix a typo.

8 years agoAdd missing ChangeLog entries
H.J. Lu [Wed, 8 Jun 2016 14:47:07 +0000 (07:47 -0700)]
Add missing ChangeLog entries

8 years agoX86-64: Test external function reference without PLT
H.J. Lu [Wed, 8 Jun 2016 11:55:10 +0000 (04:55 -0700)]
X86-64: Test external function reference without PLT

To call an external function, the direct branch to the PLT entry can be
replaced by an indirect branch via the GOT slot, which is similar to the
first instruction in the PLT slot.  Instead using the PLT slot as function
address, the function address is retrieved from the GOT slot.  If linker
determines the function is defined locally, it converts indirect branch
via the GOT slot to direct branch with a nop prefix and converts load via
the GOT slot to load immediate or lea,

* testsuite/ld-x86-64/libno-plt-1b.dd: Likewise.
* testsuite/ld-x86-64/libno-plt-1b.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1a.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1a.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1b.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1b.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1c.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1c.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1d.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1d.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1e.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1e.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1f.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1f.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1g.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1g.rd: Likewise.
* testsuite/ld-x86-64/no-plt-check1.S: Likewise.
* testsuite/ld-x86-64/no-plt.exp: Likewise.
* testsuite/ld-x86-64/no-plt-extern1.S: Likewise.
* testsuite/ld-x86-64/no-plt-func1.c: Likewise.
* testsuite/ld-x86-64/no-plt-main1.c: Likewise.

8 years agoAutomatic date update in version.in
GDB Administrator [Wed, 8 Jun 2016 00:00:19 +0000 (00:00 +0000)]
Automatic date update in version.in

8 years agobfd/s390: Misc minor fixes.
Marcin Kościelnicki [Fri, 3 Jun 2016 14:39:15 +0000 (16:39 +0200)]
bfd/s390: Misc minor fixes.

The only non-comment fix here is in the code writing out the 3 fixed
.got.plt entries - it mistakenly put a 64-bit 0 at offsets 8 and 12
instead of 8 and 16.

bfd/ChangeLog:

* elf32-s390.c (elf_s390_finish_dynamic_symbol): Fix comment.
* elf64-s390.c (elf_s390x_plt_entry): Fix comment.
(elf_s390_relocate_section): Fix comment.
(elf_s390_finish_dynamic_sections): Fix initialization of fixed
.got.plt entries.

8 years agomi/mi-interp.c: Add missing braces
Simon Marchi [Tue, 7 Jun 2016 14:02:42 +0000 (10:02 -0400)]
mi/mi-interp.c: Add missing braces

gdb/ChangeLog:

* mi/mi-interp.c (mi_record_changed): Add missing braces.

8 years agold/testsuite/ld-elf/init-fini-arrays.d: Remove `ft32-*-*' xfail
Maciej W. Rozycki [Fri, 27 May 2016 16:53:01 +0000 (17:53 +0100)]
ld/testsuite/ld-elf/init-fini-arrays.d: Remove `ft32-*-*' xfail

Revert the addition of `ft32-*-*' to this test case made with commit
d1f70bdcab6c ("Fix lots of linker testsuite failures for the FT32
target.") as this case scores an XPASS now.

ld/
* testsuite/ld-elf/init-fini-arrays.d: Remove `ft32-*-*' xfail.

8 years agoFix PLT first entry GOT operand calculation.
Andreas Krebbel [Tue, 7 Jun 2016 14:45:15 +0000 (16:45 +0200)]
Fix PLT first entry GOT operand calculation.

Embedding the .plt section in another revealed a bug in the way the
larl operand of the first magic plt entry is being calculated.  Fixed
with the attached patch.

bfd/ChangeLog:

* elf64-s390.c (elf_s390_finish_dynamic_sections): Subtract plt
section offset when calculation the larl operand in the first PLT
entry.

ld/ChangeLog:

* testsuite/ld-s390/pltoffset-1.dd: New test.
* testsuite/ld-s390/pltoffset-1.ld: New test.
* testsuite/ld-s390/pltoffset-1.s: New test.
* testsuite/ld-s390/s390.exp: Run new test.

8 years agoPowerPC VLE
Alan Modra [Tue, 7 Jun 2016 12:34:38 +0000 (22:04 +0930)]
PowerPC VLE

VLE is an encoding, not a particular processor architecture, so it
isn't really proper to select insns based on PPC_OPCODE_VLE.  For
example
{"evaddw",  VX (4, 512), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
{"vaddubs", VX (4, 512), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
shows two insns that have the same encoding, both available with VLE.
Enabling both with VLE means we can't disassemble the second variant
even if -Maltivec is given rather than -Mspe.  Also, we don't check
user assembly against the processor type as well as we could.

Another problem is that when using the VLE encoding, insns from the
main ppc opcode table are not available, except those using opcode 4
and 31.  Correcting this revealed two errors in the ld testsuite,
use of "nop" and "rfmci" when -mvle.

This patch fixes those problems in the opcode table, and removes
PPCNONE.  I find a plain 0 distracts less from other values.

In addition, I've implemented code to recognize some machine values
from the apuinfo note present in ppc32 objects.  It's not a complete
disambiguation since we're lacking info to detect newer chips, but
what we have should help with disassembly.

include/
* elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
PPC_APUINFO_VLE: Define.
opcodes/
* ppc-dis.c (ppc_opts): Delete extraneous parentheses.  Default
cpu for "vle" to e500.
* ppc-opc.c (ALLOW8_SPRG): Remove PPC_OPCODE_VLE.
(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW, DCBT_EO): Likewise.
(PPCNONE): Delete, substitute throughout.
(powerpc_opcodes): Remove PPCVLE from "flags".  Add to "deprecated"
except for major opcode 4 and 31.
(vle_opcodes <se_rfmci>): Add PPCRFMCI to flags.
bfd/
* cpu-powerpc.c (powerpc_compatible): Allow bfd_mach_ppc_vle entry
to match other 32-bit archs.
* elf32-ppc.c (_bfd_elf_ppc_set_arch): New function.
(ppc_elf_object_p): Call it.
(ppc_elf_special_sections): Use APUINFO_SECTION_NAME.  Fix
overlong line.
(APUINFO_SECTION_NAME, APUINFO_LABEL): Don't define here.
* elf64-ppc.c (ppc64_elf_object_p): Call _bfd_elf_ppc_set_arch.
* bfd-in.h (_bfd_elf_ppc_at_tls_transform,
_bfd_elf_ppc_at_tprel_transform): Move to..
* elf-bfd.h: ..here.
(_bfd_elf_ppc_set_arch): Declare.
* bfd-in2.h: Regenerate.
gas/
* config/tc-ppc.c (PPC_APUINFO_ISEL, PPC_APUINFO_PMR,
PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE,
PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE): Don't define.
(ppc_setup_opcodes): Check vle disables powerpc_opcodes overridden
by vle_opcodes, and that vle flag doesn't enable opcodes.  Don't
add vle_opcodes twice.
(ppc_cleanup): Use APUINFO_SECTION_NAME and APUINFO_LABEL.
ld/
* testsuite/ld-powerpc/apuinfo1.s: Delete nop.
* testsuite/ld-powerpc/apuinfo-vle2.s: New.
* testsuite/ld-powerpc/powerpc.exp: Use apuinfo-vle2.s.

8 years agoFrame static link: Handle null pointer.
Bernhard Heckel [Tue, 7 Jun 2016 11:36:05 +0000 (13:36 +0200)]
Frame static link: Handle null pointer.

2016-06-07  Bernhard Heckel  <bernhard.heckel@intel.com>

gdb/Changelog:
* findvar.c (follow_static_link): Check for valid pointer.

8 years ago[ARM] Add command line option for RAS extension.
Matthew Wahab [Tue, 7 Jun 2016 08:56:42 +0000 (09:56 +0100)]
[ARM] Add command line option for RAS extension.

This patch adds the architecture extension "+ras" to enable RAS
support. It is enabled by default for -march=armv8.2-a and available but
disabled by default for armv8-a and armv8.1-a.

gas/
* config/tc-arm.c (arm_ext_v8_2): Rename to arm_ext_ras.
(arm_ext_ras): Renamed from arm_ext_v8_2.
(insns): Update for arm_ext_v8_2 renaming.
(arm_extensions): Add "ras".
* doc/c-arm.texi (ARM Options): Add an entry for "ras".
* testsuite/gas/arm/armv8-a+ras.d: New.
* testsuite/gas/arm/armv8_2-a.d: Add explicit command line
options.

include/
* opcode/arm.h (ARM_EXT2_RAS): New.  Also align preceding
entries.
(ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.

opcodes/
* arm-dis.c (arm_opcodes): Replace ARM_EXT_V8_2A with
ARM_EXT_RAS in relevant entries.

8 years agoAutomatic date update in version.in
GDB Administrator [Tue, 7 Jun 2016 00:00:16 +0000 (00:00 +0000)]
Automatic date update in version.in

8 years agoAdd method/format information to =record-started
Simon Marchi [Mon, 30 May 2016 21:29:39 +0000 (17:29 -0400)]
Add method/format information to =record-started

Eclipse CDT now supports enabling execution recording using two methods
(full and btrace) and both formats for btrace (bts and pt).  In the
event that recording is enabled behind the back of the GUI (by the user
on the command line, or a script), we need to know which method/format
are being used, so it can be correctly reflected in the interface.  This
patch adds this information to the =record-started async record.

Before:

  =record-started,thread-group="i1"

After:

  =record-started,thread-group="i1",method="btrace",format="bts"
  =record-started,thread-group="i1",method="btrace",format="pt"
  =record-started,thread-group="i1",method="full"

The "format" field is only present when the current method supports
multiple formats (only the btrace method as of now).

gdb/ChangeLog:

* NEWS: Mention the new fields in =record-started.
* common/btrace-common.h (btrace_format_short_string): New function
declaration.
* common/btrace-common.c (btrace_format_short_string): New
function.
* mi/mi-interp.c (mi_record_changed): Output method and format
fields in the =record-started record.
* record-btrace.c (record_btrace_open): Adapt record_changed
notification.
* record-full.c (record_full_open): Likewise.
* record.c (cmd_record_stop): Likewise.

gdb/doc/ChangeLog:

* gdb.texinfo (GDB/MI Async Records): Document method and
format fields in =record-started.
* observer.texi (record_changed): Add method and format
parameters.

gdb/testsuite/ChangeLog:

* gdb.mi/mi-record-changed.exp: Adjust =record-started output
matching.

8 years agoSupport x86-64 TLS code sequences without PLT
H.J. Lu [Mon, 6 Jun 2016 18:06:55 +0000 (11:06 -0700)]
Support x86-64 TLS code sequences without PLT

We can generate x86-64 TLS code sequences for general and local dynamic
models without PLT, which uses indirect call via GOT:

call *__tls_get_addr@GOTPCREL(%rip)

instead of direct call:

call __tls_get_addr[@PLT]

Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.

For general dynamic model, one 0x66 prefix before call instruction is
removed to make room for indirect call.  For local dynamic model, we
simply use 5-byte indirect call.

TLS linker optimization is updated to recognize new instruction patterns.
For local dynamic model to local exec model transition, we generate
4 0x66 prefixes, instead of 3, before mov instruction in 64-bit and
generate a 5-byte nop, instead of 4-byte, before mov instruction in
32-bit.  Since linker may convert

call *__tls_get_addr@GOTPCREL(%rip)

to

addr32 call __tls_get_addr

when producing static executable, both patterns are recognized.

bfd/

* elf64-x86-64.c (elf_x86_64_link_hash_entry): Add tls_get_addr.
(elf_x86_64_link_hash_newfunc): Initialize tls_get_addr to 2.
(elf_x86_64_check_tls_transition): Check indirect call and
direct call with the addr32 prefix for general and local dynamic
models.  Set the tls_get_addr feild.
(elf_x86_64_convert_load_reloc): Always use addr32 prefix for
indirect __tls_get_addr call via GOT.
(elf_x86_64_relocate_section): Handle GD->LE, GD->IE and LD->LE
transitions with indirect call and direct call with the addr32
prefix.

ld/

* testsuite/ld-x86-64/pass.out: New file.
* testsuite/ld-x86-64/tls-def1.c: Likewise.
* testsuite/ld-x86-64/tls-gd1.S: Likewise.
* testsuite/ld-x86-64/tls-ld1.S: Likewise.
* testsuite/ld-x86-64/tls-main1.c: Likewise.
* testsuite/ld-x86-64/tls.exp: Likewise.
* testsuite/ld-x86-64/tlsbin2-nacl.rd: Likewise.
* testsuite/ld-x86-64/tlsbin2.dd: Likewise.
* testsuite/ld-x86-64/tlsbin2.rd: Likewise.
* testsuite/ld-x86-64/tlsbin2.sd: Likewise.
* testsuite/ld-x86-64/tlsbin2.td: Likewise.
* testsuite/ld-x86-64/tlsbinpic2.s: Likewise.
* testsuite/ld-x86-64/tlsgd10.dd: Likewise.
* testsuite/ld-x86-64/tlsgd10.s: Likewise.
* testsuite/ld-x86-64/tlsgd11.dd: Likewise.
* testsuite/ld-x86-64/tlsgd11.s: Likewise.
* testsuite/ld-x86-64/tlsgd12.d: Likewise.
* testsuite/ld-x86-64/tlsgd12.s: Likewise.
* testsuite/ld-x86-64/tlsgd13.d: Likewise.
* testsuite/ld-x86-64/tlsgd13.s: Likewise.
* testsuite/ld-x86-64/tlsgd14.dd: Likewise.
* testsuite/ld-x86-64/tlsgd14.s: Likewise.
* testsuite/ld-x86-64/tlsgd5c.s: Likewise.
* testsuite/ld-x86-64/tlsgd6c.s: Likewise.
* testsuite/ld-x86-64/tlsgd9.dd: Likewise.
* testsuite/ld-x86-64/tlsgd9.s: Likewise.
* testsuite/ld-x86-64/tlsld4.dd: Likewise.
* testsuite/ld-x86-64/tlsld4.s: Likewise.
* testsuite/ld-x86-64/tlsld5.dd: Likewise.
* testsuite/ld-x86-64/tlsld5.s: Likewise.
* testsuite/ld-x86-64/tlsld6.dd: Likewise.
* testsuite/ld-x86-64/tlsld6.s: Likewise.
* testsuite/ld-x86-64/tlspic2-nacl.rd: Likewise.
* testsuite/ld-x86-64/tlspic2.dd: Likewise.
* testsuite/ld-x86-64/tlspic2.rd: Likewise.
* testsuite/ld-x86-64/tlspic2.sd: Likewise.
* testsuite/ld-x86-64/tlspic2.td: Likewise.
* testsuite/ld-x86-64/tlspic3.s: Likewise.
* testsuite/ld-x86-64/tlspie2.s: Likewise.
* testsuite/ld-x86-64/tlspie2a.d: Likewise.
* testsuite/ld-x86-64/tlspie2b.d: Likewise.
* testsuite/ld-x86-64/tlspie2c.d: Likewise.
* testsuite/ld-x86-64/tlsgd5.dd: Updated.
* testsuite/ld-x86-64/tlsgd6.dd: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run libtlspic2.so, tlsbin2,
tlsgd5b, tlsgd6b, tlsld4, tlsld5, tlsld6, tlsgd9, tlsgd10,
tlsgd11, tlsgd14, tlsgd12, tlsgd13, tlspie2a, tlspie2b and
tlspie2c.

8 years ago2016-06-06 Christian Groessler <chris@groessler.org>
Christian Groessler [Mon, 6 Jun 2016 07:47:25 +0000 (09:47 +0200)]
2016-06-06  Christian Groessler  <chris@groessler.org>

* ChangeLog: Fix entry from 2016-06-04.

8 years agofixup another old style function definition
Trevor Saunders [Tue, 24 May 2016 12:59:35 +0000 (08:59 -0400)]
fixup another old style function definition

gas/ChangeLog:

2016-06-05  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

* itbl-parse.y (yyerror): Use modern argument declaration style.

8 years agosh{,64}: make arg type enum
Trevor Saunders [Sun, 29 May 2016 02:31:07 +0000 (22:31 -0400)]
sh{,64}: make arg type enum

The values are always members of the enum, except the two places -1 is assigned
only to playcate -Wuninitialized because gcc isn't or at least didn't used to
be smart enough to figure out its only used if it was set.

gas/ChangeLog:

2016-06-05  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

* config/tc-sh.c (parse_reg): Change type of mode argument to
sh_arg_type.
(get_operand): Adjust.
(insert): Change type of how to bfd_reloc_code_real_type.
(insert4): Likewise.
* config/tc-sh64.c (shmedia_get_operand): Adjust.
(shmedia_parse_reg): Change type of mode to shmedia_arg_type.

8 years agoAutomatic date update in version.in
GDB Administrator [Mon, 6 Jun 2016 00:00:15 +0000 (00:00 +0000)]
Automatic date update in version.in

8 years agonds32: constify ptr_arg
Trevor Saunders [Sat, 28 May 2016 21:57:44 +0000 (17:57 -0400)]
nds32: constify ptr_arg

it points to the result of strchr on a const char *, so it aliases
something that is const.  Further its only passed to a function that expects a
const char *, so there's no reason for it to not be const.

gas/ChangeLog:

2016-06-05  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

* config/tc-nds32.c (nds32_parse_option): Make the type of ptr_arg
const char *.

8 years agoAutomatic date update in version.in
GDB Administrator [Sun, 5 Jun 2016 00:00:19 +0000 (00:00 +0000)]
Automatic date update in version.in

8 years agold/testsuite/ld-z8k/test-ld.sh: Remove. Checked in by mistake.
Christian Groessler [Sat, 4 Jun 2016 20:39:46 +0000 (22:39 +0200)]
ld/testsuite/ld-z8k/test-ld.sh: Remove.  Checked in by mistake.

8 years agoAdd z8k ld testsuite and fix range check in coff-z8k.c
Christian Groessler [Sat, 4 Jun 2016 20:15:52 +0000 (22:15 +0200)]
Add z8k ld testsuite and fix range check in coff-z8k.c

bfd/
* coff-z8k.c (extra_case): Fix range check for R_JR relocation.

ld/
* ld/testsuite/ld-z8k/0filler.s: New file.
* ld/testsuite/ld-z8k/branch-target.s: New file.
* ld/testsuite/ld-z8k/branch-target2.s: New file.
* ld/testsuite/ld-z8k/calr-back-8001.d: New file.
* ld/testsuite/ld-z8k/calr-back-8002.d: New file.
* ld/testsuite/ld-z8k/calr-back-fail-8001.d: New file.
* ld/testsuite/ld-z8k/calr-back-fail-8002.d: New file.
* ld/testsuite/ld-z8k/calr-forw-8001.d: New file.
* ld/testsuite/ld-z8k/calr-forw-8002.d: New file.
* ld/testsuite/ld-z8k/calr-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/calr-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/calr-opcode.s: New file.
* ld/testsuite/ld-z8k/dbjnz-forw-8001.d: New file.
* ld/testsuite/ld-z8k/dbjnz-forw-8002.d: New file.
* ld/testsuite/ld-z8k/dbjnz-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/dbjnz-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/dbjnz-opcode.s: New file.
* ld/testsuite/ld-z8k/djnz-back-8001.d: New file.
* ld/testsuite/ld-z8k/djnz-back-8002.d: New file.
* ld/testsuite/ld-z8k/djnz-back-fail-8001.d: New file.
* ld/testsuite/ld-z8k/djnz-back-fail-8002.d: New file.
* ld/testsuite/ld-z8k/djnz-forw-8001.d: New file.
* ld/testsuite/ld-z8k/djnz-forw-8002.d: New file.
* ld/testsuite/ld-z8k/djnz-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/djnz-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/djnz-opcode.s: New file.
* ld/testsuite/ld-z8k/filler.s: New file.
* ld/testsuite/ld-z8k/jr-back-8001.d: New file.
* ld/testsuite/ld-z8k/jr-back-8002.d: New file.
* ld/testsuite/ld-z8k/jr-back-fail-8001.d: New file.
* ld/testsuite/ld-z8k/jr-back-fail-8002.d: New file.
* ld/testsuite/ld-z8k/jr-forw-8001.d: New file.
* ld/testsuite/ld-z8k/jr-forw-8002.d: New file.
* ld/testsuite/ld-z8k/jr-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/jr-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/jr-opcode.s: New file.
* ld/testsuite/ld-z8k/ldr-back-8001.d: New file.
* ld/testsuite/ld-z8k/ldr-back-8002.d: New file.
* ld/testsuite/ld-z8k/ldr-back-fail-8001.d: New file.
* ld/testsuite/ld-z8k/ldr-back-fail-8002.d: New file.
* ld/testsuite/ld-z8k/ldr-forw-8001.d: New file.
* ld/testsuite/ld-z8k/ldr-forw-8002.d: New file.
* ld/testsuite/ld-z8k/ldr-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/ldr-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/ldr-opcode.s: New file.
* ld/testsuite/ld-z8k/ldrb-forw-8001.d: New file.
* ld/testsuite/ld-z8k/ldrb-forw-8002.d: New file.
* ld/testsuite/ld-z8k/ldrb-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/ldrb-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/ldrb-opcode.s: New file.
* ld/testsuite/ld-z8k/ldrb-opcode2.s: New file.
* ld/testsuite/ld-z8k/other-file.s: New file.
* ld/testsuite/ld-z8k/reloc.dd: New file.
* ld/testsuite/ld-z8k/reloc.ld: New file.
* ld/testsuite/ld-z8k/relocseg.dd: New file.
* ld/testsuite/ld-z8k/relocseg.ld: New file.
* ld/testsuite/ld-z8k/relocseg1.dd: New file.
* ld/testsuite/ld-z8k/test-ld.sh: New file.
* ld/testsuite/ld-z8k/this-file.s: New file.
* ld/testsuite/ld-z8k/z8k.exp: New file.

8 years agoAutomatic date update in version.in
GDB Administrator [Sat, 4 Jun 2016 00:00:18 +0000 (00:00 +0000)]
Automatic date update in version.in

8 years agoRe-add support for lbarx, lharx, stbcx. and sthcx. insns back to the E6500 cpu.
Peter Bergner [Fri, 3 Jun 2016 23:38:02 +0000 (18:38 -0500)]
Re-add support for lbarx, lharx, stbcx. and sthcx. insns back to the E6500 cpu.

opcodes/
PR binutils/20196
* ppc-opc.c (powerpc_opcodes <lbarx, lharx, stbcx., sthcx.>): Enable
opcodes for E6500.

gas/
PR binutils/20196
* gas/testsuite/gas/ppc/e6500.s <lbarx, lharx, lwarx, ldarx,
stbcx., sthcx., stwcx., stdcx.>: Add tests.
* gas/testsuite/gas/ppc/e6500.d: Likewise.
* gas/testsuite/gas/ppc/power8.s: Likewise.
* gas/testsuite/gas/ppc/power8.d: Likewise.
* gas/testsuite/gas/ppc/power4.s <lwarx, ldarx, stwcx.,
stdcx.>: Add tests.
* gas/testsuite/gas/ppc/power4.d: Likewise.

8 years agoHandle indirect branches for AMD64 and Intel64
H.J. Lu [Fri, 3 Jun 2016 22:55:29 +0000 (15:55 -0700)]
Handle indirect branches for AMD64 and Intel64

AMD64 spec and Intel64 spec differ in indirect branches in 64-bit mode.
AMD64 supports indirect branches with 16-bit address via the data size
prefix while the data size prefix is ignored by Intel64.

gas/

PR binutis/18386
* testsuite/gas/i386/i386.exp: Run x86-64-branch-4.
* testsuite/gas/i386/x86-64-branch.d: Updated.
* testsuite/gas/i386/ilp32/x86-64-branch.d: Likewise.
* testsuite/gas/i386/x86-64-branch-4.l: New file.
* testsuite/gas/i386/x86-64-branch-4.s: Likewise.

opcodes/

PR binutis/18386
* i386-dis.c (indirEv): Replace stack_v_mode with indir_v_mode.
(indir_v_mode): New.
Add comments for '&'.
(reg_table): Replace "{T|}" with "{&|}" on call and jmp.
(putop): Handle '&'.
(intel_operand_size): Handle indir_v_mode.
(OP_E_register): Likewise.
* i386-opc.tbl: Mark 64-bit indirect call/jmp as AMD64.  Add
64-bit indirect call/jmp for AMD64.
* i386-tbl.h: Regenerated

8 years ago[AArch64][gas] Add support for Cortex-A73
Kyrylo Tkachov [Fri, 3 Jun 2016 15:59:24 +0000 (16:59 +0100)]
[AArch64][gas] Add support for Cortex-A73

* config/tc-aarch64.c (aarch64_cpus): Add cortex-a73 entry.
* doc/c-aarch64.texi (-mcpu): Document cortex-a73 value.

8 years ago[ARM][gas] Add support for Cortex-A73
Kyrylo Tkachov [Fri, 3 Jun 2016 15:58:21 +0000 (16:58 +0100)]
[ARM][gas] Add support for Cortex-A73

* config/tc-arm.c (arm_cpus): Add cortex-a73 entry.
* doc/c-arm.texi (-mcpu=): Document cortex-a73 value.

8 years agoFix C++ build for Cygwin
Jon Turney [Thu, 2 Jun 2016 13:34:10 +0000 (13:34 +0000)]
Fix C++ build for Cygwin

gdb/ChangeLog:

2016-06-02  Jon Turney  <jon.turney@dronecode.org.uk>

* windows-nat.c (handle_output_debug_string): Return type of
gdb_signal_from_host() is gdb_signal, not an int.
(windows_get_exec_module_filename): Add pointer casts for C++.

gdb/gdbserver/ChangeLog:

2016-06-02  Jon Turney  <jon.turney@dronecode.org.uk>

* win32-low.c (win32_create_inferior): Add pointer casts for C++.

8 years agoUpdate x86 linker tests for --disable-x86-relax-relocations
H.J. Lu [Fri, 3 Jun 2016 11:10:11 +0000 (04:10 -0700)]
Update x86 linker tests for --disable-x86-relax-relocations

Pass -mrelax-relocations=yes to x86 linker tests, which require relax
relocations, to support --disable-x86-relax-relocations.

* testsuite/ld-i386/i386.exp: Assemble gotpc1.o and pr19319b.o
with -mrelax-relocations=yes.
* testsuite/ld-i386/lea1a.d (as): Add -mrelax-relocations=yes.
* testsuite/ld-i386/lea1b.d (as): Likewise.
* testsuite/ld-i386/lea1d.d (as): Likewise.
* testsuite/ld-i386/lea1e.d (as): Likewise.
* testsuite/ld-i386/lea1f.d (as): Likewise.
* testsuite/ld-i386/load7.d (as): Likewise.
* testsuite/ld-i386/mov1b.d (as): Likewise.
* testsuite/ld-i386/pr19175.d (as): Likewise.
* testsuite/ld-ifunc/ifunc-13-i386.d (as): Likewise.
* testsuite/ld-ifunc/ifunc-21-i386.d (as): Likewise.
* testsuite/ld-ifunc/ifunc-22-i386.d (as): Likewise.
* testsuite/ld-x86-64/x86-64.exp: Assemble gotpcrel1a.o,
gotpcrel1b.o and gotpcrel1c.o with -mrelax-relocations=yes.

8 years agoAutomatic date update in version.in
GDB Administrator [Fri, 3 Jun 2016 00:00:18 +0000 (00:00 +0000)]
Automatic date update in version.in

8 years agoFix PR python/18984
Tom Tromey [Sat, 19 Sep 2015 23:45:47 +0000 (17:45 -0600)]
Fix PR python/18984

This fixes PR python/18984.

The bug is that gdbpy_solib_name uses GDB_PY_LL_ARG, whereas it should
use GDB_PY_LLU_ARG to avoid overflow.

Built and tested on x86-64 Fedora 23.

2016-06-02  Tom Tromey  <tom@tromey.com>

PR python/18984:
* python/python.c (gdbpy_solib_name): Use GDB_PY_LLU_ARG.

2016-06-02  Tom Tromey  <tom@tromey.com>

PR python/18984:
* gdb.python/py-shared.exp: Add solib_name test.

8 years agoAdd "arm_any" architecture type to allow -m option to various binutils to match any...
Nick Clifton [Thu, 2 Jun 2016 16:17:03 +0000 (17:17 +0100)]
Add "arm_any" architecture type to allow -m option to various binutils to match any ARM architecture.

PR target/20088
* cpu-arm.c (processors): Add "arm_any" type to match any ARM
architecture.
(arch_info_struct): Likewise.
(architectures): Likewise.

8 years agoAlso check that the group header's sh_info field is valid.
Nick Clifton [Thu, 2 Jun 2016 15:32:45 +0000 (16:32 +0100)]
Also check that the group header's sh_info field is valid.

PR 20089
* objcopy.c (group_signature): Fail if the input symbol table has
not been loaded, or if the sh_info field of the group header is 0.

8 years agoFix a seg-fault when stripping a corrupt binary.
Nick Clifton [Thu, 2 Jun 2016 15:20:27 +0000 (16:20 +0100)]
Fix a seg-fault when stripping a corrupt binary.

PR 20089
* objcopy.c (group_signature): Fail if the input symbol table has
not been loaded.

8 years agomi-memory-changed.exp: Fix filename passed to untested
Simon Marchi [Thu, 2 Jun 2016 14:05:59 +0000 (10:05 -0400)]
mi-memory-changed.exp: Fix filename passed to untested

gdb/testsuite/ChangeLog:

* gdb.mi/mi-memory-changed.exp: Fix filename passed to untested.

8 years agoAllow ARC Linux targets that do not use uclibc.
Vineet Gupta [Thu, 2 Jun 2016 14:03:47 +0000 (15:03 +0100)]
Allow ARC Linux targets that do not use uclibc.

bfd    * config.bfd: Replace -uclibc with *.

gas    * configure.tgt: Replace -uclibc with *.

ld     * configure.tgt: Replace -uclibc with *.

8 years agoReplace data32 with data16 in comments
H.J. Lu [Thu, 2 Jun 2016 13:50:45 +0000 (06:50 -0700)]
Replace data32 with data16 in comments

The 0x66 prefix is data16, not data32 in 64-bit.

* elf64-x86-64.c: Replace data32 with data16 in comments.

8 years agoAdd support for 48 and 64 bit ARC instructions.
Andrew Burgess [Thu, 2 Jun 2016 13:03:23 +0000 (14:03 +0100)]
Add support for 48 and 64 bit ARC instructions.

gas * config/tc-arc.c (parse_opcode_flags): New function.
(find_opcode_match): Move flag parsing code out to new function.
Ignore operands marked IGNORE.
(build_fake_opcode_hash_entry): New function.
(find_special_case_long_opcode): New function.
(find_special_case): Lookup long opcodes.
* testsuite/gas/arc/nps400-7.d: New file.
* testsuite/gas/arc/nps400-7.s: New file.

include * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
(struct arc_long_opcode): New structure.
(arc_long_opcodes): Declare.
(arc_num_long_opcodes): Declare.

opcodes * arc-dis.c (struct arc_operand_iterator): New structure.
(find_format_from_table): All the old content from find_format,
with some minor adjustments, and parameter renaming.
(find_format_long_instructions): New function.
(find_format): Rewritten.
(arc_insn_length): Add LSB parameter.
(extract_operand_value): New function.
(operand_iterator_next): New function.
(print_insn_arc): Use new functions to find opcode, and iterator
over operands.
* arc-opc.c (insert_nps_3bit_dst_short): New function.
(extract_nps_3bit_dst_short): New function.
(insert_nps_3bit_src2_short): New function.
(extract_nps_3bit_src2_short): New function.
(insert_nps_bitop1_size): New function.
(extract_nps_bitop1_size): New function.
(insert_nps_bitop2_size): New function.
(extract_nps_bitop2_size): New function.
(insert_nps_bitop_mod4_msb): New function.
(extract_nps_bitop_mod4_msb): New function.
(insert_nps_bitop_mod4_lsb): New function.
(extract_nps_bitop_mod4_lsb): New function.
(insert_nps_bitop_dst_pos3_pos4): New function.
(extract_nps_bitop_dst_pos3_pos4): New function.
(insert_nps_bitop_ins_ext): New function.
(extract_nps_bitop_ins_ext): New function.
(arc_operands): Add new operands.
(arc_long_opcodes): New global array.
(arc_num_long_opcodes): New global.
* arc-nps400-tbl.h: Add comments referencing arc_long_opcodes.

8 years agoFix a bug displaying the interpretation of a CFA block that just contains DW_CFA_NOP...
Nick Clifton [Thu, 2 Jun 2016 10:34:49 +0000 (11:34 +0100)]
Fix a bug displaying the interpretation of a CFA block that just contains DW_CFA_NOP instructions.

* dwarf.c (display_debug_frames): Do not display any
interpretation if the block consists solely of DW__CFA_NOPs.

8 years agoRevert PR16467 change
Alan Modra [Mon, 30 May 2016 00:13:44 +0000 (09:43 +0930)]
Revert PR16467 change

This reverts the pr16467 change, which was incorrect due to faulty
analysis of the pr16467 testcase.  The failure was not due to a
mismatch in symbol type (ifunc/non-ifunc) but due to a symbol loop
being set up.

See https://sourceware.org/ml/binutils/2016-06/msg00013.html for some
rambling on versioned symbols and ELF shared library symbol overriding
that explain this patch.

bfd/
PR ld/20159
PR ld/16467
* elflink.c (_bfd_elf_merge_symbol): Revert PR16467 change.
(_bfd_elf_add_default_symbol): Don't indirect to/from defined
symbol given a version by a script different to the version
of the symbol being added.
(elf_link_add_object_symbols): Use _bfd_elf_strtab_save and
_bfd_elf_strtab_restore.  Don't fudge dynstr references.
* elf-strtab.c (_bfd_elf_strtab_restore_size): Delete.
(struct strtab_save): New.
(_bfd_elf_strtab_save, _bfd_elf_strtab_restore): New functions.
* elf-bfd.h (_bfd_elf_strtab_restore_size): Delete.
(_bfd_elf_strtab_save, _bfd_elf_strtab_restore): Declare.

8 years agons32k: remove dupplicate definition of input_line_pointer
Trevor Saunders [Sun, 29 May 2016 05:04:01 +0000 (01:04 -0400)]
ns32k: remove dupplicate definition of input_line_pointer

gas/ChangeLog:

2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

* config/tc-ns32k.c: Remove definition of input_line_pointer.

8 years agoadd more extern C
Trevor Saunders [Sun, 29 May 2016 08:29:22 +0000 (04:29 -0400)]
add more extern C

opcodes/ChangeLog:

2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

* nds32-asm.h: Add extern "C".
* sh-opc.h: Likewise.

bfd/ChangeLog:

2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

* elf32-hppa.h: Add extern "C".
* elf32-nds32.h: Likewise.
* elf32-tic6x.h: Likewise.

include/ChangeLog:

2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

* elf/mips.h: Likewise.
* elf/sh.h: Likewise.
* opcode/d10v.h: Likewise.
* opcode/d30v.h: Likewise.
* opcode/ia64.h: Likewise.
* opcode/mips.h: Likewise.
* opcode/ppc.h: Likewise.
* opcode/sparc.h: Likewise.
* opcode/tic6x.h: Likewise.
* opcode/v850.h: Likewise.

8 years agoavr: replace sentinal with iteration from 0 to ARRAY_SIZE
Trevor Saunders [Fri, 13 May 2016 06:51:41 +0000 (02:51 -0400)]
avr: replace sentinal with iteration from 0 to ARRAY_SIZE

This seems a little easier to understand than using a sentinal, and will
hopefully let the compiler optimize the loop better.  It also has the effect
that we stop initializing a field of the sentinal that is an enum with zero.

gas/ChangeLog:

2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

* config/tc-avr.c (avr_parse_cons_expression): Replace iteration to
sentinal with iteration to array size.