review.tizen.org Git - external/binutils.git/log

Automatic date update in version.in

Add regcache raw_supply_integer and raw_collect_integer.

Use these to replace instances of MAX_REGISTER_SIZE.

* defs.h (copy_integer_to_size): New declaration.
* findvar.c (copy_integer_to_size): New function.
(do_cint_test): New selftest function.
(copy_integer_to_size_test): Likewise.
(_initialize_findvar): Likewise.
* mips-fbsd-tdep.c (mips_fbsd_supply_reg): Use raw_supply_integer.
(mips_fbsd_collect_reg): Use raw_collect_integer.
* mips-linux-tdep.c (supply_32bit_reg): Use raw_supply_integer.
(mips64_fill_gregset): Use raw_collect_integer
(mips64_fill_fpregset): Use raw_supply_integer.
* regcache.c (regcache::raw_supply_integer): New function.
(regcache::raw_collect_integer): Likewise.
* regcache.h: (regcache::raw_supply_integer): New declaration.
(regcache::raw_collect_integer): Likewise.

Automatic date update in version.in

Add unit test to gdbarch methods register_to_value and value_to_register

This patch adds one unit test for gdbarch methods register_to_value and
value_to_register.  The test pass different combinations of {regnu, type}
to gdbarch_register_to_value and gdbarch_value_to_register.  In order
to do the test, add a new function create_new_frame to create a fake
frame.  It can be improved after we converted frame_info to class.

In order to isolate regcache (from target_ops operations on writing
registers, like target_store_registers), the sub-class of regcache in the
test override raw_write.  Also, in order to get the right regcache from
get_thread_arch_aspace_regcache, the sub-class of regcache inserts itself
to current_regcache.

Suppose I incorrectly modified the size of buffer as below,

@@ -1228,7 +1228,7 @@ ia64_register_to_value (struct frame_info *frame, int regnum,
                        int *optimizedp, int *unavailablep)
{
   struct gdbarch *gdbarch = get_frame_arch (frame);
-  gdb_byte in[MAX_REGISTER_SIZE];
+  gdb_byte in[1];

   /* Convert to TYPE.  */
   if (!get_frame_register_bytes (frame, regnum, 0,

build GDB with "-fsanitize=address" and run unittest.exp, asan can detect
such error

==2302==ERROR: AddressSanitizer: stack-buffer-overflow on address 0x7fff98193870 at pc 0xbd55ea bp 0x7fff981935a0 sp 0x7fff98193598
WRITE of size 16 at 0x7fff98193870 thread T0
    #0 0xbd55e9 in frame_register_unwind(frame_info*, int, int*, int*, lval_type*, unsigned long*, int*, unsigned char*) /home/yao/SourceCode/gnu/gdb/git/gdb/frame.c:1119
    #1 0xbd58c8 in frame_register(frame_info*, int, int*, int*, lval_type*, unsigned long*, int*, unsigned char*) /home/yao/SourceCode/gnu/gdb/git/gdb/frame.c:1147
    #2 0xbd6e25 in get_frame_register_bytes(frame_info*, int, unsigned long, int, unsigned char*, int*, int*) /home/yao/SourceCode/gnu/gdb/git/gdb/frame.c:1427
    #3 0x70080a in ia64_register_to_value /home/yao/SourceCode/gnu/gdb/git/gdb/ia64-tdep.c:1236
    #4 0xbf570e in gdbarch_register_to_value(gdbarch*, frame_info*, int, type*, unsigned char*, int*, int*) /home/yao/SourceCode/gnu/gdb/git/gdb/gdbarch.c:2619
    #5 0xc05975 in register_to_value_test /home/yao/SourceCode/gnu/gdb/git/gdb/gdbarch-selftests.c:131

Or, even if GDB is not built with asan, GDB just crashes.

*** stack smashing detected ***: ./gdb terminated
Aborted (core dumped)

gdb:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

* Makefile.in (SFILES): Add gdbarch-selftests.c.
(COMMON_OBS): Add gdbarch-selftests.o.
* frame.c [GDB_SELF_TESTS] (create_new_frame): New function.
* frame.h [GDB_SELF_TESTS] (create_new_frame): Declare.
* gdbarch-selftests.c: New file.
* regcache.h (regcache) <~regcache>: Mark it virtual if
GDB_SELF_TEST.
<raw_write>: Likewise.

Move current_regcache to regcache::current_regcache

This patches moves global variable current_regcache to a class regcache
static variable (protected) so that the unit test I add in the following
patch can access it (by means of extending class regcache in unit test).

gdb:

2017-05-24 Yao Qi <yao.qi@linaro.org>

* regcache.c (current_regcache): Change it to
regcache::current_regcache.
(regcache_observer_target_changed): Update.
(regcache_thread_ptid_changed): Make it a regcache static
method.
(regcache_thread_ptid_changed): Update.
(class regcache_access): New.
(current_regcache_test): Update.
(_initialize_regcache): Update.
* regcache.h: Include forward_list.
(regcache): Declare regcache_thread_ptid_changed and declare
registers_changed_ptid as friend.

Get register contents by register_size instead of TYPE_LENGTH

We should use register_size to get register contents instead of
TYPE_LENGTH.

gdb:

2017-05-24 Yao Qi <yao.qi@linaro.org>

* i387-tdep.c (i387_register_to_value): Use register_size
instead of TYPE_LENGTH.
* m68k-tdep.c (m68k_register_to_value): Likewise.

Restrict i387_convert_register_p

gdb:

2017-05-24 Yao Qi <yao.qi@linaro.org>

* i387-tdep.c (i387_convert_register_p): Return false if type
code isn't TYPE_CODE_FLT.

Restrict alpha_convert_register_p

This patch restricts alpha_convert_register_p from
"TYPE_LENGTH (type) != 8" to "TYPE_LENGTH (type) == 4", because,

- we have check "TYPE_LENGTH (valtype) == 4" in alpha_register_to_value
   and alpha_value_to_register,
- alpha lds and sts instruction access 4 bytes,
- comments "It might need to convert the [float] register into the
   corresponding [integer] type (see Alpha)" and integer is 4-byte on
   alpha,

I think it is the right restrict condition to "TYPE_LENGTH (valtype) == 4".

gdb:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

* alpha-tdep.c (alpha_convert_register_p): Return true if type
length is 4.
(alpha_register_to_value): Remove type length check.
(alpha_value_to_register): Likewise.

Restrict ia64_convert_register_p

gdb:

2017-05-24 Yao Qi <yao.qi@linaro.org>

* ia64-tdep.c (ia64_convert_register_p): Check type's code is
TYPE_CODE_FLT.

Restrict m68k_convert_register_p

We need to convert register if the type is float.  Suppose we get a value
from float point register, but its type is integer, we don't have to convert.
This case may not exist in real code, but exist in my unit test case.

warning: Cannot convert floating-point register value to non-floating-point type.
Self test failed: arch m68k: self-test failed at gdb/git/gdb/findvar.c:1072

              ok = gdbarch_register_to_value (gdbarch, frame, regnum, type,
                                              buf.data (), &optim, &unavail);

1072:         SELF_CHECK (ok);

gdb:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

* m68k-tdep.c (m68k_convert_register_p): Check type's code is
TYPE_CODE_FLT or not.

Use XCNEW gdbarch_tdep

This patch uses XCNEW gdbarch_tdep instead of XNEW.

gdb:

2017-05-24 Yao Qi <yao.qi@linaro.org>

* alpha-tdep.c (alpha_gdbarch_init): Use XCNEW instead of XNEW.
* avr-tdep.c (avr_gdbarch_init): Likewise.
* bfin-tdep.c (bfin_gdbarch_init): Likewise.
* cris-tdep.c (cris_gdbarch_init): Likewise.
* ft32-tdep.c (ft32_gdbarch_init): Likewise.
* lm32-tdep.c (lm32_gdbarch_init): Likewise.
* m32r-tdep.c (m32r_gdbarch_init): Likewise.
* m68hc11-tdep.c (m68hc11_gdbarch_init): Likewise.
* mep-tdep.c (mep_gdbarch_init): Likewise.
* microblaze-tdep.c (microblaze_gdbarch_init): Likewise.
* mips-tdep.c (mips_gdbarch_init): Likewise.
* mn10300-tdep.c (mn10300_gdbarch_init): Likewise.
* moxie-tdep.c (moxie_gdbarch_init): Likewise.
* msp430-tdep.c (msp430_gdbarch_init): Likewise.
* sh64-tdep.c (sh64_gdbarch_init): Likewise.
* v850-tdep.c (v850_gdbarch_init): Likewise.

Clear GDB internal state after each unit test

GDB has some global variables, like sentinel_frame,
current_thread_arch, and etc, we need to reset them after each unit
tests.

gdb:

2017-05-24 Yao Qi <yao.qi@linaro.org>

* selftest-arch.c (tests_with_arch): Call registers_changed
and reinit_frame_cache.
* selftest.c (run_self_tests): Likewise.

Move print_insn_XXX to an opcodes internal header

With the changes done in previous patches, print_insn_XXX functions
don't have to be external visible out of opcodes, because both gdb
and objdump select disassemblers through a single interface.

This patch moves these print_insn_XXX declarations from
include/dis-asm.h to opcodes/disassemble.h, which is a new header
added by this patch.

include:

2017-05-24 Yao Qi <yao.qi@linaro.org>

* dis-asm.h: Move some function declarations to
opcodes/disassemble.h.

opcodes:

2017-05-24 Yao Qi <yao.qi@linaro.org>

* alpha-dis.c: Include disassemble.h, don't include
dis-asm.h.
* avr-dis.c, bfin-dis.c, cr16-dis.c: Likewise.
* crx-dis.c, d10v-dis.c, d30v-dis.c: Likewise.
* disassemble.c, dlx-dis.c, epiphany-dis.c: Likewise.
* fr30-dis.c, ft32-dis.c, h8300-dis.c, h8500-dis.c: Likewise.
* hppa-dis.c, i370-dis.c, i386-dis.c: Likewise.
* i860-dis.c, i960-dis.c, ip2k-dis.c: Likewise.
* iq2000-dis.c, lm32-dis.c, m10200-dis.c: Likewise.
* m10300-dis.c, m32r-dis.c, m68hc11-dis.c: Likewise.
* m68k-dis.c, m88k-dis.c, mcore-dis.c: Likewise.
* metag-dis.c, microblaze-dis.c, mmix-dis.c: Likewise.
* moxie-dis.c, msp430-dis.c, mt-dis.c:
* nds32-dis.c, nios2-dis.c, ns32k-dis.c: Likewise.
* or1k-dis.c, pdp11-dis.c, pj-dis.c: Likewise.
* ppc-dis.c, pru-dis.c, riscv-dis.c: Likewise.
* rl78-dis.c, s390-dis.c, score-dis.c: Likewise.
* sh-dis.c, sh64-dis.c, tic30-dis.c: Likewise.
* tic4x-dis.c, tic54x-dis.c, tic6x-dis.c: Likewise.
* tic80-dis.c, tilegx-dis.c, tilepro-dis.c: Likewise.
* v850-dis.c, vax-dis.c, visium-dis.c: Likewise.
* w65-dis.c, wasm32-dis.c, xc16x-dis.c: Likewise.
* xgate-dis.c, xstormy16-dis.c, xtensa-dis.c: Likewise.
* z80-dis.c, z8k-dis.c: Likewise.
* disassemble.h: New file.

Use disassemble.c:disassembler select rs6000 disassembler

Nowadays, rs6000 disassembler is selected in different ways in
opcodes and gdb,

opcodes:
    case bfd_arch_rs6000:
      if (mach == bfd_mach_ppc_620)
disassemble = print_insn_big_powerpc;
      else
disassemble = print_insn_rs6000;
      break;

gdb:

  if (arch == bfd_arch_rs6000)
    set_gdbarch_print_insn (gdbarch, print_insn_rs6000);
  else
    set_gdbarch_print_insn (gdbarch, gdb_print_insn_powerpc);

I am not sure which one is the right one.  However, such selection
should be done in one place instead of two.

gdb:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

* rs6000-tdep.c (gdb_print_insn_powerpc): Remove.
(rs6000_gdbarch_init): Don't call set_gdbarch_print_insn.

Use disassemble.c:disassembler select rl78 disassembler

This patch changes rl78 to let disassble.c:disassembler select
disassembler.  rl78_get_disassembler doesn't handle the case
that abfd is NULL, so this patch also fix it.

gdb:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

* rl78-tdep.c (rl78_gdbarch_init): Don't call
set_gdbarch_print_insn.

opcodes:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

* rl78-dis.c (rl78_get_disassembler): If parameter abfd
is NULL, set cpu to E_FLAG_RL78_ANY_CPU.

Use disassemble.c:disassembler select h8300 disassembler

opcodes/disassble.c:disassembler select h8300 disassembler like this,

      if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn)
disassemble = print_insn_h8300h;
      else if (mach == bfd_mach_h8300s
       || mach == bfd_mach_h8300sn
       || mach == bfd_mach_h8300sx
       || mach == bfd_mach_h8300sxn)
disassemble = print_insn_h8300s;
      else
disassemble = print_insn_h8300;

which is the same as what gdb/h8300-tdpe.c does,

  switch (info.bfd_arch_info->mach)
    {
    case bfd_mach_h8300:
    ...
      set_gdbarch_print_insn (gdbarch, print_insn_h8300);
    case bfd_mach_h8300h:
    case bfd_mach_h8300hn:
    ...
      set_gdbarch_print_insn (gdbarch, print_insn_h8300h);
    case bfd_mach_h8300s:
    case bfd_mach_h8300sn:
    ...
      set_gdbarch_print_insn (gdbarch, print_insn_h8300s);

so we can leave disassble.c:disassembler doing the selection.

gdb:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

* h8300-tdep.c (h8300_gdbarch_init): Don't call
set_gdbarch_print_insn.

Delegate opcodes to select disassembler in GDB

This patch changes GDB to use disassembler selected by opcodes in
default, so that we don't have to duplicate the selection logic again
in GDB side.  For example, gdb/score-tdep.c has

static int
score_print_insn (bfd_vma memaddr, struct disassemble_info *info)
{
  if (info->endian == BFD_ENDIAN_BIG)
    return print_insn_big_score (memaddr, info);
  else
    return print_insn_little_score (memaddr, info);
}

and opcodes/disassemble.c has the same logic,

    case bfd_arch_score:
      if (big)
disassemble = print_insn_big_score;
      else
disassemble = print_insn_little_score;

This patch removes the logic in GDB and calls
opcodes/disassemble.c:disassembler in default to select disassembler.

gdb:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

* alpha-tdep.c (alpha_gdbarch_init): Don't call
set_gdbarch_print_insn.
* arc-tdep.c (arc_gdbarch_init): Likewise.
* arch-utils.c: include dis-asm.h.
(default_print_insn): New function.
* arch-utils.h (default_print_insn): Declare.
* avr-tdep.c (avr_gdbarch_init): Don't call set_gdbarch_print_insn.
* bfin-tdep.c (bfin_gdbarch_init): Likewise.
* cris-tdep.c (cris_delayed_get_disassembler): Remove.
(cris_gdbarch_init): Don't call set_gdbarch_print_insn.
* frv-tdep.c (frv_gdbarch_init): Likewise.
* ft32-tdep.c (ft32_gdbarch_init): Likewise.
* gdbarch.sh (print_insn): Use default_print_insn.
* gdbarch.c: Regenerated.
* hppa-tdep.c (hppa_gdbarch_init): Likewise.
* iq2000-tdep.c (iq2000_gdbarch_init): Likewise.
* lm32-tdep.c (lm32_gdbarch_init): Likewise.
* m32c-tdep.c (m32c_gdbarch_init): Likewise.
* m32r-tdep.c (m32r_gdbarch_init): Likewise.
* m68hc11-tdep.c (gdb_print_insn_m68hc11): Remove.
(m68hc11_gdbarch_init): Don't call set_gdbarch_print_insn.
* m68k-tdep.c (m68k_gdbarch_init): Likewise.
* m88k-tdep.c (m88k_gdbarch_init): Likewise.
* microblaze-tdep.c (microblaze_gdbarch_init): Likewise.
* mn10300-tdep.c (mn10300_gdbarch_init): Likewise.
* moxie-tdep.c (moxie_gdbarch_init): Likewise.
* msp430-tdep.c (msp430_gdbarch_init): Likewise.
* mt-tdep.c (mt_gdbarch_init): Likewise.
* nds32-tdep.c (nds32_gdbarch_init): Likewise.
* nios2-tdep.c (nios2_print_insn): Remove.
(nios2_gdbarch_init): Don't call set_gdbarch_print_insn.
* rx-tdep.c (rx_gdbarch_init): Likewise.
* s390-linux-tdep.c (s390_gdbarch_init): Likewise.
* score-tdep.c (score_print_insn): Remove.
(score_gdbarch_init): Don't call set_gdbarch_print_insn.
* sh-tdep.c (sh_gdbarch_init): Likewise.
* sh64-tdep.c (sh64_gdbarch_init): Likewise.
* sparc-tdep.c (sparc32_gdbarch_init): Likewise.
* tic6x-tdep.c (tic6x_print_insn): Remove.
(tic6x_gdbarch_init): Don't call set_gdbarch_print_insn.
* tilegx-tdep.c (tilegx_gdbarch_init): Likewise.
* v850-tdep.c (v850_gdbarch_init): Likewise.
* vax-tdep.c (vax_gdbarch_init): Likewise.
* xstormy16-tdep.c (xstormy16_gdbarch_init): Likewise.
* xtensa-tdep.c (xtensa_gdbarch_init): Likewise.

Refactor disassembler selection

Nowadays, opcodes/disassemble.c:disassembler selects the proper
disassembler according to ABFD only.  However, it actually
selects disassemblers according to arch, mach, endianess, and
abfd.  This patch adds them to the parameters of disassembler,
so that its caller can still select disassemblers in case that
abfd is NULL (a typical case in GDB).

There isn't any functionality change.

binutils:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

* objdump.c (disassemble_data): Caller update.

include:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

* dis-asm.h (disassembler): Update declaration.

opcodes:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

* disassemble.c (disassembler): Add arguments a, big and mach.
Use them.

sim/common:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

* sim-trace.c (trace_disasm): Caller update.

Automatic date update in version.in

Use mips_regnum instead of constants for FreeBSD/mips register operations.

gdb/ChangeLog:

* mips-fbsd-tdep.c (MIPS_PC_REGNUM): Remove.
(MIPS_FP0_REGNUM): Remove.
(MIPS_FSR_REGNUM): Remove.
(mips_fbsd_supply_fpregs): Use mips_regnum.
(mips_fbsd_supply_gregs): Likewise.
(mips_fbsd_collect_fpregs): Likewise.
(mips_fbsd_collect_gregs): Likewise.

Cleanups to FreeBSD/mips native register operations.

Compare against the "raw" PC register number instead of the cooked
register number when determining if a register was handled by
PT_GETREGS. Previously the register fetch/store operations only tried
PT_GETREGS to fetch any individual register. The result was that
fetching or storing an individual register not covered by PT_GETREGS
(such as floating point registers) did not work.

While here, remove an early exit to simplify the code flow from the
PT_GETREGS / PT_SETREGS case, and add a getfpregs_supplies similar to
getregs_supplies to describe the registers supplied by PT_GETFPREGS
and PT_SETFPREGS.

gdb/ChangeLog:

* mips-fbsd-nat.c (getregs_supplies): Fix upper bound comparison.
(getpfpregs_supplies): New function.
(mips_fbsd_fetch_inferior_registers): Remove early exit and use
getfpregs_supplies.
(mips_fbsd_store_inferior_registers): Likewise.

x86: Update notrackbad tests for non-ELF targets

* gas/testsuite/gas/i386/notrackbad.l: Updated for non-ELF
targets.
* gas/testsuite/gas/i386/x86-64-notrackbad.l: Likewise.

PR21503, Gold doesn't create linker stub symbols on ppc64

PR 21503
* options.h: Add --emit-stub-syms option.
* powerpc.cc (object_id): New.
(Powerpc_relobj): Add uniq_ and accessor. Sort variables for
better packing.
(Powerpc_dynobj): Sort variables for better packing.
(Target_powerpc::define_local): New function.
(Target_powerpc::group_sections): Pass stub table size to
Stub_table constructor.
(Target_powerpc::do_relax): Define stub and glink symbols.
(Stub_table): Add uniq_ variable, and id param to constructor.
(Stub_table::Plt_stub_ent): Add indx_ variable.
(Stub_table::Branch_stub_entries): Move typedef earlier.
(Stub_table::branch_stub_size): Replace "to" parameter with a
Branch_stub_entries iterator.
(Stub_table::add_long_branch_entry): Adjust to suit.
(Stub_table::add_plt_call_entry): Set indx_.
(Stub_table::define_stub_syms): New function.

[ARC] Reformat error messages.

gas/
2017-05-23 Claudiu Zissulescu <claziss@synopsys.com>

* config/tc-arc.c (md_apply_fix): Use as_bad_where.
(assemble_insn): Use as_bad.

[ARC] Fix fall through warnings.

bfd/
2017-05-23 Dilian Palauzov <git-dpa@aegee.org>

* elf32-arc.c (arc_elf_merge_attributes): Add fall through
comments.

[ARC] Update MAX_INSN_FLGS.

It is required to parse instructions like ldb.x.a.di.

include/
2017-05-23 Claudiu Zissulescu <claziss@synopsys.com>

* opcode/arc.h (MAX_INSN_FLGS): Update to 4.

Automatic date update in version.in

gdb: Document vMustReplyEmpty remote packet

Add mention of the vMustReplyEmpty to the remote serial protocol
documentation. It is important that this packet be treated in the same
fashion as any other unknown 'v' packet, and I have tried to reflect
this in the description of the packet, it is not simply the case that we
_must_ return the empty string for this packet.

As the intention is that we should treat this packet as unknown then an
argument could be made that we should not document it, however, for
someone implementing a gdbserver from scratch, seeing an undocumented
packet arrive from gdb is confusing, and will probably cause them to
have to read the code in order to check how this packet should be
handled, which is not ideal.

gdb/doc/ChangeLog:

* gdb.texinfo (Packets): Document vMustReplyEmpty packet.

x86: Add NOTRACK prefix support

For register indirect branches, NOTRACK prefix (0x3e), which is also
the DS segment register prefix, can be used to ignore the CET indirect
branch track.

gas/

* config/tc-i386.c (REX_PREFIX): Changed to 7.
(NOTRACK_PREFIX): New.
(MAX_PREFIXES): Changed to 8.
(_i386_insn): Add notrack_prefix.
(PREFIX_GROUP): Add PREFIX_DS.
(add_prefix): Return PREFIX_DS for DS_PREFIX_OPCODE.
(md_assemble): Check if NOTRACK prefix is supported.
(parse_insn): Set notrack_prefix and issue an error for
other prefixes after NOTRACK prefix.
* testsuite/gas/i386/i386.exp: Run tests for NOTRACK prefix.
* testsuite/gas/i386/notrack-intel.d: New file.
* testsuite/gas/i386/notrack.d: Likewise.
* testsuite/gas/i386/notrack.s: Likewise.
* testsuite/gas/i386/notrackbad.l: Likewise.
* testsuite/gas/i386/notrackbad.s: Likewise.
* testsuite/gas/i386/x86-64-notrack-intel.d: Likewise.
* testsuite/gas/i386/x86-64-notrack.d: Likewise.
* testsuite/gas/i386/x86-64-notrack.s: Likewise.
* testsuite/gas/i386/x86-64-notrackbad.l: Likewise.
* testsuite/gas/i386/x86-64-notrackbad.s: Likewise.

include/

* include/opcode/i386.h (NOTRACK_PREFIX_OPCODE): New.

opcodes/

* i386-dis.c (NOTRACK_Fixup): New.
(NOTRACK): Likewise.
(NOTRACK_PREFIX): Likewise.
(last_active_prefix): Likewise.
(reg_table): Use NOTRACK on indirect call and jmp.
(ckprefix): Set last_active_prefix.
(prefix_name): Return "notrack" for NOTRACK_PREFIX.
* i386-gen.c (opcode_modifiers): Add NoTrackPrefixOk.
* i386-opc.h (NoTrackPrefixOk): New.
(i386_opcode_modifier): Add notrackprefixok.
* i386-opc.tbl: Add NoTrackPrefixOk to indirect call and jmp.
Add notrack.
* i386-tbl.h: Regenerated.

x86-64: Use dynobj instead of htab->elf.dynobj

* elf64-x86-64.c (elf_x86_64_link_setup_gnu_properties): Use
dynobj instead of htab->elf.dynobj.

[AArch64, ld] Support ILP32 triplet aarch64*-linux-gnu_ilp32

This patch allows AArch64 LD defaulting to ILP32 if it is configured with
aarch64*-linux-gnu_ilp32.

ld/
* configure.tgt: Set "targ_emul" to "aarch64linux32b" for
aarch64_be-*-linux-gnu_ilp32. Set "targ_emul" to "aarch64linux32" for
aarch64-*-linux-gnu_ilp32.

[AArch64, gas] Support ILP32 triplet aarch64*-linux-gnu_ilp32

This patch allows AArch64 GAS defaulting to ILP32 if it is configured with
aarch64*-linux-gnu_ilp32.

"md_after_parse_args" is implemented to update ABI into ILP32 if DEFAULT_ARCH is
"aarch64:32".

gas/
* configure.tgt: Set "arch" to "aarch64" if ${cpu} equals "aarch64".
Recognize the new triplet name aarch64*-linux-gnu_ilp32.
* configure.ac: Output DEFAULT_ARCH macro for AArch64.
* configure: Regenerate.
* config/tc-aarch64.h (aarch64_after_parse_args): New declaration.
(md_after_parse_args): New define.
* config/tc-aarch64.c (aarch64_abi_type): New enumeration
AARCH64_ABI_NONE.
(DEFAULT_ARCH): New define.
(aarch64_abi): Set default value to AARCH64_ABI_NONE.
(aarch64_after_parse_args): New function.

gdb: Add John Baldwin as FreeBSD Maintainer

gdb/ChangeLog:
2017-05-22 Pedro Alves <palves@redhat.com>

* MAINTAINERS (Host/Native): Add John Baldwin as FreeBSD
maintainer.

Add PPC_MAX_REGISTER_SIZE

gdb/
* ppc-linux-nat.c (fetch_register): Use PPC_MAX_REGISTER_SIZE.
(store_register): Likewise.
* ppc-sysv-tdep.c (ppc_sysv_abi_push_dummy_call): Likewise.
(get_decimal_float_return_value): Likewise.
(do_ppc_sysv_return_value): Likewise.
(ppc64_sysv_abi_push_integer): Likewise.
(ppc64_sysv_abi_push_freg): Likewise.
(ppc64_sysv_abi_return_value_base): Likewise.
(ppc64_sysv_abi_return_value): Likewise.
* rs6000-aix-tdep.c (rs6000_push_dummy_call): Likewise.
* rs6000-lynx178-tdep.c (rs6000_lynx178_push_dummy_call): Likewise.
* rs6000-nat.c: Likewise.
* rs6000-tdep.c (rs6000_register_to_value): Likewise.
(rs6000_value_to_register): Likewise.
* ppc-tdep.h (PPC_MAX_REGISTER_SIZE): Add.

Automatic date update in version.in

Print Rust unsized array types a bit more nicely

It's a bit difficult to create an unsized array type in Rust, but if
you do, right now ptype will show something like "[u8; ]".  It really
should print "[u8]", though, which is what this patch implements.

This is part of PR 21466.

Built and regtested on x86-64 Fedora 25.  I'm checking this in.

ChangeLog
2017-05-21  Tom Tromey  <tom@tromey.com>

PR rust/21466:
* rust-lang.c (rust_print_type) <TYPE_CODE_ARRAY>: Print unsized
arrays as "[T]", not "[T; ]".

testsuite/ChangeLog
2017-05-21  Tom Tromey  <tom@tromey.com>

PR rust/21466:
* gdb.rust/unsized.exp: New file.
* gdb.rust/unsized.rs: New file.

Automatic date update in version.in

binutils: remove sparc64/mips64 workaround in objcopy build notes merge code

This patch removes a workaround recently installed in objcopy that
avoided removing duplicated notes in targets for which the number of
internal relocations may be bigger than the number of external
relocations. With the recent fixes in sparc64 and mips64, this
workaround is no longer necessary.

2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>

* objcopy.c (merge_gnu_build_notes): Remove workaround that
prevented deleting relocations in duplicated notes in mips64 and
sparc.

Use watchpoint's language when re-parsing expression

PR rust/21484 notes that watch -location does not work with Rust:

    (gdb) watch -location a
    syntax error in expression, near `) 0x00007fffffffe0f4'.

update_watchpoint tries to tell gdb that the new expression it creates
has C syntax:

      /* The above expression is in C.  */
      b->language = language_c;

However, update_watchpoint doesn't actually use this language when
re-parsing the expression.

Originally I was going to fix this by saving and restoring the
language in update_watchpoint, but this regressed
gdb.dlang/watch-loc.exp, because the constructed expression actually
has D syntax (specifically the name is not parseable by C).

Next I looked at directly constructing an expression, and not relying
on the parser at all; but it seemed to me that upon a re-set, we'd
want to reparse the type, and there is no existing API to do this
correctly.

So, in the end I made a hook to let each language choose what
expression to use.  I made all the languages other than Rust use the C
expression, because that is the status quo ante.  However, this is
probably not truly correct.  After this patch, at least, it is easy to
correct by someone who knows the language(s) in question.

Regtested by the buildbot.

ChangeLog
2017-05-19  Tom Tromey  <tom@tromey.com>

PR rust/21484:
* rust-lang.c (exp_descriptor_rust): New function.
(rust_language_defn): Use it.
* p-lang.c (pascal_language_defn): Update.
* opencl-lang.c (opencl_language_defn): Update.
* objc-lang.c (objc_language_defn): Update.
* m2-lang.c (m2_language_defn): Update.
* language.h (struct language_defn)
<la_watch_location_expression>: New member.
* language.c (unknown_language_defn, auto_language_defn)
(local_language_defn): Update.
* go-lang.c (go_language_defn): Update.
* f-lang.c (f_language_defn): Update.
* d-lang.c (d_language_defn): Update.
* c-lang.h (c_watch_location_expression): Declare.
* c-lang.c (c_watch_location_expression): New function.
(c_language_defn, cplus_language_defn, asm_language_defn)
(minimal_language_defn): Use it.
* breakpoint.c (watch_command_1): Call
la_watch_location_expression.
* ada-lang.c (ada_language_defn): Update.

testsuite/ChangeLog
2017-05-19  Tom Tromey  <tom@tromey.com>

PR rust/21484:
* gdb.rust/watch.exp: New file.
* gdb.rust/watch.rs: New file.

Automatic date update in version.in

MIPS/BFD: For n64 hold the number of internal relocs in `->reloc_count'

Revert parts of commit fee24f1c5bfe ("objdump improvements for mips
elf64"), <https://sourceware.org/ml/binutils/2003-03/msg00108.html>, and
make the `->reloc_count' member of `struct bfd_section' hold the actual
number of internal relocations stored in its `->relocation' vector.  To
do so adjust `mips_elf64_slurp_one_reloc_table' to set `->reloc_count'
to the actual number of internal relocations retrieved and discard
`mips_elf64_canonicalize_reloc', `mips_elf64_canonicalize_dynamic_reloc'
and their corresponding target macros.  Contrary to the description of
`mips_elf64_slurp_one_reloc_table', adjusted appropriately, this makes
generic relocation processing code happy and satisfies the "merge notes
section" binutils test case.

Add extra binutils test cases to expand the coverage of the generic
"merge notes section" test case, now passing with the n64 ABI, across
the MIPS o32, n32 and n64 ABIs regardless of the default ABI selected in
target configuration, and also to verify correctness of the relocations
produced.  Conversely, do not provide any additional test cases for the
original issue addressed with the commit referred:

- objdump would display only 1/3 of the total number of relocations,
  because it used the external relocation count, but each external
  relocation is brought in as 3 internal relocations.

as n64 ABI relocation processing with `objdump -r' and `objdump -R' is
already widely covered across the GAS and LD test suites.

bfd/
* elf64-mips.c (mips_elf64_canonicalize_reloc): Remove prototype
and function.
(mips_elf64_canonicalize_dynamic_reloc): Likewise.
(mips_elf64_slurp_one_reloc_table): Set `reloc_count' to the
actual number of internal relocations retrieved.  Adjust
function description.
(bfd_elf64_canonicalize_reloc): Remove macro.
(bfd_elf64_canonicalize_dynamic_reloc): Likewise.

binutils/
* testsuite/binutils-all/mips/mips-note-2.d: New test.
* testsuite/binutils-all/mips/mips-note-2r.d: New test.
* testsuite/binutils-all/mips/mips-note-2-n32.d: New test.
* testsuite/binutils-all/mips/mips-note-2-n64.d: New test.
* testsuite/binutils-all/mips/mips-note-2r-n32.d: New test.
* testsuite/binutils-all/mips/mips-note-2r-n64.d: New test.
* testsuite/binutils-all/mips/mips.exp: Define `has_newabi'.
Run the new tests.

binutils/testsuite: Permit the reuse of dump patterns

Complement commit 89210bdc8fd2 ("GAS: Permit the reuse of dump
patterns"), <https://sourceware.org/ml/binutils/2010-07/msg00269.html>,
and commit ef2b5578f693 ("MIPS: Enable NewABI tests for SDE targets"),
<https://sourceware.org/ml/binutils/2012-08/msg00017.html>, and like the
GAS and LD versions make the binutils version of `run_dump_test' also
support the `dump' keyword, for reusing dump patterns between tests.

binutils/
* testsuite/lib/utils-lib.exp (run_dump_test): Handle the `dump'
option.

binutils: support for the SPARC M8 processor

This patch adds support for the new SPARC M8 processor (implementing OSA
2017) to binutils.

New instructions:

- Dictionary Unpack

  + dictunpack

- Partitioned Compare with shifted result

  + Signed variants:   fpcmp{le,gt,eq,ne}{8,16,32}shl
  + Unsigned variants: fpcmpu{le,gt}{8,16,32}shl

- Partitioned Dual-Equal compared, with shifted result

  + fpcmpde{8,16,32}shl

- Partitioned Unsigned Range Compare, with shifted result

  + fpcmpur{8,16,32}shl

- 64-bit shifts on Floating-Point registers

  + fps{ll,ra,rl}64x

- Misaligned loads and stores

  + ldm{sh,uh,sw,uw,x,ux}
  + ldm{sh,uh,sw,uw,x,ux}a
  + ldmf{s,d}
  + ldmf{s,d}a

  + stm{h,w,x}
  + stm{h,w,x}a
  + stmf{s,d}
  + stmf{s,d}a

- Oracle Numbers

  + on{add,sub,mul,div}

- Reverse Bytes/Bits

  + revbitsb
  + revbytes{h,w,x}

- Run-Length instructions

  + rle_burst
  + rle_length

- New crypto instructions

  + sha3

- Instruction to read the new register %entropy

  + rd %entropy

New Alternate Address Identifiers:

- 0x24, #ASI_CORE_COMMIT_COUNT
- 0x24, #ASI_CORE_SELECT_COUNT
- 0x48, #ASI_ARF_ECC_REG
- 0x53, #ASI_ITLB_PROBE
- 0x58, #ASI_DSFAR
- 0x5a, #ASI_DTLB_PROBE_PRIMARY
- 0x5b, #ASI_DTLB_PROBE_REAL
- 0x64, #ASI_CORE_SELECT_COMMIT_NHT

The new assembler command-line options for selecting the M8 architecture
are:

-Av9m8 or -Asparc6 for 64-bit binaries.
-Av8plusm8 for 32-bit (v8+) binaries.

The corresponding disassembler command-line options are:

-msparc:v9m8 for 64-bit binaries.
-msparc:v8plusm8 for 32-bit (v8+) binaries.

Tested for regressions in the following targets:
sparc-aout sparc-linux sparc-vxworks sparc64-linux

bfd/ChangeLog:

2017-05-19  Jose E. Marchesi  <jose.marchesi@oracle.com>

* archures.c (bfd_mach_sparc_v9m8): Define.
(bfd_mach_sparc_v8plusm8): Likewise.
(bfd_mach_sparc_v9_p): Adjust to M8.
(bfd_mach_sparc_64bit_p): Likewise.
* aoutx.h (machine_type): Handle bfd_mach_sparc_v9m8 and
bfd_mach_sparc_v8plusm8.
* bfd-in2.h: Regenerated.
* cpu-sparc.c (arch_info_struct): Entries for sparc:v9m8 and
sparc:v8plusm8.
* elfxx-sparc.c (_bfd_sparc_elf_object_p): Handle
bfd_mach_sparc_v8plusm8 and bfd_mach_sparc_v9m8 using the new hw
capabilities ONADDSUB, ONMUL, ONDIV, DICTUNP, FPCPSHL, RLE and
SHA3.
* elf32-sparc.c (elf32_sparc_final_write_processing): Handle
bfd_mach_sparc_v8plusm8.

binutils/ChangeLog:

2017-05-19  Jose E. Marchesi  <jose.marchesi@oracle.com>

* NEWS: Mention the SPARC M8 support.

gas/ChangeLog:

2017-05-19  Jose E. Marchesi  <jose.marchesi@oracle.com>

* config/tc-sparc.c (sparc_arch_table): Entries for `sparc6',
`v9m8' and `v8plusm8'.
(sparc_md_end): Handle SPARC_OPCODE_ARCH_M8.
(get_hwcap_name): Support the M8 hardware capabilities.
(sparc_ip): Handle new operand types.
* doc/c-sparc.texi (Sparc-Opts): Document -Av9m8, -Av8plusm8 and
-Asparc6, and the corresponding -xarch aliases.
* testsuite/gas/sparc/sparc6.s: New file.
* testsuite/gas/sparc/sparc6.d: Likewise.
* testsuite/gas/sparc/sparc6-diag.s: Likewise.
* testsuite/gas/sparc/sparc6-diag.l: Likewise.
* testsuite/gas/sparc/fpcmpshl.s: Likewise.
* testsuite/gas/sparc/fpcmpshl.d: Likewise.
* testsuite/gas/sparc/fpcmpshl-diag.s: Likewise.
* testsuite/gas/sparc/fpcmpshl-diag.l: Likewise.
* testsuite/gas/sparc/ldm-stm.s: Likewise.
* testsuite/gas/sparc/ldm-stm.d: Likewise.
* testsuite/gas/sparc/ldm-stm-diag.s: Likewise.
* testsuite/gas/sparc/ldm-stm-diag.l: Likewise.
* testsuite/gas/sparc/ldmf-stmf.s: Likewise.
* testsuite/gas/sparc/ldmf-stmf.d: Likewise.
* testsuite/gas/sparc/ldmf-stmf-diag.s: Likewise.
* testsuite/gas/sparc/ldmf-stmf-diag.l: Likewise.
* testsuite/gas/sparc/on.s: Likewise.
* testsuite/gas/sparc/on.d: Likewise.
* testsuite/gas/sparc/on-diag.s: Likewise.
* testsuite/gas/sparc/on-diag.l: Likewise.
* testsuite/gas/sparc/rle.s: Likewise.
* testsuite/gas/sparc/rle.d: Likewise.
* testsuite/gas/sparc/sparc.exp (gas_64_check): Run new tests.
* testsuite/gas/sparc/rdasr.s: Add test for RDENTROPY.
* testsuite/gas/sparc/rdasr.d: Likewise.

include/ChangeLog:

2017-05-19  Jose E. Marchesi  <jose.marchesi@oracle.com>

* elf/sparc.h (ELF_SPARC_HWCAP2_SPARC6): Define.
(ELF_SPARC_HWCAP2_ONADDSUB): Likewise.
(ELF_SPARC_HWCAP2_ONMUL): Likewise.
(ELF_SPARC_HWCAP2_ONDIV): Likewise.
(ELF_SPARC_HWCAP2_DICTUNP): Likewise.
(ELF_SPARC_HWCAP2_FPCMPSHL): Likewise.
(ELF_SPARC_HWCAP2_RLE): Likewise.
(ELF_SPARC_HWCAP2_SHA3): Likewise.
* opcode/sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_M8
and adjust SPARC_OPCODE_ARCH_MAX.
(HWCAP2_SPARC6): Define.
(HWCAP2_ONADDSUB): Likewise.
(HWCAP2_ONMUL): Likewise.
(HWCAP2_ONDIV): Likewise.
(HWCAP2_DICTUNP): Likewise.
(HWCAP2_FPCMPSHL): Likewise.
(HWCAP2_RLE): Likewise.
(HWCAP2_SHA3): Likewise.
(OPM): Likewise.
(OPMI): Likewise.
(ONFCN): Likewise.
(REVFCN): Likewise.
(SIMM10): Likewise.

opcodes/ChangeLog:

2017-05-19  Jose E. Marchesi  <jose.marchesi@oracle.com>

* sparc-dis.c (MASK_V9): Include SPARC_OPCODE_ARCH_M8.
(X_IMM2): Define.
(compute_arch_mask): Handle bfd_mach_sparc_v8plusm8 and
bfd_mach_sparc_v9m8.
(print_insn_sparc): Handle new operand types.
* sparc-opc.c (MASK_M8): Define.
(v6): Add MASK_M8.
(v6notlet): Likewise.
(v7): Likewise.
(v8): Likewise.
(v9): Likewise.
(v9a): Likewise.
(v9b): Likewise.
(v9c): Likewise.
(v9d): Likewise.
(v9e): Likewise.
(v9v): Likewise.
(v9m): Likewise.
(v9andleon): Likewise.
(m8): Define.
(HWS_VM8): Define.
(HWS2_VM8): Likewise.
(sparc_opcode_archs): Add entry for "m8".
(sparc_opcodes): Add OSA2017 and M8 instructions
dictunpack, fpcmp{ule,ugt,eq,ne,de,ur}{8,16,32}shl,
fpx{ll,ra,rl}64x,
ldm{sh,uh,sw,uw,x,ux}, ldm{sh,uh,sw,uw,x,ux}a, ldmf{s,d},
ldmf{s,d}a, on{add,sub,mul,div}, rdentropy, revbitsb,
revbytes{h,w,x}, rle_burst, rle_length, sha3, stm{h,w,x},
stm{h,w,x}a, stmf{s,d}, stmf{s,d}a.
(asi_table): New M8 ASIs ASI_CORE_COMMIT_COUNT,
ASI_CORE_SELECT_COUNT, ASI_ARF_ECC_REG, ASI_ITLB_PROBE, ASI_DSFAR,
ASI_DTLB_PROBE_PRIMARY, ASI_DTLB_PROBE_REAL,
ASI_CORE_SELECT_COMMIT_NHT.

x86: Add GC testcases with property sections

Verify that debug section is removed by garbage collection when there
is a .note.gnu.property section.

* testsuite/ld-i386/i386.exp: Run property-x86-4a and
property-x86-4b.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
* testsuite/ld-i386/property-x86-4a.d: New file.
* testsuite/ld-i386/property-x86-4a.s: Likewise.
* testsuite/ld-i386/property-x86-4b.d: Likewise.
* testsuite/ld-i386/property-x86-4b.s: Likewise.
* testsuite/ld-x86-64/property-x86-4a.d: Likewise.
* testsuite/ld-x86-64/property-x86-4a.s: Likewise.
* testsuite/ld-x86-64/property-x86-4b.d: Likewise.
* testsuite/ld-x86-64/property-x86-4b.s: Likewise.

gas: fix tests call-relax and asi-bump-warn in 32-bit SPARC ELF targets

Tested in targets:
sparc-aout sparc-linux sparc-vxworks sparc64-linux

2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>

* testsuite/gas/sparc/call-relax.d: Support 32-bit targets.
* testsuite/gas/sparc/sparc.exp (gas_64_check): Use -64 to
run asi-bump-warn.

Update avrxmega3 linker emulation to support avrxmega2 devices with flash memory visible in the SRAM address range.

    PR ld/21472
ld  * emulparams/avrxmega3.sh (RODATA_PM_OFFSET): Set to 0x8000.
    * scripttempl/avr.sc
    (__RODATA_PM_OFFSET__) [RODATA_PM_OFFSET]: Use RODATA_PM_OFFSET
    as default if not already defined.
    (.data) [!RODATA_PM_OFFSET]: Don't include .rodata and friends.
    (.rodata) [RODATA_PM_OFFSET]: Put at an offset of
    __RODATA_PM_OFFSET__.

gas * config/tc-avr.c (mcu_types): Add entries for: attiny416,
     attiny417, attiny816, attiny817.

Fix tui compilation with Solaris libcurses: clear define (PR tui/21482)

On both mainline and the 8.0 branch, gdb compilation fails on Solaris 10
with the native libcurses like this:

In file included from /vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/gdb_curses.h:42:
0,
                 from /vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/tui/tui-data.h:2
6,
                 from /vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/tui/tui-disasm.c
:31:
/vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/tui/tui-disasm.c: In function `CORE_A
DDR tui_disassemble(gdbarch*, tui_asm_line*, CORE_ADDR, int)':
/vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/tui/tui-disasm.c:71:19: error: `class
string_file' has no member named `wclear'; did you mean `clear'?
       gdb_dis_out.clear ();
                   ^
/vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/tui/tui-disasm.c:78:19: error: `class
string_file' has no member named `wclear'; did you mean `clear'?
       gdb_dis_out.clear ();
                   ^
make[2]: *** [Makefile:1927: tui-disasm.o] Error 1

It turned out this happens because <curses.h> has

#define clear()         wclear(stdscr)

This can be avoided by defining NOMACROS, which the patch below does.
ncurses potentially has a similar problem, which can be avoided by defining
NCURSES_NOMACROS.

PR tui/21482
* gdb_curses.h (NOMACROS): Define.
(NCURSES_NOMACROS): Define.

Fix tui compilation with Solaris libcurses: non-const last arg to mvwaddstr (PR tui/21482)

On both mainline and the 8.0 branch, gdb compilation fails on Solaris 10
with the native libcurses in gdb/tui for several instances of the same problem:

/vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/tui/tui-winsource.c: In function `void tui_erase_source_content(tui_win_info*, int)':
/vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/tui/tui-winsource.c:257:18: error: invalid conversion from `const char*' to `char*' [-fpermissive]
        no_src_str);
                  ^
In file included from /vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/gdb_curses.h:42:0,
                 from /vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/tui/tui-data.h:26,
                 from /vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/tui/tui-winsource.c:33:
/vol/gcc-7/lib/gcc/sparc-sun-solaris2.10/7.1.0/include-fixed/curses.h:699:12: note:   initializing argument 4 of `int mvwaddstr(WINDOW*, int, int, char*)'
extern int mvwaddstr(WINDOW *, int, int, char *);
            ^~~~~~~~~
make[2]: *** [Makefile:1927: tui-winsource.o] Error 1

Unlike ncurses, <curses.h> declares

extern int mvwaddstr(WINDOW *, int, int, char *);

i.e. the last arg is char *, not const char *.

The patch fixes this by casting the last arg to mvwaddstr to char *,
as was recently done on mainline in a newterm() call (the only
difference between 8.0 and mainline gdb/tui).

* tui/tui-windata.c (tui_erase_data_content): Cast last mvwaddstr
arg to char *.
* tui/tui-wingeneral.c (box_win): Likewise.
* tui/tui-winsource.c (tui_erase_source_content): Likewise.
(tui_show_source_line): Likewise.
(tui_show_exec_info_content): Likewise.

gdb: fix TYPE_CODE_ARRAY handling in sparc targets

gdb has a special type (TYPE_CODE_ARRAY) to support the gcc extension
(https://gcc.gnu.org/onlinedocs/gcc/Vector-Extensions.html).
TYPE_CODE_ARRAY is handled incorrectly for both (32- and 64-bit) modes
on Sparc machines.

Tested on sparc64-linux-gnu and sparc-solaris (32- and 64-bit mode).

6 tests ( from gdb/testsuite/gdb.base/gnu_vector.exp) failed on
sparc64-Linux and on sparc-Solaris in 32- and 64-bit mode.  Now all
these tests passed.  gdb/testsuite/gdb.base/gnu_vector.exp has 117
different cases for small (and not small) arrays and structures.

No regressions.

gdb/ChangeLog:

2017-05-19  Vladimir Mezentsev  <vladimir.mezentsev@oracle.com>

* sparc-tdep.c (sparc_structure_return_p)
(sparc_arg_on_registers_p): New functions.
(sparc32_store_arguments): Use them.
* sparc64-tdep.c (sparc64_16_byte_align_p)
(sparc64_store_floating_fields, sparc64_extract_floating_fields):
Handle TYPE_CODE_ARRAY.

garbage collect debug sections when no alloc sections are kept

The pr20882 testcase fails on a number of targets that add attribute
or note sections to object files, and the default linker script says
those sections should be kept. This patch changes --gc-sections to
drop debug and special sections like .comment when no SEC_ALLOC
section in an object file is kept. The assumption is that debug
sections are describing code and data that will become part of the
final image in memory.

* elflink.c (_bfd_elf_gc_mark_extra_sections): Don't keep
debug and special sections when no non-note alloc sections in an
object are kept.

Avoid MinGW compilation warning in readline/input.c

This change was already accepted upstream in Readline.

readline/ChangeLog.gdb:

2017-05-19 Eli Zaretskii <eliz@gnu.org>

* input.c [_WIN32]: Include <conio.h> to avoid compiler warning on
MinGW.

MIPS/binutils/testsuite: Bail out right away if !ELF

We have but ELF binutils tests in the MIPS subset, and non-ELF MIPS/GAS
ports are gone, making a future addition of any non-ELF tests unlikely.
Bail out right away then if non-ELF, consuming one level of indentation
across the actual tests run.

binutils/
* testsuite/binutils-all/mips/mips.exp: Bail out right away if
non-ELF.

Automatic date update in version.in

Fix test failure with Rust 1.18 and 1.19

With Rust 1.18 and 1.19, I saw some test suite failures.  They were
all of the same form -- Box seems to be qualified in the output now,
like:

  print box_some
  $64 = core::option::Option<alloc::boxed::Box<u8>>::Some(0x7ffff6c21018 "\001\000")

... where the test was expecting Option<Box<u8>>.

This patch fixes the problem in a way that should work with earlier
versions of Rust.

gdb/testsuite/ChangeLog
2017-05-18  Tom Tromey  <tom@tromey.com>

* gdb.rust/simple.exp: Allow Box to be qualified.

Expect prompt after no FPU warning

2017-05-18 Thomas Preud'homme <thomas.preudhomme@arm.com>

gdb/testsuite/
* gdb.base/float.exp: Expect GDB prompt for targets without FPU.

Treat a prefix of "$SYSROOT" in the same way as "=" when parsing linker search paths.

PR ld/21251
* ldfile.c (ldfile_add_library_path): If the path starts with
$SYSROOT then use the sysroot as the real prefix.
* ldlang.c (lang_add_input_file): Treat $SYSROOT in the same
way as =.
* ldlex.l: Add $SYSROOT as allow prefix for a filename.
* ld.texinfo (-L): Document that $SYSROOT acts like = when
prefixing a library search path.
(INPUT): Likewise.
* testsuite/ld-scripts/sysroot-prefix.exp: Add $SYSROOT prefix
tests.

gdb.base/fileio.c: Fix several -Wmaybe-uninitialized warnings

src/gdb/testsuite/gdb.base/fileio.c: In function ‘test_write’:
src/gdb/testsuite/gdb.base/fileio.c:158:5: warning: ‘ret’ may be used uninitialized in this function [-Wmaybe-uninitialized]
      printf ("write 1: ret = %d, errno = %d\n", ret, errno);
      ^

gdb/ChangeLog:
2017-05-18  Pedro Alves  <palves@redhat.com>

* gdb.base/fileio.c (test_write, test_read, test_close)
(test_fstat): Don't print 'ret' in the fail path.

gdb.base/fileio.c: Fix several -Wreturn-type warnings

All the "test_" functions warn like:

  src/gdb/testsuite/gdb.base/fileio.c: In function ‘test_close’:
  src/gdb/testsuite/gdb.base/fileio.c:280:1: warning: control reaches end of non-void function [-Wreturn-type]
   }
   ^

Nothing looks at the return of these functions, so just make them
return void.  While at it, "()" is not the same as "(void)" in C - fix
that too.

gdb/ChangeLog:
2017-05-18  Pedro Alves  <palves@redhat.com>

* gdb.base/fileio.c (stop, test_open, test_write, test_read)
(test_lseek, test_close, test_stat, test_fstat, test_isatty)
(test_system, test_rename, test_unlink, test_time): Change
prototypes.
* gdb.base/fileio.exp (stop_msg): Adjust.

gdb.base/fileio.exp: Remove nowarnings

... and quiet -Wnonnull in a different way.

gdb/testsuite/ChangeLog:
2017-05-18 Pedro Alves <palves@redhat.com>

* gdb.base/fileio.c (null_str): New global.
(test_stat): Use it.
* gdb.base/fileio.exp: Remove nowarnings.

fix changelog typo

Don't compare boolean values against TRUE or FALSE

bfd/
* arc-got.h: Don't compare boolean values against TRUE or FALSE.
* elf-m10300.c: Likewise.
* elf.c: Likewise.
* elf32-arc.c: Likewise.
* elf32-bfin.c: Likewise.
* elf32-m68k.c: Likewise.
* elf32-nds32.c: Likewise.
* elf32-tilepro.c: Likewise.
* elflink.c: Likewise.
* elfnn-aarch64.c: Likewise.
* elfnn-riscv.c: Likewise.
* elfxx-tilegx.c: Likewise.
* mach-o.c: Likewise.
* peXXigen.c: Likewise.
* vms-alpha.c: Likewise.
* vms-lib.c: Likewise.
opcodes/
* aarch64-asm.c: Don't compare boolean values against TRUE or FALSE.
* aarch64-dis.c: Likewise.
* aarch64-gen.c: Likewise.
* aarch64-opc.c: Likewise.
binutils/
* strings.c: Don't compare boolean values against TRUE or FALSE.
gas/
* config/tc-aarch64.c: Don't compare booleans against TRUE or FALSE.
* config/tc-hppa.c: Likewise.
* config/tc-mips.c: Likewise.
* config/tc-score7.c: Likewise.
ld/
* emultempl/elf32.em: Don't compare boolean values against TRUE or FALSE.
* emultempl/pe.em: Likewise.
* emultempl/pep.em: Likewise.
* emultempl/xtensaelf.em: Likewise.

pr20882 testcase

-gdwarf-sections doesn't work on targets that lack support to emit
address size relative relocs. The testcase as it was avoided
-gdwarf-sections doing anything by providing a non-empty .debug_line.
It's better to not use -gdwarf-sections. Also, the testcase failed
to match the output for 16-bit address targets like avr.

PR ld/20882
* testsuite/ld-gc/pr20882.d: Don't pass -gdwarf-sections to gas.
Allow for 16-bit address targets and match expected data fully.
* testsuite/ld-gc/pr20882a.s: Delete .debug_line section.
* testsuite/ld-gc/pr20882b.s: Likewise.
* testsuite/ld-gc/pr20882c.s: Likewise.

Automatic date update in version.in

Mark debug sections referenced by kept debug sections

If a debug section is referenced by a kept debug section, it should
also be kept.

Some targets, like mips, keep input files when there are some special
sections, like .gnu.attributes, even if input file is unused otherwise.
In this case, all debug sections are kept. The new test will fail on
such targets. We can either fix those targets or XFAIL the test.

bfd/

PR ld/20882
* elflink.c (elf_gc_mark_debug_section): New function.
(_bfd_elf_gc_mark_extra_sections): Mark any debug sections
referenced by kept debug sections.

ld/

PR ld/20882
* testsuite/ld-gc/gc.exp: Run pr20882.
* testsuite/ld-gc/pr20882.d: New file.
* testsuite/ld-gc/pr20882a.s: Likewise.
* testsuite/ld-gc/pr20882b.s: Likewise.
* testsuite/ld-gc/pr20882c.s: Likewise.

Add nowarnings in gdb.base/fileio.exp

I see the following warning in gdb.base/fileio.c,

testsuite/gdb.base/fileio.c:297:3: warning: null argument where non-null required (argument 1) [-Wnonnull]
   ret = stat (NULL, &st);
   ^

This patch adds "nowarnings" to the list passed to gdb_compile.

gdb/testsuite:

2017-05-17  Yao Qi  <yao.qi@linaro.org>

* gdb.base/fileio.exp: Pass nowarnings to gdb_compile.

Add alias command to cmd_list_element

When we add alias command, we call add_alias_cmd and pass the alias name
and command name.  This implicitly requires the command and its prefix
commands are already added to cmdlist.  This may not be true, for example,

  add_com_alias ("tty", "set inferior-tty", class_alias, 0);

"inferior-tty" command is added to setlist, but setlist may not be added
to cmdlist (It depends on the order of related _initialize_XXX functions
called) so that we can't find "set inferior-tty" from cmdlist.

This patch fixes this problem by passing cmd_list_element of "inferior-tty"
to add_alias_cmd, so that cmd_list_element of "inferior-tty" doesn't have
to be reachable from cmdlist at that moment.

gdb:

2017-05-17  Yao Qi  <yao.qi@linaro.org>

* cli/cli-decode.c (add_alias_cmd): New function.
* command.h (add_alias_cmd): Declare.
* infcmd.c (_initialize_infcmd): Don't call add_com_alias,
instead call add_alias_cmd.

gdb/testsuite:

2017-05-17  Simon Marchi  <simon.marchi@ericsson.com>

* gdb.base/set-inferior-tty.exp (test_set_inferior_tty): Add
argument command.
(top-level): Invoke test_set_inferior_tty.

nat_extra_makefile_frag -> nat_makefile_frag

gdb/ChangeLog:
2017-05-17  Pedro Alves  <palves@redhat.com>

* Makefile.in (nat_extra_makefile_frag): Rename to ...
(nat_makefile_frag): ... this.  All references updated.
* configure.ac: Likewise.
* configure.nat: Likewise.  Enhance comments.
* configure: Regenerate.

S/390: Fix arch level of pckmo instruction.

Fix wrong architecture level of PCKMO instruction.

Committed to mainline.

opcodes/ChangeLog:

2017-05-17 Andreas Krebbel <krebbel@linux.vnet.ibm.com>

* s390-opc.txt: PCKMO change arch level to z196.

gas/ChangeLog:

2017-05-17 Andreas Krebbel <krebbel@linux.vnet.ibm.com>

* testsuite/gas/s390/zarch-z10.d: Remove pckmo.
* testsuite/gas/s390/zarch-z10.s: Remove pckmo.
* testsuite/gas/s390/zarch-z196.d: Add pckmo.
* testsuite/gas/s390/zarch-z196.s: Add pckmo.

Automatic date update in version.in

Fix commit 0a7d38897b9fb1ec7a064ca3347cbac3ba49e5ac

Run PR ld/21481 tests only if IFUNC is supported

PR ld/21481
* testsuite/ld-x86-64/x86-64.exp: Run PR ld/21481 tests only
if IFUNC is supported by run-time.

Allow target files access to default TC_FORCE_RELOCATION defines

* write.c (GENERIC_FORCE_RELOCATION_LOCAL): Define.
(TC_FORCE_RELOCATION_LOCAL): Use it.
(GENERIC_FORCE_RELOCATION_SUB_SAME): Define.
(TC_FORCE_RELOCATION_SUB_SAME): Use it.
* config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL,
TC_FORCE_RELOCATION_SUB_SAME): Use GENERIC defines.
* config/tc-aarch64.h: Similarly.
* config/tc-avr.h: Similarly.
* config/tc-cris.h: Similarly.
* config/tc-i386.h: Similarly.
* config/tc-i960.h: Similarly.
* config/tc-ia64.h: Similarly.
* config/tc-microblaze.h: Similarly.
* config/tc-mips.h: Similarly.
* config/tc-msp430.h: Similarly.
* config/tc-nds32.h: Similarly.
* config/tc-pru.h: Similarly.
* config/tc-riscv.h: Similarly.
* config/tc-rl78.h: Similarly.
* config/tc-s390.h: Similarly.
* config/tc-sh.h: Similarly.
* config/tc-sh64.h: Similarly.
* config/tc-sparc.h: Similarly.
* config/tc-xtensa.h: Similarly.
* config/tc-mn10300.h: Similarly.
(GENERIC_FORCE_RELOCATION_LOCAL): Define.
* config/tc-msp430.c (msp430_force_relocation_local): Modify to
be addition to rather than replacement of standard
TC_FORCE_RELOCATION_LOCAL.

Rename non_ir_ref to non_ir_ref_regular

Since the flag is now set only for regular object refs.

include/
* bfdlink.h (struct bfd_link_hash_entry <non_ir_ref>): Rename to
non_ir_ref_regular.
bfd/
* elf-m10300.c: Rename occurrences of non_ir_ref.
* elf32-arm.c: Likewise.
* elf32-bfin.c: Likewise.
* elf32-cr16.c: Likewise.
* elf32-cris.c: Likewise.
* elf32-d10v.c: Likewise.
* elf32-dlx.c: Likewise.
* elf32-fr30.c: Likewise.
* elf32-frv.c: Likewise.
* elf32-hppa.c: Likewise.
* elf32-i370.c: Likewise.
* elf32-i386.c: Likewise.
* elf32-iq2000.c: Likewise.
* elf32-lm32.c: Likewise.
* elf32-m32c.c: Likewise.
* elf32-m32r.c: Likewise.
* elf32-m68hc1x.c: Likewise.
* elf32-m68k.c: Likewise.
* elf32-mcore.c: Likewise.
* elf32-metag.c: Likewise.
* elf32-microblaze.c: Likewise.
* elf32-moxie.c: Likewise.
* elf32-msp430.c: Likewise.
* elf32-mt.c: Likewise.
* elf32-nios2.c: Likewise.
* elf32-or1k.c: Likewise.
* elf32-ppc.c: Likewise.
* elf32-rl78.c: Likewise.
* elf32-s390.c: Likewise.
* elf32-score.c: Likewise.
* elf32-score7.c: Likewise.
* elf32-sh.c: Likewise.
* elf32-tic6x.c: Likewise.
* elf32-tilepro.c: Likewise.
* elf32-v850.c: Likewise.
* elf32-vax.c: Likewise.
* elf32-xstormy16.c: Likewise.
* elf32-xtensa.c: Likewise.
* elf64-alpha.c: Likewise.
* elf64-hppa.c: Likewise.
* elf64-ia64-vms.c: Likewise.
* elf64-mmix.c: Likewise.
* elf64-ppc.c: Likewise.
* elf64-s390.c: Likewise.
* elf64-sh64.c: Likewise.
* elf64-x86-64.c: Likewise.
* elflink.c: Likewise.
* elfnn-aarch64.c: Likewise.
* elfnn-ia64.c: Likewise.
* elfnn-riscv.c: Likewise.
* elfxx-mips.c: Likewise.
* elfxx-sparc.c: Likewise.
* elfxx-tilegx.c: Likewise.
* linker.c: Likewise.
ld/
* plugin.c: Rename occurrences of non_ir_ref.

non_ir_ref_dynamic

dynamic_ref_after_ir_def is a little odd compared to other symbol
flags in that as the name suggests, it is set only for certain
references after a definition. It turns out that setting a flag for
any non-ir reference from a dynamic object can be used to solve the
problem for which this flag was invented, which I think is a cleaner.
This patch does that, and sets non_ir_ref only for regular object
references.

include/
* bfdlink.h (struct bfd_link_hash_entry): Update non_ir_ref
comment. Rename dynamic_ref_after_ir_def to non_ir_ref_dynamic.
ld/
* plugin.c (is_visible_from_outside): Use non_ir_ref_dynamic.
(plugin_notice): Set non_ir_ref for references from regular
objects, non_ir_ref_dynamic for references from dynamic objects.
bfd/
* elf64-ppc.c (add_symbol_adjust): Transfer non_ir_ref_dynamic.
* elflink.c (elf_link_add_object_symbols): Update to use
non_ir_ref_dynamic.
(elf_link_input_bfd): Test non_ir_ref_dynamic in addition to
non_ir_ref.
* linker.c (_bfd_generic_link_add_one_symbol): Likewise.

Automatic date update in version.in

2017-05-15  Eric Christopher <echristo@gmail.com>

        * layout.cc (Layout::segment_precedes): Add a case for testing
        pointer equality when determining which segment precedes
        another.

2017-05-15 Jeff Law <law@redhat.com>

* readelf.c (display_arc_attribute): Avoid implicit fallthru.

Fix use of ARM ADR and ADRl pseudo-instructions with thumb function symbols.

PR gas/21458
* config/tc-arm.c (do_adr): If the ADR involves a thumb function
symbol, ensure that the T bit will be set.
(do_adrl): Likewise.
(do_t_adr): Likewise.
* testsuite/gas/arm/pr21458.s: New test.
* testsuite/gas/arm/pr21458.d: New test driver.

MIPS16e2: Add new MIPS16e2 relaxation GAS and LD tests

Verify MIPS16 PC-relative instruction relaxation using the MIPS16e2 LUI
instruction rather than an LI/SLL instruction pair.

gas/
* testsuite/gas/mips/mips16-pcrel-1.d: Remove `-mips3' from `as'
flags.
* testsuite/gas/mips/mips16-pcrel-pic-1.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-n32-0.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-n32-1.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-n64-0.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-n64-1.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-n64-sym32-0.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-reloc-4.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-reloc-5.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-reloc-6.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-reloc-7.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-4.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-5.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-6.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-7.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-9.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-pic-9.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-n32-8.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-n32-9.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-8.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-9.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-n64-8.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-n64-9.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-2.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-3.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-6.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-7.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-6.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-n32-4.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-n32-6.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-n64-4.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-n64-6.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-4.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-6.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-4.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-6.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-4.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-6.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-4.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-6.d:
Likewise.
* testsuite/gas/mips/mips16e2@mips16-pcrel-0.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-1.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-2.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-n32-0.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-n32-1.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-0.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-1.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-delay-0.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-delay-1.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-2.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-3.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-6.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-7.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-2.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-3.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-6.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-7.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-8.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-9.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-8.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-9.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-8.d:
New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-9.d:
New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-1.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-2.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-3.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-4.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-5.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-6.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-7.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-4.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-6.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-4.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-6.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-4.d:
New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-6.d:
New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-4.d:
New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-6.d:
New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-4.d:
New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-6.d:
New test.
* testsuite/gas/mips/mips16-pcrel-1.l: Adjust line numbers.
* testsuite/gas/mips/mips16-pcrel-1.s: Adjust for alignment
preservation between MIPS16 and MIPS16e2 code.
* testsuite/gas/mips/mips.exp: Run MIPS16 relaxation tests over
all MIPS16 architectures.

ld/
* testsuite/ld-mips-elf/mips16e2-pcrel-0.d: New test.
* testsuite/ld-mips-elf/mips16e2-pcrel-1.d: New test.
* testsuite/ld-mips-elf/mips16e2-pcrel-addend-2.d: New test.
* testsuite/ld-mips-elf/mips16e2-pcrel-addend-6.d: New test.
* testsuite/ld-mips-elf/mips16e2-pcrel-n32-0.d: New test.
* testsuite/ld-mips-elf/mips16e2-pcrel-n32-1.d: New test.
* testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-0.d: New test.
* testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-1.d: New test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.

MIPS16e2: Add new MIPS16e2 ASE binutils and GAS tests

Verify MIPS16e2 ASE instruction assembly, disassembly and object file
flags.

binutils/
* testsuite/binutils-all/mips/mips16-undecoded.d: Add `-mips3'
to `as' flags.
* testsuite/binutils-all/mips/mips16e2-undecoded.d: New test.
* testsuite/binutils-all/mips/mips16e2-extend-insn.d: New test.
* testsuite/binutils-all/mips/mips16-undecoded.s: Remove
`.module mips3'.
* testsuite/binutils-all/mips/mips.exp: Run the new tests.

gas/
* testsuite/gas/mips/mips16e2.d: New test.
* testsuite/gas/mips/mips16e2-mt.d: New test.
* testsuite/gas/mips/mips16e2-sub.d: New test.
* testsuite/gas/mips/mips16e2@mips16e2-sub.d: New test.
* testsuite/gas/mips/mips16e2-mt-sub.d: New test.
* testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: New test.
* testsuite/gas/mips/mips16e2-hilo.d: New test.
* testsuite/gas/mips/mips16e2-hilo-n32.d: New test.
* testsuite/gas/mips/mips16e2-reloc-error.d: New test.
* testsuite/gas/mips/mips16e2-imm-error.d: New test.
* testsuite/gas/mips/elf_ase_mips16e2.d: New test.
* testsuite/gas/mips/elf_ase_mips16e2-2.d: New test.
* testsuite/gas/mips/elf-rel9-mips16e2.d: New test.
* testsuite/gas/mips/mips16e2-lui.d: New test.
* testsuite/gas/mips/mips16e2@mips32r2-sync.d: New test.
* testsuite/gas/mips/mips16e2@mips32r2-sync-1.d: New test.
* testsuite/gas/mips/mips16e2@lui-2.d: New test.
* testsuite/gas/mips/mips16e2-reloc-error.l: New stderr output.
* testsuite/gas/mips/mips16e2-imm-error.l: New stderr output.
* testsuite/gas/mips/mips16e2@lui-2.l: New stderr output.
* testsuite/gas/mips/mips16e2.s: New test source.
* testsuite/gas/mips/mips16e2-mt.s: New test source.
* testsuite/gas/mips/mips16e2-sub.s: New test source.
* testsuite/gas/mips/mips16e2-mt-sub.s: New test source.
* testsuite/gas/mips/mips16e2-hilo.s: New test source.
* testsuite/gas/mips/mips16e2-reloc-error.s: New test source.
* testsuite/gas/mips/mips16e2-imm-error.s: New test source.
* testsuite/gas/mips/elf-rel9-mips16e2.s: New test source.
* testsuite/gas/mips/mips16e2-lui.s: New test source.
* testsuite/gas/mips/mips.exp: Expand `mips32r2-sync',
`mips32r2-sync-1', `lui-1' and `lui-2' tests across MIPS16e2
architectures. Run the new tests.

MIPS16e2: Add MIPS16e2 ASE GAS test infrastructure

Define a new 32-bit and 64-bit MIPS16e2 test architecture and adjust
existing tests now run against these architectures accordingly.

gas/
* testsuite/gas/mips/mips.exp (run_dump_test_arch): Add
`mips16e2@' prefix.
(run_list_test_arch): Likewise.
(mips16e2-32, mips16e2-64): New architectures.
* testsuite/gas/mips/mips16e2-32@mips16-macro.d: New test.
* testsuite/gas/mips/mips16e2-32@mips16-macro-t.d: New test.
* testsuite/gas/mips/mips16e2-32@mips16-macro-e.d: New test.
* testsuite/gas/mips/mips16e2-32@mips16-insn-t.d: New test.
* testsuite/gas/mips/mips16e2-32@mips16-insn-e.d: New test.
* testsuite/gas/mips/mips16e2-32@mips16e-64.d: New test.
* testsuite/gas/mips/mips16e2-32@mips16-sub.d: New test.
* testsuite/gas/mips/mips16e2-32@mips16e-64-sub.d: New test.
* testsuite/gas/mips/mips16e2@relax-swap3.d: New test.
* testsuite/gas/mips/mips16-32@mips16-asmacro.d: Remove `source'
tag. Add `-I$srcdir/$subdir' to `as' flags.
* testsuite/gas/mips/mips16-64@mips16-asmacro.d: Likewise.
* testsuite/gas/mips/mips16e2-32@mips16-macro.l: New stderr
output.
* testsuite/gas/mips/mips16e2-32@mips16-macro-t.l: New stderr
output.
* testsuite/gas/mips/mips16e2-32@mips16-macro-e.l: New stderr
output.
* testsuite/gas/mips/mips16e2-32@mips16-insn-t.l: New stderr
output.
* testsuite/gas/mips/mips16e2-32@mips16-insn-e.l: New stderr
output.
* testsuite/gas/mips/mips16-sub.s: Add `.set nomips16e2'.
* testsuite/gas/mips/mips16e-sub.s: Likewise.
* testsuite/gas/mips/mips16e-64-sub.s: Likewise.
* testsuite/gas/mips/mips16-asmacro.s: Remove `.set mips32'.
* testsuite/gas/mips/mips16-32@mips16-asmacro.s: New test
source.
* testsuite/gas/mips/mips16-64@mips16-asmacro.s: New test
source.

MIPS16e2: Add MIPS16e2 ASE support

Add MIPS16e2 ASE support as per the architecture specification[1],
including in particular:

1. A new ELF ASE flag to mark MIPS16e2 binaries.

2. MIPS16e2 instruction assembly support, including a relaxation update
   to use LUI rather than an LI/SLL instruction pair for loading the
   high part of 32-bit addresses.

3. MIPS16e2 instruction disassembly support, including updated rules for
   extended forms of instructions that are now subdecoded and therefore
   do not alias to the original MIPS16 ISA revision instructions even
   for encodings that are not valid in the MIPS16e2 instruction set.

Add `-mmips16e2' and `-mno-mips16e2' GAS command-line options and their
corresponding `mips16e2' and `no-mips16e2' settings for the `.set' and
`.module' pseudo-ops.  Control the availability of the MT ASE subset of
the MIPS16e2 instruction set with a combination of these controls and
the preexisting MT ASE controls.

Parts of this change by Matthew Fortune and Andrew Bennett.

References:

[1] "MIPS32 Architecture for Programmers: MIPS16e2 Application-Specific
    Extension Technical Reference Manual", Imagination Technologies
    Ltd., Document Number: MD01172, Revision 01.00, April 26, 2016

include/
* elf/mips.h (AFL_ASE_MIPS16E2): New macro.
(AFL_ASE_MASK): Adjust accordingly.
* opcode/mips.h: Document new operand codes defined.
(mips_operand_type): Add OP_REG28 enum value.
(INSN2_SHORT_ONLY): Update description.
(ASE_MIPS16E2, ASE_MIPS16E2_MT): New macros.

bfd/
* elfxx-mips.c (print_mips_ases): Handle MIPS16e2 ASE.

opcodes/
* mips-dis.c (mips_arch_choices): Add ASE_MIPS16E2 and
ASE_MIPS16E2_MT flags to the unnamed MIPS16 entry.
(mips_convert_abiflags_ases): Handle the AFL_ASE_MIPS16E2 flag.
(print_insn_arg) <OP_REG28>: Add handler.
(validate_insn_args) <OP_REG28>: Handle.
(print_mips16_insn_arg): Handle MIPS16 instructions that require
32-bit encoding and 9-bit immediates.
(print_insn_mips16): Handle MIPS16 instructions that require
32-bit encoding and MFC0/MTC0 operand decoding.
* mips16-opc.c (decode_mips16_operand) <'>', '9', 'G', 'N', 'O'>
<'Q', 'T', 'b', 'c', 'd', 'r', 'u'>: Add handlers.
(RD_C0, WR_C0, E2, E2MT): New macros.
(mips16_opcodes): Add entries for MIPS16e2 instructions:
GP-relative "addiu" and its "addu" spelling, "andi", "cache",
"di", "ehb", "ei", "ext", "ins", GP-relative "lb", "lbu", "lh",
"lhu", and "lw" instructions, "ll", "lui", "lwl", "lwr", "mfc0",
"movn", "movtn", "movtz", "movz", "mtc0", "ori", "pause",
"pref", "rdhwr", "sc", GP-relative "sb", "sh" and "sw"
instructions, "swl", "swr", "sync" and its "sync_acquire",
"sync_mb", "sync_release", "sync_rmb" and "sync_wmb" aliases,
"xori", "dmt", "dvpe", "emt" and "evpe".  Add split
regular/extended entries for original MIPS16 ISA revision
instructions whose extended forms are subdecoded in the MIPS16e2
ISA revision: "li", "sll" and "srl".

binutils/
* readelf.c (print_mips_ases): Handle MIPS16e2 ASE.
* NEWS: Mention MIPS16e2 ASE support.

gas/
* config/tc-mips.c (RELAX_MIPS16_ENCODE): Add `e2' flag.
(RELAX_MIPS16_E2): New macro.
(RELAX_MIPS16_PIC, RELAX_MIPS16_SYM32, RELAX_MIPS16_NOMACRO)
(RELAX_MIPS16_USER_SMALL, RELAX_MIPS16_USER_EXT)
(RELAX_MIPS16_DSLOT, RELAX_MIPS16_JAL_DSLOT)
(RELAX_MIPS16_EXTENDED, RELAX_MIPS16_MARK_EXTENDED)
(RELAX_MIPS16_CLEAR_EXTENDED, RELAX_MIPS16_ALWAYS_EXTENDED)
(RELAX_MIPS16_MARK_ALWAYS_EXTENDED)
(RELAX_MIPS16_CLEAR_ALWAYS_EXTENDED, RELAX_MIPS16_MACRO)
(RELAX_MIPS16_MARK_MACRO, RELAX_MIPS16_CLEAR_MACRO): Shift bits.
(mips16_immed_extend): New prototype.
(options): Add OPTION_MIPS16E2 and OPTION_NO_MIPS16E2 enum
values.
(md_longopts): Add "mmips16e2" and "mno-mips16e2" options.
(mips_ases): Add "mips16e2" entry.
(mips_set_ase): Handle MIPS16e2 ASE.
(insn_insert_operand): Explicitly handle immediates with MIPS16
instructions that require 32-bit encoding.
(is_opcode_valid_16): Pass enabled ASE bitmask on to
`opcode_is_member'.
(validate_mips_insn): Explicitly handle immediates with MIPS16
instructions that require 32-bit encoding.
(operand_reg_mask) <OP_REG28>: Add handler.
(match_reg28_operand): New function.
(match_operand) <OP_REG28>: Add handler.
(append_insn): Pass ASE_MIPS16E2 setting to RELAX_MIPS16_ENCODE.
(match_mips16_insn): Handle MIPS16 instructions that require
32-bit encoding and `V' and `u' operand codes.
(mips16_ip): Allow any characters except from `.' in opcodes.
(mips16_immed_extend): Handle 9-bit immediates.  Do not shuffle
immediates whose width is not one of these listed.
(md_estimate_size_before_relax): Handle MIPS16e2 relaxation.
(mips_relax_frag): Likewise.
(md_convert_frag): Likewise.
(mips_convert_ase_flags): Handle MIPS16e2 ASE.

* doc/as.texinfo (Target MIPS options): Add `-mmips16e2' and
`-mno-mips16e2' options.
(-mmips16e2, -mno-mips16e2): New options.
* doc/c-mips.texi (MIPS Options): Add `-mmips16e2' and
`-mno-mips16e2' options.
(MIPS ASE Instruction Generation Overrides): Add `.set mips16e2'
and `.set nomips16e2'.

MIPS16/GAS: Improve [32768,65535] out-of-range operand error diagnostics

Improve out-of-range operand error diagnostics for invalid values in the
[32768,65535] range used for a signed 16-bit immediate, making the
message consistent with that used for other invalid values, e.g.:

foo.s:1: Error: operand 2 must be an immediate expression `addiu $2,$gp,32768'
foo.s:2: Error: invalid operands `lw $2,32768($gp)'

vs:

foo.s:3: Error: operand 3 out of range `addiu $2,$gp,-32769'
foo.s:4: Error: operand 2 out of range `lw $2,-32769($gp)'

This case does not currently trigger however, for two reasons.

First, for regular MIPS and microMIPS assembly in the case of no match
caused by `match_int_operand' here, the function is always called again
from `mips_ip' via `match_insns', `match_insn' and then `match_operand'
for the same opcode table's entry with `lax_match' set to TRUE, in which
case the attempt to match succeeds and no error is issued.

Second, in the case of MIPS16 assembly no call to `match_int_operand' is
made at all for signed 16-bit immediates, because such immediates are
currently only matched with extensible instructions, and these are
handled in `match_mips16_insn' via `match_expression' directly rather
than via `match_operand'.

This will change for MIPS16 code with MIPS16e2 support introduced, where
non-extensible instructions accepting signed 16-bit immediates will be
added, so make the case work well right from the start:

foo.s:1: Error: operand 3 out of range `addiu $2,$gp,32768'
foo.s:2: Error: operand 2 out of range `lw $2,32768($gp)'

gas/
* config/tc-mips.c (match_int_operand): Call
`match_out_of_range' before returning failure for 0x8000-0xffff
values conditionally allowed.

MIPS16/GAS: Improve non-constant operand error diagnostics

Improve operand error diagnostics for non-constant expressions used for
a 16-bit immediate, making the message more descriptive and indicating
the offending operand, e.g.:

foo.s:1: Error: invalid operands `lui $2,foo-bar'

will show as:

foo.s:1: Error: operand 2 must be constant `lui $2,foo-bar'

This case does not currently trigger however, for two reasons.

First, for regular MIPS and microMIPS assembly in the case of no match
caused by `match_int_operand' here, the function is always called again
from `mips_ip' via `match_insns', `match_insn' and then `match_operand'
for the same opcode table's entry with `lax_match' set to TRUE, in which
case the attempt to match succeeds and no error is issued.

Second, in the case of MIPS16 assembly no call to `match_int_operand' is
made at all for 16-bit immediates, because such immediates are currently
only matched with extensible instructions, and these are handled in
`match_mips16_insn' via `match_expression' directly rather than via
`match_operand'.

This will change for MIPS16 code with MIPS16e2 support introduced, where
non-extensible instructions accepting 16-bit immediates will be added,
so make the case work well right from the start.

gas/
* config/tc-mips.c (match_int_operand): Call
`match_not_constant' before returning failure for a non-constant
16-bit immediate conditionally allowed.

MIPS/GAS: Improve bignum operand error diagnostics

Improve bignum operand error diagnostics for cases where a constant
would be accepted and report them as range errors, also indicating the
offending operand and instruction, e.g.:

$ cat bignum.s
addiu $2, 0x10000000000000000
break 0x10000000000000000
$ as -o bignum.o bignum.s
bignum.s:1: Error: bignum invalid
bignum.s:2: Error: operand 1 must be constant `break 0x10000000000000000'
$

now show as:

$ as -o bignum.o bignum.s
bignum.s:1: Error: operand 2 out of range `addiu $2,0x10000000000000000'
bignum.s:2: Error: operand 1 out of range `break 0x10000000000000000'
$

gas/
* config/tc-mips.c (match_const_int): Call `match_out_of_range'
rather than `match_not_constant' for unrelocated operands
retrieved as an `O_big' expression.
(match_int_operand): Call `match_out_of_range' for relocatable
operands retrieved as an `O_big' expression.
(match_mips16_insn): Call `match_out_of_range' for relaxable
operands retrieved as an `O_big' expression.
* testsuite/gas/mips/addiu-error.d: New test.
* testsuite/gas/mips/mips16@addiu-error.d: New test.
* testsuite/gas/mips/micromips@addiu-error.d: New test.
* testsuite/gas/mips/break-error.d: New test.
* testsuite/gas/mips/lui-1.l: Adjust error message.
* testsuite/gas/mips/addiu-error.l: New stderr output.
* testsuite/gas/mips/mips16@addiu-error.l: New stderr output.
* testsuite/gas/mips/micromips@addiu-error.l: New stderr output.
* testsuite/gas/mips/break-error.l: New stderr output.
* testsuite/gas/mips/addiu-error.s: New test source.
* testsuite/gas/mips/break-error.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.

MIPS16/GAS: Improve non-immediate operand error diagnostics

Improve non-immediate operand error diagnostics for extensible MIPS16
instructions and make it match corresponding regular MIPS and microMIPS
handling, e.g:

$ cat addiu.s
        addiu    $4, $3, $2
$ as -o addiu.o addiu.s
addiu.s: Assembler messages:
addiu.s:1: Error: operand 3 must be an immediate expression `addiu $4,$3,$2'
$ as -mips16 -o addiu.o addiu.s
addiu.s: Assembler messages:
addiu.s:1: Error: invalid operands `addiu $4,$3,$2'
$

To do so observe that for extensible MIPS16 instructions and a non-PC
relative operand this case is handled by an explicit OT_INTEGER check in
`match_mips16_insn' returning a failure right away and consequently
preventing a call to `match_expression' from being made.  As from commit
d436c1c2e889 ("Improve error reporting for register expressions"),
<https://sourceware.org/ml/binutils/2013-08/msg00134.html>, however the
check has become redundant as `match_expression' now only ever returns
success for OT_INTEGER argument tokens, and a special case of an OT_CHAR
`(' token already handled by `match_mips16_insn' just ahead of the
`match_expression' call.  Previously it also returned success for OT_REG
argument tokens.

Let the call to `match_expression' always happen then, yielding the same
failure for the affected cases, however with more accurate diagnostics
provided by the call making reporting consistent:

$ as -mips16 -o addiu.o addiu.s
addiu.s: Assembler messages:
addiu.s:1: Error: operand 3 must be an immediate expression `addiu $4,$3,$2'
$

gas/
* config/tc-mips.c (match_mips16_insn): Remove the explicit
OT_INTEGER check before the `match_expression' call.
* testsuite/gas/mips/mips16-insn-e.l: Adjust messages.
* testsuite/gas/mips/mips16-32@mips16-insn-e.l: Likewise.
* testsuite/gas/mips/mips16-64@mips16-insn-e.l: Likewise.
* testsuite/gas/mips/mips16e-32@mips16-insn-e.l: Likewise.
* testsuite/gas/mips/mips16-reg-error.d: New test.
* testsuite/gas/mips/mips16-reg-error.l: New stderr output.
* testsuite/gas/mips/mips16-reg-error.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new test.

MIPS16/GAS: Improve disallowed relocation operand error diagnostics

Improve disallowed relocation operand error diagnostics for MIPS16 code
and make it match corresponding regular MIPS and microMIPS handling,
e.g:

$ cat sltu.s
sltu $2, %lo(foo)
$ as -o sltu.o sltu.s
sltu.s: Assembler messages:
sltu.s:1: Error: operand 2 must be constant `sltu $2,%lo(foo)'
$ as -mips16 -o sltu.o sltu.s
sltu.s: Assembler messages:
sltu.s:1: Error: invalid operands `sltu $2,%lo(foo)'
$

To do so call `match_not_constant' from `match_mips16_insn' whenever a
disallowed relocation operation has been noticed, like `match_const_int'
does, making reporting consistent:

$ as -mips16 -o sltu.o sltu.s
sltu.s: Assembler messages:
sltu.s:1: Error: operand 2 must be constant `sltu $2,%lo(foo)'
$

gas/
* config/tc-mips.c (match_mips16_insn): Call
`match_not_constant' for a disallowed relocation operation.
* testsuite/gas/mips/mips16-reloc-error.d: New test.
* testsuite/gas/mips/mips16-reloc-error.l: New stderr output.
* testsuite/gas/mips/mips16-reloc-error.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new test.

MIPS/GAS/testsuite: Convert LUI list tests to dump tests

gas/
* testsuite/gas/mips/lui-1.d: New test.
* testsuite/gas/mips/lui-2.d: New test.
* gas/testsuite/gas/mips/mips.exp: Fold corresponding list tests
into the new tests.

MIPS/opcodes: Remove an incorrect MT ASE reference in MFC0/MTC0 decoding

The `sel' operand of CP0 move instructions is a part of the base ISA and
has nothing to do with the MT ASE.

opcodes/
* mips-dis.c (print_insn_args) <default>: Remove an MT ASE
reference in CP0 move operand decoding.

MIPS/GAS: Update `match_const_int' description

Remove a stale reference to FALLBACK parameter from the description of
`match_const_int', matching commit 1a00e61226b3 ("Remove soft_match"),
<https://sourceware.org/ml/binutils/2013-08/msg00133.html>.

gas/
* config/tc-mips.c (match_const_int): Update description.

MIPS/GAS/doc: Refer to `.module' rather than `.set'

Complement commit 919731affbef ("Add MIPS .module directive") and update
the GAS manual to refer to the `.module' rather than `.set' directive in
command-line option descriptions, following an observation that unlike
`.set' and like the respective command-line option the use of the
`.module' directive affects the ISA and ASE flags recorded in the object
file produced, and therefore it is `.module' rather than `.set' that
corresponds to the respective command-line option.

gas/
* doc/as.texinfo (-mips16, -no-mips16): Refer to `.module
mips16' rather than `.set mips16'.
(-mmicromips, -mno-micromips): Refer to `.module micromips' and
`.module nomicromips' rather than `.set micromips' and `.set
nomicromips'.
(-msmartmips, -mno-smartmips): Refer to `.module smartmips'
rather than `.set smartmips'.
* doc/c-mips.texi (MIPS Options): Refer to `.module mips16',
`.module micromips', `.module nomicromips' and `.module
smartmips' rather than `.set mips16', `.set micromips', `.set
nomicromips' and `.set smartmips' respectively.

Fix gdb procfs.c compilation on Solaris

Prompted by the creation of the gdb 8.0 branch, I tried to build it on
x86_64-pc-solaris2.12, but failed:

/vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c: In function `target_ops* procfs_target()':
/vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c:186:27: error: invalid conversion from `void (*)(target_ops*, char*, char*, char**, int)' to `void (*)(target_ops*, const char*, const string&, char**, int) {aka void (*)(target_ops*, const char*, const std::__cxx11::basic_string<char>&, char**, int)}' [-fpermissive]
   t->to_create_inferior = procfs_create_inferior;
                           ^~~~~~~~~~~~~~~~~~~~~~
/vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c: At global scope:
/vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c:125:13: warning: `void procfs_create_inferior(target_ops*, char*, char*, char**, int)' declared `static' but never defined [-Wunused-function]
static void procfs_create_inferior (struct target_ops *, char *,
             ^~~~~~~~~~~~~~~~~~~~~~
/vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c:4529:1: warning: `void procfs_create_inferior(target_ops*, const char*, const string&, char**, int)' defined but not used [-Wunused-function]
procfs_create_inferior (struct target_ops *ops, const char *exec_file,
^~~~~~~~~~~~~~~~~~~~~~

This can easily be fixed by the following patch.

* procfs.c (procfs_create_inferior): Change prototype to match
definition.

Add .debug_gdb_scripts section to PE linker scripts.

PR ld/21459
* scripttempl/pe.sc: Add .debug_gdb_scripts section.
* scripttempl/pep.sc: Likewise.

Automatic date update in version.in

Fix match and mask for 64-bit bb opcode.

Automatic date update in version.in